Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/usb/ohci.c
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1 /* $NetBSD: ohci.c,v 1.138 2003/02/08 03:32:50 ichiro Exp $ */ 2 3 /* Also, already ported: 4 * $NetBSD: ohci.c,v 1.140 2003/05/13 04:42:00 gson Exp $ 5 * $NetBSD: ohci.c,v 1.141 2003/09/10 20:08:29 mycroft Exp $ 6 * $NetBSD: ohci.c,v 1.142 2003/10/11 03:04:26 toshii Exp $ 7 * $NetBSD: ohci.c,v 1.143 2003/10/18 04:50:35 simonb Exp $ 8 * $NetBSD: ohci.c,v 1.144 2003/11/23 19:18:06 augustss Exp $ 9 * $NetBSD: ohci.c,v 1.145 2003/11/23 19:20:25 augustss Exp $ 10 * $NetBSD: ohci.c,v 1.146 2003/12/29 08:17:10 toshii Exp $ 11 * $NetBSD: ohci.c,v 1.147 2004/06/22 07:20:35 mycroft Exp $ 12 * $NetBSD: ohci.c,v 1.148 2004/06/22 18:27:46 mycroft Exp $ 13 */ 14 15 #include <sys/cdefs.h> 16 __FBSDID("$FreeBSD: releng/7.3/sys/dev/usb/ohci.c 195498 2009-07-09 15:27:07Z n_hibma $"); 17 18 /*- 19 * Copyright (c) 1998 The NetBSD Foundation, Inc. 20 * All rights reserved. 21 * 22 * This code is derived from software contributed to The NetBSD Foundation 23 * by Lennart Augustsson (lennart@augustsson.net) at 24 * Carlstedt Research & Technology. 25 * 26 * Redistribution and use in source and binary forms, with or without 27 * modification, are permitted provided that the following conditions 28 * are met: 29 * 1. Redistributions of source code must retain the above copyright 30 * notice, this list of conditions and the following disclaimer. 31 * 2. Redistributions in binary form must reproduce the above copyright 32 * notice, this list of conditions and the following disclaimer in the 33 * documentation and/or other materials provided with the distribution. 34 * 3. All advertising materials mentioning features or use of this software 35 * must display the following acknowledgement: 36 * This product includes software developed by the NetBSD 37 * Foundation, Inc. and its contributors. 38 * 4. Neither the name of The NetBSD Foundation nor the names of its 39 * contributors may be used to endorse or promote products derived 40 * from this software without specific prior written permission. 41 * 42 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 43 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 44 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 45 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 46 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 47 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 48 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 49 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 50 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 51 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 52 * POSSIBILITY OF SUCH DAMAGE. 53 */ 54 55 /* 56 * USB Open Host Controller driver. 57 * 58 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 59 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 60 */ 61 62 #include <sys/param.h> 63 #include <sys/systm.h> 64 #include <sys/malloc.h> 65 #include <sys/kernel.h> 66 #include <sys/endian.h> 67 #include <sys/module.h> 68 #include <sys/bus.h> 69 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 70 #include <machine/cpu.h> 71 #endif 72 #include <sys/proc.h> 73 #include <sys/queue.h> 74 #include <sys/sysctl.h> 75 76 #include <machine/bus.h> 77 #include <machine/endian.h> 78 79 #include <dev/usb/usb.h> 80 #include <dev/usb/usbdi.h> 81 #include <dev/usb/usbdivar.h> 82 #include <dev/usb/usb_mem.h> 83 #include <dev/usb/usb_quirks.h> 84 85 #include <dev/usb/ohcireg.h> 86 #include <dev/usb/ohcivar.h> 87 88 #define delay(d) DELAY(d) 89 90 #ifdef USB_DEBUG 91 #define DPRINTF(x) if (ohcidebug) printf x 92 #define DPRINTFN(n,x) if (ohcidebug>(n)) printf x 93 int ohcidebug = 0; 94 SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci"); 95 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW, 96 &ohcidebug, 0, "ohci debug level"); 97 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 struct ohci_pipe; 104 105 static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 106 static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 107 108 static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 109 static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 110 111 static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 112 static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 113 114 #if 0 115 static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 116 ohci_soft_td_t *); 117 #endif 118 static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 119 ohci_softc_t *, int, int, usbd_xfer_handle, 120 ohci_soft_td_t *, ohci_soft_td_t **); 121 122 #if defined(__NetBSD__) || defined(__OpenBSD__) 123 static void ohci_shutdown(void *v); 124 static void ohci_power(int, void *); 125 #endif 126 static usbd_status ohci_open(usbd_pipe_handle); 127 static void ohci_poll(struct usbd_bus *); 128 static void ohci_softintr(void *); 129 static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 130 static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 131 static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 132 133 static usbd_status ohci_device_request(usbd_xfer_handle xfer); 134 static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 135 static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 136 static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 137 static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 138 static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 139 static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 140 static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 141 static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 142 143 static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 144 static void ohci_device_isoc_enter(usbd_xfer_handle); 145 146 static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 147 static void ohci_freem(struct usbd_bus *, usb_dma_t *); 148 149 static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 150 static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 151 152 static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 153 static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 154 static void ohci_root_ctrl_abort(usbd_xfer_handle); 155 static void ohci_root_ctrl_close(usbd_pipe_handle); 156 static void ohci_root_ctrl_done(usbd_xfer_handle); 157 158 static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 159 static usbd_status ohci_root_intr_start(usbd_xfer_handle); 160 static void ohci_root_intr_abort(usbd_xfer_handle); 161 static void ohci_root_intr_close(usbd_pipe_handle); 162 static void ohci_root_intr_done(usbd_xfer_handle); 163 164 static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 165 static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 166 static void ohci_device_ctrl_abort(usbd_xfer_handle); 167 static void ohci_device_ctrl_close(usbd_pipe_handle); 168 static void ohci_device_ctrl_done(usbd_xfer_handle); 169 170 static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 171 static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 172 static void ohci_device_bulk_abort(usbd_xfer_handle); 173 static void ohci_device_bulk_close(usbd_pipe_handle); 174 static void ohci_device_bulk_done(usbd_xfer_handle); 175 176 static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 177 static usbd_status ohci_device_intr_start(usbd_xfer_handle); 178 static void ohci_device_intr_abort(usbd_xfer_handle); 179 static void ohci_device_intr_close(usbd_pipe_handle); 180 static void ohci_device_intr_done(usbd_xfer_handle); 181 182 static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 183 static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 184 static void ohci_device_isoc_abort(usbd_xfer_handle); 185 static void ohci_device_isoc_close(usbd_pipe_handle); 186 static void ohci_device_isoc_done(usbd_xfer_handle); 187 188 static usbd_status ohci_device_setintr(ohci_softc_t *sc, 189 struct ohci_pipe *pipe, int ival); 190 static usbd_status ohci_device_intr_insert(ohci_softc_t *sc, 191 usbd_xfer_handle xfer); 192 193 static int ohci_str(usb_string_descriptor_t *, int, const char *); 194 195 static void ohci_timeout(void *); 196 static void ohci_timeout_task(void *); 197 static void ohci_rhsc_able(ohci_softc_t *, int); 198 static void ohci_rhsc_enable(void *); 199 200 static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 201 static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 202 203 static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 204 static void ohci_noop(usbd_pipe_handle pipe); 205 206 static usbd_status ohci_controller_init(ohci_softc_t *sc); 207 208 #ifdef USB_DEBUG 209 static void ohci_dumpregs(ohci_softc_t *); 210 static void ohci_dump_tds(ohci_soft_td_t *); 211 static void ohci_dump_td(ohci_soft_td_t *); 212 static void ohci_dump_ed(ohci_soft_ed_t *); 213 static void ohci_dump_itd(ohci_soft_itd_t *); 214 static void ohci_dump_itds(ohci_soft_itd_t *); 215 #endif 216 217 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 218 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 219 #define OWRITE1(sc, r, x) \ 220 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 221 #define OWRITE2(sc, r, x) \ 222 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 223 #define OWRITE4(sc, r, x) \ 224 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 225 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 226 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 227 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 228 229 /* Reverse the bits in a value 0 .. 31 */ 230 static u_int8_t revbits[OHCI_NO_INTRS] = 231 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 232 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 233 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 234 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 235 236 struct ohci_pipe { 237 struct usbd_pipe pipe; 238 ohci_soft_ed_t *sed; 239 u_int32_t aborting; 240 union { 241 ohci_soft_td_t *td; 242 ohci_soft_itd_t *itd; 243 } tail; 244 /* Info needed for different pipe kinds. */ 245 union { 246 /* Control pipe */ 247 struct { 248 usb_dma_t reqdma; 249 u_int length; 250 ohci_soft_td_t *setup, *data, *stat; 251 } ctl; 252 /* Interrupt pipe */ 253 struct { 254 int nslots; 255 int pos; 256 } intr; 257 /* Bulk pipe */ 258 struct { 259 u_int length; 260 int isread; 261 } bulk; 262 /* Iso pipe */ 263 struct iso { 264 int next, inuse; 265 } iso; 266 } u; 267 }; 268 269 #define OHCI_INTR_ENDPT 1 270 271 static struct usbd_bus_methods ohci_bus_methods = { 272 ohci_open, 273 ohci_softintr, 274 ohci_poll, 275 ohci_allocm, 276 ohci_freem, 277 ohci_allocx, 278 ohci_freex, 279 }; 280 281 static struct usbd_pipe_methods ohci_root_ctrl_methods = { 282 ohci_root_ctrl_transfer, 283 ohci_root_ctrl_start, 284 ohci_root_ctrl_abort, 285 ohci_root_ctrl_close, 286 ohci_noop, 287 ohci_root_ctrl_done, 288 }; 289 290 static struct usbd_pipe_methods ohci_root_intr_methods = { 291 ohci_root_intr_transfer, 292 ohci_root_intr_start, 293 ohci_root_intr_abort, 294 ohci_root_intr_close, 295 ohci_noop, 296 ohci_root_intr_done, 297 }; 298 299 static struct usbd_pipe_methods ohci_device_ctrl_methods = { 300 ohci_device_ctrl_transfer, 301 ohci_device_ctrl_start, 302 ohci_device_ctrl_abort, 303 ohci_device_ctrl_close, 304 ohci_noop, 305 ohci_device_ctrl_done, 306 }; 307 308 static struct usbd_pipe_methods ohci_device_intr_methods = { 309 ohci_device_intr_transfer, 310 ohci_device_intr_start, 311 ohci_device_intr_abort, 312 ohci_device_intr_close, 313 ohci_device_clear_toggle, 314 ohci_device_intr_done, 315 }; 316 317 static struct usbd_pipe_methods ohci_device_bulk_methods = { 318 ohci_device_bulk_transfer, 319 ohci_device_bulk_start, 320 ohci_device_bulk_abort, 321 ohci_device_bulk_close, 322 ohci_device_clear_toggle, 323 ohci_device_bulk_done, 324 }; 325 326 static struct usbd_pipe_methods ohci_device_isoc_methods = { 327 ohci_device_isoc_transfer, 328 ohci_device_isoc_start, 329 ohci_device_isoc_abort, 330 ohci_device_isoc_close, 331 ohci_noop, 332 ohci_device_isoc_done, 333 }; 334 335 int 336 ohci_detach(struct ohci_softc *sc, int flags) 337 { 338 int i, rv = 0; 339 340 sc->sc_dying = 1; 341 callout_stop(&sc->sc_tmo_rhsc); 342 343 #if defined(__NetBSD__) || defined(__OpenBSD__) 344 powerhook_disestablish(sc->sc_powerhook); 345 shutdownhook_disestablish(sc->sc_shutdownhook); 346 #endif 347 348 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 349 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 350 351 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 352 353 for (i = 0; i < OHCI_NO_EDS; i++) 354 ohci_free_sed(sc, sc->sc_eds[i]); 355 ohci_free_sed(sc, sc->sc_isoc_head); 356 ohci_free_sed(sc, sc->sc_bulk_head); 357 ohci_free_sed(sc, sc->sc_ctrl_head); 358 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 359 360 return (rv); 361 } 362 363 ohci_soft_ed_t * 364 ohci_alloc_sed(ohci_softc_t *sc) 365 { 366 ohci_soft_ed_t *sed; 367 usbd_status err; 368 int i, offs; 369 usb_dma_t dma; 370 371 if (sc->sc_freeeds == NULL) { 372 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 373 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 374 OHCI_ED_ALIGN, &dma); 375 if (err) 376 return (NULL); 377 for(i = 0; i < OHCI_SED_CHUNK; i++) { 378 offs = i * OHCI_SED_SIZE; 379 sed = KERNADDR(&dma, offs); 380 sed->physaddr = DMAADDR(&dma, offs); 381 sed->next = sc->sc_freeeds; 382 sc->sc_freeeds = sed; 383 } 384 } 385 sed = sc->sc_freeeds; 386 sc->sc_freeeds = sed->next; 387 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 388 sed->next = 0; 389 return (sed); 390 } 391 392 void 393 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 394 { 395 sed->next = sc->sc_freeeds; 396 sc->sc_freeeds = sed; 397 } 398 399 ohci_soft_td_t * 400 ohci_alloc_std(ohci_softc_t *sc) 401 { 402 ohci_soft_td_t *std; 403 usbd_status err; 404 int i, offs; 405 usb_dma_t dma; 406 int s; 407 408 if (sc->sc_freetds == NULL) { 409 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 410 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 411 OHCI_TD_ALIGN, &dma); 412 if (err) 413 return (NULL); 414 s = splusb(); 415 for(i = 0; i < OHCI_STD_CHUNK; i++) { 416 offs = i * OHCI_STD_SIZE; 417 std = KERNADDR(&dma, offs); 418 std->physaddr = DMAADDR(&dma, offs); 419 std->nexttd = sc->sc_freetds; 420 sc->sc_freetds = std; 421 } 422 splx(s); 423 } 424 425 s = splusb(); 426 std = sc->sc_freetds; 427 sc->sc_freetds = std->nexttd; 428 memset(&std->td, 0, sizeof(ohci_td_t)); 429 std->nexttd = NULL; 430 std->xfer = NULL; 431 ohci_hash_add_td(sc, std); 432 splx(s); 433 434 return (std); 435 } 436 437 void 438 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 439 { 440 int s; 441 442 s = splusb(); 443 ohci_hash_rem_td(sc, std); 444 std->nexttd = sc->sc_freetds; 445 sc->sc_freetds = std; 446 splx(s); 447 } 448 449 usbd_status 450 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 451 int alen, int rd, usbd_xfer_handle xfer, 452 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 453 { 454 ohci_soft_td_t *next, *cur, *end; 455 ohci_physaddr_t dataphys, physend; 456 u_int32_t tdflags; 457 int offset = 0; 458 int len, maxp, curlen, curlen2, seg, segoff; 459 struct usb_dma_mapping *dma = &xfer->dmamap; 460 u_int16_t flags = xfer->flags; 461 462 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 463 464 len = alen; 465 cur = sp; 466 end = NULL; 467 468 maxp = UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 469 tdflags = htole32( 470 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 471 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 472 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_SET_DI(6)); 473 474 seg = 0; 475 segoff = 0; 476 while (len > 0) { 477 next = ohci_alloc_std(sc); 478 if (next == NULL) 479 goto nomem; 480 481 /* 482 * The OHCI hardware can handle at most one 4k crossing. 483 * The OHCI spec says: If during the data transfer the buffer 484 * address contained in the HC's working copy of 485 * CurrentBufferPointer crosses a 4K boundary, the upper 20 486 * bits of Buffer End are copied to the working value of 487 * CurrentBufferPointer causing the next buffer address to 488 * be the 0th byte in the same 4K page that contains the 489 * last byte of the buffer (the 4K boundary crossing may 490 * occur within a data packet transfer.) 491 */ 492 KASSERT(seg < dma->nsegs, ("ohci_alloc_std_chain: overrun")); 493 dataphys = dma->segs[seg].ds_addr + segoff; 494 curlen = dma->segs[seg].ds_len - segoff; 495 if (curlen > len) 496 curlen = len; 497 physend = dataphys + curlen - 1; 498 if (OHCI_PAGE(dataphys) != OHCI_PAGE(physend)) { 499 /* Truncate to two OHCI pages if there are more. */ 500 if (curlen > 2 * OHCI_PAGE_SIZE - 501 OHCI_PAGE_OFFSET(dataphys)) 502 curlen = 2 * OHCI_PAGE_SIZE - 503 OHCI_PAGE_OFFSET(dataphys); 504 if (curlen < len) 505 curlen -= curlen % maxp; 506 physend = dataphys + curlen - 1; 507 } else if (OHCI_PAGE_OFFSET(physend + 1) == 0 && curlen < len && 508 curlen + segoff == dma->segs[seg].ds_len) { 509 /* We can possibly include another segment. */ 510 KASSERT(seg + 1 < dma->nsegs, 511 ("ohci_alloc_std_chain: overrun2")); 512 seg++; 513 514 /* Determine how much of the second segment to use. */ 515 curlen2 = dma->segs[seg].ds_len; 516 if (curlen + curlen2 > len) 517 curlen2 = len - curlen; 518 if (OHCI_PAGE(dma->segs[seg].ds_addr) != 519 OHCI_PAGE(dma->segs[seg].ds_addr + curlen2 - 1)) 520 curlen2 = OHCI_PAGE_SIZE - 521 OHCI_PAGE_OFFSET(dma->segs[seg].ds_addr); 522 if (curlen + curlen2 < len) 523 curlen2 -= (curlen + curlen2) % maxp; 524 525 if (curlen2 > 0) { 526 /* We can include a second segment */ 527 segoff = curlen2; 528 physend = dma->segs[seg].ds_addr + curlen2 - 1; 529 curlen += curlen2; 530 } else { 531 /* Second segment not usable now. */ 532 seg--; 533 segoff += curlen; 534 } 535 } else { 536 /* Simple case where there is just one OHCI page. */ 537 segoff += curlen; 538 } 539 if (curlen == 0 && len != 0) { 540 /* 541 * A maxp length packet would need to be split. 542 * This shouldn't be possible if PAGE_SIZE >= 4k 543 * and the buffer is contiguous in virtual memory. 544 */ 545 panic("ohci_alloc_std_chain: XXX need to copy"); 546 } 547 if (segoff >= dma->segs[seg].ds_len) { 548 KASSERT(segoff == dma->segs[seg].ds_len, 549 ("ohci_alloc_std_chain: overlap")); 550 seg++; 551 segoff = 0; 552 } 553 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 554 "len=%d curlen=%d\n", 555 dataphys, len, curlen)); 556 len -= curlen; 557 558 cur->td.td_flags = tdflags; 559 cur->td.td_cbp = htole32(dataphys); 560 cur->nexttd = next; 561 cur->td.td_nexttd = htole32(next->physaddr); 562 cur->td.td_be = htole32(physend); 563 cur->len = curlen; 564 cur->flags = OHCI_ADD_LEN; 565 cur->xfer = xfer; 566 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 567 dataphys, dataphys + curlen - 1)); 568 if (len < 0) 569 panic("Length went negative: %d curlen %d dma %p offset %08x", len, curlen, dma, (int)0); 570 571 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 572 offset += curlen; 573 end = cur; 574 cur = next; 575 } 576 if (((flags & USBD_FORCE_SHORT_XFER) || alen == 0) && 577 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 578 /* Force a 0 length transfer at the end. */ 579 next = ohci_alloc_std(sc); 580 if (next == NULL) 581 goto nomem; 582 583 cur->td.td_flags = tdflags; 584 cur->td.td_cbp = 0; /* indicate 0 length packet */ 585 cur->nexttd = next; 586 cur->td.td_nexttd = htole32(next->physaddr); 587 cur->td.td_be = ~0; 588 cur->len = 0; 589 cur->flags = 0; 590 cur->xfer = xfer; 591 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 592 end = cur; 593 } 594 *ep = end; 595 596 return (USBD_NORMAL_COMPLETION); 597 598 nomem: 599 /* XXX free chain */ 600 return (USBD_NOMEM); 601 } 602 603 #if 0 604 static void 605 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 606 ohci_soft_td_t *stdend) 607 { 608 ohci_soft_td_t *p; 609 610 for (; std != stdend; std = p) { 611 p = std->nexttd; 612 ohci_free_std(sc, std); 613 } 614 } 615 #endif 616 617 ohci_soft_itd_t * 618 ohci_alloc_sitd(ohci_softc_t *sc) 619 { 620 ohci_soft_itd_t *sitd; 621 usbd_status err; 622 int i, s, offs; 623 usb_dma_t dma; 624 625 if (sc->sc_freeitds == NULL) { 626 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 627 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 628 OHCI_ITD_ALIGN, &dma); 629 if (err) 630 return (NULL); 631 s = splusb(); 632 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 633 offs = i * OHCI_SITD_SIZE; 634 sitd = KERNADDR(&dma, offs); 635 sitd->physaddr = DMAADDR(&dma, offs); 636 sitd->nextitd = sc->sc_freeitds; 637 sc->sc_freeitds = sitd; 638 } 639 splx(s); 640 } 641 642 s = splusb(); 643 sitd = sc->sc_freeitds; 644 sc->sc_freeitds = sitd->nextitd; 645 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 646 sitd->nextitd = NULL; 647 sitd->xfer = NULL; 648 ohci_hash_add_itd(sc, sitd); 649 splx(s); 650 651 #ifdef DIAGNOSTIC 652 sitd->isdone = 0; 653 #endif 654 655 return (sitd); 656 } 657 658 void 659 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 660 { 661 int s; 662 663 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 664 665 #ifdef DIAGNOSTIC 666 if (!sitd->isdone) { 667 panic("ohci_free_sitd: sitd=%p not done", sitd); 668 return; 669 } 670 /* Warn double free */ 671 sitd->isdone = 0; 672 #endif 673 674 s = splusb(); 675 ohci_hash_rem_itd(sc, sitd); 676 sitd->nextitd = sc->sc_freeitds; 677 sc->sc_freeitds = sitd; 678 splx(s); 679 } 680 681 usbd_status 682 ohci_init(ohci_softc_t *sc) 683 { 684 ohci_soft_ed_t *sed, *psed; 685 usbd_status err; 686 int i; 687 u_int32_t rev; 688 689 DPRINTF(("ohci_init: start\n")); 690 printf("%s:", device_get_nameunit(sc->sc_bus.bdev)); 691 rev = OREAD4(sc, OHCI_REVISION); 692 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 693 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 694 695 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 696 printf("%s: unsupported OHCI revision\n", 697 device_get_nameunit(sc->sc_bus.bdev)); 698 sc->sc_bus.usbrev = USBREV_UNKNOWN; 699 return (USBD_INVAL); 700 } 701 sc->sc_bus.usbrev = USBREV_1_0; 702 703 for (i = 0; i < OHCI_HASH_SIZE; i++) 704 LIST_INIT(&sc->sc_hash_tds[i]); 705 for (i = 0; i < OHCI_HASH_SIZE; i++) 706 LIST_INIT(&sc->sc_hash_itds[i]); 707 708 STAILQ_INIT(&sc->sc_free_xfers); 709 710 /* XXX determine alignment by R/W */ 711 /* Allocate the HCCA area. */ 712 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 713 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 714 if (err) 715 return (err); 716 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 717 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 718 719 sc->sc_eintrs = OHCI_NORMAL_INTRS; 720 721 /* Allocate dummy ED that starts the control list. */ 722 sc->sc_ctrl_head = ohci_alloc_sed(sc); 723 if (sc->sc_ctrl_head == NULL) { 724 err = USBD_NOMEM; 725 goto bad1; 726 } 727 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 728 729 /* Allocate dummy ED that starts the bulk list. */ 730 sc->sc_bulk_head = ohci_alloc_sed(sc); 731 if (sc->sc_bulk_head == NULL) { 732 err = USBD_NOMEM; 733 goto bad2; 734 } 735 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 736 737 /* Allocate dummy ED that starts the isochronous list. */ 738 sc->sc_isoc_head = ohci_alloc_sed(sc); 739 if (sc->sc_isoc_head == NULL) { 740 err = USBD_NOMEM; 741 goto bad3; 742 } 743 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 744 745 /* Allocate all the dummy EDs that make up the interrupt tree. */ 746 for (i = 0; i < OHCI_NO_EDS; i++) { 747 sed = ohci_alloc_sed(sc); 748 if (sed == NULL) { 749 while (--i >= 0) 750 ohci_free_sed(sc, sc->sc_eds[i]); 751 err = USBD_NOMEM; 752 goto bad4; 753 } 754 /* All ED fields are set to 0. */ 755 sc->sc_eds[i] = sed; 756 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 757 if (i != 0) 758 psed = sc->sc_eds[(i-1) / 2]; 759 else 760 psed= sc->sc_isoc_head; 761 sed->next = psed; 762 sed->ed.ed_nexted = htole32(psed->physaddr); 763 } 764 /* 765 * Fill HCCA interrupt table. The bit reversal is to get 766 * the tree set up properly to spread the interrupts. 767 */ 768 for (i = 0; i < OHCI_NO_INTRS; i++) 769 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 770 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 771 772 #ifdef USB_DEBUG 773 if (ohcidebug > 15) { 774 for (i = 0; i < OHCI_NO_EDS; i++) { 775 printf("ed#%d ", i); 776 ohci_dump_ed(sc->sc_eds[i]); 777 } 778 printf("iso "); 779 ohci_dump_ed(sc->sc_isoc_head); 780 } 781 #endif 782 783 err = ohci_controller_init(sc); 784 if (err != USBD_NORMAL_COMPLETION) 785 goto bad5; 786 787 /* Set up the bus struct. */ 788 sc->sc_bus.methods = &ohci_bus_methods; 789 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 790 791 #if defined(__NetBSD__) || defined(__OpenBSD__) 792 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 793 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 794 #endif 795 796 callout_init(&sc->sc_tmo_rhsc, 0); 797 798 return (USBD_NORMAL_COMPLETION); 799 800 bad5: 801 for (i = 0; i < OHCI_NO_EDS; i++) 802 ohci_free_sed(sc, sc->sc_eds[i]); 803 bad4: 804 ohci_free_sed(sc, sc->sc_isoc_head); 805 bad3: 806 ohci_free_sed(sc, sc->sc_bulk_head); 807 bad2: 808 ohci_free_sed(sc, sc->sc_ctrl_head); 809 bad1: 810 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 811 return (err); 812 } 813 814 static usbd_status 815 ohci_controller_init(ohci_softc_t *sc) 816 { 817 int i; 818 u_int32_t s, ctl, ival, hcr, fm, per, desca; 819 820 /* Determine in what context we are running. */ 821 ctl = OREAD4(sc, OHCI_CONTROL); 822 if (ctl & OHCI_IR) { 823 /* SMM active, request change */ 824 DPRINTF(("ohci_init: SMM active, request owner change\n")); 825 s = OREAD4(sc, OHCI_COMMAND_STATUS); 826 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 827 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 828 usb_delay_ms(&sc->sc_bus, 1); 829 ctl = OREAD4(sc, OHCI_CONTROL); 830 } 831 if ((ctl & OHCI_IR) == 0) { 832 printf("%s: SMM does not respond, resetting\n", 833 device_get_nameunit(sc->sc_bus.bdev)); 834 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 835 goto reset; 836 } 837 #if 0 838 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 839 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 840 /* BIOS started controller. */ 841 DPRINTF(("ohci_init: BIOS active\n")); 842 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 843 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 844 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 845 } 846 #endif 847 } else { 848 DPRINTF(("ohci_init: cold started\n")); 849 reset: 850 /* Controller was cold started. */ 851 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 852 } 853 854 /* 855 * This reset should not be necessary according to the OHCI spec, but 856 * without it some controllers do not start. 857 */ 858 DPRINTF(("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev))); 859 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 860 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 861 862 /* We now own the host controller and the bus has been reset. */ 863 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 864 865 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 866 /* Nominal time for a reset is 10 us. */ 867 for (i = 0; i < 10; i++) { 868 delay(10); 869 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 870 if (!hcr) 871 break; 872 } 873 if (hcr) { 874 printf("%s: reset timeout\n", device_get_nameunit(sc->sc_bus.bdev)); 875 return (USBD_IOERROR); 876 } 877 #ifdef USB_DEBUG 878 if (ohcidebug > 15) 879 ohci_dumpregs(sc); 880 #endif 881 882 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 883 884 /* Set up HC registers. */ 885 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 886 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 887 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 888 /* disable all interrupts and then switch on all desired interrupts */ 889 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 890 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 891 /* switch on desired functional features */ 892 ctl = OREAD4(sc, OHCI_CONTROL); 893 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 894 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 895 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 896 /* And finally start it! */ 897 OWRITE4(sc, OHCI_CONTROL, ctl); 898 899 /* 900 * The controller is now OPERATIONAL. Set a some final 901 * registers that should be set earlier, but that the 902 * controller ignores when in the SUSPEND state. 903 */ 904 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 905 fm |= OHCI_FSMPS(ival) | ival; 906 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 907 per = OHCI_PERIODIC(ival); /* 90% periodic */ 908 OWRITE4(sc, OHCI_PERIODIC_START, per); 909 910 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 911 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 912 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 913 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 914 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 915 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 916 917 /* 918 * The AMD756 requires a delay before re-reading the register, 919 * otherwise it will occasionally report 0 ports. 920 */ 921 sc->sc_noport = 0; 922 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 923 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 924 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 925 } 926 927 #ifdef USB_DEBUG 928 if (ohcidebug > 5) 929 ohci_dumpregs(sc); 930 #endif 931 return (USBD_NORMAL_COMPLETION); 932 } 933 934 usbd_status 935 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 936 { 937 return (usb_allocmem(bus, size, 0, dma)); 938 } 939 940 void 941 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 942 { 943 usb_freemem(bus, dma); 944 } 945 946 usbd_xfer_handle 947 ohci_allocx(struct usbd_bus *bus) 948 { 949 struct ohci_softc *sc = (struct ohci_softc *)bus; 950 usbd_xfer_handle xfer; 951 952 xfer = STAILQ_FIRST(&sc->sc_free_xfers); 953 if (xfer != NULL) { 954 STAILQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 955 #ifdef DIAGNOSTIC 956 if (xfer->busy_free != XFER_FREE) { 957 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 958 xfer->busy_free); 959 } 960 #endif 961 } else { 962 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 963 } 964 if (xfer != NULL) { 965 memset(xfer, 0, sizeof (struct ohci_xfer)); 966 usb_init_task(&OXFER(xfer)->abort_task, ohci_timeout_task, 967 xfer); 968 OXFER(xfer)->ohci_xfer_flags = 0; 969 #ifdef DIAGNOSTIC 970 xfer->busy_free = XFER_BUSY; 971 #endif 972 } 973 return (xfer); 974 } 975 976 void 977 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 978 { 979 struct ohci_softc *sc = (struct ohci_softc *)bus; 980 981 #ifdef DIAGNOSTIC 982 if (xfer->busy_free != XFER_BUSY) { 983 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 984 xfer->busy_free); 985 return; 986 } 987 xfer->busy_free = XFER_FREE; 988 #endif 989 STAILQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 990 } 991 992 /* 993 * Shut down the controller when the system is going down. 994 */ 995 void 996 ohci_shutdown(void *v) 997 { 998 ohci_softc_t *sc = v; 999 1000 DPRINTF(("ohci_shutdown: stopping the HC\n")); 1001 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1002 } 1003 1004 /* 1005 * Handle suspend/resume. 1006 * 1007 * We need to switch to polling mode here, because this routine is 1008 * called from an intterupt context. This is all right since we 1009 * are almost suspended anyway. 1010 */ 1011 void 1012 ohci_power(int why, void *v) 1013 { 1014 ohci_softc_t *sc = v; 1015 u_int32_t ctl; 1016 int s; 1017 1018 #ifdef USB_DEBUG 1019 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 1020 ohci_dumpregs(sc); 1021 #endif 1022 1023 s = splhardusb(); 1024 if (why != PWR_RESUME) { 1025 sc->sc_bus.use_polling++; 1026 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 1027 if (sc->sc_control == 0) { 1028 /* 1029 * Preserve register values, in case that APM BIOS 1030 * does not recover them. 1031 */ 1032 sc->sc_control = ctl; 1033 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1034 } 1035 ctl |= OHCI_HCFS_SUSPEND; 1036 OWRITE4(sc, OHCI_CONTROL, ctl); 1037 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1038 sc->sc_bus.use_polling--; 1039 } else { 1040 sc->sc_bus.use_polling++; 1041 1042 /* Some broken BIOSes never initialize Controller chip */ 1043 ohci_controller_init(sc); 1044 1045 if (sc->sc_intre) 1046 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1047 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1048 if (sc->sc_control) 1049 ctl = sc->sc_control; 1050 else 1051 ctl = OREAD4(sc, OHCI_CONTROL); 1052 ctl |= OHCI_HCFS_RESUME; 1053 OWRITE4(sc, OHCI_CONTROL, ctl); 1054 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1055 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1056 OWRITE4(sc, OHCI_CONTROL, ctl); 1057 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1058 sc->sc_control = sc->sc_intre = 0; 1059 sc->sc_bus.use_polling--; 1060 } 1061 splx(s); 1062 } 1063 1064 #ifdef USB_DEBUG 1065 void 1066 ohci_dumpregs(ohci_softc_t *sc) 1067 { 1068 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1069 OREAD4(sc, OHCI_REVISION), 1070 OREAD4(sc, OHCI_CONTROL), 1071 OREAD4(sc, OHCI_COMMAND_STATUS))); 1072 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1073 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1074 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1075 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1076 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1077 OREAD4(sc, OHCI_HCCA), 1078 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1079 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1080 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1081 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1082 OREAD4(sc, OHCI_BULK_HEAD_ED), 1083 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1084 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1085 OREAD4(sc, OHCI_DONE_HEAD), 1086 OREAD4(sc, OHCI_FM_INTERVAL), 1087 OREAD4(sc, OHCI_FM_REMAINING))); 1088 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1089 OREAD4(sc, OHCI_FM_NUMBER), 1090 OREAD4(sc, OHCI_PERIODIC_START), 1091 OREAD4(sc, OHCI_LS_THRESHOLD))); 1092 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1093 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1094 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1095 OREAD4(sc, OHCI_RH_STATUS))); 1096 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1097 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1098 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1099 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1100 le32toh(sc->sc_hcca->hcca_frame_number), 1101 le32toh(sc->sc_hcca->hcca_done_head))); 1102 } 1103 #endif 1104 1105 static int ohci_intr1(ohci_softc_t *); 1106 1107 void 1108 ohci_intr(void *p) 1109 { 1110 ohci_softc_t *sc = p; 1111 1112 if (sc == NULL || sc->sc_dying) 1113 return; 1114 1115 /* If we get an interrupt while polling, then just ignore it. */ 1116 if (sc->sc_bus.use_polling) { 1117 #ifdef DIAGNOSTIC 1118 printf("ohci_intr: ignored interrupt while polling\n"); 1119 #endif 1120 return; 1121 } 1122 1123 ohci_intr1(sc); 1124 } 1125 1126 static int 1127 ohci_intr1(ohci_softc_t *sc) 1128 { 1129 u_int32_t intrs, eintrs; 1130 ohci_physaddr_t done; 1131 1132 DPRINTFN(14,("ohci_intr1: enter\n")); 1133 1134 /* In case the interrupt occurs before initialization has completed. */ 1135 if (sc == NULL || sc->sc_hcca == NULL) { 1136 #ifdef DIAGNOSTIC 1137 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1138 #endif 1139 return (0); 1140 } 1141 1142 intrs = 0; 1143 done = le32toh(sc->sc_hcca->hcca_done_head); 1144 1145 /* The LSb of done is used to inform the HC Driver that an interrupt 1146 * condition exists for both the Done list and for another event 1147 * recorded in HcInterruptStatus. On an interrupt from the HC, the HC 1148 * Driver checks the HccaDoneHead Value. If this value is 0, then the 1149 * interrupt was caused by other than the HccaDoneHead update and the 1150 * HcInterruptStatus register needs to be accessed to determine that 1151 * exact interrupt cause. If HccaDoneHead is nonzero, then a Done list 1152 * update interrupt is indicated and if the LSb of done is nonzero, 1153 * then an additional interrupt event is indicated and 1154 * HcInterruptStatus should be checked to determine its cause. 1155 */ 1156 if (done != 0) { 1157 if (done & ~OHCI_DONE_INTRS) 1158 intrs = OHCI_WDH; 1159 if (done & OHCI_DONE_INTRS) { 1160 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1161 done &= ~OHCI_DONE_INTRS; 1162 } 1163 sc->sc_hcca->hcca_done_head = 0; 1164 } else 1165 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH; 1166 1167 if (intrs == 0) /* nothing to be done (PCI shared interrupt) */ 1168 return (0); 1169 1170 intrs &= ~OHCI_MIE; 1171 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1172 eintrs = intrs & sc->sc_eintrs; 1173 if (!eintrs) 1174 return (0); 1175 1176 sc->sc_bus.intr_context++; 1177 sc->sc_bus.no_intrs++; 1178 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1179 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1180 (u_int)eintrs)); 1181 1182 if (eintrs & OHCI_SO) { 1183 sc->sc_overrun_cnt++; 1184 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1185 printf("%s: %u scheduling overruns\n", 1186 device_get_nameunit(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1187 sc->sc_overrun_cnt = 0; 1188 } 1189 /* XXX do what */ 1190 eintrs &= ~OHCI_SO; 1191 } 1192 if (eintrs & OHCI_WDH) { 1193 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1194 usb_schedsoftintr(&sc->sc_bus); 1195 eintrs &= ~OHCI_WDH; 1196 } 1197 if (eintrs & OHCI_RD) { 1198 printf("%s: resume detect\n", device_get_nameunit(sc->sc_bus.bdev)); 1199 /* XXX process resume detect */ 1200 } 1201 if (eintrs & OHCI_UE) { 1202 printf("%s: unrecoverable error, controller halted\n", 1203 device_get_nameunit(sc->sc_bus.bdev)); 1204 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1205 /* XXX what else */ 1206 } 1207 if (eintrs & OHCI_RHSC) { 1208 ohci_rhsc(sc, sc->sc_intrxfer); 1209 /* 1210 * Disable RHSC interrupt for now, because it will be 1211 * on until the port has been reset. 1212 */ 1213 ohci_rhsc_able(sc, 0); 1214 /* Do not allow RHSC interrupts > 1 per second */ 1215 callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1216 eintrs &= ~OHCI_RHSC; 1217 } 1218 1219 sc->sc_bus.intr_context--; 1220 1221 if (eintrs != 0) { 1222 /* Block unprocessed interrupts. XXX */ 1223 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1224 sc->sc_eintrs &= ~eintrs; 1225 printf("%s: blocking intrs 0x%x\n", 1226 device_get_nameunit(sc->sc_bus.bdev), eintrs); 1227 } 1228 1229 return (1); 1230 } 1231 1232 void 1233 ohci_rhsc_able(ohci_softc_t *sc, int on) 1234 { 1235 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1236 if (on) { 1237 sc->sc_eintrs |= OHCI_RHSC; 1238 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1239 } else { 1240 sc->sc_eintrs &= ~OHCI_RHSC; 1241 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1242 } 1243 } 1244 1245 void 1246 ohci_rhsc_enable(void *v_sc) 1247 { 1248 ohci_softc_t *sc = v_sc; 1249 int s; 1250 1251 s = splhardusb(); 1252 ohci_rhsc_able(sc, 1); 1253 splx(s); 1254 } 1255 1256 #ifdef USB_DEBUG 1257 char *ohci_cc_strs[] = { 1258 "NO_ERROR", 1259 "CRC", 1260 "BIT_STUFFING", 1261 "DATA_TOGGLE_MISMATCH", 1262 "STALL", 1263 "DEVICE_NOT_RESPONDING", 1264 "PID_CHECK_FAILURE", 1265 "UNEXPECTED_PID", 1266 "DATA_OVERRUN", 1267 "DATA_UNDERRUN", 1268 "BUFFER_OVERRUN", 1269 "BUFFER_UNDERRUN", 1270 "reserved", 1271 "reserved", 1272 "NOT_ACCESSED", 1273 "NOT_ACCESSED" 1274 }; 1275 #endif 1276 1277 void 1278 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1279 { 1280 ohci_soft_itd_t *sitd, *sidone, **ip; 1281 ohci_soft_td_t *std, *sdone, **p; 1282 1283 /* Reverse the done list. */ 1284 for (sdone = NULL, sidone = NULL; done != 0; ) { 1285 std = ohci_hash_find_td(sc, done); 1286 if (std != NULL) { 1287 std->dnext = sdone; 1288 done = le32toh(std->td.td_nexttd); 1289 sdone = std; 1290 DPRINTFN(10,("add TD %p\n", std)); 1291 continue; 1292 } 1293 sitd = ohci_hash_find_itd(sc, done); 1294 if (sitd != NULL) { 1295 sitd->dnext = sidone; 1296 done = le32toh(sitd->itd.itd_nextitd); 1297 sidone = sitd; 1298 DPRINTFN(5,("add ITD %p\n", sitd)); 1299 continue; 1300 } 1301 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done); 1302 } 1303 1304 /* sdone & sidone now hold the done lists. */ 1305 /* Put them on the already processed lists. */ 1306 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1307 ; 1308 *p = sdone; 1309 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1310 ; 1311 *ip = sidone; 1312 } 1313 1314 void 1315 ohci_softintr(void *v) 1316 { 1317 ohci_softc_t *sc = v; 1318 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1319 ohci_soft_td_t *std, *sdone, *stdnext, *p, *n; 1320 usbd_xfer_handle xfer; 1321 struct ohci_pipe *opipe; 1322 int len, cc, s; 1323 int i, j, iframes; 1324 1325 DPRINTFN(10,("ohci_softintr: enter\n")); 1326 1327 sc->sc_bus.intr_context++; 1328 1329 s = splhardusb(); 1330 sdone = sc->sc_sdone; 1331 sc->sc_sdone = NULL; 1332 sidone = sc->sc_sidone; 1333 sc->sc_sidone = NULL; 1334 splx(s); 1335 1336 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1337 1338 #ifdef USB_DEBUG 1339 if (ohcidebug > 10) { 1340 DPRINTF(("ohci_process_done: TD done:\n")); 1341 ohci_dump_tds(sdone); 1342 } 1343 #endif 1344 1345 for (std = sdone; std; std = stdnext) { 1346 xfer = std->xfer; 1347 stdnext = std->dnext; 1348 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1349 std, xfer, (xfer ? xfer->hcpriv : NULL))); 1350 if (xfer == NULL) { 1351 /* 1352 * xfer == NULL: There seems to be no xfer associated 1353 * with this TD. It is tailp that happened to end up on 1354 * the done queue. 1355 */ 1356 continue; 1357 } 1358 if (xfer->status == USBD_CANCELLED || 1359 xfer->status == USBD_TIMEOUT) { 1360 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1361 xfer)); 1362 /* Handled by abort routine. */ 1363 continue; 1364 } 1365 1366 len = std->len; 1367 if (std->td.td_cbp != 0) 1368 len -= le32toh(std->td.td_be) - 1369 le32toh(std->td.td_cbp) + 1; 1370 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1371 std->flags)); 1372 if (std->flags & OHCI_ADD_LEN) 1373 xfer->actlen += len; 1374 1375 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1376 if (cc != OHCI_CC_NO_ERROR) { 1377 /* 1378 * Endpoint is halted. First unlink all the TDs 1379 * belonging to the failed transfer, and then restart 1380 * the endpoint. 1381 */ 1382 opipe = (struct ohci_pipe *)xfer->pipe; 1383 1384 DPRINTF(("ohci_process_done: error cc=%d (%s)\n", 1385 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1386 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1387 callout_stop(&xfer->timeout_handle); 1388 usb_rem_task(OXFER(xfer)->xfer.pipe->device, 1389 &OXFER(xfer)->abort_task); 1390 1391 /* Remove all this xfer's TDs from the done queue. */ 1392 for (p = std; p->dnext != NULL; p = p->dnext) { 1393 if (p->dnext->xfer != xfer) 1394 continue; 1395 p->dnext = p->dnext->dnext; 1396 } 1397 /* The next TD may have been removed. */ 1398 stdnext = std->dnext; 1399 1400 /* Remove all TDs belonging to this xfer. */ 1401 for (p = xfer->hcpriv; p->xfer == xfer; p = n) { 1402 n = p->nexttd; 1403 ohci_free_std(sc, p); 1404 } 1405 1406 /* clear halt */ 1407 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1408 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1409 1410 if (cc == OHCI_CC_STALL) 1411 xfer->status = USBD_STALLED; 1412 else 1413 xfer->status = USBD_IOERROR; 1414 s = splusb(); 1415 usb_transfer_complete(xfer); 1416 splx(s); 1417 continue; 1418 } 1419 /* 1420 * Skip intermediate TDs. They remain linked from 1421 * xfer->hcpriv and we free them when the transfer completes. 1422 */ 1423 if ((std->flags & OHCI_CALL_DONE) == 0) 1424 continue; 1425 1426 /* Normal transfer completion */ 1427 callout_stop(&xfer->timeout_handle); 1428 usb_rem_task(OXFER(xfer)->xfer.pipe->device, 1429 &OXFER(xfer)->abort_task); 1430 for (p = xfer->hcpriv; p->xfer == xfer; p = n) { 1431 n = p->nexttd; 1432 ohci_free_std(sc, p); 1433 } 1434 xfer->status = USBD_NORMAL_COMPLETION; 1435 s = splusb(); 1436 usb_transfer_complete(xfer); 1437 splx(s); 1438 } 1439 1440 #ifdef USB_DEBUG 1441 if (ohcidebug > 10) { 1442 DPRINTF(("ohci_softintr: ITD done:\n")); 1443 ohci_dump_itds(sidone); 1444 } 1445 #endif 1446 1447 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1448 xfer = sitd->xfer; 1449 sitdnext = sitd->dnext; 1450 sitd->flags |= OHCI_ITD_INTFIN; 1451 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1452 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1453 if (xfer == NULL) 1454 continue; 1455 if (xfer->status == USBD_CANCELLED || 1456 xfer->status == USBD_TIMEOUT) { 1457 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1458 xfer)); 1459 /* Handled by abort routine. */ 1460 continue; 1461 } 1462 if (xfer->pipe) 1463 if (xfer->pipe->aborting) 1464 continue; /*Ignore.*/ 1465 #ifdef DIAGNOSTIC 1466 if (sitd->isdone) 1467 printf("ohci_softintr: sitd=%p is done\n", sitd); 1468 sitd->isdone = 1; 1469 #endif 1470 opipe = (struct ohci_pipe *)xfer->pipe; 1471 if (opipe->aborting) 1472 continue; 1473 1474 if (sitd->flags & OHCI_CALL_DONE) { 1475 ohci_soft_itd_t *next; 1476 1477 opipe->u.iso.inuse -= xfer->nframes; 1478 xfer->status = USBD_NORMAL_COMPLETION; 1479 for (i = 0, sitd = xfer->hcpriv;;sitd = next) { 1480 next = sitd->nextitd; 1481 if (OHCI_ITD_GET_CC(sitd->itd.itd_flags) != OHCI_CC_NO_ERROR) 1482 xfer->status = USBD_IOERROR; 1483 1484 if (xfer->status == USBD_NORMAL_COMPLETION) { 1485 iframes = OHCI_ITD_GET_FC(sitd->itd.itd_flags); 1486 for (j = 0; j < iframes; i++, j++) { 1487 len = le16toh(sitd->itd.itd_offset[j]); 1488 len = 1489 (OHCI_ITD_PSW_GET_CC(len) == 1490 OHCI_CC_NOT_ACCESSED) ? 0 : 1491 OHCI_ITD_PSW_LENGTH(len); 1492 xfer->frlengths[i] = len; 1493 } 1494 } 1495 if (sitd->flags & OHCI_CALL_DONE) 1496 break; 1497 } 1498 for (sitd = xfer->hcpriv; sitd->xfer == xfer; 1499 sitd = next) { 1500 next = sitd->nextitd; 1501 ohci_free_sitd(sc, sitd); 1502 } 1503 1504 s = splusb(); 1505 usb_transfer_complete(xfer); 1506 splx(s); 1507 } 1508 } 1509 1510 #ifdef USB_USE_SOFTINTR 1511 if (sc->sc_softwake) { 1512 sc->sc_softwake = 0; 1513 wakeup(&sc->sc_softwake); 1514 } 1515 #endif /* USB_USE_SOFTINTR */ 1516 1517 sc->sc_bus.intr_context--; 1518 DPRINTFN(10,("ohci_softintr: done:\n")); 1519 } 1520 1521 void 1522 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1523 { 1524 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1525 1526 #ifdef DIAGNOSTIC 1527 if (!(xfer->rqflags & URQ_REQUEST)) { 1528 panic("ohci_device_ctrl_done: not a request"); 1529 } 1530 #endif 1531 xfer->hcpriv = NULL; 1532 } 1533 1534 void 1535 ohci_device_intr_done(usbd_xfer_handle xfer) 1536 { 1537 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1538 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1539 usbd_status err; 1540 1541 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1542 xfer, xfer->actlen)); 1543 1544 xfer->hcpriv = NULL; 1545 if (xfer->pipe->repeat) { 1546 err = ohci_device_intr_insert(sc, xfer); 1547 if (err) { 1548 xfer->status = err; 1549 return; 1550 } 1551 } 1552 } 1553 1554 void 1555 ohci_device_bulk_done(usbd_xfer_handle xfer) 1556 { 1557 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1558 xfer, xfer->actlen)); 1559 1560 xfer->hcpriv = NULL; 1561 } 1562 1563 /* 1564 * XXX write back xfer data for architectures with a write-back 1565 * data cache; this is a hack because usb is mis-architected 1566 * in blindly mixing bus_dma w/ PIO. 1567 */ 1568 static __inline void 1569 hacksync(usbd_xfer_handle xfer) 1570 { 1571 bus_dma_tag_t tag; 1572 struct usb_dma_mapping *dmap; 1573 1574 if (xfer->length == 0) 1575 return; 1576 tag = xfer->pipe->device->bus->buffer_dmatag; 1577 dmap = &xfer->dmamap; 1578 bus_dmamap_sync(tag, dmap->map, BUS_DMASYNC_PREWRITE); 1579 } 1580 1581 void 1582 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1583 { 1584 usbd_pipe_handle pipe; 1585 u_char *p; 1586 int i, m; 1587 int hstatus; 1588 1589 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1590 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1591 sc, xfer, hstatus)); 1592 1593 if (xfer == NULL) { 1594 /* Just ignore the change. */ 1595 return; 1596 } 1597 1598 pipe = xfer->pipe; 1599 1600 p = xfer->buffer; 1601 m = min(sc->sc_noport, xfer->length * 8 - 1); 1602 memset(p, 0, xfer->length); 1603 for (i = 1; i <= m; i++) { 1604 /* Pick out CHANGE bits from the status reg. */ 1605 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1606 p[i/8] |= 1 << (i%8); 1607 } 1608 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1609 xfer->actlen = xfer->length; 1610 xfer->status = USBD_NORMAL_COMPLETION; 1611 1612 hacksync(xfer); /* XXX to compensate for usb_transfer_complete */ 1613 usb_transfer_complete(xfer); 1614 } 1615 1616 void 1617 ohci_root_intr_done(usbd_xfer_handle xfer) 1618 { 1619 xfer->hcpriv = NULL; 1620 } 1621 1622 void 1623 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1624 { 1625 xfer->hcpriv = NULL; 1626 } 1627 1628 /* 1629 * Wait here until controller claims to have an interrupt. 1630 * Then call ohci_intr and return. Use timeout to avoid waiting 1631 * too long. 1632 */ 1633 void 1634 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1635 { 1636 int timo = xfer->timeout; 1637 int usecs; 1638 u_int32_t intrs; 1639 1640 xfer->status = USBD_IN_PROGRESS; 1641 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1642 usb_delay_ms(&sc->sc_bus, 1); 1643 if (sc->sc_dying) 1644 break; 1645 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1646 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1647 #ifdef USB_DEBUG 1648 if (ohcidebug > 15) 1649 ohci_dumpregs(sc); 1650 #endif 1651 if (intrs) { 1652 ohci_intr1(sc); 1653 if (xfer->status != USBD_IN_PROGRESS) 1654 return; 1655 } 1656 } 1657 1658 /* Timeout */ 1659 DPRINTF(("ohci_waitintr: timeout\n")); 1660 xfer->status = USBD_TIMEOUT; 1661 usb_transfer_complete(xfer); 1662 /* XXX should free TD */ 1663 } 1664 1665 void 1666 ohci_poll(struct usbd_bus *bus) 1667 { 1668 ohci_softc_t *sc = (ohci_softc_t *)bus; 1669 #ifdef USB_DEBUG 1670 static int last; 1671 int new; 1672 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1673 if (new != last) { 1674 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1675 last = new; 1676 } 1677 #endif 1678 1679 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1680 ohci_intr1(sc); 1681 } 1682 1683 usbd_status 1684 ohci_device_request(usbd_xfer_handle xfer) 1685 { 1686 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1687 usb_device_request_t *req = &xfer->request; 1688 usbd_device_handle dev = opipe->pipe.device; 1689 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1690 ohci_soft_td_t *setup, *stat, *next, *tail; 1691 ohci_soft_ed_t *sed; 1692 int isread; 1693 int len; 1694 usbd_status err; 1695 int s; 1696 1697 isread = req->bmRequestType & UT_READ; 1698 len = UGETW(req->wLength); 1699 1700 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1701 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1702 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1703 UGETW(req->wIndex), len, dev->address, 1704 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1705 1706 setup = opipe->tail.td; 1707 stat = ohci_alloc_std(sc); 1708 if (stat == NULL) { 1709 err = USBD_NOMEM; 1710 goto bad1; 1711 } 1712 tail = ohci_alloc_std(sc); 1713 if (tail == NULL) { 1714 err = USBD_NOMEM; 1715 goto bad2; 1716 } 1717 tail->xfer = NULL; 1718 1719 sed = opipe->sed; 1720 opipe->u.ctl.length = len; 1721 next = stat; 1722 1723 /* Set up data transaction */ 1724 if (len != 0) { 1725 ohci_soft_td_t *std = stat; 1726 1727 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1728 std, &stat); 1729 stat = stat->nexttd; /* point at free TD */ 1730 if (err) 1731 goto bad3; 1732 /* Start toggle at 1 and then use the carried toggle. */ 1733 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1734 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1735 } 1736 1737 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1738 1739 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1740 OHCI_TD_TOGGLE_0 | OHCI_TD_SET_DI(6)); 1741 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1742 setup->nexttd = next; 1743 setup->td.td_nexttd = htole32(next->physaddr); 1744 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1745 setup->len = 0; 1746 setup->xfer = xfer; 1747 setup->flags = 0; 1748 xfer->hcpriv = setup; 1749 1750 stat->td.td_flags = htole32( 1751 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1752 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1753 stat->td.td_cbp = 0; 1754 stat->nexttd = tail; 1755 stat->td.td_nexttd = htole32(tail->physaddr); 1756 stat->td.td_be = 0; 1757 stat->flags = OHCI_CALL_DONE; 1758 stat->len = 0; 1759 stat->xfer = xfer; 1760 1761 #ifdef USB_DEBUG 1762 if (ohcidebug > 5) { 1763 DPRINTF(("ohci_device_request:\n")); 1764 ohci_dump_ed(sed); 1765 ohci_dump_tds(setup); 1766 } 1767 #endif 1768 1769 /* Insert ED in schedule */ 1770 s = splusb(); 1771 sed->ed.ed_tailp = htole32(tail->physaddr); 1772 opipe->tail.td = tail; 1773 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1774 if (xfer->timeout && !sc->sc_bus.use_polling) { 1775 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1776 ohci_timeout, xfer); 1777 } 1778 splx(s); 1779 1780 #ifdef USB_DEBUG 1781 if (ohcidebug > 20) { 1782 delay(10000); 1783 DPRINTF(("ohci_device_request: status=%x\n", 1784 OREAD4(sc, OHCI_COMMAND_STATUS))); 1785 ohci_dumpregs(sc); 1786 printf("ctrl head:\n"); 1787 ohci_dump_ed(sc->sc_ctrl_head); 1788 printf("sed:\n"); 1789 ohci_dump_ed(sed); 1790 ohci_dump_tds(setup); 1791 } 1792 #endif 1793 1794 return (USBD_NORMAL_COMPLETION); 1795 1796 bad3: 1797 ohci_free_std(sc, tail); 1798 bad2: 1799 ohci_free_std(sc, stat); 1800 bad1: 1801 return (err); 1802 } 1803 1804 /* 1805 * Add an ED to the schedule. Called at splusb(). 1806 */ 1807 void 1808 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1809 { 1810 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1811 1812 SPLUSBCHECK; 1813 sed->next = head->next; 1814 sed->ed.ed_nexted = head->ed.ed_nexted; 1815 head->next = sed; 1816 head->ed.ed_nexted = htole32(sed->physaddr); 1817 } 1818 1819 /* 1820 * Remove an ED from the schedule. Called at splusb(). 1821 */ 1822 void 1823 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1824 { 1825 ohci_soft_ed_t *p; 1826 1827 SPLUSBCHECK; 1828 1829 /* XXX */ 1830 for (p = head; p != NULL && p->next != sed; p = p->next) 1831 ; 1832 if (p == NULL) 1833 panic("ohci_rem_ed: ED not found"); 1834 p->next = sed->next; 1835 p->ed.ed_nexted = sed->ed.ed_nexted; 1836 } 1837 1838 /* 1839 * When a transfer is completed the TD is added to the done queue by 1840 * the host controller. This queue is the processed by software. 1841 * Unfortunately the queue contains the physical address of the TD 1842 * and we have no simple way to translate this back to a kernel address. 1843 * To make the translation possible (and fast) we use a hash table of 1844 * TDs currently in the schedule. The physical address is used as the 1845 * hash value. 1846 */ 1847 1848 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1849 /* Called at splusb() */ 1850 void 1851 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1852 { 1853 int h = HASH(std->physaddr); 1854 1855 SPLUSBCHECK; 1856 1857 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1858 } 1859 1860 /* Called at splusb() */ 1861 void 1862 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1863 { 1864 SPLUSBCHECK; 1865 1866 LIST_REMOVE(std, hnext); 1867 } 1868 1869 ohci_soft_td_t * 1870 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1871 { 1872 int h = HASH(a); 1873 ohci_soft_td_t *std; 1874 1875 /* if these are present they should be masked out at an earlier 1876 * stage. 1877 */ 1878 KASSERT((a&~OHCI_HEADMASK) == 0, ("%s: 0x%b has lower bits set\n", 1879 device_get_nameunit(sc->sc_bus.bdev), 1880 (int) a, "\2\1HALT\2TOGGLE")); 1881 1882 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1883 std != NULL; 1884 std = LIST_NEXT(std, hnext)) 1885 if (std->physaddr == a) 1886 return (std); 1887 1888 DPRINTF(("%s: ohci_hash_find_td: addr 0x%08lx not found\n", 1889 device_get_nameunit(sc->sc_bus.bdev), (u_long) a)); 1890 return (NULL); 1891 } 1892 1893 /* Called at splusb() */ 1894 void 1895 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1896 { 1897 int h = HASH(sitd->physaddr); 1898 1899 SPLUSBCHECK; 1900 1901 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1902 sitd, (u_long)sitd->physaddr)); 1903 1904 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1905 } 1906 1907 /* Called at splusb() */ 1908 void 1909 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1910 { 1911 SPLUSBCHECK; 1912 1913 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1914 sitd, (u_long)sitd->physaddr)); 1915 1916 LIST_REMOVE(sitd, hnext); 1917 } 1918 1919 ohci_soft_itd_t * 1920 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1921 { 1922 int h = HASH(a); 1923 ohci_soft_itd_t *sitd; 1924 1925 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1926 sitd != NULL; 1927 sitd = LIST_NEXT(sitd, hnext)) 1928 if (sitd->physaddr == a) 1929 return (sitd); 1930 return (NULL); 1931 } 1932 1933 void 1934 ohci_timeout(void *addr) 1935 { 1936 struct ohci_xfer *oxfer = addr; 1937 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1938 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1939 1940 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1941 1942 if (sc->sc_dying) { 1943 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1944 return; 1945 } 1946 1947 /* Execute the abort in a process context. */ 1948 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task, 1949 USB_TASKQ_HC); 1950 } 1951 1952 void 1953 ohci_timeout_task(void *addr) 1954 { 1955 usbd_xfer_handle xfer = addr; 1956 int s; 1957 1958 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1959 1960 s = splusb(); 1961 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1962 splx(s); 1963 } 1964 1965 #ifdef USB_DEBUG 1966 void 1967 ohci_dump_tds(ohci_soft_td_t *std) 1968 { 1969 for (; std; std = std->nexttd) 1970 ohci_dump_td(std); 1971 } 1972 1973 void 1974 ohci_dump_td(ohci_soft_td_t *std) 1975 { 1976 char sbuf[128]; 1977 1978 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1979 "\2\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1980 sbuf, sizeof(sbuf)); 1981 1982 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1983 "nexttd=0x%08lx be=0x%08lx\n", 1984 std, (u_long)std->physaddr, sbuf, 1985 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1986 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1987 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1988 (u_long)le32toh(std->td.td_cbp), 1989 (u_long)le32toh(std->td.td_nexttd), 1990 (u_long)le32toh(std->td.td_be)); 1991 } 1992 1993 void 1994 ohci_dump_itd(ohci_soft_itd_t *sitd) 1995 { 1996 int i; 1997 1998 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1999 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 2000 sitd, (u_long)sitd->physaddr, 2001 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 2002 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 2003 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 2004 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 2005 (u_long)le32toh(sitd->itd.itd_bp0), 2006 (u_long)le32toh(sitd->itd.itd_nextitd), 2007 (u_long)le32toh(sitd->itd.itd_be)); 2008 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 2009 printf("offs[%d]=0x%04x ", i, 2010 (u_int)le16toh(sitd->itd.itd_offset[i])); 2011 printf("\n"); 2012 } 2013 2014 void 2015 ohci_dump_itds(ohci_soft_itd_t *sitd) 2016 { 2017 for (; sitd; sitd = sitd->nextitd) 2018 ohci_dump_itd(sitd); 2019 } 2020 2021 void 2022 ohci_dump_ed(ohci_soft_ed_t *sed) 2023 { 2024 char sbuf[128], sbuf2[128]; 2025 2026 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 2027 "\2\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 2028 sbuf, sizeof(sbuf)); 2029 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 2030 "\2\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 2031 2032 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 2033 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 2034 sed, (u_long)sed->physaddr, 2035 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 2036 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 2037 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 2038 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 2039 (u_long)le32toh(sed->ed.ed_headp), 2040 (u_long)le32toh(sed->ed.ed_nexted)); 2041 } 2042 #endif 2043 2044 usbd_status 2045 ohci_open(usbd_pipe_handle pipe) 2046 { 2047 usbd_device_handle dev = pipe->device; 2048 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2049 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 2050 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2051 u_int8_t addr = dev->address; 2052 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 2053 ohci_soft_ed_t *sed; 2054 ohci_soft_td_t *std; 2055 ohci_soft_itd_t *sitd; 2056 ohci_physaddr_t tdphys; 2057 u_int32_t fmt; 2058 usbd_status err; 2059 int s; 2060 int ival; 2061 2062 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2063 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2064 2065 if (sc->sc_dying) 2066 return (USBD_IOERROR); 2067 2068 std = NULL; 2069 sed = NULL; 2070 2071 if (addr == sc->sc_addr) { 2072 switch (ed->bEndpointAddress) { 2073 case USB_CONTROL_ENDPOINT: 2074 pipe->methods = &ohci_root_ctrl_methods; 2075 break; 2076 case UE_DIR_IN | OHCI_INTR_ENDPT: 2077 pipe->methods = &ohci_root_intr_methods; 2078 break; 2079 default: 2080 return (USBD_INVAL); 2081 } 2082 } else { 2083 sed = ohci_alloc_sed(sc); 2084 if (sed == NULL) 2085 goto bad0; 2086 opipe->sed = sed; 2087 if (xfertype == UE_ISOCHRONOUS) { 2088 sitd = ohci_alloc_sitd(sc); 2089 if (sitd == NULL) 2090 goto bad1; 2091 opipe->tail.itd = sitd; 2092 opipe->aborting = 0; 2093 tdphys = sitd->physaddr; 2094 fmt = OHCI_ED_FORMAT_ISO; 2095 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2096 fmt |= OHCI_ED_DIR_IN; 2097 else 2098 fmt |= OHCI_ED_DIR_OUT; 2099 } else { 2100 std = ohci_alloc_std(sc); 2101 if (std == NULL) 2102 goto bad1; 2103 opipe->tail.td = std; 2104 tdphys = std->physaddr; 2105 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2106 } 2107 sed->ed.ed_flags = htole32( 2108 OHCI_ED_SET_FA(addr) | 2109 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2110 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2111 fmt | 2112 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2113 sed->ed.ed_headp = htole32(tdphys | 2114 (pipe->endpoint->savedtoggle ? OHCI_TOGGLECARRY : 0)); 2115 sed->ed.ed_tailp = htole32(tdphys); 2116 2117 switch (xfertype) { 2118 case UE_CONTROL: 2119 pipe->methods = &ohci_device_ctrl_methods; 2120 err = usb_allocmem(&sc->sc_bus, 2121 sizeof(usb_device_request_t), 2122 0, &opipe->u.ctl.reqdma); 2123 if (err) 2124 goto bad; 2125 s = splusb(); 2126 ohci_add_ed(sed, sc->sc_ctrl_head); 2127 splx(s); 2128 break; 2129 case UE_INTERRUPT: 2130 pipe->methods = &ohci_device_intr_methods; 2131 ival = pipe->interval; 2132 if (ival == USBD_DEFAULT_INTERVAL) 2133 ival = ed->bInterval; 2134 return (ohci_device_setintr(sc, opipe, ival)); 2135 case UE_ISOCHRONOUS: 2136 pipe->methods = &ohci_device_isoc_methods; 2137 return (ohci_setup_isoc(pipe)); 2138 case UE_BULK: 2139 pipe->methods = &ohci_device_bulk_methods; 2140 s = splusb(); 2141 ohci_add_ed(sed, sc->sc_bulk_head); 2142 splx(s); 2143 break; 2144 } 2145 } 2146 return (USBD_NORMAL_COMPLETION); 2147 2148 bad: 2149 if (std != NULL) 2150 ohci_free_std(sc, std); 2151 bad1: 2152 if (sed != NULL) 2153 ohci_free_sed(sc, sed); 2154 bad0: 2155 return (USBD_NOMEM); 2156 2157 } 2158 2159 /* 2160 * Close a reqular pipe. 2161 * Assumes that there are no pending transactions. 2162 */ 2163 void 2164 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2165 { 2166 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2167 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2168 ohci_soft_ed_t *sed = opipe->sed; 2169 int s; 2170 2171 s = splusb(); 2172 #ifdef DIAGNOSTIC 2173 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2174 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2175 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2176 ohci_soft_td_t *std; 2177 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2178 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2179 "tl=0x%x pipe=%p, std=%p\n", sed, 2180 (int)le32toh(sed->ed.ed_headp), 2181 (int)le32toh(sed->ed.ed_tailp), 2182 pipe, std); 2183 #ifdef USB_DEBUG 2184 usbd_dump_pipe(&opipe->pipe); 2185 #endif 2186 #ifdef USB_DEBUG 2187 ohci_dump_ed(sed); 2188 if (std) 2189 ohci_dump_td(std); 2190 #endif 2191 usb_delay_ms(&sc->sc_bus, 2); 2192 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2193 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2194 printf("ohci_close_pipe: pipe still not empty\n"); 2195 } 2196 #endif 2197 ohci_rem_ed(sed, head); 2198 /* Make sure the host controller is not touching this ED */ 2199 usb_delay_ms(&sc->sc_bus, 1); 2200 splx(s); 2201 pipe->endpoint->savedtoggle = 2202 (le32toh(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2203 ohci_free_sed(sc, opipe->sed); 2204 } 2205 2206 /* 2207 * Abort a device request. 2208 * If this routine is called at splusb() it guarantees that the request 2209 * will be removed from the hardware scheduling and that the callback 2210 * for it will be called with USBD_CANCELLED status. 2211 * It's impossible to guarantee that the requested transfer will not 2212 * have happened since the hardware runs concurrently. 2213 * If the transaction has already happened we rely on the ordinary 2214 * interrupt processing to process it. 2215 */ 2216 void 2217 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2218 { 2219 struct ohci_xfer *oxfer = OXFER(xfer); 2220 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2221 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2222 ohci_soft_ed_t *sed = opipe->sed; 2223 ohci_soft_td_t *p, *n; 2224 ohci_physaddr_t headp; 2225 int s, hit; 2226 2227 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2228 2229 if (sc->sc_dying) { 2230 /* If we're dying, just do the software part. */ 2231 s = splusb(); 2232 xfer->status = status; /* make software ignore it */ 2233 callout_stop(&xfer->timeout_handle); 2234 usb_rem_task(xfer->pipe->device, &OXFER(xfer)->abort_task); 2235 usb_transfer_complete(xfer); 2236 splx(s); 2237 return; 2238 } 2239 2240 if (xfer->device->bus->intr_context || !curproc) 2241 panic("ohci_abort_xfer: not in process context"); 2242 2243 /* 2244 * If an abort is already in progress then just wait for it to 2245 * complete and return. 2246 */ 2247 if (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTING) { 2248 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n")); 2249 /* No need to wait if we're aborting from a timeout. */ 2250 if (status == USBD_TIMEOUT) 2251 return; 2252 /* Override the status which might be USBD_TIMEOUT. */ 2253 xfer->status = status; 2254 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n")); 2255 oxfer->ohci_xfer_flags |= OHCI_XFER_ABORTWAIT; 2256 while (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTING) 2257 tsleep(&oxfer->ohci_xfer_flags, PZERO, "ohciaw", 0); 2258 return; 2259 } 2260 2261 /* 2262 * Step 1: Make interrupt routine and hardware ignore xfer. 2263 */ 2264 s = splusb(); 2265 oxfer->ohci_xfer_flags |= OHCI_XFER_ABORTING; 2266 xfer->status = status; /* make software ignore it */ 2267 callout_stop(&xfer->timeout_handle); 2268 usb_rem_task(xfer->pipe->device, &OXFER(xfer)->abort_task); 2269 splx(s); 2270 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2271 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2272 2273 /* 2274 * Step 2: Wait until we know hardware has finished any possible 2275 * use of the xfer. Also make sure the soft interrupt routine 2276 * has run. 2277 */ 2278 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2279 s = splusb(); 2280 #ifdef USB_USE_SOFTINTR 2281 sc->sc_softwake = 1; 2282 #endif /* USB_USE_SOFTINTR */ 2283 usb_schedsoftintr(&sc->sc_bus); 2284 #ifdef USB_USE_SOFTINTR 2285 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2286 #endif /* USB_USE_SOFTINTR */ 2287 splx(s); 2288 2289 /* 2290 * Step 3: Remove any vestiges of the xfer from the hardware. 2291 * The complication here is that the hardware may have executed 2292 * beyond the xfer we're trying to abort. So as we're scanning 2293 * the TDs of this xfer we check if the hardware points to 2294 * any of them. 2295 */ 2296 s = splusb(); /* XXX why? */ 2297 p = xfer->hcpriv; 2298 #ifdef DIAGNOSTIC 2299 if (p == NULL) { 2300 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTING; /* XXX */ 2301 splx(s); 2302 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2303 return; 2304 } 2305 #endif 2306 #ifdef USB_DEBUG 2307 if (ohcidebug > 1) { 2308 DPRINTF(("ohci_abort_xfer: sed=\n")); 2309 ohci_dump_ed(sed); 2310 ohci_dump_tds(p); 2311 } 2312 #endif 2313 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2314 hit = 0; 2315 for (; p->xfer == xfer; p = n) { 2316 hit |= headp == p->physaddr; 2317 n = p->nexttd; 2318 ohci_free_std(sc, p); 2319 } 2320 /* Zap headp register if hardware pointed inside the xfer. */ 2321 if (hit) { 2322 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n", 2323 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2324 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2325 } else { 2326 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2327 } 2328 2329 /* 2330 * Step 4: Turn on hardware again. 2331 */ 2332 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2333 2334 /* 2335 * Step 5: Execute callback. 2336 */ 2337 /* Do the wakeup first to avoid touching the xfer after the callback. */ 2338 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTING; 2339 if (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTWAIT) { 2340 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTWAIT; 2341 wakeup(&oxfer->ohci_xfer_flags); 2342 } 2343 usb_transfer_complete(xfer); 2344 2345 splx(s); 2346 } 2347 2348 /* 2349 * Data structures and routines to emulate the root hub. 2350 */ 2351 static usb_device_descriptor_t ohci_devd = { 2352 USB_DEVICE_DESCRIPTOR_SIZE, 2353 UDESC_DEVICE, /* type */ 2354 {0x00, 0x01}, /* USB version */ 2355 UDCLASS_HUB, /* class */ 2356 UDSUBCLASS_HUB, /* subclass */ 2357 UDPROTO_FSHUB, /* protocol */ 2358 64, /* max packet */ 2359 {0},{0},{0x00,0x01}, /* device id */ 2360 1,2,0, /* string indicies */ 2361 1 /* # of configurations */ 2362 }; 2363 2364 static usb_config_descriptor_t ohci_confd = { 2365 USB_CONFIG_DESCRIPTOR_SIZE, 2366 UDESC_CONFIG, 2367 {USB_CONFIG_DESCRIPTOR_SIZE + 2368 USB_INTERFACE_DESCRIPTOR_SIZE + 2369 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2370 1, 2371 1, 2372 0, 2373 UC_SELF_POWERED, 2374 0 /* max power */ 2375 }; 2376 2377 static usb_interface_descriptor_t ohci_ifcd = { 2378 USB_INTERFACE_DESCRIPTOR_SIZE, 2379 UDESC_INTERFACE, 2380 0, 2381 0, 2382 1, 2383 UICLASS_HUB, 2384 UISUBCLASS_HUB, 2385 UIPROTO_FSHUB, 2386 0 2387 }; 2388 2389 static usb_endpoint_descriptor_t ohci_endpd = { 2390 USB_ENDPOINT_DESCRIPTOR_SIZE, 2391 UDESC_ENDPOINT, 2392 UE_DIR_IN | OHCI_INTR_ENDPT, 2393 UE_INTERRUPT, 2394 {8, 0}, /* max packet */ 2395 255 2396 }; 2397 2398 static usb_hub_descriptor_t ohci_hubd = { 2399 USB_HUB_DESCRIPTOR_SIZE, 2400 UDESC_HUB, 2401 0, 2402 {0,0}, 2403 0, 2404 0, 2405 {0}, 2406 }; 2407 2408 static int 2409 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2410 { 2411 int i; 2412 2413 if (l == 0) 2414 return (0); 2415 p->bLength = 2 * strlen(s) + 2; 2416 if (l == 1) 2417 return (1); 2418 p->bDescriptorType = UDESC_STRING; 2419 l -= 2; 2420 for (i = 0; s[i] && l > 1; i++, l -= 2) 2421 USETW2(p->bString[i], 0, s[i]); 2422 return (2*i+2); 2423 } 2424 2425 /* 2426 * Simulate a hardware hub by handling all the necessary requests. 2427 */ 2428 static usbd_status 2429 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2430 { 2431 usbd_status err; 2432 2433 /* Insert last in queue. */ 2434 err = usb_insert_transfer(xfer); 2435 if (err) 2436 return (err); 2437 2438 /* Pipe isn't running, start first */ 2439 return (ohci_root_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue))); 2440 } 2441 2442 static usbd_status 2443 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2444 { 2445 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2446 usb_device_request_t *req; 2447 void *buf = NULL; 2448 int port, i; 2449 int s, len, value, index, l, totlen = 0; 2450 usb_port_status_t ps; 2451 usb_hub_descriptor_t hubd; 2452 usbd_status err; 2453 u_int32_t v; 2454 2455 if (sc->sc_dying) 2456 return (USBD_IOERROR); 2457 2458 #ifdef DIAGNOSTIC 2459 if (!(xfer->rqflags & URQ_REQUEST)) 2460 /* XXX panic */ 2461 return (USBD_INVAL); 2462 #endif 2463 req = &xfer->request; 2464 2465 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2466 req->bmRequestType, req->bRequest)); 2467 2468 len = UGETW(req->wLength); 2469 value = UGETW(req->wValue); 2470 index = UGETW(req->wIndex); 2471 2472 if (len != 0) 2473 buf = xfer->buffer; 2474 2475 #define C(x,y) ((x) | ((y) << 8)) 2476 switch(C(req->bRequest, req->bmRequestType)) { 2477 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2478 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2479 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2480 /* 2481 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2482 * for the integrated root hub. 2483 */ 2484 break; 2485 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2486 if (len > 0) { 2487 *(u_int8_t *)buf = sc->sc_conf; 2488 totlen = 1; 2489 } 2490 break; 2491 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2492 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2493 switch(value >> 8) { 2494 case UDESC_DEVICE: 2495 if ((value & 0xff) != 0) { 2496 err = USBD_IOERROR; 2497 goto ret; 2498 } 2499 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2500 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2501 memcpy(buf, &ohci_devd, l); 2502 break; 2503 case UDESC_CONFIG: 2504 if ((value & 0xff) != 0) { 2505 err = USBD_IOERROR; 2506 goto ret; 2507 } 2508 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2509 memcpy(buf, &ohci_confd, l); 2510 buf = (char *)buf + l; 2511 len -= l; 2512 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2513 totlen += l; 2514 memcpy(buf, &ohci_ifcd, l); 2515 buf = (char *)buf + l; 2516 len -= l; 2517 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2518 totlen += l; 2519 memcpy(buf, &ohci_endpd, l); 2520 break; 2521 case UDESC_STRING: 2522 if (len == 0) 2523 break; 2524 *(u_int8_t *)buf = 0; 2525 totlen = 1; 2526 switch (value & 0xff) { 2527 case 1: /* Vendor */ 2528 totlen = ohci_str(buf, len, sc->sc_vendor); 2529 break; 2530 case 2: /* Product */ 2531 totlen = ohci_str(buf, len, "OHCI root hub"); 2532 break; 2533 } 2534 break; 2535 default: 2536 err = USBD_IOERROR; 2537 goto ret; 2538 } 2539 break; 2540 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2541 if (len > 0) { 2542 *(u_int8_t *)buf = 0; 2543 totlen = 1; 2544 } 2545 break; 2546 case C(UR_GET_STATUS, UT_READ_DEVICE): 2547 if (len > 1) { 2548 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2549 totlen = 2; 2550 } 2551 break; 2552 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2553 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2554 if (len > 1) { 2555 USETW(((usb_status_t *)buf)->wStatus, 0); 2556 totlen = 2; 2557 } 2558 break; 2559 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2560 if (value >= USB_MAX_DEVICES) { 2561 err = USBD_IOERROR; 2562 goto ret; 2563 } 2564 sc->sc_addr = value; 2565 break; 2566 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2567 if (value != 0 && value != 1) { 2568 err = USBD_IOERROR; 2569 goto ret; 2570 } 2571 sc->sc_conf = value; 2572 break; 2573 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2574 break; 2575 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2576 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2577 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2578 err = USBD_IOERROR; 2579 goto ret; 2580 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2581 break; 2582 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2583 break; 2584 /* Hub requests */ 2585 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2586 break; 2587 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2588 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2589 "port=%d feature=%d\n", 2590 index, value)); 2591 if (index < 1 || index > sc->sc_noport) { 2592 err = USBD_IOERROR; 2593 goto ret; 2594 } 2595 port = OHCI_RH_PORT_STATUS(index); 2596 switch(value) { 2597 case UHF_PORT_ENABLE: 2598 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2599 break; 2600 case UHF_PORT_SUSPEND: 2601 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2602 break; 2603 case UHF_PORT_POWER: 2604 /* Yes, writing to the LOW_SPEED bit clears power. */ 2605 OWRITE4(sc, port, UPS_LOW_SPEED); 2606 break; 2607 case UHF_C_PORT_CONNECTION: 2608 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2609 break; 2610 case UHF_C_PORT_ENABLE: 2611 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2612 break; 2613 case UHF_C_PORT_SUSPEND: 2614 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2615 break; 2616 case UHF_C_PORT_OVER_CURRENT: 2617 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2618 break; 2619 case UHF_C_PORT_RESET: 2620 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2621 break; 2622 default: 2623 err = USBD_IOERROR; 2624 goto ret; 2625 } 2626 switch(value) { 2627 case UHF_C_PORT_CONNECTION: 2628 case UHF_C_PORT_ENABLE: 2629 case UHF_C_PORT_SUSPEND: 2630 case UHF_C_PORT_OVER_CURRENT: 2631 case UHF_C_PORT_RESET: 2632 /* Enable RHSC interrupt if condition is cleared. */ 2633 if ((OREAD4(sc, port) >> 16) == 0) 2634 ohci_rhsc_able(sc, 1); 2635 break; 2636 default: 2637 break; 2638 } 2639 break; 2640 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2641 if ((value & 0xff) != 0) { 2642 err = USBD_IOERROR; 2643 goto ret; 2644 } 2645 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2646 hubd = ohci_hubd; 2647 hubd.bNbrPorts = sc->sc_noport; 2648 USETW(hubd.wHubCharacteristics, 2649 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2650 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2651 /* XXX overcurrent */ 2652 ); 2653 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2654 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2655 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2656 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2657 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2658 l = min(len, hubd.bDescLength); 2659 totlen = l; 2660 memcpy(buf, &hubd, l); 2661 break; 2662 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2663 if (len != 4) { 2664 err = USBD_IOERROR; 2665 goto ret; 2666 } 2667 memset(buf, 0, len); /* ? XXX */ 2668 totlen = len; 2669 break; 2670 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2671 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2672 index)); 2673 if (index < 1 || index > sc->sc_noport) { 2674 err = USBD_IOERROR; 2675 goto ret; 2676 } 2677 if (len != 4) { 2678 err = USBD_IOERROR; 2679 goto ret; 2680 } 2681 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2682 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2683 v)); 2684 USETW(ps.wPortStatus, v); 2685 USETW(ps.wPortChange, v >> 16); 2686 l = min(len, sizeof ps); 2687 memcpy(buf, &ps, l); 2688 totlen = l; 2689 break; 2690 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2691 err = USBD_IOERROR; 2692 goto ret; 2693 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2694 break; 2695 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2696 if (index < 1 || index > sc->sc_noport) { 2697 err = USBD_IOERROR; 2698 goto ret; 2699 } 2700 port = OHCI_RH_PORT_STATUS(index); 2701 switch(value) { 2702 case UHF_PORT_ENABLE: 2703 OWRITE4(sc, port, UPS_PORT_ENABLED); 2704 break; 2705 case UHF_PORT_SUSPEND: 2706 OWRITE4(sc, port, UPS_SUSPEND); 2707 break; 2708 case UHF_PORT_RESET: 2709 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2710 index)); 2711 OWRITE4(sc, port, UPS_RESET); 2712 for (i = 0; i < 5; i++) { 2713 usb_delay_ms(&sc->sc_bus, 2714 USB_PORT_ROOT_RESET_DELAY); 2715 if (sc->sc_dying) { 2716 err = USBD_IOERROR; 2717 goto ret; 2718 } 2719 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2720 break; 2721 } 2722 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2723 index, OREAD4(sc, port))); 2724 break; 2725 case UHF_PORT_POWER: 2726 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2727 "%d\n", index)); 2728 OWRITE4(sc, port, UPS_PORT_POWER); 2729 break; 2730 default: 2731 err = USBD_IOERROR; 2732 goto ret; 2733 } 2734 break; 2735 default: 2736 err = USBD_IOERROR; 2737 goto ret; 2738 } 2739 xfer->actlen = totlen; 2740 err = USBD_NORMAL_COMPLETION; 2741 ret: 2742 xfer->status = err; 2743 s = splusb(); 2744 hacksync(xfer); /* XXX to compensate for usb_transfer_complete */ 2745 usb_transfer_complete(xfer); 2746 splx(s); 2747 return (USBD_IN_PROGRESS); 2748 } 2749 2750 /* Abort a root control request. */ 2751 static void 2752 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2753 { 2754 /* Nothing to do, all transfers are synchronous. */ 2755 } 2756 2757 /* Close the root pipe. */ 2758 static void 2759 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2760 { 2761 DPRINTF(("ohci_root_ctrl_close\n")); 2762 /* Nothing to do. */ 2763 } 2764 2765 static usbd_status 2766 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2767 { 2768 usbd_status err; 2769 2770 /* Insert last in queue. */ 2771 err = usb_insert_transfer(xfer); 2772 if (err) 2773 return (err); 2774 2775 /* Pipe isn't running, start first */ 2776 return (ohci_root_intr_start(STAILQ_FIRST(&xfer->pipe->queue))); 2777 } 2778 2779 static usbd_status 2780 ohci_root_intr_start(usbd_xfer_handle xfer) 2781 { 2782 usbd_pipe_handle pipe = xfer->pipe; 2783 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2784 2785 if (sc->sc_dying) 2786 return (USBD_IOERROR); 2787 2788 sc->sc_intrxfer = xfer; 2789 2790 return (USBD_IN_PROGRESS); 2791 } 2792 2793 /* Abort a root interrupt request. */ 2794 static void 2795 ohci_root_intr_abort(usbd_xfer_handle xfer) 2796 { 2797 int s; 2798 2799 if (xfer->pipe->intrxfer == xfer) { 2800 DPRINTF(("ohci_root_intr_abort: remove\n")); 2801 xfer->pipe->intrxfer = NULL; 2802 } 2803 xfer->status = USBD_CANCELLED; 2804 s = splusb(); 2805 usb_transfer_complete(xfer); 2806 splx(s); 2807 } 2808 2809 /* Close the root pipe. */ 2810 static void 2811 ohci_root_intr_close(usbd_pipe_handle pipe) 2812 { 2813 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2814 2815 DPRINTF(("ohci_root_intr_close\n")); 2816 2817 sc->sc_intrxfer = NULL; 2818 } 2819 2820 /************************/ 2821 2822 static usbd_status 2823 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2824 { 2825 usbd_status err; 2826 2827 /* Insert last in queue. */ 2828 err = usb_insert_transfer(xfer); 2829 if (err) 2830 return (err); 2831 2832 /* Pipe isn't running, start first */ 2833 return (ohci_device_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue))); 2834 } 2835 2836 static usbd_status 2837 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2838 { 2839 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2840 usbd_status err; 2841 2842 if (sc->sc_dying) 2843 return (USBD_IOERROR); 2844 2845 #ifdef DIAGNOSTIC 2846 if (!(xfer->rqflags & URQ_REQUEST)) { 2847 /* XXX panic */ 2848 printf("ohci_device_ctrl_transfer: not a request\n"); 2849 return (USBD_INVAL); 2850 } 2851 #endif 2852 2853 err = ohci_device_request(xfer); 2854 if (err) 2855 return (err); 2856 2857 if (sc->sc_bus.use_polling) 2858 ohci_waitintr(sc, xfer); 2859 return (USBD_IN_PROGRESS); 2860 } 2861 2862 /* Abort a device control request. */ 2863 static void 2864 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2865 { 2866 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2867 ohci_abort_xfer(xfer, USBD_CANCELLED); 2868 } 2869 2870 /* Close a device control pipe. */ 2871 static void 2872 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2873 { 2874 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2875 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2876 2877 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2878 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2879 ohci_free_std(sc, opipe->tail.td); 2880 } 2881 2882 /************************/ 2883 2884 static void 2885 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2886 { 2887 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2888 2889 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2890 } 2891 2892 static void 2893 ohci_noop(usbd_pipe_handle pipe) 2894 { 2895 } 2896 2897 static usbd_status 2898 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2899 { 2900 usbd_status err; 2901 2902 /* Insert last in queue. */ 2903 err = usb_insert_transfer(xfer); 2904 if (err) 2905 return (err); 2906 2907 /* Pipe isn't running, start first */ 2908 return (ohci_device_bulk_start(STAILQ_FIRST(&xfer->pipe->queue))); 2909 } 2910 2911 static usbd_status 2912 ohci_device_bulk_start(usbd_xfer_handle xfer) 2913 { 2914 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2915 usbd_device_handle dev = opipe->pipe.device; 2916 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2917 int addr = dev->address; 2918 ohci_soft_td_t *data, *tail, *tdp; 2919 ohci_soft_ed_t *sed; 2920 int s, len, isread, endpt; 2921 usbd_status err; 2922 2923 if (sc->sc_dying) 2924 return (USBD_IOERROR); 2925 2926 #ifdef DIAGNOSTIC 2927 if (xfer->rqflags & URQ_REQUEST) { 2928 /* XXX panic */ 2929 printf("ohci_device_bulk_start: a request\n"); 2930 return (USBD_INVAL); 2931 } 2932 #endif 2933 2934 len = xfer->length; 2935 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2936 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2937 sed = opipe->sed; 2938 2939 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2940 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2941 endpt)); 2942 2943 opipe->u.bulk.isread = isread; 2944 opipe->u.bulk.length = len; 2945 2946 /* Update device address */ 2947 sed->ed.ed_flags = htole32( 2948 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2949 OHCI_ED_SET_FA(addr)); 2950 2951 /* Allocate a chain of new TDs (including a new tail). */ 2952 data = opipe->tail.td; 2953 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2954 data, &tail); 2955 /* We want interrupt at the end of the transfer. */ 2956 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2957 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2958 tail->flags |= OHCI_CALL_DONE; 2959 tail = tail->nexttd; /* point at sentinel */ 2960 if (err) 2961 return (err); 2962 2963 tail->xfer = NULL; 2964 xfer->hcpriv = data; 2965 2966 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2967 "td_cbp=0x%08x td_be=0x%08x\n", 2968 (int)le32toh(sed->ed.ed_flags), 2969 (int)le32toh(data->td.td_flags), 2970 (int)le32toh(data->td.td_cbp), 2971 (int)le32toh(data->td.td_be))); 2972 2973 #ifdef USB_DEBUG 2974 if (ohcidebug > 5) { 2975 ohci_dump_ed(sed); 2976 ohci_dump_tds(data); 2977 } 2978 #endif 2979 2980 /* Insert ED in schedule */ 2981 s = splusb(); 2982 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2983 tdp->xfer = xfer; 2984 } 2985 sed->ed.ed_tailp = htole32(tail->physaddr); 2986 opipe->tail.td = tail; 2987 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2988 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2989 if (xfer->timeout && !sc->sc_bus.use_polling) { 2990 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2991 ohci_timeout, xfer); 2992 } 2993 2994 #if 0 2995 /* This goes wrong if we are too slow. */ 2996 if (ohcidebug > 10) { 2997 delay(10000); 2998 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2999 OREAD4(sc, OHCI_COMMAND_STATUS))); 3000 ohci_dump_ed(sed); 3001 ohci_dump_tds(data); 3002 } 3003 #endif 3004 3005 splx(s); 3006 3007 if (sc->sc_bus.use_polling) 3008 ohci_waitintr(sc, xfer); 3009 3010 return (USBD_IN_PROGRESS); 3011 } 3012 3013 static void 3014 ohci_device_bulk_abort(usbd_xfer_handle xfer) 3015 { 3016 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 3017 ohci_abort_xfer(xfer, USBD_CANCELLED); 3018 } 3019 3020 /* 3021 * Close a device bulk pipe. 3022 */ 3023 static void 3024 ohci_device_bulk_close(usbd_pipe_handle pipe) 3025 { 3026 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3027 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3028 3029 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 3030 ohci_close_pipe(pipe, sc->sc_bulk_head); 3031 ohci_free_std(sc, opipe->tail.td); 3032 } 3033 3034 /************************/ 3035 3036 static usbd_status 3037 ohci_device_intr_transfer(usbd_xfer_handle xfer) 3038 { 3039 usbd_status err; 3040 3041 /* Insert last in queue. */ 3042 err = usb_insert_transfer(xfer); 3043 if (err) 3044 return (err); 3045 3046 /* Pipe isn't running, start first */ 3047 return (ohci_device_intr_start(STAILQ_FIRST(&xfer->pipe->queue))); 3048 } 3049 3050 static usbd_status 3051 ohci_device_intr_start(usbd_xfer_handle xfer) 3052 { 3053 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3054 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3055 ohci_soft_ed_t *sed = opipe->sed; 3056 usbd_status err; 3057 3058 if (sc->sc_dying) 3059 return (USBD_IOERROR); 3060 3061 DPRINTFN(3, ("ohci_device_intr_start: xfer=%p len=%d " 3062 "flags=%d priv=%p\n", 3063 xfer, xfer->length, xfer->flags, xfer->priv)); 3064 3065 #ifdef DIAGNOSTIC 3066 if (xfer->rqflags & URQ_REQUEST) 3067 panic("ohci_device_intr_start: a request"); 3068 #endif 3069 3070 err = ohci_device_intr_insert(sc, xfer); 3071 if (err) 3072 return (err); 3073 3074 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3075 3076 return (USBD_IN_PROGRESS); 3077 } 3078 3079 /* 3080 * Insert an interrupt transfer into an endpoint descriptor list 3081 */ 3082 static usbd_status 3083 ohci_device_intr_insert(ohci_softc_t *sc, usbd_xfer_handle xfer) 3084 { 3085 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3086 ohci_soft_ed_t *sed = opipe->sed; 3087 ohci_soft_td_t *data, *tail; 3088 ohci_physaddr_t dataphys, physend; 3089 int s; 3090 3091 DPRINTFN(4, ("ohci_device_intr_insert: xfer=%p", xfer)); 3092 3093 data = opipe->tail.td; 3094 tail = ohci_alloc_std(sc); 3095 if (tail == NULL) 3096 return (USBD_NOMEM); 3097 tail->xfer = NULL; 3098 3099 data->td.td_flags = htole32( 3100 OHCI_TD_IN | OHCI_TD_NOCC | 3101 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 3102 if (xfer->flags & USBD_SHORT_XFER_OK) 3103 data->td.td_flags |= htole32(OHCI_TD_R); 3104 /* 3105 * Assume a short mapping with no complications, which 3106 * should always be true for <= 4k buffers in contiguous 3107 * virtual memory. The data can take the following forms: 3108 * 1 segment in 1 OHCI page 3109 * 1 segment in 2 OHCI pages 3110 * 2 segments in 2 OHCI pages 3111 * (see comment in ohci_alloc_std_chain() for details) 3112 */ 3113 KASSERT(xfer->length > 0 && xfer->length <= OHCI_PAGE_SIZE, 3114 ("ohci_device_intr_insert: bad length %d", xfer->length)); 3115 dataphys = xfer->dmamap.segs[0].ds_addr; 3116 physend = dataphys + xfer->length - 1; 3117 if (xfer->dmamap.nsegs == 2) { 3118 KASSERT(OHCI_PAGE_OFFSET(dataphys + 3119 xfer->dmamap.segs[0].ds_len) == 0, 3120 ("ohci_device_intr_insert: bad seg 0 termination")); 3121 physend = xfer->dmamap.segs[1].ds_addr + xfer->length - 3122 xfer->dmamap.segs[0].ds_len - 1; 3123 } else { 3124 KASSERT(xfer->dmamap.nsegs == 1, 3125 ("ohci_device_intr_insert: bad seg count %d", 3126 (u_int)xfer->dmamap.nsegs)); 3127 } 3128 data->td.td_cbp = htole32(dataphys); 3129 data->nexttd = tail; 3130 data->td.td_nexttd = htole32(tail->physaddr); 3131 data->td.td_be = htole32(physend); 3132 data->len = xfer->length; 3133 data->xfer = xfer; 3134 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 3135 xfer->hcpriv = data; 3136 xfer->actlen = 0; 3137 3138 #ifdef USB_DEBUG 3139 if (ohcidebug > 5) { 3140 DPRINTF(("ohci_device_intr_insert:\n")); 3141 ohci_dump_ed(sed); 3142 ohci_dump_tds(data); 3143 } 3144 #endif 3145 3146 /* Insert ED in schedule */ 3147 s = splusb(); 3148 sed->ed.ed_tailp = htole32(tail->physaddr); 3149 opipe->tail.td = tail; 3150 splx(s); 3151 3152 return (USBD_NORMAL_COMPLETION); 3153 } 3154 3155 /* Abort a device control request. */ 3156 static void 3157 ohci_device_intr_abort(usbd_xfer_handle xfer) 3158 { 3159 if (xfer->pipe->intrxfer == xfer) { 3160 DPRINTF(("ohci_device_intr_abort: remove\n")); 3161 xfer->pipe->intrxfer = NULL; 3162 } 3163 ohci_abort_xfer(xfer, USBD_CANCELLED); 3164 } 3165 3166 /* Close a device interrupt pipe. */ 3167 static void 3168 ohci_device_intr_close(usbd_pipe_handle pipe) 3169 { 3170 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3171 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3172 int nslots = opipe->u.intr.nslots; 3173 int pos = opipe->u.intr.pos; 3174 int j; 3175 ohci_soft_ed_t *p, *sed = opipe->sed; 3176 int s; 3177 3178 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3179 pipe, nslots, pos)); 3180 s = splusb(); 3181 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3182 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3183 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3184 usb_delay_ms(&sc->sc_bus, 2); 3185 #ifdef DIAGNOSTIC 3186 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3187 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3188 panic("%s: Intr pipe %p still has TDs queued", 3189 device_get_nameunit(sc->sc_bus.bdev), pipe); 3190 #endif 3191 3192 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3193 ; 3194 #ifdef DIAGNOSTIC 3195 if (p == NULL) 3196 panic("ohci_device_intr_close: ED not found"); 3197 #endif 3198 p->next = sed->next; 3199 p->ed.ed_nexted = sed->ed.ed_nexted; 3200 splx(s); 3201 3202 for (j = 0; j < nslots; j++) 3203 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3204 3205 ohci_free_std(sc, opipe->tail.td); 3206 ohci_free_sed(sc, opipe->sed); 3207 } 3208 3209 static usbd_status 3210 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3211 { 3212 int i, j, s, best; 3213 u_int npoll, slow, shigh, nslots; 3214 u_int bestbw, bw; 3215 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3216 3217 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3218 if (ival == 0) { 3219 printf("ohci_setintr: 0 interval\n"); 3220 return (USBD_INVAL); 3221 } 3222 3223 npoll = OHCI_NO_INTRS; 3224 while (npoll > ival) 3225 npoll /= 2; 3226 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3227 3228 /* 3229 * We now know which level in the tree the ED must go into. 3230 * Figure out which slot has most bandwidth left over. 3231 * Slots to examine: 3232 * npoll 3233 * 1 0 3234 * 2 1 2 3235 * 4 3 4 5 6 3236 * 8 7 8 9 10 11 12 13 14 3237 * N (N-1) .. (N-1+N-1) 3238 */ 3239 slow = npoll-1; 3240 shigh = slow + npoll; 3241 nslots = OHCI_NO_INTRS / npoll; 3242 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3243 bw = 0; 3244 for (j = 0; j < nslots; j++) 3245 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3246 if (bw < bestbw) { 3247 best = i; 3248 bestbw = bw; 3249 } 3250 } 3251 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3252 best, slow, shigh, bestbw)); 3253 3254 s = splusb(); 3255 hsed = sc->sc_eds[best]; 3256 sed->next = hsed->next; 3257 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3258 hsed->next = sed; 3259 hsed->ed.ed_nexted = htole32(sed->physaddr); 3260 splx(s); 3261 3262 for (j = 0; j < nslots; j++) 3263 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3264 opipe->u.intr.nslots = nslots; 3265 opipe->u.intr.pos = best; 3266 3267 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3268 return (USBD_NORMAL_COMPLETION); 3269 } 3270 3271 /***********************/ 3272 3273 usbd_status 3274 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3275 { 3276 usbd_status err; 3277 3278 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3279 3280 /* Put it on our queue, */ 3281 err = usb_insert_transfer(xfer); 3282 3283 /* bail out on error, */ 3284 if (err && err != USBD_IN_PROGRESS) 3285 return (err); 3286 3287 /* XXX should check inuse here */ 3288 3289 /* insert into schedule, */ 3290 ohci_device_isoc_enter(xfer); 3291 3292 /* and start if the pipe wasn't running */ 3293 if (!err) 3294 ohci_device_isoc_start(STAILQ_FIRST(&xfer->pipe->queue)); 3295 3296 return (err); 3297 } 3298 3299 void 3300 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3301 { 3302 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3303 usbd_device_handle dev = opipe->pipe.device; 3304 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3305 ohci_soft_ed_t *sed = opipe->sed; 3306 struct iso *iso = &opipe->u.iso; 3307 struct usb_dma_mapping *dma = &xfer->dmamap; 3308 ohci_soft_itd_t *sitd, *nsitd; 3309 ohci_physaddr_t dataphys, bp0, physend, prevpage; 3310 int curlen, i, len, ncur, nframes, npages, seg, segoff; 3311 int s; 3312 3313 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3314 "nframes=%d\n", 3315 iso->inuse, iso->next, xfer, xfer->nframes)); 3316 3317 if (sc->sc_dying) 3318 return; 3319 3320 if (iso->next == -1) { 3321 /* Not in use yet, schedule it a few frames ahead. */ 3322 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3323 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3324 iso->next)); 3325 } 3326 3327 sitd = opipe->tail.itd; 3328 nframes = xfer->nframes; 3329 xfer->hcpriv = sitd; 3330 seg = 0; 3331 segoff = 0; 3332 i = 0; 3333 while (i < nframes) { 3334 /* 3335 * Fill in as many ITD frames as possible. 3336 */ 3337 KASSERT(seg < dma->nsegs, ("ohci_device_isoc_enter: overrun")); 3338 bp0 = dma->segs[seg].ds_addr + segoff; 3339 sitd->itd.itd_bp0 = htole32(bp0); 3340 prevpage = OHCI_PAGE(bp0); 3341 npages = 1; 3342 3343 ncur = 0; 3344 while (ncur < OHCI_ITD_NOFFSET && i < nframes) { 3345 /* Find the frame start and end physical addresses. */ 3346 len = xfer->frlengths[i]; 3347 dataphys = dma->segs[seg].ds_addr + segoff; 3348 curlen = dma->segs[seg].ds_len - segoff; 3349 if (len > curlen) { 3350 KASSERT(seg + 1 < dma->nsegs, 3351 ("ohci_device_isoc_enter: overrun2")); 3352 seg++; 3353 segoff = len - curlen; 3354 } else { 3355 segoff += len; 3356 } 3357 KASSERT(segoff <= dma->segs[seg].ds_len, 3358 ("ohci_device_isoc_enter: overrun3")); 3359 physend = dma->segs[seg].ds_addr + segoff - 1; 3360 3361 /* Check if there would be more than 2 pages . */ 3362 if (OHCI_PAGE(dataphys) != prevpage) { 3363 prevpage = OHCI_PAGE(dataphys); 3364 npages++; 3365 } 3366 if (OHCI_PAGE(physend) != prevpage) { 3367 prevpage = OHCI_PAGE(physend); 3368 npages++; 3369 } 3370 if (npages > 2) { 3371 /* We cannot fit this frame now. */ 3372 segoff -= len; 3373 if (segoff < 0) { 3374 seg--; 3375 segoff += dma->segs[seg].ds_len; 3376 } 3377 break; 3378 } 3379 3380 sitd->itd.itd_be = htole32(physend); 3381 sitd->itd.itd_offset[ncur] = 3382 htole16(OHCI_ITD_MK_OFFS(OHCI_PAGE(dataphys) == 3383 OHCI_PAGE(bp0) ? 0 : 1, dataphys)); 3384 i++; 3385 ncur++; 3386 } 3387 if (segoff >= dma->segs[seg].ds_len) { 3388 KASSERT(segoff == dma->segs[seg].ds_len, 3389 ("ohci_device_isoc_enter: overlap")); 3390 seg++; 3391 segoff = 0; 3392 } 3393 3394 /* Allocate next ITD */ 3395 nsitd = ohci_alloc_sitd(sc); 3396 if (nsitd == NULL) { 3397 /* XXX what now? */ 3398 printf("%s: isoc TD alloc failed\n", 3399 device_get_nameunit(sc->sc_bus.bdev)); 3400 return; 3401 } 3402 3403 /* Fill out remaining fields of current ITD */ 3404 sitd->nextitd = nsitd; 3405 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3406 sitd->xfer = xfer; 3407 if (i < nframes) { 3408 sitd->itd.itd_flags = htole32( 3409 OHCI_ITD_NOCC | 3410 OHCI_ITD_SET_SF(iso->next) | 3411 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3412 OHCI_ITD_SET_FC(ncur)); 3413 sitd->flags = OHCI_ITD_ACTIVE; 3414 } else { 3415 sitd->itd.itd_flags = htole32( 3416 OHCI_ITD_NOCC | 3417 OHCI_ITD_SET_SF(iso->next) | 3418 OHCI_ITD_SET_DI(0) | 3419 OHCI_ITD_SET_FC(ncur)); 3420 sitd->flags = OHCI_CALL_DONE | OHCI_ITD_ACTIVE; 3421 } 3422 iso->next += ncur; 3423 3424 sitd = nsitd; 3425 } 3426 3427 iso->inuse += nframes; 3428 3429 /* XXX pretend we did it all */ 3430 xfer->actlen = 0; 3431 for (i = 0; i < nframes; i++) 3432 xfer->actlen += xfer->frlengths[i]; 3433 3434 xfer->status = USBD_IN_PROGRESS; 3435 3436 #ifdef USB_DEBUG 3437 if (ohcidebug > 5) { 3438 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3439 le32toh(sc->sc_hcca->hcca_frame_number))); 3440 ohci_dump_itds(xfer->hcpriv); 3441 ohci_dump_ed(sed); 3442 } 3443 #endif 3444 3445 s = splusb(); 3446 opipe->tail.itd = sitd; 3447 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3448 sed->ed.ed_tailp = htole32(sitd->physaddr); 3449 splx(s); 3450 3451 #ifdef USB_DEBUG 3452 if (ohcidebug > 5) { 3453 delay(150000); 3454 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3455 le32toh(sc->sc_hcca->hcca_frame_number))); 3456 ohci_dump_itds(xfer->hcpriv); 3457 ohci_dump_ed(sed); 3458 } 3459 #endif 3460 } 3461 3462 usbd_status 3463 ohci_device_isoc_start(usbd_xfer_handle xfer) 3464 { 3465 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3466 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3467 ohci_soft_ed_t *sed; 3468 int s; 3469 3470 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3471 3472 if (sc->sc_dying) 3473 return (USBD_IOERROR); 3474 3475 #ifdef DIAGNOSTIC 3476 if (xfer->status != USBD_IN_PROGRESS) 3477 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3478 #endif 3479 3480 /* XXX anything to do? */ 3481 3482 s = splusb(); 3483 sed = opipe->sed; /* Turn off ED skip-bit to start processing */ 3484 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* ED's ITD list.*/ 3485 splx(s); 3486 3487 return (USBD_IN_PROGRESS); 3488 } 3489 3490 void 3491 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3492 { 3493 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3494 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3495 ohci_soft_ed_t *sed; 3496 ohci_soft_itd_t *sitd, *sitdnext, *tmp_sitd; 3497 int s,undone,num_sitds; 3498 3499 s = splusb(); 3500 opipe->aborting = 1; 3501 3502 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3503 3504 /* Transfer is already done. */ 3505 if (xfer->status != USBD_NOT_STARTED && 3506 xfer->status != USBD_IN_PROGRESS) { 3507 splx(s); 3508 printf("ohci_device_isoc_abort: early return\n"); 3509 return; 3510 } 3511 3512 /* Give xfer the requested abort code. */ 3513 xfer->status = USBD_CANCELLED; 3514 3515 sed = opipe->sed; 3516 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3517 3518 num_sitds = 0; 3519 sitd = xfer->hcpriv; 3520 #ifdef DIAGNOSTIC 3521 if (sitd == NULL) { 3522 splx(s); 3523 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3524 return; 3525 } 3526 #endif 3527 for (; sitd != NULL && sitd->xfer == xfer; sitd = sitd->nextitd) { 3528 num_sitds++; 3529 #ifdef DIAGNOSTIC 3530 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3531 sitd->isdone = 1; 3532 #endif 3533 } 3534 3535 splx(s); 3536 3537 /* 3538 * Each sitd has up to OHCI_ITD_NOFFSET transfers, each can 3539 * take a usb 1ms cycle. Conservatively wait for it to drain. 3540 * Even with DMA done, it can take awhile for the "batch" 3541 * delivery of completion interrupts to occur thru the controller. 3542 */ 3543 3544 do { 3545 usb_delay_ms(&sc->sc_bus, 2*(num_sitds*OHCI_ITD_NOFFSET)); 3546 3547 undone = 0; 3548 tmp_sitd = xfer->hcpriv; 3549 for (; tmp_sitd != NULL && tmp_sitd->xfer == xfer; 3550 tmp_sitd = tmp_sitd->nextitd) { 3551 if (OHCI_CC_NO_ERROR == 3552 OHCI_ITD_GET_CC(le32toh(tmp_sitd->itd.itd_flags)) && 3553 tmp_sitd->flags & OHCI_ITD_ACTIVE && 3554 (tmp_sitd->flags & OHCI_ITD_INTFIN) == 0) 3555 undone++; 3556 } 3557 } while( undone != 0 ); 3558 3559 /* Free the sitds */ 3560 for (sitd = xfer->hcpriv; sitd->xfer == xfer; 3561 sitd = sitdnext) { 3562 sitdnext = sitd->nextitd; 3563 ohci_free_sitd(sc, sitd); 3564 } 3565 3566 s = splusb(); 3567 3568 /* Run callback. */ 3569 usb_transfer_complete(xfer); 3570 3571 /* There is always a `next' sitd so link it up. */ 3572 sed->ed.ed_headp = htole32(sitd->physaddr); 3573 3574 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3575 3576 splx(s); 3577 } 3578 3579 void 3580 ohci_device_isoc_done(usbd_xfer_handle xfer) 3581 { 3582 /* This null routine corresponds to non-isoc "done()" routines 3583 * that free the stds associated with an xfer after a completed 3584 * xfer interrupt. However, in the case of isoc transfers, the 3585 * sitds associated with the transfer have already been processed 3586 * and reallocated for the next iteration by 3587 * "ohci_device_isoc_transfer()". 3588 * 3589 * Routine "usb_transfer_complete()" is called at the end of every 3590 * relevant usb interrupt. "usb_transfer_complete()" indirectly 3591 * calls 1) "ohci_device_isoc_transfer()" (which keeps pumping the 3592 * pipeline by setting up the next transfer iteration) and 2) then 3593 * calls "ohci_device_isoc_done()". Isoc transfers have not been 3594 * working for the ohci usb because this routine was trashing the 3595 * xfer set up for the next iteration (thus, only the first 3596 * UGEN_NISOREQS xfers outstanding on an open would work). Perhaps 3597 * this could all be re-factored, but that's another pass... 3598 */ 3599 } 3600 3601 usbd_status 3602 ohci_setup_isoc(usbd_pipe_handle pipe) 3603 { 3604 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3605 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3606 struct iso *iso = &opipe->u.iso; 3607 int s; 3608 3609 iso->next = -1; 3610 iso->inuse = 0; 3611 3612 s = splusb(); 3613 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3614 splx(s); 3615 3616 return (USBD_NORMAL_COMPLETION); 3617 } 3618 3619 void 3620 ohci_device_isoc_close(usbd_pipe_handle pipe) 3621 { 3622 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3623 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3624 ohci_soft_ed_t *sed; 3625 3626 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3627 3628 sed = opipe->sed; 3629 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop device. */ 3630 3631 ohci_close_pipe(pipe, sc->sc_isoc_head); /* Stop isoc list, free ED.*/ 3632 3633 /* up to NISOREQs xfers still outstanding. */ 3634 3635 #ifdef DIAGNOSTIC 3636 opipe->tail.itd->isdone = 1; 3637 #endif 3638 ohci_free_sitd(sc, opipe->tail.itd); /* Next `avail free' sitd.*/ 3639 }
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