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sys/dev/usb/ohci.c
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1 /* $NetBSD: ohci.c,v 1.146.2.5 2004/07/23 15:44:53 tron Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart@augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/docs/usbspec.zip 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.146.2.5 2004/07/23 15:44:53 tron Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/kernel.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #elif defined(__FreeBSD__) 59 #include <sys/module.h> 60 #include <sys/bus.h> 61 #include <machine/bus_pio.h> 62 #include <machine/bus_memio.h> 63 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 64 #include <machine/cpu.h> 65 #endif 66 #endif 67 #include <sys/proc.h> 68 #include <sys/queue.h> 69 70 #include <machine/bus.h> 71 #include <machine/endian.h> 72 73 #include <dev/usb/usb.h> 74 #include <dev/usb/usbdi.h> 75 #include <dev/usb/usbdivar.h> 76 #include <dev/usb/usb_mem.h> 77 #include <dev/usb/usb_quirks.h> 78 79 #include <dev/usb/ohcireg.h> 80 #include <dev/usb/ohcivar.h> 81 82 #if defined(__FreeBSD__) 83 #include <machine/clock.h> 84 85 #define delay(d) DELAY(d) 86 #endif 87 88 #if defined(__OpenBSD__) 89 struct cfdriver ohci_cd = { 90 NULL, "ohci", DV_DULL 91 }; 92 #endif 93 94 #ifdef OHCI_DEBUG 95 #define DPRINTF(x) if (ohcidebug) logprintf x 96 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 97 int ohcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 /* 107 * The OHCI controller is little endian, so on big endian machines 108 * the data strored in memory needs to be swapped. 109 */ 110 #if defined(__FreeBSD__) || defined(__OpenBSD__) 111 #if BYTE_ORDER == BIG_ENDIAN 112 #define htole32(x) (bswap32(x)) 113 #define le32toh(x) (bswap32(x)) 114 #else 115 #define htole32(x) (x) 116 #define le32toh(x) (x) 117 #endif 118 #endif 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 146 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 147 148 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 149 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 150 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 152 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 154 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 155 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 157 158 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 159 Static void ohci_device_isoc_enter(usbd_xfer_handle); 160 161 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 162 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 163 164 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 165 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 166 167 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 169 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 170 Static void ohci_root_ctrl_close(usbd_pipe_handle); 171 Static void ohci_root_ctrl_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 175 Static void ohci_root_intr_abort(usbd_xfer_handle); 176 Static void ohci_root_intr_close(usbd_pipe_handle); 177 Static void ohci_root_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 180 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 181 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 182 Static void ohci_device_ctrl_close(usbd_pipe_handle); 183 Static void ohci_device_ctrl_done(usbd_xfer_handle); 184 185 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 186 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 187 Static void ohci_device_bulk_abort(usbd_xfer_handle); 188 Static void ohci_device_bulk_close(usbd_pipe_handle); 189 Static void ohci_device_bulk_done(usbd_xfer_handle); 190 191 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 192 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 193 Static void ohci_device_intr_abort(usbd_xfer_handle); 194 Static void ohci_device_intr_close(usbd_pipe_handle); 195 Static void ohci_device_intr_done(usbd_xfer_handle); 196 197 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 198 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 199 Static void ohci_device_isoc_abort(usbd_xfer_handle); 200 Static void ohci_device_isoc_close(usbd_pipe_handle); 201 Static void ohci_device_isoc_done(usbd_xfer_handle); 202 203 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 204 struct ohci_pipe *pipe, int ival); 205 206 Static int ohci_str(usb_string_descriptor_t *, int, const char *); 207 208 Static void ohci_timeout(void *); 209 Static void ohci_timeout_task(void *); 210 Static void ohci_rhsc_able(ohci_softc_t *, int); 211 Static void ohci_rhsc_enable(void *); 212 213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 217 Static void ohci_noop(usbd_pipe_handle pipe); 218 219 #ifdef OHCI_DEBUG 220 Static void ohci_dumpregs(ohci_softc_t *); 221 Static void ohci_dump_tds(ohci_soft_td_t *); 222 Static void ohci_dump_td(ohci_soft_td_t *); 223 Static void ohci_dump_ed(ohci_soft_ed_t *); 224 Static void ohci_dump_itd(ohci_soft_itd_t *); 225 Static void ohci_dump_itds(ohci_soft_itd_t *); 226 #endif 227 228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 230 #define OWRITE1(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE2(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE4(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 237 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 239 240 /* Reverse the bits in a value 0 .. 31 */ 241 Static u_int8_t revbits[OHCI_NO_INTRS] = 242 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 243 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 244 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 245 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 246 247 struct ohci_pipe { 248 struct usbd_pipe pipe; 249 ohci_soft_ed_t *sed; 250 union { 251 ohci_soft_td_t *td; 252 ohci_soft_itd_t *itd; 253 } tail; 254 /* Info needed for different pipe kinds. */ 255 union { 256 /* Control pipe */ 257 struct { 258 usb_dma_t reqdma; 259 u_int length; 260 ohci_soft_td_t *setup, *data, *stat; 261 } ctl; 262 /* Interrupt pipe */ 263 struct { 264 int nslots; 265 int pos; 266 } intr; 267 /* Bulk pipe */ 268 struct { 269 u_int length; 270 int isread; 271 } bulk; 272 /* Iso pipe */ 273 struct iso { 274 int next, inuse; 275 } iso; 276 } u; 277 }; 278 279 #define OHCI_INTR_ENDPT 1 280 281 Static struct usbd_bus_methods ohci_bus_methods = { 282 ohci_open, 283 ohci_softintr, 284 ohci_poll, 285 ohci_allocm, 286 ohci_freem, 287 ohci_allocx, 288 ohci_freex, 289 }; 290 291 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 292 ohci_root_ctrl_transfer, 293 ohci_root_ctrl_start, 294 ohci_root_ctrl_abort, 295 ohci_root_ctrl_close, 296 ohci_noop, 297 ohci_root_ctrl_done, 298 }; 299 300 Static struct usbd_pipe_methods ohci_root_intr_methods = { 301 ohci_root_intr_transfer, 302 ohci_root_intr_start, 303 ohci_root_intr_abort, 304 ohci_root_intr_close, 305 ohci_noop, 306 ohci_root_intr_done, 307 }; 308 309 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 310 ohci_device_ctrl_transfer, 311 ohci_device_ctrl_start, 312 ohci_device_ctrl_abort, 313 ohci_device_ctrl_close, 314 ohci_noop, 315 ohci_device_ctrl_done, 316 }; 317 318 Static struct usbd_pipe_methods ohci_device_intr_methods = { 319 ohci_device_intr_transfer, 320 ohci_device_intr_start, 321 ohci_device_intr_abort, 322 ohci_device_intr_close, 323 ohci_device_clear_toggle, 324 ohci_device_intr_done, 325 }; 326 327 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 328 ohci_device_bulk_transfer, 329 ohci_device_bulk_start, 330 ohci_device_bulk_abort, 331 ohci_device_bulk_close, 332 ohci_device_clear_toggle, 333 ohci_device_bulk_done, 334 }; 335 336 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 337 ohci_device_isoc_transfer, 338 ohci_device_isoc_start, 339 ohci_device_isoc_abort, 340 ohci_device_isoc_close, 341 ohci_noop, 342 ohci_device_isoc_done, 343 }; 344 345 #if defined(__NetBSD__) || defined(__OpenBSD__) 346 int 347 ohci_activate(device_ptr_t self, enum devact act) 348 { 349 struct ohci_softc *sc = (struct ohci_softc *)self; 350 int rv = 0; 351 352 switch (act) { 353 case DVACT_ACTIVATE: 354 return (EOPNOTSUPP); 355 356 case DVACT_DEACTIVATE: 357 if (sc->sc_child != NULL) 358 rv = config_deactivate(sc->sc_child); 359 sc->sc_dying = 1; 360 break; 361 } 362 return (rv); 363 } 364 365 int 366 ohci_detach(struct ohci_softc *sc, int flags) 367 { 368 int rv = 0; 369 370 if (sc->sc_child != NULL) 371 rv = config_detach(sc->sc_child, flags); 372 373 if (rv != 0) 374 return (rv); 375 376 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 377 378 #if defined(__NetBSD__) || defined(__OpenBSD__) 379 powerhook_disestablish(sc->sc_powerhook); 380 shutdownhook_disestablish(sc->sc_shutdownhook); 381 #endif 382 383 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 384 385 /* free data structures XXX */ 386 387 return (rv); 388 } 389 #endif 390 391 ohci_soft_ed_t * 392 ohci_alloc_sed(ohci_softc_t *sc) 393 { 394 ohci_soft_ed_t *sed; 395 usbd_status err; 396 int i, offs; 397 usb_dma_t dma; 398 399 if (sc->sc_freeeds == NULL) { 400 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 401 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 402 OHCI_ED_ALIGN, &dma); 403 if (err) 404 return (0); 405 for(i = 0; i < OHCI_SED_CHUNK; i++) { 406 offs = i * OHCI_SED_SIZE; 407 sed = KERNADDR(&dma, offs); 408 sed->physaddr = DMAADDR(&dma, offs); 409 sed->next = sc->sc_freeeds; 410 sc->sc_freeeds = sed; 411 } 412 } 413 sed = sc->sc_freeeds; 414 sc->sc_freeeds = sed->next; 415 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 416 sed->next = 0; 417 return (sed); 418 } 419 420 void 421 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 422 { 423 sed->next = sc->sc_freeeds; 424 sc->sc_freeeds = sed; 425 } 426 427 ohci_soft_td_t * 428 ohci_alloc_std(ohci_softc_t *sc) 429 { 430 ohci_soft_td_t *std; 431 usbd_status err; 432 int i, offs; 433 usb_dma_t dma; 434 int s; 435 436 if (sc->sc_freetds == NULL) { 437 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 438 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 439 OHCI_TD_ALIGN, &dma); 440 if (err) 441 return (NULL); 442 s = splusb(); 443 for(i = 0; i < OHCI_STD_CHUNK; i++) { 444 offs = i * OHCI_STD_SIZE; 445 std = KERNADDR(&dma, offs); 446 std->physaddr = DMAADDR(&dma, offs); 447 std->nexttd = sc->sc_freetds; 448 sc->sc_freetds = std; 449 } 450 splx(s); 451 } 452 453 s = splusb(); 454 std = sc->sc_freetds; 455 sc->sc_freetds = std->nexttd; 456 memset(&std->td, 0, sizeof(ohci_td_t)); 457 std->nexttd = NULL; 458 std->xfer = NULL; 459 ohci_hash_add_td(sc, std); 460 splx(s); 461 462 return (std); 463 } 464 465 void 466 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 467 { 468 int s; 469 470 s = splusb(); 471 ohci_hash_rem_td(sc, std); 472 std->nexttd = sc->sc_freetds; 473 sc->sc_freetds = std; 474 splx(s); 475 } 476 477 usbd_status 478 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 479 int alen, int rd, usbd_xfer_handle xfer, 480 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 481 { 482 ohci_soft_td_t *next, *cur; 483 ohci_physaddr_t dataphys, dataphysend; 484 u_int32_t tdflags; 485 int len, curlen; 486 usb_dma_t *dma = &xfer->dmabuf; 487 u_int16_t flags = xfer->flags; 488 489 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 490 491 len = alen; 492 cur = sp; 493 dataphys = DMAADDR(dma, 0); 494 dataphysend = OHCI_PAGE(dataphys + len - 1); 495 tdflags = htole32( 496 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 497 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 498 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 499 500 for (;;) { 501 next = ohci_alloc_std(sc); 502 if (next == NULL) 503 goto nomem; 504 505 /* The OHCI hardware can handle at most one page crossing. */ 506 if (OHCI_PAGE(dataphys) == dataphysend || 507 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 508 /* we can handle it in this TD */ 509 curlen = len; 510 } else { 511 /* must use multiple TDs, fill as much as possible. */ 512 curlen = 2 * OHCI_PAGE_SIZE - 513 (dataphys & (OHCI_PAGE_SIZE-1)); 514 /* the length must be a multiple of the max size */ 515 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 516 #ifdef DIAGNOSTIC 517 if (curlen == 0) 518 panic("ohci_alloc_std: curlen == 0"); 519 #endif 520 } 521 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 522 "dataphysend=0x%08x len=%d curlen=%d\n", 523 dataphys, dataphysend, 524 len, curlen)); 525 len -= curlen; 526 527 cur->td.td_flags = tdflags; 528 cur->td.td_cbp = htole32(dataphys); 529 cur->nexttd = next; 530 cur->td.td_nexttd = htole32(next->physaddr); 531 cur->td.td_be = htole32(dataphys + curlen - 1); 532 cur->len = curlen; 533 cur->flags = OHCI_ADD_LEN; 534 cur->xfer = xfer; 535 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 536 dataphys, dataphys + curlen - 1)); 537 if (len == 0) 538 break; 539 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 540 dataphys += curlen; 541 cur = next; 542 } 543 if ((flags & USBD_FORCE_SHORT_XFER) && 544 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 545 /* Force a 0 length transfer at the end. */ 546 547 cur = next; 548 next = ohci_alloc_std(sc); 549 if (next == NULL) 550 goto nomem; 551 552 cur->td.td_flags = tdflags; 553 cur->td.td_cbp = 0; /* indicate 0 length packet */ 554 cur->nexttd = next; 555 cur->td.td_nexttd = htole32(next->physaddr); 556 cur->td.td_be = ~0; 557 cur->len = 0; 558 cur->flags = 0; 559 cur->xfer = xfer; 560 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 561 } 562 *ep = cur; 563 564 return (USBD_NORMAL_COMPLETION); 565 566 nomem: 567 /* XXX free chain */ 568 return (USBD_NOMEM); 569 } 570 571 #if 0 572 Static void 573 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 574 ohci_soft_td_t *stdend) 575 { 576 ohci_soft_td_t *p; 577 578 for (; std != stdend; std = p) { 579 p = std->nexttd; 580 ohci_free_std(sc, std); 581 } 582 } 583 #endif 584 585 ohci_soft_itd_t * 586 ohci_alloc_sitd(ohci_softc_t *sc) 587 { 588 ohci_soft_itd_t *sitd; 589 usbd_status err; 590 int i, s, offs; 591 usb_dma_t dma; 592 593 if (sc->sc_freeitds == NULL) { 594 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 595 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 596 OHCI_ITD_ALIGN, &dma); 597 if (err) 598 return (NULL); 599 s = splusb(); 600 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 601 offs = i * OHCI_SITD_SIZE; 602 sitd = KERNADDR(&dma, offs); 603 sitd->physaddr = DMAADDR(&dma, offs); 604 sitd->nextitd = sc->sc_freeitds; 605 sc->sc_freeitds = sitd; 606 } 607 splx(s); 608 } 609 610 s = splusb(); 611 sitd = sc->sc_freeitds; 612 sc->sc_freeitds = sitd->nextitd; 613 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 614 sitd->nextitd = NULL; 615 sitd->xfer = NULL; 616 ohci_hash_add_itd(sc, sitd); 617 splx(s); 618 619 #ifdef DIAGNOSTIC 620 sitd->isdone = 0; 621 #endif 622 623 return (sitd); 624 } 625 626 void 627 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 628 { 629 int s; 630 631 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 632 633 #ifdef DIAGNOSTIC 634 if (!sitd->isdone) { 635 panic("ohci_free_sitd: sitd=%p not done", sitd); 636 return; 637 } 638 /* Warn double free */ 639 sitd->isdone = 0; 640 #endif 641 642 s = splusb(); 643 ohci_hash_rem_itd(sc, sitd); 644 sitd->nextitd = sc->sc_freeitds; 645 sc->sc_freeitds = sitd; 646 splx(s); 647 } 648 649 usbd_status 650 ohci_init(ohci_softc_t *sc) 651 { 652 ohci_soft_ed_t *sed, *psed; 653 usbd_status err; 654 int i; 655 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 656 657 DPRINTF(("ohci_init: start\n")); 658 #if defined(__OpenBSD__) 659 printf(","); 660 #else 661 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 662 #endif 663 rev = OREAD4(sc, OHCI_REVISION); 664 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 665 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 666 667 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 668 printf("%s: unsupported OHCI revision\n", 669 USBDEVNAME(sc->sc_bus.bdev)); 670 sc->sc_bus.usbrev = USBREV_UNKNOWN; 671 return (USBD_INVAL); 672 } 673 sc->sc_bus.usbrev = USBREV_1_0; 674 675 for (i = 0; i < OHCI_HASH_SIZE; i++) 676 LIST_INIT(&sc->sc_hash_tds[i]); 677 for (i = 0; i < OHCI_HASH_SIZE; i++) 678 LIST_INIT(&sc->sc_hash_itds[i]); 679 680 SIMPLEQ_INIT(&sc->sc_free_xfers); 681 682 /* XXX determine alignment by R/W */ 683 /* Allocate the HCCA area. */ 684 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 685 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 686 if (err) 687 return (err); 688 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 689 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 690 691 sc->sc_eintrs = OHCI_NORMAL_INTRS; 692 693 /* Allocate dummy ED that starts the control list. */ 694 sc->sc_ctrl_head = ohci_alloc_sed(sc); 695 if (sc->sc_ctrl_head == NULL) { 696 err = USBD_NOMEM; 697 goto bad1; 698 } 699 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 700 701 /* Allocate dummy ED that starts the bulk list. */ 702 sc->sc_bulk_head = ohci_alloc_sed(sc); 703 if (sc->sc_bulk_head == NULL) { 704 err = USBD_NOMEM; 705 goto bad2; 706 } 707 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 708 709 /* Allocate dummy ED that starts the isochronous list. */ 710 sc->sc_isoc_head = ohci_alloc_sed(sc); 711 if (sc->sc_isoc_head == NULL) { 712 err = USBD_NOMEM; 713 goto bad3; 714 } 715 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 716 717 /* Allocate all the dummy EDs that make up the interrupt tree. */ 718 for (i = 0; i < OHCI_NO_EDS; i++) { 719 sed = ohci_alloc_sed(sc); 720 if (sed == NULL) { 721 while (--i >= 0) 722 ohci_free_sed(sc, sc->sc_eds[i]); 723 err = USBD_NOMEM; 724 goto bad4; 725 } 726 /* All ED fields are set to 0. */ 727 sc->sc_eds[i] = sed; 728 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 729 if (i != 0) 730 psed = sc->sc_eds[(i-1) / 2]; 731 else 732 psed= sc->sc_isoc_head; 733 sed->next = psed; 734 sed->ed.ed_nexted = htole32(psed->physaddr); 735 } 736 /* 737 * Fill HCCA interrupt table. The bit reversal is to get 738 * the tree set up properly to spread the interrupts. 739 */ 740 for (i = 0; i < OHCI_NO_INTRS; i++) 741 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 742 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 743 744 #ifdef OHCI_DEBUG 745 if (ohcidebug > 15) { 746 for (i = 0; i < OHCI_NO_EDS; i++) { 747 printf("ed#%d ", i); 748 ohci_dump_ed(sc->sc_eds[i]); 749 } 750 printf("iso "); 751 ohci_dump_ed(sc->sc_isoc_head); 752 } 753 #endif 754 755 /* Determine in what context we are running. */ 756 ctl = OREAD4(sc, OHCI_CONTROL); 757 if (ctl & OHCI_IR) { 758 /* SMM active, request change */ 759 DPRINTF(("ohci_init: SMM active, request owner change\n")); 760 s = OREAD4(sc, OHCI_COMMAND_STATUS); 761 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 762 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 763 usb_delay_ms(&sc->sc_bus, 1); 764 ctl = OREAD4(sc, OHCI_CONTROL); 765 } 766 if ((ctl & OHCI_IR) == 0) { 767 printf("%s: SMM does not respond, resetting\n", 768 USBDEVNAME(sc->sc_bus.bdev)); 769 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 770 goto reset; 771 } 772 #if 0 773 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 774 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 775 /* BIOS started controller. */ 776 DPRINTF(("ohci_init: BIOS active\n")); 777 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 778 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 779 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 780 } 781 #endif 782 } else { 783 DPRINTF(("ohci_init: cold started\n")); 784 reset: 785 /* Controller was cold started. */ 786 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 787 } 788 789 /* 790 * This reset should not be necessary according to the OHCI spec, but 791 * without it some controllers do not start. 792 */ 793 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 794 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 795 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 796 797 /* We now own the host controller and the bus has been reset. */ 798 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 799 800 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 801 /* Nominal time for a reset is 10 us. */ 802 for (i = 0; i < 10; i++) { 803 delay(10); 804 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 805 if (!hcr) 806 break; 807 } 808 if (hcr) { 809 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 810 err = USBD_IOERROR; 811 goto bad5; 812 } 813 #ifdef OHCI_DEBUG 814 if (ohcidebug > 15) 815 ohci_dumpregs(sc); 816 #endif 817 818 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 819 820 /* Set up HC registers. */ 821 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 822 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 823 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 824 /* disable all interrupts and then switch on all desired interrupts */ 825 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 826 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 827 /* switch on desired functional features */ 828 ctl = OREAD4(sc, OHCI_CONTROL); 829 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 830 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 831 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 832 /* And finally start it! */ 833 OWRITE4(sc, OHCI_CONTROL, ctl); 834 835 /* 836 * The controller is now OPERATIONAL. Set a some final 837 * registers that should be set earlier, but that the 838 * controller ignores when in the SUSPEND state. 839 */ 840 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 841 fm |= OHCI_FSMPS(ival) | ival; 842 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 843 per = OHCI_PERIODIC(ival); /* 90% periodic */ 844 OWRITE4(sc, OHCI_PERIODIC_START, per); 845 846 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 847 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 848 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 849 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 850 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 851 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 852 853 /* 854 * The AMD756 requires a delay before re-reading the register, 855 * otherwise it will occasionally report 0 ports. 856 */ 857 sc->sc_noport = 0; 858 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 859 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 860 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 861 } 862 863 #ifdef OHCI_DEBUG 864 if (ohcidebug > 5) 865 ohci_dumpregs(sc); 866 #endif 867 868 /* Set up the bus struct. */ 869 sc->sc_bus.methods = &ohci_bus_methods; 870 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 871 872 #if defined(__NetBSD__) || defined(__OpenBSD__) 873 sc->sc_control = sc->sc_intre = 0; 874 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 875 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 876 #endif 877 878 usb_callout_init(sc->sc_tmo_rhsc); 879 880 return (USBD_NORMAL_COMPLETION); 881 882 bad5: 883 for (i = 0; i < OHCI_NO_EDS; i++) 884 ohci_free_sed(sc, sc->sc_eds[i]); 885 bad4: 886 ohci_free_sed(sc, sc->sc_isoc_head); 887 bad3: 888 ohci_free_sed(sc, sc->sc_bulk_head); 889 bad2: 890 ohci_free_sed(sc, sc->sc_ctrl_head); 891 bad1: 892 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 893 return (err); 894 } 895 896 usbd_status 897 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 898 { 899 #if defined(__NetBSD__) || defined(__OpenBSD__) 900 struct ohci_softc *sc = (struct ohci_softc *)bus; 901 #endif 902 903 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 904 } 905 906 void 907 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 908 { 909 #if defined(__NetBSD__) || defined(__OpenBSD__) 910 struct ohci_softc *sc = (struct ohci_softc *)bus; 911 #endif 912 913 usb_freemem(&sc->sc_bus, dma); 914 } 915 916 usbd_xfer_handle 917 ohci_allocx(struct usbd_bus *bus) 918 { 919 struct ohci_softc *sc = (struct ohci_softc *)bus; 920 usbd_xfer_handle xfer; 921 922 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 923 if (xfer != NULL) { 924 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 925 #ifdef DIAGNOSTIC 926 if (xfer->busy_free != XFER_FREE) { 927 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer, 928 xfer->busy_free); 929 } 930 #endif 931 } else { 932 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 933 } 934 if (xfer != NULL) { 935 memset(xfer, 0, sizeof (struct ohci_xfer)); 936 #ifdef DIAGNOSTIC 937 xfer->busy_free = XFER_BUSY; 938 #endif 939 } 940 return (xfer); 941 } 942 943 void 944 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 945 { 946 struct ohci_softc *sc = (struct ohci_softc *)bus; 947 948 #ifdef DIAGNOSTIC 949 if (xfer->busy_free != XFER_BUSY) { 950 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer, 951 xfer->busy_free); 952 return; 953 } 954 xfer->busy_free = XFER_FREE; 955 #endif 956 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 957 } 958 959 /* 960 * Shut down the controller when the system is going down. 961 */ 962 void 963 ohci_shutdown(void *v) 964 { 965 ohci_softc_t *sc = v; 966 967 DPRINTF(("ohci_shutdown: stopping the HC\n")); 968 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 969 } 970 971 /* 972 * Handle suspend/resume. 973 * 974 * We need to switch to polling mode here, because this routine is 975 * called from an intterupt context. This is all right since we 976 * are almost suspended anyway. 977 */ 978 void 979 ohci_power(int why, void *v) 980 { 981 ohci_softc_t *sc = v; 982 u_int32_t ctl; 983 int s; 984 985 #ifdef OHCI_DEBUG 986 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 987 ohci_dumpregs(sc); 988 #endif 989 990 s = splhardusb(); 991 switch (why) { 992 case PWR_SUSPEND: 993 case PWR_STANDBY: 994 sc->sc_bus.use_polling++; 995 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 996 if (sc->sc_control == 0) { 997 /* 998 * Preserve register values, in case that APM BIOS 999 * does not recover them. 1000 */ 1001 sc->sc_control = ctl; 1002 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 1003 } 1004 ctl |= OHCI_HCFS_SUSPEND; 1005 OWRITE4(sc, OHCI_CONTROL, ctl); 1006 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 1007 sc->sc_bus.use_polling--; 1008 break; 1009 case PWR_RESUME: 1010 sc->sc_bus.use_polling++; 1011 /* Some broken BIOSes do not recover these values */ 1012 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 1013 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 1014 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 1015 if (sc->sc_intre) 1016 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 1017 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 1018 if (sc->sc_control) 1019 ctl = sc->sc_control; 1020 else 1021 ctl = OREAD4(sc, OHCI_CONTROL); 1022 ctl |= OHCI_HCFS_RESUME; 1023 OWRITE4(sc, OHCI_CONTROL, ctl); 1024 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 1025 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 1026 OWRITE4(sc, OHCI_CONTROL, ctl); 1027 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1028 sc->sc_control = sc->sc_intre = 0; 1029 sc->sc_bus.use_polling--; 1030 break; 1031 case PWR_SOFTSUSPEND: 1032 case PWR_SOFTSTANDBY: 1033 case PWR_SOFTRESUME: 1034 break; 1035 } 1036 splx(s); 1037 } 1038 1039 #ifdef OHCI_DEBUG 1040 void 1041 ohci_dumpregs(ohci_softc_t *sc) 1042 { 1043 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1044 OREAD4(sc, OHCI_REVISION), 1045 OREAD4(sc, OHCI_CONTROL), 1046 OREAD4(sc, OHCI_COMMAND_STATUS))); 1047 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1048 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1049 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1050 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1051 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1052 OREAD4(sc, OHCI_HCCA), 1053 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1054 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1055 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1056 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1057 OREAD4(sc, OHCI_BULK_HEAD_ED), 1058 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1059 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1060 OREAD4(sc, OHCI_DONE_HEAD), 1061 OREAD4(sc, OHCI_FM_INTERVAL), 1062 OREAD4(sc, OHCI_FM_REMAINING))); 1063 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1064 OREAD4(sc, OHCI_FM_NUMBER), 1065 OREAD4(sc, OHCI_PERIODIC_START), 1066 OREAD4(sc, OHCI_LS_THRESHOLD))); 1067 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1068 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1069 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1070 OREAD4(sc, OHCI_RH_STATUS))); 1071 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1072 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1073 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1074 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1075 le32toh(sc->sc_hcca->hcca_frame_number), 1076 le32toh(sc->sc_hcca->hcca_done_head))); 1077 } 1078 #endif 1079 1080 Static int ohci_intr1(ohci_softc_t *); 1081 1082 int 1083 ohci_intr(void *p) 1084 { 1085 ohci_softc_t *sc = p; 1086 1087 if (sc == NULL || sc->sc_dying) 1088 return (0); 1089 1090 /* If we get an interrupt while polling, then just ignore it. */ 1091 if (sc->sc_bus.use_polling) { 1092 #ifdef DIAGNOSTIC 1093 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n")); 1094 #endif 1095 return (0); 1096 } 1097 1098 return (ohci_intr1(sc)); 1099 } 1100 1101 Static int 1102 ohci_intr1(ohci_softc_t *sc) 1103 { 1104 u_int32_t intrs, eintrs; 1105 ohci_physaddr_t done; 1106 1107 DPRINTFN(14,("ohci_intr1: enter\n")); 1108 1109 /* In case the interrupt occurs before initialization has completed. */ 1110 if (sc == NULL || sc->sc_hcca == NULL) { 1111 #ifdef DIAGNOSTIC 1112 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1113 #endif 1114 return (0); 1115 } 1116 1117 intrs = 0; 1118 done = le32toh(sc->sc_hcca->hcca_done_head); 1119 if (done != 0) { 1120 if (done & ~OHCI_DONE_INTRS) 1121 intrs = OHCI_WDH; 1122 if (done & OHCI_DONE_INTRS) 1123 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1124 sc->sc_hcca->hcca_done_head = 0; 1125 } else 1126 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH; 1127 1128 if (!intrs) 1129 return (0); 1130 1131 intrs &= ~OHCI_MIE; 1132 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1133 eintrs = intrs & sc->sc_eintrs; 1134 if (!eintrs) 1135 return (0); 1136 1137 sc->sc_bus.intr_context++; 1138 sc->sc_bus.no_intrs++; 1139 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1140 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1141 (u_int)eintrs)); 1142 1143 if (eintrs & OHCI_SO) { 1144 sc->sc_overrun_cnt++; 1145 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1146 printf("%s: %u scheduling overruns\n", 1147 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1148 sc->sc_overrun_cnt = 0; 1149 } 1150 /* XXX do what */ 1151 eintrs &= ~OHCI_SO; 1152 } 1153 if (eintrs & OHCI_WDH) { 1154 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1155 usb_schedsoftintr(&sc->sc_bus); 1156 eintrs &= ~OHCI_WDH; 1157 } 1158 if (eintrs & OHCI_RD) { 1159 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1160 /* XXX process resume detect */ 1161 } 1162 if (eintrs & OHCI_UE) { 1163 printf("%s: unrecoverable error, controller halted\n", 1164 USBDEVNAME(sc->sc_bus.bdev)); 1165 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1166 /* XXX what else */ 1167 } 1168 if (eintrs & OHCI_RHSC) { 1169 ohci_rhsc(sc, sc->sc_intrxfer); 1170 /* 1171 * Disable RHSC interrupt for now, because it will be 1172 * on until the port has been reset. 1173 */ 1174 ohci_rhsc_able(sc, 0); 1175 /* Do not allow RHSC interrupts > 1 per second */ 1176 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1177 eintrs &= ~OHCI_RHSC; 1178 } 1179 1180 sc->sc_bus.intr_context--; 1181 1182 if (eintrs != 0) { 1183 /* Block unprocessed interrupts. XXX */ 1184 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1185 sc->sc_eintrs &= ~eintrs; 1186 printf("%s: blocking intrs 0x%x\n", 1187 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1188 } 1189 1190 return (1); 1191 } 1192 1193 void 1194 ohci_rhsc_able(ohci_softc_t *sc, int on) 1195 { 1196 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1197 if (on) { 1198 sc->sc_eintrs |= OHCI_RHSC; 1199 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1200 } else { 1201 sc->sc_eintrs &= ~OHCI_RHSC; 1202 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1203 } 1204 } 1205 1206 void 1207 ohci_rhsc_enable(void *v_sc) 1208 { 1209 ohci_softc_t *sc = v_sc; 1210 int s; 1211 1212 s = splhardusb(); 1213 ohci_rhsc_able(sc, 1); 1214 splx(s); 1215 } 1216 1217 #ifdef OHCI_DEBUG 1218 char *ohci_cc_strs[] = { 1219 "NO_ERROR", 1220 "CRC", 1221 "BIT_STUFFING", 1222 "DATA_TOGGLE_MISMATCH", 1223 "STALL", 1224 "DEVICE_NOT_RESPONDING", 1225 "PID_CHECK_FAILURE", 1226 "UNEXPECTED_PID", 1227 "DATA_OVERRUN", 1228 "DATA_UNDERRUN", 1229 "BUFFER_OVERRUN", 1230 "BUFFER_UNDERRUN", 1231 "reserved", 1232 "reserved", 1233 "NOT_ACCESSED", 1234 "NOT_ACCESSED", 1235 }; 1236 #endif 1237 1238 void 1239 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1240 { 1241 ohci_soft_itd_t *sitd, *sidone, **ip; 1242 ohci_soft_td_t *std, *sdone, **p; 1243 1244 /* Reverse the done list. */ 1245 for (sdone = NULL, sidone = NULL; done != 0; ) { 1246 std = ohci_hash_find_td(sc, done); 1247 if (std != NULL) { 1248 std->dnext = sdone; 1249 done = le32toh(std->td.td_nexttd); 1250 sdone = std; 1251 DPRINTFN(10,("add TD %p\n", std)); 1252 continue; 1253 } 1254 sitd = ohci_hash_find_itd(sc, done); 1255 if (sitd != NULL) { 1256 sitd->dnext = sidone; 1257 done = le32toh(sitd->itd.itd_nextitd); 1258 sidone = sitd; 1259 DPRINTFN(5,("add ITD %p\n", sitd)); 1260 continue; 1261 } 1262 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done); 1263 } 1264 1265 /* sdone & sidone now hold the done lists. */ 1266 /* Put them on the already processed lists. */ 1267 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1268 ; 1269 *p = sdone; 1270 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1271 ; 1272 *ip = sidone; 1273 } 1274 1275 void 1276 ohci_softintr(void *v) 1277 { 1278 ohci_softc_t *sc = v; 1279 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1280 ohci_soft_td_t *std, *sdone, *stdnext; 1281 usbd_xfer_handle xfer; 1282 struct ohci_pipe *opipe; 1283 int len, cc, s; 1284 int i, j, actlen, iframes, uedir; 1285 1286 DPRINTFN(10,("ohci_softintr: enter\n")); 1287 1288 sc->sc_bus.intr_context++; 1289 1290 s = splhardusb(); 1291 sdone = sc->sc_sdone; 1292 sc->sc_sdone = NULL; 1293 sidone = sc->sc_sidone; 1294 sc->sc_sidone = NULL; 1295 splx(s); 1296 1297 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1298 1299 #ifdef OHCI_DEBUG 1300 if (ohcidebug > 10) { 1301 DPRINTF(("ohci_process_done: TD done:\n")); 1302 ohci_dump_tds(sdone); 1303 } 1304 #endif 1305 1306 for (std = sdone; std; std = stdnext) { 1307 xfer = std->xfer; 1308 stdnext = std->dnext; 1309 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1310 std, xfer, xfer ? xfer->hcpriv : 0)); 1311 if (xfer == NULL) { 1312 /* 1313 * xfer == NULL: There seems to be no xfer associated 1314 * with this TD. It is tailp that happened to end up on 1315 * the done queue. 1316 * Shouldn't happen, but some chips are broken(?). 1317 */ 1318 continue; 1319 } 1320 if (xfer->status == USBD_CANCELLED || 1321 xfer->status == USBD_TIMEOUT) { 1322 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1323 xfer)); 1324 /* Handled by abort routine. */ 1325 continue; 1326 } 1327 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1328 1329 len = std->len; 1330 if (std->td.td_cbp != 0) 1331 len -= le32toh(std->td.td_be) - 1332 le32toh(std->td.td_cbp) + 1; 1333 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1334 std->flags)); 1335 if (std->flags & OHCI_ADD_LEN) 1336 xfer->actlen += len; 1337 1338 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1339 if (cc == OHCI_CC_NO_ERROR) { 1340 if (std->flags & OHCI_CALL_DONE) { 1341 xfer->status = USBD_NORMAL_COMPLETION; 1342 s = splusb(); 1343 usb_transfer_complete(xfer); 1344 splx(s); 1345 } 1346 ohci_free_std(sc, std); 1347 } else { 1348 /* 1349 * Endpoint is halted. First unlink all the TDs 1350 * belonging to the failed transfer, and then restart 1351 * the endpoint. 1352 */ 1353 ohci_soft_td_t *p, *n; 1354 opipe = (struct ohci_pipe *)xfer->pipe; 1355 1356 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1357 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1358 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1359 1360 /* remove TDs */ 1361 for (p = std; p->xfer == xfer; p = n) { 1362 n = p->nexttd; 1363 ohci_free_std(sc, p); 1364 } 1365 1366 /* clear halt */ 1367 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1368 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1369 1370 if (cc == OHCI_CC_STALL) 1371 xfer->status = USBD_STALLED; 1372 else 1373 xfer->status = USBD_IOERROR; 1374 s = splusb(); 1375 usb_transfer_complete(xfer); 1376 splx(s); 1377 } 1378 } 1379 1380 #ifdef OHCI_DEBUG 1381 if (ohcidebug > 10) { 1382 DPRINTF(("ohci_softintr: ITD done:\n")); 1383 ohci_dump_itds(sidone); 1384 } 1385 #endif 1386 1387 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1388 xfer = sitd->xfer; 1389 sitdnext = sitd->dnext; 1390 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1391 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1392 if (xfer == NULL) 1393 continue; 1394 if (xfer->status == USBD_CANCELLED || 1395 xfer->status == USBD_TIMEOUT) { 1396 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1397 xfer)); 1398 /* Handled by abort routine. */ 1399 continue; 1400 } 1401 #ifdef DIAGNOSTIC 1402 if (sitd->isdone) 1403 printf("ohci_softintr: sitd=%p is done\n", sitd); 1404 sitd->isdone = 1; 1405 #endif 1406 if (sitd->flags & OHCI_CALL_DONE) { 1407 ohci_soft_itd_t *next; 1408 1409 opipe = (struct ohci_pipe *)xfer->pipe; 1410 opipe->u.iso.inuse -= xfer->nframes; 1411 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1412 bEndpointAddress); 1413 xfer->status = USBD_NORMAL_COMPLETION; 1414 actlen = 0; 1415 for (i = 0, sitd = xfer->hcpriv;; 1416 sitd = next) { 1417 next = sitd->nextitd; 1418 if (OHCI_ITD_GET_CC(le32toh(sitd-> 1419 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1420 xfer->status = USBD_IOERROR; 1421 /* For input, update frlengths with actual */ 1422 /* XXX anything necessary for output? */ 1423 if (uedir == UE_DIR_IN && 1424 xfer->status == USBD_NORMAL_COMPLETION) { 1425 iframes = OHCI_ITD_GET_FC(le32toh( 1426 sitd->itd.itd_flags)); 1427 for (j = 0; j < iframes; i++, j++) { 1428 len = le16toh(sitd-> 1429 itd.itd_offset[j]); 1430 len = 1431 (OHCI_ITD_PSW_GET_CC(len) == 1432 OHCI_CC_NOT_ACCESSED) ? 0 : 1433 OHCI_ITD_PSW_LENGTH(len); 1434 xfer->frlengths[i] = len; 1435 actlen += len; 1436 } 1437 } 1438 if (sitd->flags & OHCI_CALL_DONE) 1439 break; 1440 ohci_free_sitd(sc, sitd); 1441 } 1442 ohci_free_sitd(sc, sitd); 1443 if (uedir == UE_DIR_IN && 1444 xfer->status == USBD_NORMAL_COMPLETION) 1445 xfer->actlen = actlen; 1446 xfer->hcpriv = NULL; 1447 1448 s = splusb(); 1449 usb_transfer_complete(xfer); 1450 splx(s); 1451 } 1452 } 1453 1454 #ifdef USB_USE_SOFTINTR 1455 if (sc->sc_softwake) { 1456 sc->sc_softwake = 0; 1457 wakeup(&sc->sc_softwake); 1458 } 1459 #endif /* USB_USE_SOFTINTR */ 1460 1461 sc->sc_bus.intr_context--; 1462 DPRINTFN(10,("ohci_softintr: done:\n")); 1463 } 1464 1465 void 1466 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1467 { 1468 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1469 1470 #ifdef DIAGNOSTIC 1471 if (!(xfer->rqflags & URQ_REQUEST)) { 1472 panic("ohci_device_ctrl_done: not a request"); 1473 } 1474 #endif 1475 } 1476 1477 void 1478 ohci_device_intr_done(usbd_xfer_handle xfer) 1479 { 1480 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1481 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1482 ohci_soft_ed_t *sed = opipe->sed; 1483 ohci_soft_td_t *data, *tail; 1484 1485 1486 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n", 1487 xfer, xfer->actlen)); 1488 1489 if (xfer->pipe->repeat) { 1490 data = opipe->tail.td; 1491 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1492 if (tail == NULL) { 1493 xfer->status = USBD_NOMEM; 1494 return; 1495 } 1496 tail->xfer = NULL; 1497 1498 data->td.td_flags = htole32( 1499 OHCI_TD_IN | OHCI_TD_NOCC | 1500 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1501 if (xfer->flags & USBD_SHORT_XFER_OK) 1502 data->td.td_flags |= htole32(OHCI_TD_R); 1503 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1504 data->nexttd = tail; 1505 data->td.td_nexttd = htole32(tail->physaddr); 1506 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1507 xfer->length - 1); 1508 data->len = xfer->length; 1509 data->xfer = xfer; 1510 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1511 xfer->hcpriv = data; 1512 xfer->actlen = 0; 1513 1514 sed->ed.ed_tailp = htole32(tail->physaddr); 1515 opipe->tail.td = tail; 1516 } 1517 } 1518 1519 void 1520 ohci_device_bulk_done(usbd_xfer_handle xfer) 1521 { 1522 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n", 1523 xfer, xfer->actlen)); 1524 } 1525 1526 void 1527 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1528 { 1529 usbd_pipe_handle pipe; 1530 u_char *p; 1531 int i, m; 1532 int hstatus; 1533 1534 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1535 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1536 sc, xfer, hstatus)); 1537 1538 if (xfer == NULL) { 1539 /* Just ignore the change. */ 1540 return; 1541 } 1542 1543 pipe = xfer->pipe; 1544 1545 p = KERNADDR(&xfer->dmabuf, 0); 1546 m = min(sc->sc_noport, xfer->length * 8 - 1); 1547 memset(p, 0, xfer->length); 1548 for (i = 1; i <= m; i++) { 1549 /* Pick out CHANGE bits from the status reg. */ 1550 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1551 p[i/8] |= 1 << (i%8); 1552 } 1553 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1554 xfer->actlen = xfer->length; 1555 xfer->status = USBD_NORMAL_COMPLETION; 1556 1557 usb_transfer_complete(xfer); 1558 } 1559 1560 void 1561 ohci_root_intr_done(usbd_xfer_handle xfer) 1562 { 1563 } 1564 1565 void 1566 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1567 { 1568 } 1569 1570 /* 1571 * Wait here until controller claims to have an interrupt. 1572 * Then call ohci_intr and return. Use timeout to avoid waiting 1573 * too long. 1574 */ 1575 void 1576 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1577 { 1578 int timo = xfer->timeout; 1579 int usecs; 1580 u_int32_t intrs; 1581 1582 xfer->status = USBD_IN_PROGRESS; 1583 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1584 usb_delay_ms(&sc->sc_bus, 1); 1585 if (sc->sc_dying) 1586 break; 1587 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1588 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1589 #ifdef OHCI_DEBUG 1590 if (ohcidebug > 15) 1591 ohci_dumpregs(sc); 1592 #endif 1593 if (intrs) { 1594 ohci_intr1(sc); 1595 if (xfer->status != USBD_IN_PROGRESS) 1596 return; 1597 } 1598 } 1599 1600 /* Timeout */ 1601 DPRINTF(("ohci_waitintr: timeout\n")); 1602 xfer->status = USBD_TIMEOUT; 1603 usb_transfer_complete(xfer); 1604 /* XXX should free TD */ 1605 } 1606 1607 void 1608 ohci_poll(struct usbd_bus *bus) 1609 { 1610 ohci_softc_t *sc = (ohci_softc_t *)bus; 1611 #ifdef OHCI_DEBUG 1612 static int last; 1613 int new; 1614 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1615 if (new != last) { 1616 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1617 last = new; 1618 } 1619 #endif 1620 1621 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1622 ohci_intr1(sc); 1623 } 1624 1625 usbd_status 1626 ohci_device_request(usbd_xfer_handle xfer) 1627 { 1628 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1629 usb_device_request_t *req = &xfer->request; 1630 usbd_device_handle dev = opipe->pipe.device; 1631 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1632 int addr = dev->address; 1633 ohci_soft_td_t *setup, *stat, *next, *tail; 1634 ohci_soft_ed_t *sed; 1635 int isread; 1636 int len; 1637 usbd_status err; 1638 int s; 1639 1640 isread = req->bmRequestType & UT_READ; 1641 len = UGETW(req->wLength); 1642 1643 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1644 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1645 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1646 UGETW(req->wIndex), len, addr, 1647 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1648 1649 setup = opipe->tail.td; 1650 stat = ohci_alloc_std(sc); 1651 if (stat == NULL) { 1652 err = USBD_NOMEM; 1653 goto bad1; 1654 } 1655 tail = ohci_alloc_std(sc); 1656 if (tail == NULL) { 1657 err = USBD_NOMEM; 1658 goto bad2; 1659 } 1660 tail->xfer = NULL; 1661 1662 sed = opipe->sed; 1663 opipe->u.ctl.length = len; 1664 1665 /* Update device address and length since they may have changed 1666 during the setup of the control pipe in usbd_new_device(). */ 1667 /* XXX This only needs to be done once, but it's too early in open. */ 1668 /* XXXX Should not touch ED here! */ 1669 sed->ed.ed_flags = htole32( 1670 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1671 OHCI_ED_SET_FA(addr) | 1672 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1673 1674 next = stat; 1675 1676 /* Set up data transaction */ 1677 if (len != 0) { 1678 ohci_soft_td_t *std = stat; 1679 1680 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1681 std, &stat); 1682 stat = stat->nexttd; /* point at free TD */ 1683 if (err) 1684 goto bad3; 1685 /* Start toggle at 1 and then use the carried toggle. */ 1686 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1687 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1688 } 1689 1690 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1691 1692 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1693 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1694 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1695 setup->nexttd = next; 1696 setup->td.td_nexttd = htole32(next->physaddr); 1697 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1698 setup->len = 0; 1699 setup->xfer = xfer; 1700 setup->flags = 0; 1701 xfer->hcpriv = setup; 1702 1703 stat->td.td_flags = htole32( 1704 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1705 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1706 stat->td.td_cbp = 0; 1707 stat->nexttd = tail; 1708 stat->td.td_nexttd = htole32(tail->physaddr); 1709 stat->td.td_be = 0; 1710 stat->flags = OHCI_CALL_DONE; 1711 stat->len = 0; 1712 stat->xfer = xfer; 1713 1714 #ifdef OHCI_DEBUG 1715 if (ohcidebug > 5) { 1716 DPRINTF(("ohci_device_request:\n")); 1717 ohci_dump_ed(sed); 1718 ohci_dump_tds(setup); 1719 } 1720 #endif 1721 1722 /* Insert ED in schedule */ 1723 s = splusb(); 1724 sed->ed.ed_tailp = htole32(tail->physaddr); 1725 opipe->tail.td = tail; 1726 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1727 if (xfer->timeout && !sc->sc_bus.use_polling) { 1728 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 1729 ohci_timeout, xfer); 1730 } 1731 splx(s); 1732 1733 #ifdef OHCI_DEBUG 1734 if (ohcidebug > 20) { 1735 delay(10000); 1736 DPRINTF(("ohci_device_request: status=%x\n", 1737 OREAD4(sc, OHCI_COMMAND_STATUS))); 1738 ohci_dumpregs(sc); 1739 printf("ctrl head:\n"); 1740 ohci_dump_ed(sc->sc_ctrl_head); 1741 printf("sed:\n"); 1742 ohci_dump_ed(sed); 1743 ohci_dump_tds(setup); 1744 } 1745 #endif 1746 1747 return (USBD_NORMAL_COMPLETION); 1748 1749 bad3: 1750 ohci_free_std(sc, tail); 1751 bad2: 1752 ohci_free_std(sc, stat); 1753 bad1: 1754 return (err); 1755 } 1756 1757 /* 1758 * Add an ED to the schedule. Called at splusb(). 1759 */ 1760 void 1761 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1762 { 1763 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1764 1765 SPLUSBCHECK; 1766 sed->next = head->next; 1767 sed->ed.ed_nexted = head->ed.ed_nexted; 1768 head->next = sed; 1769 head->ed.ed_nexted = htole32(sed->physaddr); 1770 } 1771 1772 /* 1773 * Remove an ED from the schedule. Called at splusb(). 1774 */ 1775 void 1776 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1777 { 1778 ohci_soft_ed_t *p; 1779 1780 SPLUSBCHECK; 1781 1782 /* XXX */ 1783 for (p = head; p != NULL && p->next != sed; p = p->next) 1784 ; 1785 if (p == NULL) 1786 panic("ohci_rem_ed: ED not found"); 1787 p->next = sed->next; 1788 p->ed.ed_nexted = sed->ed.ed_nexted; 1789 } 1790 1791 /* 1792 * When a transfer is completed the TD is added to the done queue by 1793 * the host controller. This queue is the processed by software. 1794 * Unfortunately the queue contains the physical address of the TD 1795 * and we have no simple way to translate this back to a kernel address. 1796 * To make the translation possible (and fast) we use a hash table of 1797 * TDs currently in the schedule. The physical address is used as the 1798 * hash value. 1799 */ 1800 1801 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1802 /* Called at splusb() */ 1803 void 1804 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1805 { 1806 int h = HASH(std->physaddr); 1807 1808 SPLUSBCHECK; 1809 1810 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1811 } 1812 1813 /* Called at splusb() */ 1814 void 1815 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1816 { 1817 SPLUSBCHECK; 1818 1819 LIST_REMOVE(std, hnext); 1820 } 1821 1822 ohci_soft_td_t * 1823 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1824 { 1825 int h = HASH(a); 1826 ohci_soft_td_t *std; 1827 1828 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1829 std != NULL; 1830 std = LIST_NEXT(std, hnext)) 1831 if (std->physaddr == a) 1832 return (std); 1833 return (NULL); 1834 } 1835 1836 /* Called at splusb() */ 1837 void 1838 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1839 { 1840 int h = HASH(sitd->physaddr); 1841 1842 SPLUSBCHECK; 1843 1844 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1845 sitd, (u_long)sitd->physaddr)); 1846 1847 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1848 } 1849 1850 /* Called at splusb() */ 1851 void 1852 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1853 { 1854 SPLUSBCHECK; 1855 1856 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1857 sitd, (u_long)sitd->physaddr)); 1858 1859 LIST_REMOVE(sitd, hnext); 1860 } 1861 1862 ohci_soft_itd_t * 1863 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1864 { 1865 int h = HASH(a); 1866 ohci_soft_itd_t *sitd; 1867 1868 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1869 sitd != NULL; 1870 sitd = LIST_NEXT(sitd, hnext)) 1871 if (sitd->physaddr == a) 1872 return (sitd); 1873 return (NULL); 1874 } 1875 1876 void 1877 ohci_timeout(void *addr) 1878 { 1879 struct ohci_xfer *oxfer = addr; 1880 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe; 1881 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1882 1883 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1884 1885 if (sc->sc_dying) { 1886 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT); 1887 return; 1888 } 1889 1890 /* Execute the abort in a process context. */ 1891 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1892 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1893 } 1894 1895 void 1896 ohci_timeout_task(void *addr) 1897 { 1898 usbd_xfer_handle xfer = addr; 1899 int s; 1900 1901 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1902 1903 s = splusb(); 1904 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1905 splx(s); 1906 } 1907 1908 #ifdef OHCI_DEBUG 1909 void 1910 ohci_dump_tds(ohci_soft_td_t *std) 1911 { 1912 for (; std; std = std->nexttd) 1913 ohci_dump_td(std); 1914 } 1915 1916 void 1917 ohci_dump_td(ohci_soft_td_t *std) 1918 { 1919 char sbuf[128]; 1920 1921 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1922 "\2\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1923 sbuf, sizeof(sbuf)); 1924 1925 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1926 "nexttd=0x%08lx be=0x%08lx\n", 1927 std, (u_long)std->physaddr, sbuf, 1928 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1929 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1930 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1931 (u_long)le32toh(std->td.td_cbp), 1932 (u_long)le32toh(std->td.td_nexttd), 1933 (u_long)le32toh(std->td.td_be)); 1934 } 1935 1936 void 1937 ohci_dump_itd(ohci_soft_itd_t *sitd) 1938 { 1939 int i; 1940 1941 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1942 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1943 sitd, (u_long)sitd->physaddr, 1944 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1945 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1946 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1947 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1948 (u_long)le32toh(sitd->itd.itd_bp0), 1949 (u_long)le32toh(sitd->itd.itd_nextitd), 1950 (u_long)le32toh(sitd->itd.itd_be)); 1951 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1952 printf("offs[%d]=0x%04x ", i, 1953 (u_int)le16toh(sitd->itd.itd_offset[i])); 1954 printf("\n"); 1955 } 1956 1957 void 1958 ohci_dump_itds(ohci_soft_itd_t *sitd) 1959 { 1960 for (; sitd; sitd = sitd->nextitd) 1961 ohci_dump_itd(sitd); 1962 } 1963 1964 void 1965 ohci_dump_ed(ohci_soft_ed_t *sed) 1966 { 1967 char sbuf[128], sbuf2[128]; 1968 1969 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1970 "\2\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1971 sbuf, sizeof(sbuf)); 1972 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1973 "\2\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1974 1975 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1976 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1977 sed, (u_long)sed->physaddr, 1978 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1979 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1980 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1981 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1982 (u_long)le32toh(sed->ed.ed_headp), 1983 (u_long)le32toh(sed->ed.ed_nexted)); 1984 } 1985 #endif 1986 1987 usbd_status 1988 ohci_open(usbd_pipe_handle pipe) 1989 { 1990 usbd_device_handle dev = pipe->device; 1991 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1992 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1993 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1994 u_int8_t addr = dev->address; 1995 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1996 ohci_soft_ed_t *sed; 1997 ohci_soft_td_t *std; 1998 ohci_soft_itd_t *sitd; 1999 ohci_physaddr_t tdphys; 2000 u_int32_t fmt; 2001 usbd_status err; 2002 int s; 2003 int ival; 2004 2005 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 2006 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 2007 2008 if (sc->sc_dying) 2009 return (USBD_IOERROR); 2010 2011 std = NULL; 2012 sed = NULL; 2013 2014 if (addr == sc->sc_addr) { 2015 switch (ed->bEndpointAddress) { 2016 case USB_CONTROL_ENDPOINT: 2017 pipe->methods = &ohci_root_ctrl_methods; 2018 break; 2019 case UE_DIR_IN | OHCI_INTR_ENDPT: 2020 pipe->methods = &ohci_root_intr_methods; 2021 break; 2022 default: 2023 return (USBD_INVAL); 2024 } 2025 } else { 2026 sed = ohci_alloc_sed(sc); 2027 if (sed == NULL) 2028 goto bad0; 2029 opipe->sed = sed; 2030 if (xfertype == UE_ISOCHRONOUS) { 2031 sitd = ohci_alloc_sitd(sc); 2032 if (sitd == NULL) 2033 goto bad1; 2034 opipe->tail.itd = sitd; 2035 tdphys = sitd->physaddr; 2036 fmt = OHCI_ED_FORMAT_ISO; 2037 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 2038 fmt |= OHCI_ED_DIR_IN; 2039 else 2040 fmt |= OHCI_ED_DIR_OUT; 2041 } else { 2042 std = ohci_alloc_std(sc); 2043 if (std == NULL) 2044 goto bad1; 2045 opipe->tail.td = std; 2046 tdphys = std->physaddr; 2047 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 2048 } 2049 sed->ed.ed_flags = htole32( 2050 OHCI_ED_SET_FA(addr) | 2051 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 2052 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 2053 fmt | 2054 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 2055 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 2056 2057 switch (xfertype) { 2058 case UE_CONTROL: 2059 pipe->methods = &ohci_device_ctrl_methods; 2060 err = usb_allocmem(&sc->sc_bus, 2061 sizeof(usb_device_request_t), 2062 0, &opipe->u.ctl.reqdma); 2063 if (err) 2064 goto bad; 2065 s = splusb(); 2066 ohci_add_ed(sed, sc->sc_ctrl_head); 2067 splx(s); 2068 break; 2069 case UE_INTERRUPT: 2070 pipe->methods = &ohci_device_intr_methods; 2071 ival = pipe->interval; 2072 if (ival == USBD_DEFAULT_INTERVAL) 2073 ival = ed->bInterval; 2074 return (ohci_device_setintr(sc, opipe, ival)); 2075 case UE_ISOCHRONOUS: 2076 pipe->methods = &ohci_device_isoc_methods; 2077 return (ohci_setup_isoc(pipe)); 2078 case UE_BULK: 2079 pipe->methods = &ohci_device_bulk_methods; 2080 s = splusb(); 2081 ohci_add_ed(sed, sc->sc_bulk_head); 2082 splx(s); 2083 break; 2084 } 2085 } 2086 return (USBD_NORMAL_COMPLETION); 2087 2088 bad: 2089 if (std != NULL) 2090 ohci_free_std(sc, std); 2091 bad1: 2092 if (sed != NULL) 2093 ohci_free_sed(sc, sed); 2094 bad0: 2095 return (USBD_NOMEM); 2096 2097 } 2098 2099 /* 2100 * Close a reqular pipe. 2101 * Assumes that there are no pending transactions. 2102 */ 2103 void 2104 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2105 { 2106 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2107 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2108 ohci_soft_ed_t *sed = opipe->sed; 2109 int s; 2110 2111 s = splusb(); 2112 #ifdef DIAGNOSTIC 2113 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2114 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2115 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2116 ohci_soft_td_t *std; 2117 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2118 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2119 "tl=0x%x pipe=%p, std=%p\n", sed, 2120 (int)le32toh(sed->ed.ed_headp), 2121 (int)le32toh(sed->ed.ed_tailp), 2122 pipe, std); 2123 #ifdef USB_DEBUG 2124 usbd_dump_pipe(&opipe->pipe); 2125 #endif 2126 #ifdef OHCI_DEBUG 2127 ohci_dump_ed(sed); 2128 if (std) 2129 ohci_dump_td(std); 2130 #endif 2131 usb_delay_ms(&sc->sc_bus, 2); 2132 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2133 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2134 printf("ohci_close_pipe: pipe still not empty\n"); 2135 } 2136 #endif 2137 ohci_rem_ed(sed, head); 2138 /* Make sure the host controller is not touching this ED */ 2139 usb_delay_ms(&sc->sc_bus, 1); 2140 splx(s); 2141 ohci_free_sed(sc, opipe->sed); 2142 } 2143 2144 /* 2145 * Abort a device request. 2146 * If this routine is called at splusb() it guarantees that the request 2147 * will be removed from the hardware scheduling and that the callback 2148 * for it will be called with USBD_CANCELLED status. 2149 * It's impossible to guarantee that the requested transfer will not 2150 * have happened since the hardware runs concurrently. 2151 * If the transaction has already happened we rely on the ordinary 2152 * interrupt processing to process it. 2153 */ 2154 void 2155 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2156 { 2157 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2158 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2159 ohci_soft_ed_t *sed = opipe->sed; 2160 ohci_soft_td_t *p, *n; 2161 ohci_physaddr_t headp; 2162 int s, hit; 2163 2164 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2165 2166 if (sc->sc_dying) { 2167 /* If we're dying, just do the software part. */ 2168 s = splusb(); 2169 xfer->status = status; /* make software ignore it */ 2170 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2171 usb_transfer_complete(xfer); 2172 splx(s); 2173 } 2174 2175 if (xfer->device->bus->intr_context || !curproc) 2176 panic("ohci_abort_xfer: not in process context"); 2177 2178 /* 2179 * Step 1: Make interrupt routine and hardware ignore xfer. 2180 */ 2181 s = splusb(); 2182 xfer->status = status; /* make software ignore it */ 2183 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2184 splx(s); 2185 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2186 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2187 2188 /* 2189 * Step 2: Wait until we know hardware has finished any possible 2190 * use of the xfer. Also make sure the soft interrupt routine 2191 * has run. 2192 */ 2193 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */ 2194 s = splusb(); 2195 #ifdef USB_USE_SOFTINTR 2196 sc->sc_softwake = 1; 2197 #endif /* USB_USE_SOFTINTR */ 2198 usb_schedsoftintr(&sc->sc_bus); 2199 #ifdef USB_USE_SOFTINTR 2200 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2201 #endif /* USB_USE_SOFTINTR */ 2202 splx(s); 2203 2204 /* 2205 * Step 3: Remove any vestiges of the xfer from the hardware. 2206 * The complication here is that the hardware may have executed 2207 * beyond the xfer we're trying to abort. So as we're scanning 2208 * the TDs of this xfer we check if the hardware points to 2209 * any of them. 2210 */ 2211 s = splusb(); /* XXX why? */ 2212 p = xfer->hcpriv; 2213 #ifdef DIAGNOSTIC 2214 if (p == NULL) { 2215 splx(s); 2216 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2217 return; 2218 } 2219 #endif 2220 #ifdef OHCI_DEBUG 2221 if (ohcidebug > 1) { 2222 DPRINTF(("ohci_abort_xfer: sed=\n")); 2223 ohci_dump_ed(sed); 2224 ohci_dump_tds(p); 2225 } 2226 #endif 2227 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2228 hit = 0; 2229 for (; p->xfer == xfer; p = n) { 2230 hit |= headp == p->physaddr; 2231 n = p->nexttd; 2232 ohci_free_std(sc, p); 2233 } 2234 /* Zap headp register if hardware pointed inside the xfer. */ 2235 if (hit) { 2236 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2237 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2238 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2239 } else { 2240 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2241 } 2242 2243 /* 2244 * Step 4: Turn on hardware again. 2245 */ 2246 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2247 2248 /* 2249 * Step 5: Execute callback. 2250 */ 2251 usb_transfer_complete(xfer); 2252 2253 splx(s); 2254 } 2255 2256 /* 2257 * Data structures and routines to emulate the root hub. 2258 */ 2259 Static usb_device_descriptor_t ohci_devd = { 2260 USB_DEVICE_DESCRIPTOR_SIZE, 2261 UDESC_DEVICE, /* type */ 2262 {0x00, 0x01}, /* USB version */ 2263 UDCLASS_HUB, /* class */ 2264 UDSUBCLASS_HUB, /* subclass */ 2265 UDPROTO_FSHUB, 2266 64, /* max packet */ 2267 {0},{0},{0x00,0x01}, /* device id */ 2268 1,2,0, /* string indicies */ 2269 1 /* # of configurations */ 2270 }; 2271 2272 Static usb_config_descriptor_t ohci_confd = { 2273 USB_CONFIG_DESCRIPTOR_SIZE, 2274 UDESC_CONFIG, 2275 {USB_CONFIG_DESCRIPTOR_SIZE + 2276 USB_INTERFACE_DESCRIPTOR_SIZE + 2277 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2278 1, 2279 1, 2280 0, 2281 UC_SELF_POWERED, 2282 0 /* max power */ 2283 }; 2284 2285 Static usb_interface_descriptor_t ohci_ifcd = { 2286 USB_INTERFACE_DESCRIPTOR_SIZE, 2287 UDESC_INTERFACE, 2288 0, 2289 0, 2290 1, 2291 UICLASS_HUB, 2292 UISUBCLASS_HUB, 2293 UIPROTO_FSHUB, 2294 0 2295 }; 2296 2297 Static usb_endpoint_descriptor_t ohci_endpd = { 2298 USB_ENDPOINT_DESCRIPTOR_SIZE, 2299 UDESC_ENDPOINT, 2300 UE_DIR_IN | OHCI_INTR_ENDPT, 2301 UE_INTERRUPT, 2302 {8, 0}, /* max packet */ 2303 255 2304 }; 2305 2306 Static usb_hub_descriptor_t ohci_hubd = { 2307 USB_HUB_DESCRIPTOR_SIZE, 2308 UDESC_HUB, 2309 0, 2310 {0,0}, 2311 0, 2312 0, 2313 {0}, 2314 }; 2315 2316 Static int 2317 ohci_str(usb_string_descriptor_t *p, int l, const char *s) 2318 { 2319 int i; 2320 2321 if (l == 0) 2322 return (0); 2323 p->bLength = 2 * strlen(s) + 2; 2324 if (l == 1) 2325 return (1); 2326 p->bDescriptorType = UDESC_STRING; 2327 l -= 2; 2328 for (i = 0; s[i] && l > 1; i++, l -= 2) 2329 USETW2(p->bString[i], 0, s[i]); 2330 return (2*i+2); 2331 } 2332 2333 /* 2334 * Simulate a hardware hub by handling all the necessary requests. 2335 */ 2336 Static usbd_status 2337 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2338 { 2339 usbd_status err; 2340 2341 /* Insert last in queue. */ 2342 err = usb_insert_transfer(xfer); 2343 if (err) 2344 return (err); 2345 2346 /* Pipe isn't running, start first */ 2347 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2348 } 2349 2350 Static usbd_status 2351 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2352 { 2353 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2354 usb_device_request_t *req; 2355 void *buf = NULL; 2356 int port, i; 2357 int s, len, value, index, l, totlen = 0; 2358 usb_port_status_t ps; 2359 usb_hub_descriptor_t hubd; 2360 usbd_status err; 2361 u_int32_t v; 2362 2363 if (sc->sc_dying) 2364 return (USBD_IOERROR); 2365 2366 #ifdef DIAGNOSTIC 2367 if (!(xfer->rqflags & URQ_REQUEST)) 2368 /* XXX panic */ 2369 return (USBD_INVAL); 2370 #endif 2371 req = &xfer->request; 2372 2373 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2374 req->bmRequestType, req->bRequest)); 2375 2376 len = UGETW(req->wLength); 2377 value = UGETW(req->wValue); 2378 index = UGETW(req->wIndex); 2379 2380 if (len != 0) 2381 buf = KERNADDR(&xfer->dmabuf, 0); 2382 2383 #define C(x,y) ((x) | ((y) << 8)) 2384 switch(C(req->bRequest, req->bmRequestType)) { 2385 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2386 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2387 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2388 /* 2389 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2390 * for the integrated root hub. 2391 */ 2392 break; 2393 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2394 if (len > 0) { 2395 *(u_int8_t *)buf = sc->sc_conf; 2396 totlen = 1; 2397 } 2398 break; 2399 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2400 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2401 switch(value >> 8) { 2402 case UDESC_DEVICE: 2403 if ((value & 0xff) != 0) { 2404 err = USBD_IOERROR; 2405 goto ret; 2406 } 2407 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2408 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2409 memcpy(buf, &ohci_devd, l); 2410 break; 2411 case UDESC_CONFIG: 2412 if ((value & 0xff) != 0) { 2413 err = USBD_IOERROR; 2414 goto ret; 2415 } 2416 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2417 memcpy(buf, &ohci_confd, l); 2418 buf = (char *)buf + l; 2419 len -= l; 2420 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2421 totlen += l; 2422 memcpy(buf, &ohci_ifcd, l); 2423 buf = (char *)buf + l; 2424 len -= l; 2425 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2426 totlen += l; 2427 memcpy(buf, &ohci_endpd, l); 2428 break; 2429 case UDESC_STRING: 2430 if (len == 0) 2431 break; 2432 *(u_int8_t *)buf = 0; 2433 totlen = 1; 2434 switch (value & 0xff) { 2435 case 1: /* Vendor */ 2436 totlen = ohci_str(buf, len, sc->sc_vendor); 2437 break; 2438 case 2: /* Product */ 2439 totlen = ohci_str(buf, len, "OHCI root hub"); 2440 break; 2441 } 2442 break; 2443 default: 2444 err = USBD_IOERROR; 2445 goto ret; 2446 } 2447 break; 2448 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2449 if (len > 0) { 2450 *(u_int8_t *)buf = 0; 2451 totlen = 1; 2452 } 2453 break; 2454 case C(UR_GET_STATUS, UT_READ_DEVICE): 2455 if (len > 1) { 2456 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2457 totlen = 2; 2458 } 2459 break; 2460 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2461 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2462 if (len > 1) { 2463 USETW(((usb_status_t *)buf)->wStatus, 0); 2464 totlen = 2; 2465 } 2466 break; 2467 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2468 if (value >= USB_MAX_DEVICES) { 2469 err = USBD_IOERROR; 2470 goto ret; 2471 } 2472 sc->sc_addr = value; 2473 break; 2474 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2475 if (value != 0 && value != 1) { 2476 err = USBD_IOERROR; 2477 goto ret; 2478 } 2479 sc->sc_conf = value; 2480 break; 2481 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2482 break; 2483 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2484 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2485 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2486 err = USBD_IOERROR; 2487 goto ret; 2488 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2489 break; 2490 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2491 break; 2492 /* Hub requests */ 2493 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2494 break; 2495 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2496 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2497 "port=%d feature=%d\n", 2498 index, value)); 2499 if (index < 1 || index > sc->sc_noport) { 2500 err = USBD_IOERROR; 2501 goto ret; 2502 } 2503 port = OHCI_RH_PORT_STATUS(index); 2504 switch(value) { 2505 case UHF_PORT_ENABLE: 2506 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2507 break; 2508 case UHF_PORT_SUSPEND: 2509 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2510 break; 2511 case UHF_PORT_POWER: 2512 /* Yes, writing to the LOW_SPEED bit clears power. */ 2513 OWRITE4(sc, port, UPS_LOW_SPEED); 2514 break; 2515 case UHF_C_PORT_CONNECTION: 2516 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2517 break; 2518 case UHF_C_PORT_ENABLE: 2519 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2520 break; 2521 case UHF_C_PORT_SUSPEND: 2522 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2523 break; 2524 case UHF_C_PORT_OVER_CURRENT: 2525 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2526 break; 2527 case UHF_C_PORT_RESET: 2528 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2529 break; 2530 default: 2531 err = USBD_IOERROR; 2532 goto ret; 2533 } 2534 switch(value) { 2535 case UHF_C_PORT_CONNECTION: 2536 case UHF_C_PORT_ENABLE: 2537 case UHF_C_PORT_SUSPEND: 2538 case UHF_C_PORT_OVER_CURRENT: 2539 case UHF_C_PORT_RESET: 2540 /* Enable RHSC interrupt if condition is cleared. */ 2541 if ((OREAD4(sc, port) >> 16) == 0) 2542 ohci_rhsc_able(sc, 1); 2543 break; 2544 default: 2545 break; 2546 } 2547 break; 2548 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2549 if ((value & 0xff) != 0) { 2550 err = USBD_IOERROR; 2551 goto ret; 2552 } 2553 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2554 hubd = ohci_hubd; 2555 hubd.bNbrPorts = sc->sc_noport; 2556 USETW(hubd.wHubCharacteristics, 2557 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2558 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2559 /* XXX overcurrent */ 2560 ); 2561 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2562 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2563 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2564 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2565 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2566 l = min(len, hubd.bDescLength); 2567 totlen = l; 2568 memcpy(buf, &hubd, l); 2569 break; 2570 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2571 if (len != 4) { 2572 err = USBD_IOERROR; 2573 goto ret; 2574 } 2575 memset(buf, 0, len); /* ? XXX */ 2576 totlen = len; 2577 break; 2578 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2579 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2580 index)); 2581 if (index < 1 || index > sc->sc_noport) { 2582 err = USBD_IOERROR; 2583 goto ret; 2584 } 2585 if (len != 4) { 2586 err = USBD_IOERROR; 2587 goto ret; 2588 } 2589 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2590 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2591 v)); 2592 USETW(ps.wPortStatus, v); 2593 USETW(ps.wPortChange, v >> 16); 2594 l = min(len, sizeof ps); 2595 memcpy(buf, &ps, l); 2596 totlen = l; 2597 break; 2598 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2599 err = USBD_IOERROR; 2600 goto ret; 2601 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2602 break; 2603 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2604 if (index < 1 || index > sc->sc_noport) { 2605 err = USBD_IOERROR; 2606 goto ret; 2607 } 2608 port = OHCI_RH_PORT_STATUS(index); 2609 switch(value) { 2610 case UHF_PORT_ENABLE: 2611 OWRITE4(sc, port, UPS_PORT_ENABLED); 2612 break; 2613 case UHF_PORT_SUSPEND: 2614 OWRITE4(sc, port, UPS_SUSPEND); 2615 break; 2616 case UHF_PORT_RESET: 2617 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2618 index)); 2619 OWRITE4(sc, port, UPS_RESET); 2620 for (i = 0; i < 5; i++) { 2621 usb_delay_ms(&sc->sc_bus, 2622 USB_PORT_ROOT_RESET_DELAY); 2623 if (sc->sc_dying) { 2624 err = USBD_IOERROR; 2625 goto ret; 2626 } 2627 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2628 break; 2629 } 2630 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2631 index, OREAD4(sc, port))); 2632 break; 2633 case UHF_PORT_POWER: 2634 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2635 "%d\n", index)); 2636 OWRITE4(sc, port, UPS_PORT_POWER); 2637 break; 2638 default: 2639 err = USBD_IOERROR; 2640 goto ret; 2641 } 2642 break; 2643 default: 2644 err = USBD_IOERROR; 2645 goto ret; 2646 } 2647 xfer->actlen = totlen; 2648 err = USBD_NORMAL_COMPLETION; 2649 ret: 2650 xfer->status = err; 2651 s = splusb(); 2652 usb_transfer_complete(xfer); 2653 splx(s); 2654 return (USBD_IN_PROGRESS); 2655 } 2656 2657 /* Abort a root control request. */ 2658 Static void 2659 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2660 { 2661 /* Nothing to do, all transfers are synchronous. */ 2662 } 2663 2664 /* Close the root pipe. */ 2665 Static void 2666 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2667 { 2668 DPRINTF(("ohci_root_ctrl_close\n")); 2669 /* Nothing to do. */ 2670 } 2671 2672 Static usbd_status 2673 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2674 { 2675 usbd_status err; 2676 2677 /* Insert last in queue. */ 2678 err = usb_insert_transfer(xfer); 2679 if (err) 2680 return (err); 2681 2682 /* Pipe isn't running, start first */ 2683 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2684 } 2685 2686 Static usbd_status 2687 ohci_root_intr_start(usbd_xfer_handle xfer) 2688 { 2689 usbd_pipe_handle pipe = xfer->pipe; 2690 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2691 2692 if (sc->sc_dying) 2693 return (USBD_IOERROR); 2694 2695 sc->sc_intrxfer = xfer; 2696 2697 return (USBD_IN_PROGRESS); 2698 } 2699 2700 /* Abort a root interrupt request. */ 2701 Static void 2702 ohci_root_intr_abort(usbd_xfer_handle xfer) 2703 { 2704 int s; 2705 2706 if (xfer->pipe->intrxfer == xfer) { 2707 DPRINTF(("ohci_root_intr_abort: remove\n")); 2708 xfer->pipe->intrxfer = NULL; 2709 } 2710 xfer->status = USBD_CANCELLED; 2711 s = splusb(); 2712 usb_transfer_complete(xfer); 2713 splx(s); 2714 } 2715 2716 /* Close the root pipe. */ 2717 Static void 2718 ohci_root_intr_close(usbd_pipe_handle pipe) 2719 { 2720 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2721 2722 DPRINTF(("ohci_root_intr_close\n")); 2723 2724 sc->sc_intrxfer = NULL; 2725 } 2726 2727 /************************/ 2728 2729 Static usbd_status 2730 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2731 { 2732 usbd_status err; 2733 2734 /* Insert last in queue. */ 2735 err = usb_insert_transfer(xfer); 2736 if (err) 2737 return (err); 2738 2739 /* Pipe isn't running, start first */ 2740 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2741 } 2742 2743 Static usbd_status 2744 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2745 { 2746 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2747 usbd_status err; 2748 2749 if (sc->sc_dying) 2750 return (USBD_IOERROR); 2751 2752 #ifdef DIAGNOSTIC 2753 if (!(xfer->rqflags & URQ_REQUEST)) { 2754 /* XXX panic */ 2755 printf("ohci_device_ctrl_transfer: not a request\n"); 2756 return (USBD_INVAL); 2757 } 2758 #endif 2759 2760 err = ohci_device_request(xfer); 2761 if (err) 2762 return (err); 2763 2764 if (sc->sc_bus.use_polling) 2765 ohci_waitintr(sc, xfer); 2766 return (USBD_IN_PROGRESS); 2767 } 2768 2769 /* Abort a device control request. */ 2770 Static void 2771 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2772 { 2773 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2774 ohci_abort_xfer(xfer, USBD_CANCELLED); 2775 } 2776 2777 /* Close a device control pipe. */ 2778 Static void 2779 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2780 { 2781 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2782 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2783 2784 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2785 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2786 ohci_free_std(sc, opipe->tail.td); 2787 } 2788 2789 /************************/ 2790 2791 Static void 2792 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2793 { 2794 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2795 2796 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2797 } 2798 2799 Static void 2800 ohci_noop(usbd_pipe_handle pipe) 2801 { 2802 } 2803 2804 Static usbd_status 2805 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2806 { 2807 usbd_status err; 2808 2809 /* Insert last in queue. */ 2810 err = usb_insert_transfer(xfer); 2811 if (err) 2812 return (err); 2813 2814 /* Pipe isn't running, start first */ 2815 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2816 } 2817 2818 Static usbd_status 2819 ohci_device_bulk_start(usbd_xfer_handle xfer) 2820 { 2821 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2822 usbd_device_handle dev = opipe->pipe.device; 2823 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2824 int addr = dev->address; 2825 ohci_soft_td_t *data, *tail, *tdp; 2826 ohci_soft_ed_t *sed; 2827 int s, len, isread, endpt; 2828 usbd_status err; 2829 2830 if (sc->sc_dying) 2831 return (USBD_IOERROR); 2832 2833 #ifdef DIAGNOSTIC 2834 if (xfer->rqflags & URQ_REQUEST) { 2835 /* XXX panic */ 2836 printf("ohci_device_bulk_start: a request\n"); 2837 return (USBD_INVAL); 2838 } 2839 #endif 2840 2841 len = xfer->length; 2842 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2843 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2844 sed = opipe->sed; 2845 2846 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2847 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2848 endpt)); 2849 2850 opipe->u.bulk.isread = isread; 2851 opipe->u.bulk.length = len; 2852 2853 /* Update device address */ 2854 sed->ed.ed_flags = htole32( 2855 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2856 OHCI_ED_SET_FA(addr)); 2857 2858 /* Allocate a chain of new TDs (including a new tail). */ 2859 data = opipe->tail.td; 2860 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2861 data, &tail); 2862 /* We want interrupt at the end of the transfer. */ 2863 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2864 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2865 tail->flags |= OHCI_CALL_DONE; 2866 tail = tail->nexttd; /* point at sentinel */ 2867 if (err) 2868 return (err); 2869 2870 tail->xfer = NULL; 2871 xfer->hcpriv = data; 2872 2873 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2874 "td_cbp=0x%08x td_be=0x%08x\n", 2875 (int)le32toh(sed->ed.ed_flags), 2876 (int)le32toh(data->td.td_flags), 2877 (int)le32toh(data->td.td_cbp), 2878 (int)le32toh(data->td.td_be))); 2879 2880 #ifdef OHCI_DEBUG 2881 if (ohcidebug > 5) { 2882 ohci_dump_ed(sed); 2883 ohci_dump_tds(data); 2884 } 2885 #endif 2886 2887 /* Insert ED in schedule */ 2888 s = splusb(); 2889 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2890 tdp->xfer = xfer; 2891 } 2892 sed->ed.ed_tailp = htole32(tail->physaddr); 2893 opipe->tail.td = tail; 2894 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2895 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2896 if (xfer->timeout && !sc->sc_bus.use_polling) { 2897 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout), 2898 ohci_timeout, xfer); 2899 } 2900 2901 #if 0 2902 /* This goes wrong if we are too slow. */ 2903 if (ohcidebug > 10) { 2904 delay(10000); 2905 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2906 OREAD4(sc, OHCI_COMMAND_STATUS))); 2907 ohci_dump_ed(sed); 2908 ohci_dump_tds(data); 2909 } 2910 #endif 2911 2912 splx(s); 2913 2914 return (USBD_IN_PROGRESS); 2915 } 2916 2917 Static void 2918 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2919 { 2920 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2921 ohci_abort_xfer(xfer, USBD_CANCELLED); 2922 } 2923 2924 /* 2925 * Close a device bulk pipe. 2926 */ 2927 Static void 2928 ohci_device_bulk_close(usbd_pipe_handle pipe) 2929 { 2930 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2931 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2932 2933 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2934 ohci_close_pipe(pipe, sc->sc_bulk_head); 2935 ohci_free_std(sc, opipe->tail.td); 2936 } 2937 2938 /************************/ 2939 2940 Static usbd_status 2941 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2942 { 2943 usbd_status err; 2944 2945 /* Insert last in queue. */ 2946 err = usb_insert_transfer(xfer); 2947 if (err) 2948 return (err); 2949 2950 /* Pipe isn't running, start first */ 2951 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2952 } 2953 2954 Static usbd_status 2955 ohci_device_intr_start(usbd_xfer_handle xfer) 2956 { 2957 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2958 usbd_device_handle dev = opipe->pipe.device; 2959 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2960 ohci_soft_ed_t *sed = opipe->sed; 2961 ohci_soft_td_t *data, *tail; 2962 int len; 2963 int s; 2964 2965 if (sc->sc_dying) 2966 return (USBD_IOERROR); 2967 2968 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2969 "flags=%d priv=%p\n", 2970 xfer, xfer->length, xfer->flags, xfer->priv)); 2971 2972 #ifdef DIAGNOSTIC 2973 if (xfer->rqflags & URQ_REQUEST) 2974 panic("ohci_device_intr_transfer: a request"); 2975 #endif 2976 2977 len = xfer->length; 2978 2979 data = opipe->tail.td; 2980 tail = ohci_alloc_std(sc); 2981 if (tail == NULL) 2982 return (USBD_NOMEM); 2983 tail->xfer = NULL; 2984 2985 data->td.td_flags = htole32( 2986 OHCI_TD_IN | OHCI_TD_NOCC | 2987 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2988 if (xfer->flags & USBD_SHORT_XFER_OK) 2989 data->td.td_flags |= htole32(OHCI_TD_R); 2990 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 2991 data->nexttd = tail; 2992 data->td.td_nexttd = htole32(tail->physaddr); 2993 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2994 data->len = len; 2995 data->xfer = xfer; 2996 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2997 xfer->hcpriv = data; 2998 2999 #ifdef OHCI_DEBUG 3000 if (ohcidebug > 5) { 3001 DPRINTF(("ohci_device_intr_transfer:\n")); 3002 ohci_dump_ed(sed); 3003 ohci_dump_tds(data); 3004 } 3005 #endif 3006 3007 /* Insert ED in schedule */ 3008 s = splusb(); 3009 sed->ed.ed_tailp = htole32(tail->physaddr); 3010 opipe->tail.td = tail; 3011 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3012 3013 #if 0 3014 /* 3015 * This goes horribly wrong, printing thousands of descriptors, 3016 * because false references are followed due to the fact that the 3017 * TD is gone. 3018 */ 3019 if (ohcidebug > 5) { 3020 usb_delay_ms(&sc->sc_bus, 5); 3021 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 3022 OREAD4(sc, OHCI_COMMAND_STATUS))); 3023 ohci_dump_ed(sed); 3024 ohci_dump_tds(data); 3025 } 3026 #endif 3027 splx(s); 3028 3029 return (USBD_IN_PROGRESS); 3030 } 3031 3032 /* Abort a device control request. */ 3033 Static void 3034 ohci_device_intr_abort(usbd_xfer_handle xfer) 3035 { 3036 if (xfer->pipe->intrxfer == xfer) { 3037 DPRINTF(("ohci_device_intr_abort: remove\n")); 3038 xfer->pipe->intrxfer = NULL; 3039 } 3040 ohci_abort_xfer(xfer, USBD_CANCELLED); 3041 } 3042 3043 /* Close a device interrupt pipe. */ 3044 Static void 3045 ohci_device_intr_close(usbd_pipe_handle pipe) 3046 { 3047 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3048 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3049 int nslots = opipe->u.intr.nslots; 3050 int pos = opipe->u.intr.pos; 3051 int j; 3052 ohci_soft_ed_t *p, *sed = opipe->sed; 3053 int s; 3054 3055 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 3056 pipe, nslots, pos)); 3057 s = splusb(); 3058 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 3059 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 3060 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 3061 usb_delay_ms(&sc->sc_bus, 2); 3062 3063 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 3064 ; 3065 #ifdef DIAGNOSTIC 3066 if (p == NULL) 3067 panic("ohci_device_intr_close: ED not found"); 3068 #endif 3069 p->next = sed->next; 3070 p->ed.ed_nexted = sed->ed.ed_nexted; 3071 splx(s); 3072 3073 for (j = 0; j < nslots; j++) 3074 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 3075 3076 ohci_free_std(sc, opipe->tail.td); 3077 ohci_free_sed(sc, opipe->sed); 3078 } 3079 3080 Static usbd_status 3081 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 3082 { 3083 int i, j, s, best; 3084 u_int npoll, slow, shigh, nslots; 3085 u_int bestbw, bw; 3086 ohci_soft_ed_t *hsed, *sed = opipe->sed; 3087 3088 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3089 if (ival == 0) { 3090 printf("ohci_setintr: 0 interval\n"); 3091 return (USBD_INVAL); 3092 } 3093 3094 npoll = OHCI_NO_INTRS; 3095 while (npoll > ival) 3096 npoll /= 2; 3097 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3098 3099 /* 3100 * We now know which level in the tree the ED must go into. 3101 * Figure out which slot has most bandwidth left over. 3102 * Slots to examine: 3103 * npoll 3104 * 1 0 3105 * 2 1 2 3106 * 4 3 4 5 6 3107 * 8 7 8 9 10 11 12 13 14 3108 * N (N-1) .. (N-1+N-1) 3109 */ 3110 slow = npoll-1; 3111 shigh = slow + npoll; 3112 nslots = OHCI_NO_INTRS / npoll; 3113 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3114 bw = 0; 3115 for (j = 0; j < nslots; j++) 3116 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3117 if (bw < bestbw) { 3118 best = i; 3119 bestbw = bw; 3120 } 3121 } 3122 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3123 best, slow, shigh, bestbw)); 3124 3125 s = splusb(); 3126 hsed = sc->sc_eds[best]; 3127 sed->next = hsed->next; 3128 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3129 hsed->next = sed; 3130 hsed->ed.ed_nexted = htole32(sed->physaddr); 3131 splx(s); 3132 3133 for (j = 0; j < nslots; j++) 3134 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3135 opipe->u.intr.nslots = nslots; 3136 opipe->u.intr.pos = best; 3137 3138 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3139 return (USBD_NORMAL_COMPLETION); 3140 } 3141 3142 /***********************/ 3143 3144 usbd_status 3145 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3146 { 3147 usbd_status err; 3148 3149 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3150 3151 /* Put it on our queue, */ 3152 err = usb_insert_transfer(xfer); 3153 3154 /* bail out on error, */ 3155 if (err && err != USBD_IN_PROGRESS) 3156 return (err); 3157 3158 /* XXX should check inuse here */ 3159 3160 /* insert into schedule, */ 3161 ohci_device_isoc_enter(xfer); 3162 3163 /* and start if the pipe wasn't running */ 3164 if (!err) 3165 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3166 3167 return (err); 3168 } 3169 3170 void 3171 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3172 { 3173 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3174 usbd_device_handle dev = opipe->pipe.device; 3175 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3176 ohci_soft_ed_t *sed = opipe->sed; 3177 struct iso *iso = &opipe->u.iso; 3178 ohci_soft_itd_t *sitd, *nsitd; 3179 ohci_physaddr_t buf, offs, noffs, bp0; 3180 int i, ncur, nframes; 3181 int s; 3182 3183 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3184 "nframes=%d\n", 3185 iso->inuse, iso->next, xfer, xfer->nframes)); 3186 3187 if (sc->sc_dying) 3188 return; 3189 3190 if (iso->next == -1) { 3191 /* Not in use yet, schedule it a few frames ahead. */ 3192 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3193 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3194 iso->next)); 3195 } 3196 3197 sitd = opipe->tail.itd; 3198 buf = DMAADDR(&xfer->dmabuf, 0); 3199 bp0 = OHCI_PAGE(buf); 3200 offs = OHCI_PAGE_OFFSET(buf); 3201 nframes = xfer->nframes; 3202 xfer->hcpriv = sitd; 3203 for (i = ncur = 0; i < nframes; i++, ncur++) { 3204 noffs = offs + xfer->frlengths[i]; 3205 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3206 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3207 3208 /* Allocate next ITD */ 3209 nsitd = ohci_alloc_sitd(sc); 3210 if (nsitd == NULL) { 3211 /* XXX what now? */ 3212 printf("%s: isoc TD alloc failed\n", 3213 USBDEVNAME(sc->sc_bus.bdev)); 3214 return; 3215 } 3216 3217 /* Fill current ITD */ 3218 sitd->itd.itd_flags = htole32( 3219 OHCI_ITD_NOCC | 3220 OHCI_ITD_SET_SF(iso->next) | 3221 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3222 OHCI_ITD_SET_FC(ncur)); 3223 sitd->itd.itd_bp0 = htole32(bp0); 3224 sitd->nextitd = nsitd; 3225 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3226 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3227 sitd->xfer = xfer; 3228 sitd->flags = 0; 3229 3230 sitd = nsitd; 3231 iso->next = iso->next + ncur; 3232 bp0 = OHCI_PAGE(buf + offs); 3233 ncur = 0; 3234 } 3235 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3236 offs = noffs; 3237 } 3238 nsitd = ohci_alloc_sitd(sc); 3239 if (nsitd == NULL) { 3240 /* XXX what now? */ 3241 printf("%s: isoc TD alloc failed\n", 3242 USBDEVNAME(sc->sc_bus.bdev)); 3243 return; 3244 } 3245 /* Fixup last used ITD */ 3246 sitd->itd.itd_flags = htole32( 3247 OHCI_ITD_NOCC | 3248 OHCI_ITD_SET_SF(iso->next) | 3249 OHCI_ITD_SET_DI(0) | 3250 OHCI_ITD_SET_FC(ncur)); 3251 sitd->itd.itd_bp0 = htole32(bp0); 3252 sitd->nextitd = nsitd; 3253 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3254 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3255 sitd->xfer = xfer; 3256 sitd->flags = OHCI_CALL_DONE; 3257 3258 iso->next = iso->next + ncur; 3259 iso->inuse += nframes; 3260 3261 xfer->actlen = offs; /* XXX pretend we did it all */ 3262 3263 xfer->status = USBD_IN_PROGRESS; 3264 3265 #ifdef OHCI_DEBUG 3266 if (ohcidebug > 5) { 3267 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3268 le32toh(sc->sc_hcca->hcca_frame_number))); 3269 ohci_dump_itds(xfer->hcpriv); 3270 ohci_dump_ed(sed); 3271 } 3272 #endif 3273 3274 s = splusb(); 3275 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3276 opipe->tail.itd = nsitd; 3277 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3278 splx(s); 3279 3280 #ifdef OHCI_DEBUG 3281 if (ohcidebug > 5) { 3282 delay(150000); 3283 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3284 le32toh(sc->sc_hcca->hcca_frame_number))); 3285 ohci_dump_itds(xfer->hcpriv); 3286 ohci_dump_ed(sed); 3287 } 3288 #endif 3289 } 3290 3291 usbd_status 3292 ohci_device_isoc_start(usbd_xfer_handle xfer) 3293 { 3294 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3295 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3296 3297 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3298 3299 if (sc->sc_dying) 3300 return (USBD_IOERROR); 3301 3302 #ifdef DIAGNOSTIC 3303 if (xfer->status != USBD_IN_PROGRESS) 3304 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3305 #endif 3306 3307 /* XXX anything to do? */ 3308 3309 return (USBD_IN_PROGRESS); 3310 } 3311 3312 void 3313 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3314 { 3315 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3316 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3317 ohci_soft_ed_t *sed; 3318 ohci_soft_itd_t *sitd; 3319 int s; 3320 3321 s = splusb(); 3322 3323 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3324 3325 /* Transfer is already done. */ 3326 if (xfer->status != USBD_NOT_STARTED && 3327 xfer->status != USBD_IN_PROGRESS) { 3328 splx(s); 3329 printf("ohci_device_isoc_abort: early return\n"); 3330 return; 3331 } 3332 3333 /* Give xfer the requested abort code. */ 3334 xfer->status = USBD_CANCELLED; 3335 3336 sed = opipe->sed; 3337 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3338 3339 sitd = xfer->hcpriv; 3340 #ifdef DIAGNOSTIC 3341 if (sitd == NULL) { 3342 splx(s); 3343 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3344 return; 3345 } 3346 #endif 3347 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3348 #ifdef DIAGNOSTIC 3349 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3350 sitd->isdone = 1; 3351 #endif 3352 } 3353 3354 splx(s); 3355 3356 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3357 3358 s = splusb(); 3359 3360 /* Run callback. */ 3361 usb_transfer_complete(xfer); 3362 3363 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3364 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3365 3366 splx(s); 3367 } 3368 3369 void 3370 ohci_device_isoc_done(usbd_xfer_handle xfer) 3371 { 3372 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3373 } 3374 3375 usbd_status 3376 ohci_setup_isoc(usbd_pipe_handle pipe) 3377 { 3378 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3379 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3380 struct iso *iso = &opipe->u.iso; 3381 int s; 3382 3383 iso->next = -1; 3384 iso->inuse = 0; 3385 3386 s = splusb(); 3387 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3388 splx(s); 3389 3390 return (USBD_NORMAL_COMPLETION); 3391 } 3392 3393 void 3394 ohci_device_isoc_close(usbd_pipe_handle pipe) 3395 { 3396 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3397 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3398 3399 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3400 ohci_close_pipe(pipe, sc->sc_isoc_head); 3401 #ifdef DIAGNOSTIC 3402 opipe->tail.itd->isdone = 1; 3403 #endif 3404 ohci_free_sitd(sc, opipe->tail.itd); 3405 }
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