if_vgevar.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-4-Clause
    3  *
    4  * Copyright (c) 2004
    5  *      Bill Paul <wpaul@windriver.com>.  All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  * 3. All advertising materials mentioning features or use of this software
   16  *    must display the following acknowledgement:
   17  *      This product includes software developed by Bill Paul.
   18  * 4. Neither the name of the author nor the names of any co-contributors
   19  *    may be used to endorse or promote products derived from this software
   20  *    without specific prior written permission.
   21  *
   22  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
   23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   25  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
   26  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
   32  * THE POSSIBILITY OF SUCH DAMAGE.
   33  *
   34  * $FreeBSD$
   35  */
   36 
   37 #define VGE_JUMBO_MTU   9000
   38 
   39 #define VGE_TX_DESC_CNT         256
   40 #define VGE_RX_DESC_CNT         252     /* Must be a multiple of 4!! */
   41 #define VGE_TX_RING_ALIGN       64
   42 #define VGE_RX_RING_ALIGN       64
   43 #define VGE_MAXTXSEGS           6
   44 #define VGE_RX_BUF_ALIGN        sizeof(uint64_t)
   45 
   46 /*
   47  * VIA Velocity allows 64bit DMA addressing but high 16bits
   48  * of the DMA address should be the same for Tx/Rx buffers.
   49  * Because this condition can't be guaranteed vge(4) limit
   50  * DMA address space to 48bits.
   51  */
   52 #if (BUS_SPACE_MAXADDR < 0xFFFFFFFFFF)
   53 #define VGE_BUF_DMA_MAXADDR     BUS_SPACE_MAXADDR
   54 #else
   55 #define VGE_BUF_DMA_MAXADDR     0xFFFFFFFFFFFF
   56 #endif
   57 
   58 #define VGE_RX_LIST_SZ          (VGE_RX_DESC_CNT * sizeof(struct vge_rx_desc))
   59 #define VGE_TX_LIST_SZ          (VGE_TX_DESC_CNT * sizeof(struct vge_tx_desc))
   60 #define VGE_TX_DESC_INC(x)      ((x) = ((x) + 1) % VGE_TX_DESC_CNT)
   61 #define VGE_TX_DESC_DEC(x)      \
   62         ((x) = (((x) + VGE_TX_DESC_CNT - 1) % VGE_TX_DESC_CNT))
   63 #define VGE_RX_DESC_INC(x)      ((x) = ((x) + 1) % VGE_RX_DESC_CNT)
   64 #define VGE_ADDR_LO(y)          ((uint64_t) (y) & 0xFFFFFFFF)
   65 #define VGE_ADDR_HI(y)          ((uint64_t) (y) >> 32)
   66 #define VGE_BUFLEN(y)           ((y) & 0x3FFF)
   67 #define VGE_RXBYTES(x)          (((x) & VGE_RDSTS_BUFSIZ) >> 16)
   68 #define VGE_MIN_FRAMELEN        60
   69 
   70 #define VGE_INT_HOLDOFF_TICK    20
   71 #define VGE_INT_HOLDOFF_USEC(x) ((x) / VGE_INT_HOLDOFF_TICK)
   72 #define VGE_INT_HOLDOFF_MIN     0
   73 #define VGE_INT_HOLDOFF_MAX     (255 * VGE_INT_HOLDOFF_TICK)
   74 #define VGE_INT_HOLDOFF_DEFAULT 150
   75 
   76 #define VGE_RX_COAL_PKT_MIN     1
   77 #define VGE_RX_COAL_PKT_MAX     VGE_RX_DESC_CNT
   78 #define VGE_RX_COAL_PKT_DEFAULT 64
   79 
   80 #define VGE_TX_COAL_PKT_MIN     1
   81 #define VGE_TX_COAL_PKT_MAX     VGE_TX_DESC_CNT
   82 #define VGE_TX_COAL_PKT_DEFAULT 128
   83 
   84 struct vge_type {
   85         uint16_t                vge_vid;
   86         uint16_t                vge_did;
   87         char                    *vge_name;
   88 };
   89 
   90 struct vge_txdesc {
   91         struct mbuf             *tx_m;
   92         bus_dmamap_t            tx_dmamap;
   93         struct vge_tx_desc      *tx_desc;
   94         struct vge_txdesc       *txd_prev;
   95 };
   96 
   97 struct vge_rxdesc {
   98         struct mbuf             *rx_m;
   99         bus_dmamap_t            rx_dmamap;
  100         struct vge_rx_desc      *rx_desc;
  101         struct vge_rxdesc       *rxd_prev;
  102 };
  103 
  104 struct vge_chain_data{
  105         bus_dma_tag_t           vge_ring_tag;
  106         bus_dma_tag_t           vge_buffer_tag;
  107         bus_dma_tag_t           vge_tx_tag;
  108         struct vge_txdesc       vge_txdesc[VGE_TX_DESC_CNT];
  109         bus_dma_tag_t           vge_rx_tag;
  110         struct vge_rxdesc       vge_rxdesc[VGE_RX_DESC_CNT];
  111         bus_dma_tag_t           vge_tx_ring_tag;
  112         bus_dmamap_t            vge_tx_ring_map;
  113         bus_dma_tag_t           vge_rx_ring_tag;
  114         bus_dmamap_t            vge_rx_ring_map;
  115         bus_dmamap_t            vge_rx_sparemap;
  116 
  117         int                     vge_tx_prodidx;
  118         int                     vge_tx_considx;
  119         int                     vge_tx_cnt;
  120         int                     vge_rx_prodidx;
  121         int                     vge_rx_commit;
  122 
  123         struct mbuf             *vge_head;
  124         struct mbuf             *vge_tail;
  125 };
  126 
  127 #define VGE_CHAIN_RESET(_sc)                                            \
  128 do {                                                                    \
  129         if ((_sc)->vge_cdata.vge_head != NULL) {                        \
  130                 m_freem((_sc)->vge_cdata.vge_head);                     \
  131                 (_sc)->vge_cdata.vge_head = NULL;                       \
  132                 (_sc)->vge_cdata.vge_tail = NULL;                       \
  133         }                                                               \
  134 } while (0);
  135 
  136 struct vge_ring_data {
  137         struct vge_tx_desc      *vge_tx_ring;
  138         bus_addr_t              vge_tx_ring_paddr;
  139         struct vge_rx_desc      *vge_rx_ring;
  140         bus_addr_t              vge_rx_ring_paddr;
  141 };
  142 
  143 struct vge_hw_stats {
  144         uint32_t                rx_frames;
  145         uint32_t                rx_good_frames;
  146         uint32_t                rx_fifo_oflows;
  147         uint32_t                rx_runts;
  148         uint32_t                rx_runts_errs;
  149         uint32_t                rx_pkts_64;
  150         uint32_t                rx_pkts_65_127;
  151         uint32_t                rx_pkts_128_255;
  152         uint32_t                rx_pkts_256_511;
  153         uint32_t                rx_pkts_512_1023;
  154         uint32_t                rx_pkts_1024_1518;
  155         uint32_t                rx_pkts_1519_max;
  156         uint32_t                rx_pkts_1519_max_errs;
  157         uint32_t                rx_jumbos;
  158         uint32_t                rx_crcerrs;
  159         uint32_t                rx_pause_frames;
  160         uint32_t                rx_alignerrs;
  161         uint32_t                rx_nobufs;
  162         uint32_t                rx_symerrs;
  163         uint32_t                rx_lenerrs;
  164 
  165         uint32_t                tx_good_frames;
  166         uint32_t                tx_pkts_64;
  167         uint32_t                tx_pkts_65_127;
  168         uint32_t                tx_pkts_128_255;
  169         uint32_t                tx_pkts_256_511;
  170         uint32_t                tx_pkts_512_1023;
  171         uint32_t                tx_pkts_1024_1518;
  172         uint32_t                tx_jumbos;
  173         uint32_t                tx_colls;
  174         uint32_t                tx_pause;
  175         uint32_t                tx_sqeerrs;
  176         uint32_t                tx_latecolls;
  177 };
  178 
  179 struct vge_softc {
  180         struct ifnet            *vge_ifp;       /* interface info */
  181         device_t                vge_dev;
  182         struct resource         *vge_res;
  183         struct resource         *vge_irq;
  184         void                    *vge_intrhand;
  185         device_t                vge_miibus;
  186         int                     vge_if_flags;
  187         int                     vge_phyaddr;
  188         int                     vge_flags;
  189 #define VGE_FLAG_PCIE           0x0001
  190 #define VGE_FLAG_MSI            0x0002
  191 #define VGE_FLAG_PMCAP          0x0004
  192 #define VGE_FLAG_JUMBO          0x0008
  193 #define VGE_FLAG_SUSPENDED      0x4000
  194 #define VGE_FLAG_LINK           0x8000
  195         int                     vge_expcap;
  196         int                     vge_pmcap;
  197         int                     vge_camidx;
  198         int                     vge_int_holdoff;
  199         int                     vge_rx_coal_pkt;
  200         int                     vge_tx_coal_pkt;
  201         struct mtx              vge_mtx;
  202         struct callout          vge_watchdog;
  203         int                     vge_timer;
  204 
  205         struct vge_chain_data   vge_cdata;
  206         struct vge_ring_data    vge_rdata;
  207         struct vge_hw_stats     vge_stats;
  208 };
  209 
  210 #define VGE_LOCK(_sc)           mtx_lock(&(_sc)->vge_mtx)
  211 #define VGE_UNLOCK(_sc)         mtx_unlock(&(_sc)->vge_mtx)
  212 #define VGE_LOCK_ASSERT(_sc)    mtx_assert(&(_sc)->vge_mtx, MA_OWNED)
  213 
  214 /*
  215  * register space access macros
  216  */
  217 #define CSR_WRITE_STREAM_4(sc, reg, val)        \
  218         bus_write_stream_4(sc->vge_res, reg, val)
  219 #define CSR_WRITE_4(sc, reg, val)       \
  220         bus_write_4(sc->vge_res, reg, val)
  221 #define CSR_WRITE_2(sc, reg, val)       \
  222         bus_write_2(sc->vge_res, reg, val)
  223 #define CSR_WRITE_1(sc, reg, val)       \
  224         bus_write_1(sc->vge_res, reg, val)
  225 
  226 #define CSR_READ_4(sc, reg)             \
  227         bus_read_4(sc->vge_res, reg)
  228 #define CSR_READ_2(sc, reg)             \
  229         bus_read_2(sc->vge_res, reg)
  230 #define CSR_READ_1(sc, reg)             \
  231         bus_read_1(sc->vge_res, reg)
  232 
  233 #define CSR_SETBIT_1(sc, reg, x)        \
  234         CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) | (x))
  235 #define CSR_SETBIT_2(sc, reg, x)        \
  236         CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | (x))
  237 #define CSR_SETBIT_4(sc, reg, x)        \
  238         CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (x))
  239 
  240 #define CSR_CLRBIT_1(sc, reg, x)        \
  241         CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) & ~(x))
  242 #define CSR_CLRBIT_2(sc, reg, x)        \
  243         CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~(x))
  244 #define CSR_CLRBIT_4(sc, reg, x)        \
  245         CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~(x))
  246 
  247 #define VGE_RXCHUNK             4
  248 #define VGE_TIMEOUT             10000
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FreeBSD/Linux Kernel Cross Reference sys/dev/vge/if_vgevar.h

FreeBSD/Linux Kernel Cross Reference
sys/dev/vge/if_vgevar.h
