1 /*-
2 * Copyright (c) 2004
3 * Bill Paul <wpaul@windriver.com>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD$
33 */
34
35 #if !defined(__i386__)
36 #define VGE_FIXUP_RX
37 #endif
38
39 #define VGE_JUMBO_MTU 9000
40
41 #define VGE_IFQ_MAXLEN 64
42
43 #define VGE_TX_DESC_CNT 256
44 #define VGE_RX_DESC_CNT 256 /* Must be a multiple of 4!! */
45 #define VGE_RING_ALIGN 256
46 #define VGE_RX_LIST_SZ (VGE_RX_DESC_CNT * sizeof(struct vge_rx_desc))
47 #define VGE_TX_LIST_SZ (VGE_TX_DESC_CNT * sizeof(struct vge_tx_desc))
48 #define VGE_TX_DESC_INC(x) (x = (x + 1) % VGE_TX_DESC_CNT)
49 #define VGE_RX_DESC_INC(x) (x = (x + 1) % VGE_RX_DESC_CNT)
50 #define VGE_ADDR_LO(y) ((u_int64_t) (y) & 0xFFFFFFFF)
51 #define VGE_ADDR_HI(y) ((u_int64_t) (y) >> 32)
52 #define VGE_BUFLEN(y) ((y) & 0x7FFF)
53 #define VGE_OWN(x) (le32toh((x)->vge_sts) & VGE_RDSTS_OWN)
54 #define VGE_RXBYTES(x) ((le32toh((x)->vge_sts) & \
55 VGE_RDSTS_BUFSIZ) >> 16)
56 #define VGE_MIN_FRAMELEN 60
57
58 #ifdef VGE_FIXUP_RX
59 #define VGE_ETHER_ALIGN sizeof(uint32_t)
60 #else
61 #define VGE_ETHER_ALIGN 0
62 #endif
63
64 struct vge_type {
65 uint16_t vge_vid;
66 uint16_t vge_did;
67 char *vge_name;
68 };
69
70 struct vge_softc;
71
72 struct vge_dmaload_arg {
73 struct vge_softc *sc;
74 int vge_idx;
75 int vge_maxsegs;
76 struct mbuf *vge_m0;
77 u_int32_t vge_flags;
78 };
79
80 struct vge_list_data {
81 struct mbuf *vge_tx_mbuf[VGE_TX_DESC_CNT];
82 struct mbuf *vge_rx_mbuf[VGE_RX_DESC_CNT];
83 int vge_tx_prodidx;
84 int vge_rx_prodidx;
85 int vge_tx_considx;
86 int vge_tx_free;
87 bus_dmamap_t vge_tx_dmamap[VGE_TX_DESC_CNT];
88 bus_dmamap_t vge_rx_dmamap[VGE_RX_DESC_CNT];
89 bus_dma_tag_t vge_mtag; /* mbuf mapping tag */
90 bus_dma_tag_t vge_rx_list_tag;
91 bus_dmamap_t vge_rx_list_map;
92 struct vge_rx_desc *vge_rx_list;
93 bus_addr_t vge_rx_list_addr;
94 bus_dma_tag_t vge_tx_list_tag;
95 bus_dmamap_t vge_tx_list_map;
96 struct vge_tx_desc *vge_tx_list;
97 bus_addr_t vge_tx_list_addr;
98 };
99
100 struct vge_softc {
101 struct arpcom arpcom; /* interface info */
102 device_t vge_dev;
103 bus_space_handle_t vge_bhandle; /* bus space handle */
104 bus_space_tag_t vge_btag; /* bus space tag */
105 struct resource *vge_res;
106 struct resource *vge_irq;
107 void *vge_intrhand;
108 device_t vge_miibus;
109 bus_dma_tag_t vge_parent_tag;
110 bus_dma_tag_t vge_tag;
111 u_int8_t vge_unit; /* interface number */
112 u_int8_t vge_type;
113 int vge_if_flags;
114 int vge_rx_consumed;
115 int vge_link;
116 int vge_camidx;
117 struct task vge_txtask;
118 struct mtx vge_mtx;
119 struct mbuf *vge_head;
120 struct mbuf *vge_tail;
121
122 struct vge_list_data vge_ldata;
123
124 int suspended; /* 0 = normal 1 = suspended */
125 #ifdef DEVICE_POLLING
126 int rxcycles;
127 #endif
128
129 u_int32_t saved_maps[5]; /* pci data */
130 u_int32_t saved_biosaddr;
131 u_int8_t saved_intline;
132 u_int8_t saved_cachelnsz;
133 u_int8_t saved_lattimer;
134 };
135
136 #define VGE_LOCK(_sc) mtx_lock(&(_sc)->vge_mtx)
137 #define VGE_UNLOCK(_sc) mtx_unlock(&(_sc)->vge_mtx)
138 #define VGE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->vge_mtx, MA_OWNED)
139
140 /*
141 * register space access macros
142 */
143 #define CSR_WRITE_STREAM_4(sc, reg, val) \
144 bus_space_write_stream_4(sc->vge_btag, sc->vge_bhandle, reg, val)
145 #define CSR_WRITE_4(sc, reg, val) \
146 bus_space_write_4(sc->vge_btag, sc->vge_bhandle, reg, val)
147 #define CSR_WRITE_2(sc, reg, val) \
148 bus_space_write_2(sc->vge_btag, sc->vge_bhandle, reg, val)
149 #define CSR_WRITE_1(sc, reg, val) \
150 bus_space_write_1(sc->vge_btag, sc->vge_bhandle, reg, val)
151
152 #define CSR_READ_4(sc, reg) \
153 bus_space_read_4(sc->vge_btag, sc->vge_bhandle, reg)
154 #define CSR_READ_2(sc, reg) \
155 bus_space_read_2(sc->vge_btag, sc->vge_bhandle, reg)
156 #define CSR_READ_1(sc, reg) \
157 bus_space_read_1(sc->vge_btag, sc->vge_bhandle, reg)
158
159 #define CSR_SETBIT_1(sc, reg, x) \
160 CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) | (x))
161 #define CSR_SETBIT_2(sc, reg, x) \
162 CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | (x))
163 #define CSR_SETBIT_4(sc, reg, x) \
164 CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (x))
165
166 #define CSR_CLRBIT_1(sc, reg, x) \
167 CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) & ~(x))
168 #define CSR_CLRBIT_2(sc, reg, x) \
169 CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~(x))
170 #define CSR_CLRBIT_4(sc, reg, x) \
171 CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~(x))
172
173 #define VGE_TIMEOUT 10000
174
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