1 /*
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright IBM Corp. 2007
5 *
6 * Authors:
7 * Anthony Liguori <aliguori@us.ibm.com>
8 *
9 * This header is BSD licensed so anyone can use the definitions to implement
10 * compatible drivers/servers.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. Neither the name of IBM nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 * $FreeBSD$
36 */
37
38 #ifndef _VIRTIO_PCI_MODERN_VAR_H
39 #define _VIRTIO_PCI_MODERN_VAR_H
40
41 #include <dev/virtio/pci/virtio_pci_var.h>
42
43 /* IDs for different capabilities. Must all exist. */
44 /* Common configuration */
45 #define VIRTIO_PCI_CAP_COMMON_CFG 1
46 /* Notifications */
47 #define VIRTIO_PCI_CAP_NOTIFY_CFG 2
48 /* ISR access */
49 #define VIRTIO_PCI_CAP_ISR_CFG 3
50 /* Device specific configuration */
51 #define VIRTIO_PCI_CAP_DEVICE_CFG 4
52 /* PCI configuration access */
53 #define VIRTIO_PCI_CAP_PCI_CFG 5
54
55 /* This is the PCI capability header: */
56 struct virtio_pci_cap {
57 uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */
58 uint8_t cap_next; /* Generic PCI field: next ptr. */
59 uint8_t cap_len; /* Generic PCI field: capability length */
60 uint8_t cfg_type; /* Identifies the structure. */
61 uint8_t bar; /* Where to find it. */
62 uint8_t padding[3]; /* Pad to full dword. */
63 uint32_t offset; /* Offset within bar. */
64 uint32_t length; /* Length of the structure, in bytes. */
65 };
66
67 struct virtio_pci_notify_cap {
68 struct virtio_pci_cap cap;
69 uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */
70 };
71
72 /* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */
73 struct virtio_pci_common_cfg {
74 /* About the whole device. */
75 uint32_t device_feature_select; /* read-write */
76 uint32_t device_feature; /* read-only */
77 uint32_t guest_feature_select; /* read-write */
78 uint32_t guest_feature; /* read-write */
79 uint16_t msix_config; /* read-write */
80 uint16_t num_queues; /* read-only */
81 uint8_t device_status; /* read-write */
82 uint8_t config_generation; /* read-only */
83
84 /* About a specific virtqueue. */
85 uint16_t queue_select; /* read-write */
86 uint16_t queue_size; /* read-write, power of 2. */
87 uint16_t queue_msix_vector; /* read-write */
88 uint16_t queue_enable; /* read-write */
89 uint16_t queue_notify_off; /* read-only */
90 uint32_t queue_desc_lo; /* read-write */
91 uint32_t queue_desc_hi; /* read-write */
92 uint32_t queue_avail_lo; /* read-write */
93 uint32_t queue_avail_hi; /* read-write */
94 uint32_t queue_used_lo; /* read-write */
95 uint32_t queue_used_hi; /* read-write */
96 };
97
98 /* Fields in VIRTIO_PCI_CAP_PCI_CFG: */
99 struct virtio_pci_cfg_cap {
100 struct virtio_pci_cap cap;
101 uint8_t pci_cfg_data[4]; /* Data for BAR access. */
102 };
103
104 /* Macro versions of offsets for the Old Timers! */
105 #define VIRTIO_PCI_CAP_VNDR 0
106 #define VIRTIO_PCI_CAP_NEXT 1
107 #define VIRTIO_PCI_CAP_LEN 2
108 #define VIRTIO_PCI_CAP_CFG_TYPE 3
109 #define VIRTIO_PCI_CAP_BAR 4
110 #define VIRTIO_PCI_CAP_OFFSET 8
111 #define VIRTIO_PCI_CAP_LENGTH 12
112
113 #define VIRTIO_PCI_NOTIFY_CAP_MULT 16
114
115 #define VIRTIO_PCI_COMMON_DFSELECT 0
116 #define VIRTIO_PCI_COMMON_DF 4
117 #define VIRTIO_PCI_COMMON_GFSELECT 8
118 #define VIRTIO_PCI_COMMON_GF 12
119 #define VIRTIO_PCI_COMMON_MSIX 16
120 #define VIRTIO_PCI_COMMON_NUMQ 18
121 #define VIRTIO_PCI_COMMON_STATUS 20
122 #define VIRTIO_PCI_COMMON_CFGGENERATION 21
123 #define VIRTIO_PCI_COMMON_Q_SELECT 22
124 #define VIRTIO_PCI_COMMON_Q_SIZE 24
125 #define VIRTIO_PCI_COMMON_Q_MSIX 26
126 #define VIRTIO_PCI_COMMON_Q_ENABLE 28
127 #define VIRTIO_PCI_COMMON_Q_NOFF 30
128 #define VIRTIO_PCI_COMMON_Q_DESCLO 32
129 #define VIRTIO_PCI_COMMON_Q_DESCHI 36
130 #define VIRTIO_PCI_COMMON_Q_AVAILLO 40
131 #define VIRTIO_PCI_COMMON_Q_AVAILHI 44
132 #define VIRTIO_PCI_COMMON_Q_USEDLO 48
133 #define VIRTIO_PCI_COMMON_Q_USEDHI 52
134
135 #endif /* _VIRTIO_PCI_MODERN_VAR_H */
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