if_vmxvar.h

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    1 /*-
    2  * Copyright (c) 2013 Tsubai Masanari
    3  * Copyright (c) 2013 Bryan Venteicher <bryanv@FreeBSD.org>
    4  * Copyright (c) 2018 Patrick Kelsey
    5  *
    6  * Permission to use, copy, modify, and distribute this software for any
    7  * purpose with or without fee is hereby granted, provided that the above
    8  * copyright notice and this permission notice appear in all copies.
    9  *
   10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
   12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
   13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
   14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
   15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
   16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
   17  *
   18  * $FreeBSD$
   19  */
   20 
   21 #ifndef _IF_VMXVAR_H
   22 #define _IF_VMXVAR_H
   23 
   24 struct vmxnet3_softc;
   25 
   26 /*
   27  * The number of Rx/Tx queues this driver prefers.
   28  */
   29 #define VMXNET3_DEF_RX_QUEUES   8
   30 #define VMXNET3_DEF_TX_QUEUES   8
   31 
   32 /*
   33  * The number of Rx rings in each Rx queue.
   34  */
   35 #define VMXNET3_RXRINGS_PERQ    2
   36 
   37 /*
   38  * The number of descriptors in each Rx/Tx ring.
   39  */
   40 #define VMXNET3_DEF_TX_NDESC            512
   41 #define VMXNET3_MAX_TX_NDESC            4096
   42 #define VMXNET3_MIN_TX_NDESC            32
   43 #define VMXNET3_MASK_TX_NDESC           0x1F
   44 #define VMXNET3_DEF_RX_NDESC            512
   45 #define VMXNET3_MAX_RX_NDESC            2048
   46 #define VMXNET3_MIN_RX_NDESC            32
   47 #define VMXNET3_MASK_RX_NDESC           0x1F
   48 
   49 #define VMXNET3_MAX_TX_NCOMPDESC        VMXNET3_MAX_TX_NDESC
   50 #define VMXNET3_MAX_RX_NCOMPDESC \
   51     (VMXNET3_MAX_RX_NDESC * VMXNET3_RXRINGS_PERQ)
   52 
   53 struct vmxnet3_txring {
   54         u_int                    vxtxr_next;
   55         u_int                    vxtxr_ndesc;
   56         int                      vxtxr_gen;
   57         struct vmxnet3_txdesc   *vxtxr_txd;
   58         bus_addr_t               vxtxr_paddr;
   59 };
   60 
   61 struct vmxnet3_rxring {
   62         struct vmxnet3_rxdesc   *vxrxr_rxd;
   63         u_int                    vxrxr_ndesc;
   64         int                      vxrxr_gen;
   65         bus_addr_t               vxrxr_paddr;
   66         uint64_t                 vxrxr_desc_skips;
   67         uint16_t                 vxrxr_refill_start;
   68 };
   69 
   70 struct vmxnet3_comp_ring {
   71         union {
   72                 struct vmxnet3_txcompdesc *txcd;
   73                 struct vmxnet3_rxcompdesc *rxcd;
   74         }                        vxcr_u;
   75         /*
   76          * vxcr_next is used on the transmit side to track the next index to
   77          * begin cleaning at.  It is not used on the receive side.
   78          */
   79         u_int                    vxcr_next;
   80         u_int                    vxcr_ndesc;
   81         int                      vxcr_gen;
   82         bus_addr_t               vxcr_paddr;
   83         uint64_t                 vxcr_zero_length;
   84         uint64_t                 vcxr_zero_length_frag;
   85         uint64_t                 vxcr_pkt_errors;
   86 };
   87 
   88 struct vmxnet3_txqueue {
   89         struct vmxnet3_softc            *vxtxq_sc;
   90         int                              vxtxq_id;
   91         int                              vxtxq_last_flush;
   92         int                              vxtxq_intr_idx;
   93         struct vmxnet3_txring            vxtxq_cmd_ring;
   94         struct vmxnet3_comp_ring         vxtxq_comp_ring;
   95         struct vmxnet3_txq_shared       *vxtxq_ts;
   96         struct sysctl_oid_list          *vxtxq_sysctl;
   97         char                             vxtxq_name[16];
   98 } __aligned(CACHE_LINE_SIZE);
   99 
  100 struct vmxnet3_rxqueue {
  101         struct vmxnet3_softc            *vxrxq_sc;
  102         int                              vxrxq_id;
  103         int                              vxrxq_intr_idx;
  104         struct if_irq                    vxrxq_irq;
  105         struct vmxnet3_rxring            vxrxq_cmd_ring[VMXNET3_RXRINGS_PERQ];
  106         struct vmxnet3_comp_ring         vxrxq_comp_ring;
  107         struct vmxnet3_rxq_shared       *vxrxq_rs;
  108         struct sysctl_oid_list          *vxrxq_sysctl;
  109         char                             vxrxq_name[16];
  110 } __aligned(CACHE_LINE_SIZE);
  111 
  112 struct vmxnet3_softc {
  113         device_t                         vmx_dev;
  114         if_ctx_t                         vmx_ctx;
  115         if_shared_ctx_t                  vmx_sctx;
  116         if_softc_ctx_t                   vmx_scctx;
  117         if_t                             vmx_ifp;
  118         struct vmxnet3_driver_shared    *vmx_ds;
  119         uint32_t                         vmx_flags;
  120 #define VMXNET3_FLAG_RSS        0x0002
  121 #define VMXNET3_FLAG_SOFT_RSS   0x0004          /* Software RSS is enabled with
  122                                                    compatible algorithm. */
  123 
  124         struct vmxnet3_rxqueue          *vmx_rxq;
  125         struct vmxnet3_txqueue          *vmx_txq;
  126 
  127         struct resource                 *vmx_res0;
  128         bus_space_tag_t                  vmx_iot0;
  129         bus_space_handle_t               vmx_ioh0;
  130         struct resource                 *vmx_res1;
  131         bus_space_tag_t                  vmx_iot1;
  132         bus_space_handle_t               vmx_ioh1;
  133 
  134         int                              vmx_link_active;
  135 
  136         int                              vmx_intr_mask_mode;
  137         int                              vmx_event_intr_idx;
  138         struct if_irq                    vmx_event_intr_irq;
  139 
  140         uint8_t                         *vmx_mcast;
  141         struct vmxnet3_rss_shared       *vmx_rss;
  142         struct iflib_dma_info            vmx_ds_dma;
  143         struct iflib_dma_info            vmx_qs_dma;
  144         struct iflib_dma_info            vmx_mcast_dma;
  145         struct iflib_dma_info            vmx_rss_dma;
  146         struct ifmedia                  *vmx_media;
  147         uint32_t                         vmx_vlan_filter[4096/32];
  148         uint8_t                          vmx_lladdr[ETHER_ADDR_LEN];
  149 };
  150 
  151 /*
  152  * Our driver version we report to the hypervisor; we just keep
  153  * this value constant.
  154  */
  155 #define VMXNET3_DRIVER_VERSION 0x00010000
  156 
  157 /*
  158  * Max descriptors per Tx packet. We must limit the size of the
  159  * any TSO packets based on the number of segments.
  160  */
  161 #define VMXNET3_TX_MAXSEGS              32  /* 64K @ 2K segment size */
  162 #define VMXNET3_TX_MAXSIZE              (VMXNET3_TX_MAXSEGS * MCLBYTES)
  163 #define VMXNET3_TSO_MAXSIZE             (VMXNET3_TX_MAXSIZE - ETHER_VLAN_ENCAP_LEN) 
  164 
  165 /*
  166  * Maximum supported Tx segment size. The length field in the
  167  * Tx descriptor is 14 bits.
  168  *
  169  * XXX It's possible a descriptor length field of 0 means 2^14, but this
  170  * isn't confirmed, so limit to 2^14 - 1 for now.
  171  */
  172 #define VMXNET3_TX_MAXSEGSIZE           ((1 << 14) - 1)
  173 
  174 /*
  175  * Maximum supported Rx segment size. The length field in the
  176  * Rx descriptor is 14 bits.
  177  *
  178  * The reference drivers skip zero-length descriptors, which seems to be a
  179  * strong indication that on the receive side, a descriptor length field of
  180  * zero does not mean 2^14.
  181  */
  182 #define VMXNET3_RX_MAXSEGSIZE           ((1 << 14) - 1)
  183 
  184 /*
  185  * Predetermined size of the multicast MACs filter table. If the
  186  * number of multicast addresses exceeds this size, then the
  187  * ALL_MULTI mode is use instead.
  188  */
  189 #define VMXNET3_MULTICAST_MAX           32
  190 
  191 /*
  192  * IP protocols that we can perform Tx checksum offloading of.
  193  */
  194 #define VMXNET3_CSUM_OFFLOAD            (CSUM_TCP | CSUM_UDP)
  195 #define VMXNET3_CSUM_OFFLOAD_IPV6       (CSUM_TCP_IPV6 | CSUM_UDP_IPV6)
  196 
  197 #define VMXNET3_CSUM_ALL_OFFLOAD        \
  198     (VMXNET3_CSUM_OFFLOAD | VMXNET3_CSUM_OFFLOAD_IPV6 | CSUM_TSO)
  199 
  200 #endif /* _IF_VMXVAR_H */

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FreeBSD/Linux Kernel Cross Reference sys/dev/vmware/vmxnet3/if_vmxvar.h

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sys/dev/vmware/vmxnet3/if_vmxvar.h