FreeBSD/Linux Kernel Cross Reference
sys/dev/vnic/nic_reg.h
1 /*
2 * Copyright (C) 2015 Cavium Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 *
28 */
29
30 #ifndef NIC_REG_H
31 #define NIC_REG_H
32
33 #define NIC_PF_REG_COUNT 29573
34 #define NIC_VF_REG_COUNT 249
35
36 /* Physical function register offsets */
37 #define NIC_PF_CFG (0x0000)
38 #define NIC_PF_STATUS (0x0010)
39 #define NIC_PF_INTR_TIMER_CFG (0x0030)
40 #define NIC_PF_BIST_STATUS (0x0040)
41 #define NIC_PF_SOFT_RESET (0x0050)
42 #define NIC_PF_TCP_TIMER (0x0060)
43 #define NIC_PF_BP_CFG (0x0080)
44 #define NIC_PF_RRM_CFG (0x0088)
45 #define NIC_PF_CQM_CF (0x00A0)
46 #define NIC_PF_CNM_CF (0x00A8)
47 #define NIC_PF_CNM_STATUS (0x00B0)
48 #define NIC_PF_CQ_AVG_CFG (0x00C0)
49 #define NIC_PF_RRM_AVG_CFG (0x00C8)
50 #define NIC_PF_INTF_0_1_SEND_CFG (0x0200)
51 #define NIC_PF_INTF_0_1_BP_CFG (0x0208)
52 #define NIC_PF_INTF_0_1_BP_DIS_0_1 (0x0210)
53 #define NIC_PF_INTF_0_1_BP_SW_0_1 (0x0220)
54 #define NIC_PF_RBDR_BP_STATE_0_3 (0x0240)
55 #define NIC_PF_MAILBOX_INT (0x0410)
56 #define NIC_PF_MAILBOX_INT_W1S (0x0430)
57 #define NIC_PF_MAILBOX_ENA_W1C (0x0450)
58 #define NIC_PF_MAILBOX_ENA_W1S (0x0470)
59 #define NIC_PF_RX_ETYPE_0_7 (0x0500)
60 #define NIC_PF_PKIND_0_15_CFG (0x0600)
61 #define NIC_PF_ECC0_FLIP0 (0x1000)
62 #define NIC_PF_ECC1_FLIP0 (0x1008)
63 #define NIC_PF_ECC2_FLIP0 (0x1010)
64 #define NIC_PF_ECC3_FLIP0 (0x1018)
65 #define NIC_PF_ECC0_FLIP1 (0x1080)
66 #define NIC_PF_ECC1_FLIP1 (0x1088)
67 #define NIC_PF_ECC2_FLIP1 (0x1090)
68 #define NIC_PF_ECC3_FLIP1 (0x1098)
69 #define NIC_PF_ECC0_CDIS (0x1100)
70 #define NIC_PF_ECC1_CDIS (0x1108)
71 #define NIC_PF_ECC2_CDIS (0x1110)
72 #define NIC_PF_ECC3_CDIS (0x1118)
73 #define NIC_PF_BIST0_STATUS (0x1280)
74 #define NIC_PF_BIST1_STATUS (0x1288)
75 #define NIC_PF_BIST2_STATUS (0x1290)
76 #define NIC_PF_BIST3_STATUS (0x1298)
77 #define NIC_PF_ECC0_SBE_INT (0x2000)
78 #define NIC_PF_ECC0_SBE_INT_W1S (0x2008)
79 #define NIC_PF_ECC0_SBE_ENA_W1C (0x2010)
80 #define NIC_PF_ECC0_SBE_ENA_W1S (0x2018)
81 #define NIC_PF_ECC0_DBE_INT (0x2100)
82 #define NIC_PF_ECC0_DBE_INT_W1S (0x2108)
83 #define NIC_PF_ECC0_DBE_ENA_W1C (0x2110)
84 #define NIC_PF_ECC0_DBE_ENA_W1S (0x2118)
85 #define NIC_PF_ECC1_SBE_INT (0x2200)
86 #define NIC_PF_ECC1_SBE_INT_W1S (0x2208)
87 #define NIC_PF_ECC1_SBE_ENA_W1C (0x2210)
88 #define NIC_PF_ECC1_SBE_ENA_W1S (0x2218)
89 #define NIC_PF_ECC1_DBE_INT (0x2300)
90 #define NIC_PF_ECC1_DBE_INT_W1S (0x2308)
91 #define NIC_PF_ECC1_DBE_ENA_W1C (0x2310)
92 #define NIC_PF_ECC1_DBE_ENA_W1S (0x2318)
93 #define NIC_PF_ECC2_SBE_INT (0x2400)
94 #define NIC_PF_ECC2_SBE_INT_W1S (0x2408)
95 #define NIC_PF_ECC2_SBE_ENA_W1C (0x2410)
96 #define NIC_PF_ECC2_SBE_ENA_W1S (0x2418)
97 #define NIC_PF_ECC2_DBE_INT (0x2500)
98 #define NIC_PF_ECC2_DBE_INT_W1S (0x2508)
99 #define NIC_PF_ECC2_DBE_ENA_W1C (0x2510)
100 #define NIC_PF_ECC2_DBE_ENA_W1S (0x2518)
101 #define NIC_PF_ECC3_SBE_INT (0x2600)
102 #define NIC_PF_ECC3_SBE_INT_W1S (0x2608)
103 #define NIC_PF_ECC3_SBE_ENA_W1C (0x2610)
104 #define NIC_PF_ECC3_SBE_ENA_W1S (0x2618)
105 #define NIC_PF_ECC3_DBE_INT (0x2700)
106 #define NIC_PF_ECC3_DBE_INT_W1S (0x2708)
107 #define NIC_PF_ECC3_DBE_ENA_W1C (0x2710)
108 #define NIC_PF_ECC3_DBE_ENA_W1S (0x2718)
109 #define NIC_PF_CPI_0_2047_CFG (0x200000)
110 #define NIC_PF_MPI_0_2047_CFG (0x210000)
111 #define NIC_PF_RSSI_0_4097_RQ (0x220000)
112 #define NIC_PF_LMAC_0_7_CFG (0x240000)
113 #define NIC_PF_LMAC_0_7_SW_XOFF (0x242000)
114 #define NIC_PF_LMAC_0_7_CREDIT (0x244000)
115 #define NIC_PF_CHAN_0_255_TX_CFG (0x400000)
116 #define NIC_PF_CHAN_0_255_RX_CFG (0x420000)
117 #define NIC_PF_CHAN_0_255_SW_XOFF (0x440000)
118 #define NIC_PF_CHAN_0_255_CREDIT (0x460000)
119 #define NIC_PF_CHAN_0_255_RX_BP_CFG (0x480000)
120 #define NIC_PF_SW_SYNC_RX (0x490000)
121 #define NIC_PF_SW_SYNC_RX_DONE (0x490008)
122 #define NIC_PF_TL2_0_63_CFG (0x500000)
123 #define NIC_PF_TL2_0_63_PRI (0x520000)
124 #define NIC_PF_TL2_0_63_SH_STATUS (0x580000)
125 #define NIC_PF_TL3A_0_63_CFG (0x5F0000)
126 #define NIC_PF_TL3_0_255_CFG (0x600000)
127 #define NIC_PF_TL3_0_255_CHAN (0x620000)
128 #define NIC_PF_TL3_0_255_PIR (0x640000)
129 #define NIC_PF_TL3_0_255_SW_XOFF (0x660000)
130 #define NIC_PF_TL3_0_255_CNM_RATE (0x680000)
131 #define NIC_PF_TL3_0_255_SH_STATUS (0x6A0000)
132 #define NIC_PF_TL4A_0_255_CFG (0x6F0000)
133 #define NIC_PF_TL4_0_1023_CFG (0x800000)
134 #define NIC_PF_TL4_0_1023_SW_XOFF (0x820000)
135 #define NIC_PF_TL4_0_1023_SH_STATUS (0x840000)
136 #define NIC_PF_TL4A_0_1023_CNM_RATE (0x880000)
137 #define NIC_PF_TL4A_0_1023_CNM_STATUS (0x8A0000)
138 #define NIC_PF_VF_0_127_MAILBOX_0_1 (0x20002030)
139 #define NIC_PF_VNIC_0_127_TX_STAT_0_4 (0x20004000)
140 #define NIC_PF_VNIC_0_127_RX_STAT_0_13 (0x20004100)
141 #define NIC_PF_QSET_0_127_LOCK_0_15 (0x20006000)
142 #define NIC_PF_QSET_0_127_CFG (0x20010000)
143 #define NIC_PF_QSET_0_127_RQ_0_7_CFG (0x20010400)
144 #define NIC_PF_QSET_0_127_RQ_0_7_DROP_CFG (0x20010420)
145 #define NIC_PF_QSET_0_127_RQ_0_7_BP_CFG (0x20010500)
146 #define NIC_PF_QSET_0_127_RQ_0_7_STAT_0_1 (0x20010600)
147 #define NIC_PF_QSET_0_127_SQ_0_7_CFG (0x20010C00)
148 #define NIC_PF_QSET_0_127_SQ_0_7_CFG2 (0x20010C08)
149 #define NIC_PF_QSET_0_127_SQ_0_7_STAT_0_1 (0x20010D00)
150
151 #define NIC_PF_MSIX_VEC_0_18_ADDR (0x000000)
152 #define NIC_PF_MSIX_VEC_0_CTL (0x000008)
153 #define NIC_PF_MSIX_PBA_0 (0x0F0000)
154
155 /* Virtual function register offsets */
156 #define NIC_VNIC_CFG (0x000020)
157 #define NIC_VF_PF_MAILBOX_0_1 (0x000130)
158 #define NIC_VF_INT (0x000200)
159 #define NIC_VF_INT_W1S (0x000220)
160 #define NIC_VF_ENA_W1C (0x000240)
161 #define NIC_VF_ENA_W1S (0x000260)
162
163 #define NIC_VNIC_RSS_CFG (0x0020E0)
164 #define NIC_VNIC_RSS_KEY_0_4 (0x002200)
165 #define NIC_VNIC_TX_STAT_0_4 (0x004000)
166 #define NIC_VNIC_RX_STAT_0_13 (0x004100)
167 #define NIC_QSET_RQ_GEN_CFG (0x010010)
168
169 #define NIC_QSET_CQ_0_7_CFG (0x010400)
170 #define NIC_QSET_CQ_0_7_CFG2 (0x010408)
171 #define NIC_QSET_CQ_0_7_THRESH (0x010410)
172 #define NIC_QSET_CQ_0_7_BASE (0x010420)
173 #define NIC_QSET_CQ_0_7_HEAD (0x010428)
174 #define NIC_QSET_CQ_0_7_TAIL (0x010430)
175 #define NIC_QSET_CQ_0_7_DOOR (0x010438)
176 #define NIC_QSET_CQ_0_7_STATUS (0x010440)
177 #define NIC_QSET_CQ_0_7_STATUS2 (0x010448)
178 #define NIC_QSET_CQ_0_7_DEBUG (0x010450)
179
180 #define NIC_QSET_RQ_0_7_CFG (0x010600)
181 #define NIC_QSET_RQ_0_7_STAT_0_1 (0x010700)
182
183 #define NIC_QSET_SQ_0_7_CFG (0x010800)
184 #define NIC_QSET_SQ_0_7_THRESH (0x010810)
185 #define NIC_QSET_SQ_0_7_BASE (0x010820)
186 #define NIC_QSET_SQ_0_7_HEAD (0x010828)
187 #define NIC_QSET_SQ_0_7_TAIL (0x010830)
188 #define NIC_QSET_SQ_0_7_DOOR (0x010838)
189 #define NIC_QSET_SQ_0_7_STATUS (0x010840)
190 #define NIC_QSET_SQ_0_7_DEBUG (0x010848)
191 #define NIC_QSET_SQ_0_7_CNM_CHG (0x010860)
192 #define NIC_QSET_SQ_0_7_STAT_0_1 (0x010900)
193
194 #define NIC_QSET_RBDR_0_1_CFG (0x010C00)
195 #define NIC_QSET_RBDR_0_1_THRESH (0x010C10)
196 #define NIC_QSET_RBDR_0_1_BASE (0x010C20)
197 #define NIC_QSET_RBDR_0_1_HEAD (0x010C28)
198 #define NIC_QSET_RBDR_0_1_TAIL (0x010C30)
199 #define NIC_QSET_RBDR_0_1_DOOR (0x010C38)
200 #define NIC_QSET_RBDR_0_1_STATUS0 (0x010C40)
201 #define NIC_QSET_RBDR_0_1_STATUS1 (0x010C48)
202 #define NIC_QSET_RBDR_0_1_PREFETCH_STATUS (0x010C50)
203
204 #define NIC_VF_MSIX_VECTOR_0_19_ADDR (0x000000)
205 #define NIC_VF_MSIX_VECTOR_0_19_CTL (0x000008)
206 #define NIC_VF_MSIX_PBA (0x0F0000)
207
208 /* Offsets within registers */
209 #define NIC_MSIX_VEC_SHIFT 4
210 #define NIC_Q_NUM_SHIFT 18
211 #define NIC_QS_ID_SHIFT 21
212 #define NIC_VF_NUM_SHIFT 21
213
214 /* Port kind configuration register */
215 struct pkind_cfg {
216 uint64_t minlen:16;
217 uint64_t maxlen:16;
218 uint64_t reserved_32_32:1;
219 uint64_t lenerr_en:1;
220 uint64_t rx_hdr:3;
221 uint64_t hdr_sl:5;
222 uint64_t reserved_42_63:22;
223 };
224
225 #endif /* NIC_REG_H */
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