The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/wl/if_wl_i82586.h

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    1 /*-
    2  * Mach Operating System
    3  * Copyright (c) 1991,1990,1989 Carnegie Mellon University
    4  * All Rights Reserved.
    5  * 
    6  * Permission to use, copy, modify and distribute this software and its
    7  * documentation is hereby granted, provided that both the copyright
    8  * notice and this permission notice appear in all copies of the
    9  * software, derivative works or modified versions, and any portions
   10  * thereof, and that both notices appear in supporting documentation.
   11  * 
   12  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
   13  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
   14  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
   15  * 
   16  * Carnegie Mellon requests users of this software to return to
   17  * 
   18  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
   19  *  School of Computer Science
   20  *  Carnegie Mellon University
   21  *  Pittsburgh PA 15213-3890
   22  * 
   23  * any improvements or extensions that they make and grant Carnegie Mellon
   24  * the rights to redistribute these changes.
   25  *
   26  * $FreeBSD$
   27  */
   28 /*
   29   Copyright 1988, 1989 by Olivetti Advanced Technology Center, Inc.,
   30 Cupertino, California.
   31 
   32                 All Rights Reserved
   33 
   34   Permission to use, copy, modify, and distribute this software and
   35 its documentation for any purpose and without fee is hereby
   36 granted, provided that the above copyright notice appears in all
   37 copies and that both the copyright notice and this permission notice
   38 appear in supporting documentation, and that the name of Olivetti
   39 not be used in advertising or publicity pertaining to distribution
   40 of the software without specific, written prior permission.
   41 
   42   OLIVETTI DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
   43 INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
   44 IN NO EVENT SHALL OLIVETTI BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
   45 CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
   46 LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
   47 NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUR OF OR IN CONNECTION
   48 WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
   49 */
   50 
   51 /*
   52  * Defines for managing the status word of the 82586 cpu.  For details see
   53  * the Intel LAN Component User's Manual starting at p. 2-14.
   54  *
   55  */
   56 
   57 #define SCB_SW_INT      0xf000
   58 #define SCB_SW_CX       0x8000          /* CU finished w/ int. bit set */
   59 #define SCB_SW_FR       0x4000          /* RU finished receiving a frame */
   60 #define SCB_SW_CNA      0x2000          /* CU left active state */
   61 #define SCB_SW_RNR      0x1000          /* RU left ready state */
   62 
   63 /* 
   64  * Defines for managing the Command Unit Status portion of the 82586
   65  * System Control Block.
   66  *
   67  */
   68 
   69 #define SCB_CUS_IDLE    0x0000
   70 #define SCB_CUS_SUSPND  0x0100
   71 #define SCB_CUS_ACTV    0x0200
   72 
   73 /* 
   74  * Defines for managing the Receive Unit Status portion of the System
   75  * Control Block.
   76  *
   77  */
   78 
   79 #define SCB_RUS_IDLE    0x0000
   80 #define SCB_RUS_SUSPND  0x0010
   81 #define SCB_RUS_NORESRC 0x0020
   82 #define SCB_RUS_READY   0x0040
   83 
   84 /*
   85  * Defines that manage portions of the Command Word in the System Control
   86  * Block of the 82586.  Below are the Interrupt Acknowledge Bits and their
   87  * appropriate masks.
   88  *
   89  */
   90 
   91 #define SCB_ACK_CX      0x8000
   92 #define SCB_ACK_FR      0x4000
   93 #define SCB_ACK_CNA     0x2000
   94 #define SCB_ACK_RNR     0x1000
   95 
   96 /* 
   97  * Defines for managing the Command Unit Control word, and the Receive
   98  * Unit Control word.  The software RESET bit is also defined.
   99  *
  100  */
  101 
  102 #define SCB_CU_STRT     0x0100
  103 #define SCB_CU_RSUM     0x0200
  104 #define SCB_CU_SUSPND   0x0300
  105 #define SCB_CU_ABRT     0x0400
  106 
  107 #define SCB_RESET       0x0080
  108 
  109 #define SCB_RU_STRT     0x0010
  110 #define SCB_RU_RSUM     0x0020
  111 #define SCB_RU_SUSPND   0x0030
  112 #define SCB_RU_ABRT     0x0040
  113 
  114 
  115 /*
  116  * The following define Action Commands for the 82586 chip.
  117  *
  118  */
  119 
  120 #define AC_NOP          0x00
  121 #define AC_IASETUP      0x01
  122 #define AC_CONFIGURE    0x02
  123 #define AC_MCSETUP      0x03
  124 #define AC_TRANSMIT     0x04
  125 #define AC_TDR          0x05
  126 #define AC_DUMP         0x06
  127 #define AC_DIAGNOSE     0x07
  128 
  129 
  130 /*
  131  * Defines for General Format for Action Commands, both Status Words, and
  132  * Command Words.
  133  *
  134  */
  135 
  136 #define AC_SW_C         0x8000
  137 #define AC_SW_B         0x4000
  138 #define AC_SW_OK        0x2000
  139 #define AC_SW_A         0x1000
  140 #define TC_CARRIER      0x0400
  141 #define TC_CLS          0x0200
  142 #define TC_DMA          0x0100
  143 #define TC_DEFER        0x0080
  144 #define TC_SQE          0x0040
  145 #define TC_COLLISION    0x0020
  146 #define AC_CW_EL        0x8000
  147 #define AC_CW_S         0x4000
  148 #define AC_CW_I         0x2000
  149 
  150 /*
  151  * Specific defines for the transmit action command.
  152  *
  153  */
  154 
  155 #define TBD_SW_EOF      0x8000
  156 #define TBD_SW_COUNT    0x3fff
  157 
  158 /*
  159  * Specific defines for the receive frame actions.
  160  *
  161  */
  162 
  163 #define RBD_SW_EOF      0x8000
  164 #define RBD_SW_COUNT    0x3fff
  165 
  166 #define RFD_DONE        0x8000
  167 #define RFD_BUSY        0x4000
  168 #define RFD_OK          0x2000
  169 #define RFD_CRC         0x0800
  170 #define RFD_ALN         0x0400
  171 #define RFD_RSC         0x0200
  172 #define RFD_DMA         0x0100
  173 #define RFD_SHORT       0x0080
  174 #define RFD_EOF         0x0040
  175 #define RFD_EL          0x8000
  176 #define RFD_SUSP        0x4000
  177 /*
  178  * 82586 chip specific structure definitions.  For details, see the Intel
  179  * LAN Components manual.
  180  *
  181  */
  182 
  183 
  184 typedef struct  {
  185         u_short scp_sysbus;
  186         u_short scp_unused[2];
  187         u_short scp_iscp;
  188         u_short scp_iscp_base;
  189 } scp_t;
  190 
  191 
  192 typedef struct  {
  193         u_short iscp_busy;
  194         u_short iscp_scb_offset;
  195         u_short iscp_scb;
  196         u_short iscp_scb_base;
  197 } iscp_t;
  198 
  199 
  200 typedef struct  {
  201         u_short scb_status;
  202         u_short scb_command;
  203         u_short scb_cbl_offset;
  204         u_short scb_rfa_offset;
  205         u_short scb_crcerrs;
  206         u_short scb_alnerrs;
  207         u_short scb_rscerrs;
  208         u_short scb_ovrnerrs;
  209 } scb_t;
  210 
  211 
  212 typedef struct  {
  213         u_short tbd_offset;
  214         u_char  dest_addr[6];
  215         u_short length;
  216 } transmit_t;
  217 
  218 
  219 typedef struct  {
  220         u_short fifolim_bytecnt;
  221         u_short addrlen_mode;
  222         u_short linprio_interframe;
  223         u_short slot_time;
  224         u_short hardware;
  225         u_short min_frame_len;
  226 } configure_t;
  227 
  228 
  229 typedef struct  {
  230         u_short ac_status;
  231         u_short ac_command;
  232         u_short ac_link_offset;
  233         union   {
  234                 transmit_t      transmit;
  235                 configure_t     configure;
  236                 u_char          iasetup[6];
  237         } cmd;
  238 } ac_t;
  239         
  240 
  241 typedef struct  {
  242         u_short act_count;
  243         u_short next_tbd_offset;
  244         u_short buffer_addr;
  245         u_short buffer_base;
  246 } tbd_t;
  247 
  248 
  249 typedef struct  {
  250         u_short status;
  251         u_short command;
  252         u_short link_offset;
  253         u_short rbd_offset;
  254         u_char  destination[6];
  255         u_char  source[6];
  256         u_short length;
  257 } fd_t;
  258 
  259 
  260 typedef struct  {
  261         u_short status;
  262         u_short next_rbd_offset;
  263         u_short buffer_addr;
  264         u_short buffer_base;
  265         u_short size;
  266 } rbd_t;

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