The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dts/arm/bcm2835.dtsi

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    1 /*
    2  * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@bluezbox.com>
    3  *
    4  * Redistribution and use in source and binary forms, with or without
    5  * modification, are permitted provided that the following conditions
    6  * are met:
    7  * 1. Redistributions of source code must retain the above copyright
    8  *    notice, this list of conditions and the following disclaimer.
    9  * 2. Redistributions in binary form must reproduce the above copyright
   10  *    notice, this list of conditions and the following disclaimer in the
   11  *    documentation and/or other materials provided with the distribution.
   12  *
   13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   23  * SUCH DAMAGE.
   24  *
   25  * $FreeBSD: stable/12/sys/dts/arm/bcm2835.dtsi 325826 2017-11-14 21:03:57Z imp $
   26  */
   27 
   28 / {
   29         #address-cells = <1>;
   30         #size-cells = <1>;
   31 
   32         cpus {
   33                 cpu@0 {
   34                         compatible = "arm,1176jzf-s";
   35                 };
   36         };
   37 
   38 
   39         SOC: axi {
   40                 compatible = "simple-bus";
   41                 #address-cells = <1>;
   42                 #size-cells = <1>;
   43                 reg = <0x20000000 0x01000000>;
   44                 ranges = <0 0x20000000 0x01000000>;
   45 
   46                 intc: interrupt-controller {
   47                         compatible = "broadcom,bcm2835-armctrl-ic",
   48                                      "broadcom,bcm2708-armctrl-ic";
   49                         reg = <0xB200 0x200>;
   50 
   51                         interrupt-controller;
   52                         #interrupt-cells = <1>;
   53 
   54                         /* Bank 0
   55                          * 0: ARM_TIMER
   56                          * 1: ARM_MAILBOX
   57                          * 2: ARM_DOORBELL_0
   58                          * 3: ARM_DOORBELL_1
   59                          * 4: VPU0_HALTED
   60                          * 5: VPU1_HALTED
   61                          * 6: ILLEGAL_TYPE0
   62                          * 7: ILLEGAL_TYPE1
   63                          */
   64 
   65                         /* Bank 1
   66                          * 0: TIMER0            16: DMA0
   67                          * 1: TIMER1            17: DMA1
   68                          * 2: TIMER2            18: VC_DMA2
   69                          * 3: TIMER3            19: VC_DMA3
   70                          * 4: CODEC0            20: DMA4
   71                          * 5: CODEC1            21: DMA5
   72                          * 6: CODEC2            22: DMA6
   73                          * 7: VC_JPEG           23: DMA7
   74                          * 8: ISP               24: DMA8
   75                          * 9: VC_USB            25: DMA9
   76                          * 10: VC_3D            26: DMA10
   77                          * 11: TRANSPOSER       27: DMA11
   78                          * 12: MULTICORESYNC0   28: DMA12
   79                          * 13: MULTICORESYNC1   29: AUX
   80                          * 14: MULTICORESYNC2   30: ARM
   81                          * 15: MULTICORESYNC3   31: VPUDMA
   82                          */
   83 
   84                         /* Bank 2
   85                          * 0: HOSTPORT          16: SMI
   86                          * 1: VIDEOSCALER       17: GPIO0
   87                          * 2: CCP2TX            18: GPIO1
   88                          * 3: SDC               19: GPIO2
   89                          * 4: DSI0              20: GPIO3
   90                          * 5: AVE               21: VC_I2C
   91                          * 6: CAM0              22: VC_SPI
   92                          * 7: CAM1              23: VC_I2SPCM
   93                          * 8: HDMI0             24: VC_SDIO
   94                          * 9: HDMI1             25: VC_UART
   95                          * 10: PIXELVALVE1      26: SLIMBUS
   96                          * 11: I2CSPISLV        27: VEC
   97                          * 12: DSI1             28: CPG
   98                          * 13: PWA0             29: RNG
   99                          * 14: PWA1             30: VC_ARASANSDIO
  100                          * 15: CPR              31: AVSPMON
  101                          */
  102                 };
  103 
  104                 timer {
  105                         compatible = "broadcom,bcm2835-system-timer", 
  106                                      "broadcom,bcm2708-system-timer";
  107                         reg = <0x3000 0x1000>;
  108                         interrupts = <8 9 10 11>;
  109                         interrupt-parent = <&intc>;
  110 
  111                         clock-frequency = <1000000>;
  112                 };
  113 
  114                 armtimer {
  115                         /* Not AMBA compatible */
  116                         compatible = "broadcom,bcm2835-sp804", "arm,sp804";
  117                         reg = <0xB400 0x24>;
  118                         interrupts = <0>;
  119                         interrupt-parent = <&intc>;
  120                 };
  121 
  122                 watchdog0 {
  123                         compatible = "broadcom,bcm2835-wdt",
  124                                      "broadcom,bcm2708-wdt";
  125                         reg = <0x10001c 0x0c>; /* 0x1c, 0x20, 0x24 */
  126                 };
  127 
  128                 gpio: gpio {
  129                         compatible = "broadcom,bcm2835-gpio",
  130                                      "broadcom,bcm2708-gpio";
  131                         reg = <0x200000 0xb0>;
  132 
  133                         /* Unusual arrangement of interrupts 
  134                          * (determined by testing)
  135                          * 17: Bank 0 (GPIOs  0-31)
  136                          * 19: Bank 1 (GPIOs 32-53)
  137                          * 18: Bank 2
  138                          * 20: All banks (GPIOs 0-53)
  139                          */
  140                         interrupts = <57 59 58 60>;
  141                         interrupt-parent = <&intc>;
  142 
  143                         gpio-controller;
  144                         #gpio-cells = <2>;
  145 
  146                         interrupt-controller;
  147                         #interrupt-cells = <2>;
  148 
  149                         pinctrl-names = "default";
  150                         pinctrl-0 = <&pins_reserved>;
  151 
  152                         /* Pins that can short 3.3V to GND in output mode: 46-47
  153                          * Pins used by VideoCore: 48-53
  154                          */
  155                         broadcom,read-only = <46>, <47>, <48>, <49>, <50>, 
  156                                              <51>, <52>, <53>;
  157 
  158                         /* BSC0 */
  159                         pins_bsc0_a: bsc0_a {
  160                                 broadcom,pins = <0>, <1>;
  161                         };
  162 
  163                         pins_bsc0_b: bsc0_b {
  164                                 broadcom,pins = <28>, <29>;
  165                         };
  166 
  167                         pins_bsc0_c: bsc0_c {
  168                                 broadcom,pins = <44>, <45>;
  169                         };
  170 
  171                         /* BSC1 */
  172                         pins_bsc1_a: bsc1_a {
  173                                 broadcom,pins = <2>, <3>;
  174                         };
  175 
  176                         pins_bsc1_b: bsc1_b {
  177                                 broadcom,pins = <44>, <45>;
  178                         };
  179 
  180                         /* GPCLK0 */
  181                         pins_gpclk0_a: gpclk0_a {
  182                                 broadcom,pins = <4>;
  183                         };
  184 
  185                         pins_gpclk0_b: gpclk0_b {
  186                                 broadcom,pins = <20>;
  187                         };
  188 
  189                         pins_gpclk0_c: gpclk0_c {
  190                                 broadcom,pins = <32>;
  191                         };
  192 
  193                         pins_gpclk0_d: gpclk0_d {
  194                                 broadcom,pins = <34>;
  195                         };
  196 
  197                         /* GPCLK1 */
  198                         pins_gpclk1_a: gpclk1_a {
  199                                 broadcom,pins = <5>;
  200                         };
  201 
  202                         pins_gpclk1_b: gpclk1_b {
  203                                 broadcom,pins = <21>;
  204                         };
  205 
  206                         pins_gpclk1_c: gpclk1_c {
  207                                 broadcom,pins = <42>;
  208                         };
  209 
  210                         pins_gpclk1_d: gpclk1_d {
  211                                 broadcom,pins = <44>;
  212                         };
  213 
  214                         /* GPCLK2 */
  215                         pins_gpclk2_a: gpclk2_a {
  216                                 broadcom,pins = <6>;
  217                         };
  218 
  219                         pins_gpclk2_b: gpclk2_b {
  220                                 broadcom,pins = <43>;
  221                         };
  222 
  223                         /* SPI0 */
  224                         pins_spi0_a: spi0_a {
  225                                 broadcom,pins = <7>, <8>, <9>, <10>, <11>;
  226                         };
  227 
  228                         pins_spi0_b: spi0_b {
  229                                 broadcom,pins = <35>, <36>, <37>, <38>, <39>;
  230                         };
  231 
  232                         /* PWM */
  233                         pins_pwm0_a: pwm0_a {
  234                                 broadcom,pins = <12>;
  235                         };
  236 
  237                         pins_pwm0_b: pwm0_b {
  238                                 broadcom,pins = <18>;
  239                         };
  240 
  241                         pins_pwm0_c: pwm0_c {
  242                                 broadcom,pins = <40>;
  243                         };
  244 
  245                         pins_pwm1_a: pwm1_a {
  246                                 broadcom,pins = <13>;
  247                         };
  248 
  249                         pins_pwm1_b: pwm1_b {
  250                                 broadcom,pins = <19>;
  251                         };
  252 
  253                         pins_pwm1_c: pwm1_c {
  254                                 broadcom,pins = <41>;
  255                         };
  256 
  257                         pins_pwm1_d: pwm1_d {
  258                                 broadcom,pins = <45>;
  259                         };
  260 
  261                         /* UART0 */
  262                         pins_uart0_a: uart0_a {
  263                                 broadcom,pins = <14>, <15>;
  264                         };
  265 
  266                         pins_uart0_b: uart0_b {
  267                                 broadcom,pins = <32>, <33>;
  268                         };
  269 
  270                         pins_uart0_c: uart0_c {
  271                                 broadcom,pins = <36>, <37>;
  272                         };
  273 
  274                         pins_uart0_fc_a: uart0_fc_a {
  275                                 broadcom,pins = <16>, <17>;
  276                         };
  277 
  278                         pins_uart0_fc_b: uart0_fc_b {
  279                                 broadcom,pins = <30>, <31>;
  280                         };
  281 
  282                         pins_uart0_fc_c: uart0_fc_c {
  283                                 broadcom,pins = <39>, <38>;
  284                         };
  285 
  286                         /* PCM */
  287                         pins_pcm_a: pcm_a {
  288                                 broadcom,pins = <18>, <19>, <20>, <21>;
  289                         };
  290 
  291                         pins_pcm_b: pcm_b {
  292                                 broadcom,pins = <28>, <29>, <30>, <31>;
  293                         };
  294 
  295                         /* Secondary Address Bus */
  296                         pins_sm_addr_a: sm_addr_a {
  297                                 broadcom,pins = <5>, <4>, <3>, <2>, <1>, <0>;
  298                         };
  299 
  300                         pins_sm_addr_b: sm_addr_b {
  301                                 broadcom,pins = <33>, <32>, <31>, <30>, <29>,
  302                                                 <28>;
  303                         };
  304 
  305                         pins_sm_ctl_a: sm_ctl_a {
  306                                 broadcom,pins = <6>, <7>;
  307                         };
  308 
  309                         pins_sm_ctl_b: sm_ctl_b {
  310                                 broadcom,pins = <34>, <35>;
  311                         };
  312 
  313                         pins_sm_data_8bit_a: sm_data_8bit_a {
  314                                 broadcom,pins = <8>, <9>, <10>, <11>, <12>,
  315                                                 <13>, <14>, <15>;
  316                         };
  317 
  318                         pins_sm_data_8bit_b: sm_data_8bit_b {
  319                                 broadcom,pins = <36>, <37>, <38>, <39>, <40>,
  320                                                 <41>, <42>, <43>;
  321                         };
  322 
  323                         pins_sm_data_16bit: sm_data_16bit {
  324                                 broadcom,pins = <16>, <17>, <18>, <19>, <20>,
  325                                                 <21>, <22>, <23>;
  326                         };
  327 
  328                         pins_sm_data_18bit: sm_data_18bit {
  329                                 broadcom,pins = <24>, <25>;
  330                         };
  331 
  332                         /* BSCSL */
  333                         pins_bscsl: bscsl {
  334                                 broadcom,pins = <18>, <19>;
  335                         };
  336 
  337                         /* SPISL */
  338                         pins_spisl: spisl {
  339                                 broadcom,pins = <18>, <19>, <20>, <21>;
  340                         };
  341 
  342                         /* SPI1 */
  343                         pins_spi1: spi1 {
  344                                 broadcom,pins = <16>, <17>, <18>, <19>, <20>,
  345                                                 <21>;
  346                         };
  347 
  348                         /* UART1 */
  349                         pins_uart1_a: uart1_a {
  350                                 broadcom,pins = <14>, <15>;
  351                         };
  352 
  353                         pins_uart1_b: uart1_b {
  354                                 broadcom,pins = <32>, <33>;
  355                         };
  356 
  357                         pins_uart1_c: uart1_c {
  358                                 broadcom,pins = <40>, <41>;
  359                         };
  360 
  361                         pins_uart1_fc_a: uart1_fc_a {
  362                                 broadcom,pins = <16>, <17>;
  363                         };
  364 
  365                         pins_uart1_fc_b: uart1_fc_b {
  366                                 broadcom,pins = <30>, <31>;
  367                         };
  368 
  369                         pins_uart1_fc_c: uart1_fc_c {
  370                                 broadcom,pins = <43>, <42>;
  371                         };
  372 
  373                         /* SPI2 */
  374                         pins_spi2: spi2 {
  375                                 broadcom,pins = <40>, <41>, <42>, <43>, <44>,
  376                                                 <45>;
  377                         };
  378 
  379                         /* ARM JTAG */
  380                         pins_arm_jtag_trst: arm_jtag_trst {
  381                                 broadcom,pins = <22>;
  382                         };
  383 
  384                         pins_arm_jtag_a: arm_jtag_a {
  385                                 broadcom,pins = <4>, <5>, <6>, <12>, <13>;
  386                         };
  387 
  388                         pins_arm_jtag_b: arm_jtag_b {
  389                                 broadcom,pins = <23>, <24>, <25>, <26>, <27>;
  390                         };
  391 
  392                         /* Reserved */
  393                         pins_reserved: reserved {
  394                                 broadcom,pins = <48>, <49>, <50>, <51>, <52>,
  395                                                 <53>;
  396                         };
  397                 };
  398 
  399                 rng {
  400                         compatible = "broadcom,bcm2835-rng",
  401                                      "broadcom,bcm2708-rng";
  402                         reg = <0x104000 0x20>;
  403                         interrupts = <69>;
  404                         interrupt-parent = <&intc>;
  405                 };
  406 
  407                 bsc0 {
  408                         #address-cells = <1>;
  409                         #size-cells = <0>;
  410                         compatible = "broadcom,bcm2835-bsc",
  411                                      "broadcom,bcm2708-bsc";
  412                         reg = <0x205000 0x20>;
  413                         interrupts = <61>;
  414                         interrupt-parent = <&intc>;
  415                 };
  416 
  417                 bsc1 {
  418                         #address-cells = <1>;
  419                         #size-cells = <0>;
  420                         compatible = "broadcom,bcm2835-bsc",
  421                                      "broadcom,bcm2708-bsc";
  422                         reg = <0x804000 0x20>;
  423                         interrupts = <61>;
  424                         interrupt-parent = <&intc>;
  425                 };
  426 
  427                 spi0 {
  428                         compatible = "broadcom,bcm2835-spi",
  429                                      "broadcom,bcm2708-spi";
  430                         reg = <0x204000 0x20>;
  431                         interrupts = <62>;
  432                         interrupt-parent = <&intc>;
  433                 };
  434 
  435                 dma: dma {
  436                         compatible = "broadcom,bcm2835-dma", 
  437                                      "broadcom,bcm2708-dma";
  438                         reg = <0x7000 0x1000>, <0xE05000 0x1000>;
  439                         interrupts = <24 25 26 27 28 29 30 31 32 33 34 35 36>;
  440                         interrupt-parent = <&intc>;
  441 
  442                         broadcom,channels = <0x7f35>;
  443                 };
  444 
  445                 vc_mbox: mbox {
  446                         compatible = "broadcom,bcm2835-mbox", 
  447                                      "broadcom,bcm2708-mbox";
  448                         reg = <0xB880 0x40>;
  449                         interrupts = <1>;
  450                         interrupt-parent = <&intc>;
  451 
  452                         /* Channels
  453                          * 0: Power
  454                          * 1: Frame buffer
  455                          * 2: Virtual UART
  456                          * 3: VCHIQ
  457                          * 4: LEDs
  458                          * 5: Buttons
  459                          * 6: Touch screen
  460                          */
  461                 };
  462 
  463                 sdhci {
  464                         compatible = "broadcom,bcm2835-sdhci", 
  465                                      "broadcom,bcm2708-sdhci";
  466                         reg = <0x300000 0x100>;
  467                         interrupts = <70>;
  468                         interrupt-parent = <&intc>;
  469 
  470                         clock-frequency = <50000000>;   /* Set by VideoCore */
  471                 };
  472 
  473                 uart0: uart0 {
  474                         compatible = "broadcom,bcm2835-uart", 
  475                                      "broadcom,bcm2708-uart", "arm,pl011", 
  476                                      "arm,primecell";
  477                         reg = <0x201000 0x1000>;
  478                         interrupts = <65>;
  479                         interrupt-parent = <&intc>;
  480 
  481                         clock-frequency = <3000000>;    /* Set by VideoCore */
  482                         reg-shift = <2>;
  483                 };
  484 
  485                 vchiq: vchiq {
  486                         compatible = "broadcom,bcm2835-vchiq";
  487                         reg = <0xB800 0x50>;
  488                         interrupts = <2>;
  489                         interrupt-parent = <&intc>;
  490                         cache-line-size = <32>;
  491                 };
  492 
  493                 usb {
  494                         compatible = "broadcom,bcm2835-usb", 
  495                                      "broadcom,bcm2708-usb", 
  496                                      "synopsys,designware-hs-otg2";
  497                         reg = <0x980000 0x20000>;
  498                         interrupts = <17>;
  499                         interrupt-parent = <&intc>;
  500                         #address-cells = <1>;
  501                         #size-cells = <0>;
  502                 };
  503 
  504         };
  505 };

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