Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dts/arm/bcm2836.dtsi
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1 /* 2 * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@bluezbox.com> 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 * 25 * $FreeBSD$ 26 */ 27 28 / { 29 #address-cells = <1>; 30 #size-cells = <1>; 31 32 timer { 33 compatible = "arm,armv7-timer"; 34 clock-frequency = <19200000>; 35 interrupts = <0 1 3 2>; 36 interrupt-parent = <&local_intc>; 37 }; 38 39 SOC: axi { 40 compatible = "simple-bus"; 41 #address-cells = <1>; 42 #size-cells = <1>; 43 reg = <0x3f000000 0x01000000>; 44 ranges = <0 0x3f000000 0x01000000>, 45 <0x40000000 0x40000000 0x00001000>; 46 47 local_intc: local_intc { 48 compatible = "brcm,bcm2836-l1-intc"; 49 reg = <0x40000000 0x100>; 50 interrupt-controller; 51 #interrupt-cells = <1>; 52 interrupt-parent = <&local_intc>; 53 }; 54 55 intc: interrupt-controller { 56 compatible = "broadcom,bcm2835-armctrl-ic", 57 "broadcom,bcm2708-armctrl-ic"; 58 reg = <0xB200 0x200>; 59 interrupt-parent = <&local_intc>; 60 interrupts = <8>; 61 62 interrupt-controller; 63 #interrupt-cells = <1>; 64 65 /* Bank 0 66 * 0: ARM_TIMER 67 * 1: ARM_MAILBOX 68 * 2: ARM_DOORBELL_0 69 * 3: ARM_DOORBELL_1 70 * 4: VPU0_HALTED 71 * 5: VPU1_HALTED 72 * 6: ILLEGAL_TYPE0 73 * 7: ILLEGAL_TYPE1 74 */ 75 76 /* Bank 1 77 * 0: TIMER0 16: DMA0 78 * 1: TIMER1 17: DMA1 79 * 2: TIMER2 18: VC_DMA2 80 * 3: TIMER3 19: VC_DMA3 81 * 4: CODEC0 20: DMA4 82 * 5: CODEC1 21: DMA5 83 * 6: CODEC2 22: DMA6 84 * 7: VC_JPEG 23: DMA7 85 * 8: ISP 24: DMA8 86 * 9: VC_USB 25: DMA9 87 * 10: VC_3D 26: DMA10 88 * 11: TRANSPOSER 27: DMA11 89 * 12: MULTICORESYNC0 28: DMA12 90 * 13: MULTICORESYNC1 29: AUX 91 * 14: MULTICORESYNC2 30: ARM 92 * 15: MULTICORESYNC3 31: VPUDMA 93 */ 94 95 /* Bank 2 96 * 0: HOSTPORT 16: SMI 97 * 1: VIDEOSCALER 17: GPIO0 98 * 2: CCP2TX 18: GPIO1 99 * 3: SDC 19: GPIO2 100 * 4: DSI0 20: GPIO3 101 * 5: AVE 21: VC_I2C 102 * 6: CAM0 22: VC_SPI 103 * 7: CAM1 23: VC_I2SPCM 104 * 8: HDMI0 24: VC_SDIO 105 * 9: HDMI1 25: VC_UART 106 * 10: PIXELVALVE1 26: SLIMBUS 107 * 11: I2CSPISLV 27: VEC 108 * 12: DSI1 28: CPG 109 * 13: PWA0 29: RNG 110 * 14: PWA1 30: VC_ARASANSDIO 111 * 15: CPR 31: AVSPMON 112 */ 113 }; 114 115 watchdog0 { 116 compatible = "broadcom,bcm2835-wdt", 117 "broadcom,bcm2708-wdt"; 118 reg = <0x10001c 0x0c>; /* 0x1c, 0x20, 0x24 */ 119 }; 120 121 gpio: gpio { 122 compatible = "broadcom,bcm2835-gpio", 123 "broadcom,bcm2708-gpio"; 124 reg = <0x200000 0xb0>; 125 126 /* Unusual arrangement of interrupts 127 * (determined by testing) 128 * 17: Bank 0 (GPIOs 0-31) 129 * 19: Bank 1 (GPIOs 32-53) 130 * 18: Bank 2 131 * 20: All banks (GPIOs 0-53) 132 */ 133 interrupts = <57 59 58 60>; 134 interrupt-parent = <&intc>; 135 136 gpio-controller; 137 #gpio-cells = <2>; 138 139 interrupt-controller; 140 #interrupt-cells = <2>; 141 142 pinctrl-names = "default"; 143 pinctrl-0 = <&pins_reserved>; 144 145 /* Pins that can short 3.3V to GND in output mode: 46 146 * Pins used by VideoCore: 48-53 147 */ 148 broadcom,read-only = <46>, <48>, <49>, <50>, 149 <51>, <52>, <53>; 150 151 /* BSC0 */ 152 pins_bsc0_a: bsc0_a { 153 broadcom,pins = <0>, <1>; 154 }; 155 156 pins_bsc0_b: bsc0_b { 157 broadcom,pins = <28>, <29>; 158 }; 159 160 pins_bsc0_c: bsc0_c { 161 broadcom,pins = <44>, <45>; 162 }; 163 164 /* BSC1 */ 165 pins_bsc1_a: bsc1_a { 166 broadcom,pins = <2>, <3>; 167 }; 168 169 pins_bsc1_b: bsc1_b { 170 broadcom,pins = <44>, <45>; 171 }; 172 173 /* GPCLK0 */ 174 pins_gpclk0_a: gpclk0_a { 175 broadcom,pins = <4>; 176 }; 177 178 pins_gpclk0_b: gpclk0_b { 179 broadcom,pins = <20>; 180 }; 181 182 pins_gpclk0_c: gpclk0_c { 183 broadcom,pins = <32>; 184 }; 185 186 pins_gpclk0_d: gpclk0_d { 187 broadcom,pins = <34>; 188 }; 189 190 /* GPCLK1 */ 191 pins_gpclk1_a: gpclk1_a { 192 broadcom,pins = <5>; 193 }; 194 195 pins_gpclk1_b: gpclk1_b { 196 broadcom,pins = <21>; 197 }; 198 199 pins_gpclk1_c: gpclk1_c { 200 broadcom,pins = <42>; 201 }; 202 203 pins_gpclk1_d: gpclk1_d { 204 broadcom,pins = <44>; 205 }; 206 207 /* GPCLK2 */ 208 pins_gpclk2_a: gpclk2_a { 209 broadcom,pins = <6>; 210 }; 211 212 pins_gpclk2_b: gpclk2_b { 213 broadcom,pins = <43>; 214 }; 215 216 /* SPI0 */ 217 pins_spi0_a: spi0_a { 218 broadcom,pins = <7>, <8>, <9>, <10>, <11>; 219 }; 220 221 pins_spi0_b: spi0_b { 222 broadcom,pins = <35>, <36>, <37>, <38>, <39>; 223 }; 224 225 /* PWM */ 226 pins_pwm0_a: pwm0_a { 227 broadcom,pins = <12>; 228 }; 229 230 pins_pwm0_b: pwm0_b { 231 broadcom,pins = <18>; 232 }; 233 234 pins_pwm0_c: pwm0_c { 235 broadcom,pins = <40>; 236 }; 237 238 pins_pwm1_a: pwm1_a { 239 broadcom,pins = <13>; 240 }; 241 242 pins_pwm1_b: pwm1_b { 243 broadcom,pins = <19>; 244 }; 245 246 pins_pwm1_c: pwm1_c { 247 broadcom,pins = <41>; 248 }; 249 250 pins_pwm1_d: pwm1_d { 251 broadcom,pins = <45>; 252 }; 253 254 /* UART0 */ 255 pins_uart0_a: uart0_a { 256 broadcom,pins = <14>, <15>; 257 }; 258 259 pins_uart0_b: uart0_b { 260 broadcom,pins = <32>, <33>; 261 }; 262 263 pins_uart0_c: uart0_c { 264 broadcom,pins = <36>, <37>; 265 }; 266 267 pins_uart0_fc_a: uart0_fc_a { 268 broadcom,pins = <16>, <17>; 269 }; 270 271 pins_uart0_fc_b: uart0_fc_b { 272 broadcom,pins = <30>, <31>; 273 }; 274 275 pins_uart0_fc_c: uart0_fc_c { 276 broadcom,pins = <39>, <38>; 277 }; 278 279 /* PCM */ 280 pins_pcm_a: pcm_a { 281 broadcom,pins = <18>, <19>, <20>, <21>; 282 }; 283 284 pins_pcm_b: pcm_b { 285 broadcom,pins = <28>, <29>, <30>, <31>; 286 }; 287 288 /* Secondary Address Bus */ 289 pins_sm_addr_a: sm_addr_a { 290 broadcom,pins = <5>, <4>, <3>, <2>, <1>, <0>; 291 }; 292 293 pins_sm_addr_b: sm_addr_b { 294 broadcom,pins = <33>, <32>, <31>, <30>, <29>, 295 <28>; 296 }; 297 298 pins_sm_ctl_a: sm_ctl_a { 299 broadcom,pins = <6>, <7>; 300 }; 301 302 pins_sm_ctl_b: sm_ctl_b { 303 broadcom,pins = <34>, <35>; 304 }; 305 306 pins_sm_data_8bit_a: sm_data_8bit_a { 307 broadcom,pins = <8>, <9>, <10>, <11>, <12>, 308 <13>, <14>, <15>; 309 }; 310 311 pins_sm_data_8bit_b: sm_data_8bit_b { 312 broadcom,pins = <36>, <37>, <38>, <39>, <40>, 313 <41>, <42>, <43>; 314 }; 315 316 pins_sm_data_16bit: sm_data_16bit { 317 broadcom,pins = <16>, <17>, <18>, <19>, <20>, 318 <21>, <22>, <23>; 319 }; 320 321 pins_sm_data_18bit: sm_data_18bit { 322 broadcom,pins = <24>, <25>; 323 }; 324 325 /* BSCSL */ 326 pins_bscsl: bscsl { 327 broadcom,pins = <18>, <19>; 328 }; 329 330 /* SPISL */ 331 pins_spisl: spisl { 332 broadcom,pins = <18>, <19>, <20>, <21>; 333 }; 334 335 /* SPI1 */ 336 pins_spi1: spi1 { 337 broadcom,pins = <16>, <17>, <18>, <19>, <20>, 338 <21>; 339 }; 340 341 /* UART1 */ 342 pins_uart1_a: uart1_a { 343 broadcom,pins = <14>, <15>; 344 }; 345 346 pins_uart1_b: uart1_b { 347 broadcom,pins = <32>, <33>; 348 }; 349 350 pins_uart1_c: uart1_c { 351 broadcom,pins = <40>, <41>; 352 }; 353 354 pins_uart1_fc_a: uart1_fc_a { 355 broadcom,pins = <16>, <17>; 356 }; 357 358 pins_uart1_fc_b: uart1_fc_b { 359 broadcom,pins = <30>, <31>; 360 }; 361 362 pins_uart1_fc_c: uart1_fc_c { 363 broadcom,pins = <43>, <42>; 364 }; 365 366 /* SPI2 */ 367 pins_spi2: spi2 { 368 broadcom,pins = <40>, <41>, <42>, <43>, <44>, 369 <45>; 370 }; 371 372 /* ARM JTAG */ 373 pins_arm_jtag_trst: arm_jtag_trst { 374 broadcom,pins = <22>; 375 }; 376 377 pins_arm_jtag_a: arm_jtag_a { 378 broadcom,pins = <4>, <5>, <6>, <12>, <13>; 379 }; 380 381 pins_arm_jtag_b: arm_jtag_b { 382 broadcom,pins = <23>, <24>, <25>, <26>, <27>; 383 }; 384 385 /* Reserved */ 386 pins_reserved: reserved { 387 broadcom,pins = <48>, <49>, <50>, <51>, <52>, 388 <53>; 389 }; 390 }; 391 392 cprman { 393 compatible = "broadcom,bcm2835-cprman"; 394 reg = <0x101000 0x2000>; 395 }; 396 397 rng { 398 compatible = "broadcom,bcm2835-rng", 399 "broadcom,bcm2708-rng"; 400 reg = <0x104000 0x20>; 401 interrupts = <69>; 402 interrupt-parent = <&intc>; 403 }; 404 405 bsc0 { 406 #address-cells = <1>; 407 #size-cells = <0>; 408 compatible = "broadcom,bcm2835-bsc", 409 "broadcom,bcm2708-bsc"; 410 reg = <0x205000 0x20>; 411 interrupts = <61>; 412 interrupt-parent = <&intc>; 413 }; 414 415 bsc1 { 416 #address-cells = <1>; 417 #size-cells = <0>; 418 compatible = "broadcom,bcm2835-bsc", 419 "broadcom,bcm2708-bsc"; 420 reg = <0x804000 0x20>; 421 interrupts = <61>; 422 interrupt-parent = <&intc>; 423 }; 424 425 spi0 { 426 compatible = "broadcom,bcm2835-spi", 427 "broadcom,bcm2708-spi"; 428 reg = <0x204000 0x20>; 429 interrupts = <62>; 430 interrupt-parent = <&intc>; 431 }; 432 433 pwm0 { 434 compatible = "broadcom,bcm2835-pwm"; 435 reg = <0x20c000 0x28>; 436 }; 437 438 dma: dma { 439 compatible = "broadcom,bcm2835-dma", 440 "broadcom,bcm2708-dma"; 441 reg = <0x7000 0x1000>, <0xE05000 0x1000>; 442 interrupts = <24 25 26 27 28 29 30 31 32 33 34 35 36>; 443 interrupt-parent = <&intc>; 444 445 broadcom,channels = <0x7f35>; 446 }; 447 448 vc_mbox: mbox { 449 compatible = "broadcom,bcm2835-mbox", 450 "broadcom,bcm2708-mbox"; 451 reg = <0xB880 0x40>; 452 interrupts = <1>; 453 interrupt-parent = <&intc>; 454 455 /* Channels 456 * 0: Power 457 * 1: Frame buffer 458 * 2: Virtual UART 459 * 3: VCHIQ 460 * 4: LEDs 461 * 5: Buttons 462 * 6: Touch screen 463 */ 464 }; 465 466 sdhci { 467 compatible = "broadcom,bcm2835-sdhci", 468 "broadcom,bcm2708-sdhci"; 469 reg = <0x300000 0x100>; 470 interrupts = <70>; 471 interrupt-parent = <&intc>; 472 473 clock-frequency = <250000000>; /* Set by VideoCore */ 474 }; 475 476 uart0: uart0 { 477 compatible = "broadcom,bcm2835-uart", 478 "broadcom,bcm2708-uart", "arm,pl011", 479 "arm,primecell"; 480 reg = <0x201000 0x1000>; 481 interrupts = <65>; 482 interrupt-parent = <&intc>; 483 484 clock-frequency = <3000000>; /* Set by VideoCore */ 485 reg-shift = <2>; 486 }; 487 488 vchiq: vchiq { 489 compatible = "broadcom,bcm2835-vchiq"; 490 reg = <0xB800 0x50>; 491 interrupts = <2>; 492 interrupt-parent = <&intc>; 493 cache-line-size = <32>; 494 }; 495 496 usb { 497 compatible = "broadcom,bcm2835-usb", 498 "broadcom,bcm2708-usb", 499 "synopsys,designware-hs-otg2"; 500 reg = <0x980000 0x20000>; 501 interrupts = <17>; 502 interrupt-parent = <&intc>; 503 #address-cells = <1>; 504 #size-cells = <0>; 505 }; 506 507 }; 508 };
Cache object: e28ab2da82b5d1dd7ef23061ee9dba4d
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