Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dts/arm/ea3250.dts
Version:
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1 /* 2 * Copyright (c) 2011 Jakub Klama <jceel@FreeBSD.org> 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 * 25 * Embedded Artists LPC3250-Kit Device Tree Source. 26 * 27 * $FreeBSD$ 28 */ 29 30 /dts-v1/; 31 32 / { 33 model = "ea,LPC3250-KIT"; 34 compatible = "LPC3250-KIT"; 35 #address-cells = <1>; 36 #size-cells = <1>; 37 38 aliases { 39 soc = &soc; 40 serial4 = &serial4; 41 }; 42 43 cpus { 44 #address-cells = <1>; 45 #size-cells = <0>; 46 47 cpu@0 { 48 device_type = "cpu"; 49 compatible = "ARM,926EJ-S"; 50 reg = <0x0>; 51 d-cache-line-size = <32>; // 32 bytes 52 i-cache-line-size = <32>; // 32 bytes 53 d-cache-size = <0x4000>; // L1, 16K 54 i-cache-size = <0x4000>; // L1, 16K 55 timebase-frequency = <0>; 56 bus-frequency = <0>; 57 clock-frequency = <0>; 58 }; 59 }; 60 61 memory { 62 device_type = "memory"; 63 reg = <0x80000000 0x4000000>; // 64M at 0x80000000 64 }; 65 66 soc: ahb7@40000000 { 67 #address-cells = <1>; 68 #size-cells = <1>; 69 compatible = "simple-bus"; 70 ranges = <0x0 0x40000000 0x10000000>; 71 bus-frequency = <13000000>; 72 73 pwr@4000 { 74 compatible = "lpc,pwr"; 75 reg = <0x4000 0x4000>; 76 }; 77 78 PIC: pic@8000 { 79 interrupt-controller; 80 #address-cells = <0>; 81 #interrupt-cells = <1>; 82 reg = <0x8000 0xc000>; 83 compatible = "lpc,pic"; 84 }; 85 86 timer@44000 { 87 compatible = "lpc,timer"; 88 reg = <0x44000 0x4000 89 0x4c000 0x4000>; 90 interrupts = <16 17>; 91 interrupt-parent = <&PIC>; 92 }; 93 94 rtc@24000 { 95 compatible = "lpc,rtc"; 96 reg = <0x24000 0x4000>; 97 interrupts = <52>; 98 interrupt-parent = <&PIC>; 99 }; 100 101 serial0: serial@14000 { 102 compatible = "lpc,hsuart"; 103 status = "disabled"; 104 reg = <0x14000 0x20>; 105 reg-shift = <2>; 106 clock-frequency = <0>; 107 interrupts = <26>; 108 interrupt-parent = <&PIC>; 109 }; 110 111 serial1: serial@18000 { 112 compatible = "lpc,hsuart"; 113 status = "disabled"; 114 reg = <0x18000 0x20>; 115 reg-shift = <2>; 116 clock-frequency = <0>; 117 interrupts = <25>; 118 interrupt-parent = <&PIC>; 119 }; 120 121 serial2: serial@80000 { 122 compatible = "lpc,uart"; 123 status = "disabled"; 124 reg = <0x80000 0x20>; 125 reg-shift = <2>; 126 clock-frequency = <13000000>; 127 interrupts = <7>; 128 interrupt-parent = <&PIC>; 129 }; 130 131 serial3: serial@88000 { 132 compatible = "lpc,uart"; 133 status = "disabled"; 134 reg = <0x88000 0x20>; 135 reg-shift = <2>; 136 clock-frequency = <13000000>; 137 interrupts = <8>; 138 interrupt-parent = <&PIC>; 139 }; 140 141 serial4: serial@90000 { 142 compatible = "lpc,uart"; 143 reg = <0x90000 0x20>; 144 reg-shift = <2>; 145 clock-frequency = <13000000>; 146 current-speed = <115200>; 147 interrupts = <9>; 148 interrupt-parent = <&PIC>; 149 }; 150 151 serial5: serial@98000 { 152 compatible = "lpc,uart"; 153 status = "disabled"; 154 reg = <0x98000 0x20>; 155 reg-shift = <2>; 156 clock-frequency = <13000000>; 157 interrupts = <10>; 158 interrupt-parent = <&PIC>; 159 }; 160 161 serial6: serial@1c000 { 162 compatible = "lpc,uart"; 163 status = "disabled"; 164 reg = <0x1c000 0x20>; 165 reg-shift = <2>; 166 clock-frequency = <0>; 167 interrupts = <24>; 168 interrupt-parent = <&PIC>; 169 }; 170 171 gpio@28000 { 172 compatible = "lpc,gpio"; 173 reg = <0x28000 0x4000>; 174 }; 175 }; 176 177 ahb6@30000000 { 178 #address-cells = <1>; 179 #size-cells = <1>; 180 compatible = "simple-bus"; 181 ranges = <0x0 0x30000000 0x10000000>; 182 183 dmac@1000000 { 184 compatible = "lpc,dmac"; 185 reg = <0x1000000 0x20000>; 186 interrupts = <28>; 187 interrupt-parent = <&PIC>; 188 }; 189 190 usb@1020000 { 191 compatible = "lpc,usb-ohci", "usb-ohci"; 192 reg = <0x1020000 0x20000>; 193 interrupts = <59>; 194 interrupt-parent = <&PIC>; 195 }; 196 197 lpcfb@1040000 { 198 compatible = "lpc,fb"; 199 reg = <0x1040000 0x20000>; 200 interrupts = <14>; 201 interrupt-parent = <&PIC>; 202 203 /* Screen parameters: */ 204 is-tft = <1>; 205 horizontal-resolution = <240>; 206 vertical-resolution = <320>; 207 bits-per-pixel = <16>; 208 pixel-clock = <121654>; 209 left-margin = <28>; 210 right-margin = <10>; 211 upper-margin = <2>; 212 lower-margin = <2>; 213 hsync-len = <3>; 214 vsync-len = <2>; 215 }; 216 217 lpe@1060000 { 218 compatible = "lpc,ethernet"; 219 reg = <0x1060000 0x20000>; 220 interrupts = <29>; 221 interrupt-parent = <&PIC>; 222 local-mac-address = [ 00 1a f1 01 1f 23 ]; 223 224 mdio@0 { 225 #address-cells = <1>; 226 #size-cells = <0>; 227 compatible = "lpc,mdio"; 228 229 phy0: ethernet-phy@0 { 230 reg = <0x0>; 231 }; 232 }; 233 234 }; 235 }; 236 237 ahb5@20000000 { 238 #address-cells = <1>; 239 #size-cells = <1>; 240 compatible = "simple-bus"; 241 ranges = <0x0 0x20000000 0x10000000>; 242 243 spi0@84000 { 244 compatible = "lpc,spi"; 245 reg = <0x84000 0x4000>; 246 interrupts = <20>; 247 interrupt-parent = <&PIC>; 248 }; 249 250 spi1@8c000 { 251 compatible = "lpc,spi"; 252 status = "disabled"; 253 reg = <0x8c000 0x4000>; 254 interrupts = <21>; 255 interrupt-parent = <&PIC>; 256 }; 257 258 lpcmmc@98000 { 259 compatible = "lpc,mmc"; 260 reg = <0x98000 0x4000>; 261 interrupts = <15 13>; 262 interrupt-parent = <&PIC>; 263 }; 264 }; 265 266 chosen { 267 stdin = "serial4"; 268 stdout = "serial4"; 269 }; 270 };
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