The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dts/arm/exynos5420-arndale-octa.dts

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    1 /*-
    2  * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  *
   26  * $FreeBSD: head/sys/dts/arm/exynos5420-arndale-octa.dts 325826 2017-11-14 21:03:57Z imp $
   27  */
   28 
   29 /dts-v1/;
   30 
   31 /include/ "exynos5420.dtsi"
   32 
   33 / {
   34         model = "Arndale Octa Board";
   35 
   36         memory {
   37                 device_type = "memory";
   38                 reg = < 0x20000000 0x7f200000 >;  /* 2G */
   39         };
   40 
   41         SOC: Exynos5@0 {
   42                 serial3: serial@12C30000 {
   43                         status = "okay";
   44                 };
   45 
   46                 usb@12110000 {
   47                         status = "okay";
   48                 };
   49 
   50                 mmc2: dwmmc@12220000 {
   51                         status = "okay";
   52                         num-slots = <1>;
   53                         supports-highspeed;
   54                         samsung,dw-mshc-ciu-div = <3>;
   55                         samsung,dw-mshc-sdr-timing = <2 3>;
   56                         samsung,dw-mshc-ddr-timing = <1 2>;
   57                         bus-frequency = <50000000>;
   58 
   59                         slot@0 {
   60                                 reg = <0>;
   61                                 bus-width = <4>;
   62                         };
   63                 };
   64         };
   65 
   66         chosen {
   67                 stdin = &serial3;
   68                 stdout = &serial3;
   69         };
   70 };

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