The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dts/arm/tegra20-paz00.dts

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    1 /*-
    2  * Copyright (c) 2011 The FreeBSD Foundation
    3  * Copyright (c) 2012 Andrew Turner
    4  * All rights reserved.
    5  *
    6  * Developed by Damjan Marion <damjan.marion@gmail.com>
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  * 
   29  * $FreeBSD$
   30  */
   31 /dts-v1/;
   32 
   33 /include/ "tegra20.dtsi"
   34 
   35 / {
   36         model = "Toshiba AC100 / Dynabook AZ";
   37 
   38         aliases {
   39                 serial0 = &serial0;
   40                 soc = &SOC;
   41         };
   42 
   43         memory {
   44                 device_type = "memory";
   45                 reg = < 0x00000000 0x20000000 >;        /* 512MB RAM at 0x0 */
   46         };
   47 
   48         chosen {
   49                 stdin = "serial0";
   50                 stdout = "serial0";
   51         };
   52 
   53         SOC: tegra20@0 {
   54                 serial0: serial@70006000 {
   55                 };
   56         };
   57 };
   58 

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