1 /*-
2 * Copyright (c) 2012-2013 Robert N. M. Watson
3 * Copyright (c) 2013-2014 SRI International
4 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
5 * All rights reserved.
6 *
7 * This software was developed by SRI International and the University of
8 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
9 * ("CTSRD"), as part of the DARPA CRASH research programme.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 * $FreeBSD$
33 */
34
35 /dts-v1/;
36
37 /*
38 * Device names here have been largely made up on the spot, especially for the
39 * "compatible" strings, and might want to be revised.
40 */
41
42 / {
43 model = "SRI/Cambridge BeriPad (SoCKit)";
44 compatible = "sri-cambridge,beripad-sockit";
45 #address-cells = <1>;
46 #size-cells = <1>;
47
48 cpus {
49 #address-cells = <1>;
50 #size-cells = <1>;
51
52 /*
53 * Secondary CPUs all start disabled and use the
54 * spin-table enable method. cpu-release-addr must be
55 * specified for each cpu other than cpu@0. Values of
56 * cpu-release-addr grow down from 0x100000 (kernel).
57 */
58 status = "disabled";
59 enable-method = "spin-table";
60
61 cpu@0 {
62 device-type = "cpu";
63 compatible = "sri-cambridge,beri";
64
65 reg = <0 1>;
66 status = "okay";
67 };
68
69 /*
70 cpu@1 {
71 device-type = "cpu";
72 compatible = "sri-cambridge,beri";
73
74 reg = <1 1>;
75 // XXX: should we need cached prefix?
76 cpu-release-addr = <0xffffffff 0x800fffe0>;
77 };
78 */
79 };
80
81 memory {
82 device_type = "memory";
83 reg = <0x0 0x10000000>; /* 256MB at 0x0 */
84 };
85
86 cpuintc: cpuintc@0 {
87 #address-cells = <0>;
88 #interrupt-cells = <1>;
89 interrupt-controller;
90 compatible = "mti,cpu-interrupt-controller";
91 };
92
93 beripic0: beripic@7f804000 {
94 compatible = "sri-cambridge,beri-pic";
95 interrupt-controller;
96 #address-cells = <0>;
97 #interrupt-cells = <1>;
98 reg = <0x0 0x7f804000 0x0 0x400
99 0x0 0x7f806000 0x0 0x10
100 0x0 0x7f806080 0x0 0x10
101 0x0 0x7f806100 0x0 0x10>;
102 interrupts = < 2 3 4 5 6 >;
103 hard-interrupt-sources = <64>;
104 soft-interrupt-sources = <64>;
105 interrupt-parent = <&cpuintc>;
106 };
107
108 soc {
109 #address-cells = <2>;
110 #size-cells = <2>;
111 #interrupt-cells = <1>;
112
113 compatible = "simple-bus", "mips,mips4k";
114 ranges;
115
116 pio0: pio@7f020000 {
117 compatible = "altr,pio";
118 reg = <0x0 0x7f020000 0x0 0x1000>; /* send */
119 interrupts = <4>; /* not used */
120 interrupt-parent = <&beripic0>;
121 };
122
123 pio1: pio@7f021000 {
124 compatible = "altr,pio";
125 reg = <0x0 0x7f021000 0x0 0x1000>; /* recv */
126 interrupts = <10>;
127 interrupt-parent = <&beripic0>;
128 };
129
130 pio2: pio@7f022000 {
131 compatible = "altr,pio";
132 reg = <0x0 0x7f022000 0x0 0x1000>; /* send */
133 interrupts = <5>; /* not used */
134 interrupt-parent = <&beripic0>;
135 };
136
137 pio3: pio@7f023000 {
138 compatible = "altr,pio";
139 reg = <0x0 0x7f023000 0x0 0x1000>; /* recv */
140 interrupts = <11>;
141 interrupt-parent = <&beripic0>;
142 };
143
144 virtio_mmio_platform0: virtio_mmio_platform@0 {
145 compatible = "beri,virtio_mmio_platform";
146 pio-send = <&pio0>;
147 pio-recv = <&pio1>;
148 };
149
150 virtio_mmio_platform1: virtio_mmio_platform@1 {
151 compatible = "beri,virtio_mmio_platform";
152 pio-send = <&pio2>;
153 pio-recv = <&pio3>;
154 };
155
156 virtio_block@200001000 {
157 compatible = "virtio,mmio";
158 reg = <0x2 0x1000 0x0 0x1000>;
159 platform = <&virtio_mmio_platform0>;
160 status = "okay";
161 };
162
163 virtio_net@200002000 {
164 compatible = "virtio,mmio";
165 reg = <0x2 0x2000 0x0 0x1000>;
166 platform = <&virtio_mmio_platform1>;
167 status = "okay";
168 };
169
170 serial@7f000000 {
171 compatible = "altera,jtag_uart-11_0";
172 reg = <0x0 0x7f000000 0x0 0x40>;
173 interrupts = <0>;
174 interrupt-parent = <&beripic0>;
175 };
176
177 /*
178 serial@7f001000 {
179 compatible = "altera,jtag_uart-11_0";
180 reg = <0x7f001000 0x40>;
181 };
182
183 serial@7f002000 {
184 compatible = "altera,jtag_uart-11_0";
185 reg = <0x7f002000 0x40>;
186 };
187 */
188
189 /*
190 led@7f006000 {
191 compatible = "sri-cambridge,de4led";
192 reg = <0x7f006000 0x1>;
193 };
194 */
195
196 /*
197 avgen@0x7f009000 {
198 compatible = "sri-cambridge,avgen";
199 reg = <0x7f009000 0x2>;
200 sri-cambridge,width = <1>;
201 sri-cambridge,fileio = "r";
202 sri-cambridge,devname = "de4bsw";
203 };
204 */
205
206 /*
207 berirom@0x7f00a000 {
208 compatible = "sri-cambridge,berirom";
209 reg = <0x7f00a000 0x1000>;
210 };
211 */
212
213 /*
214 avgen@0x7f00c000 {
215 compatible = "sri-cambridge,avgen";
216 reg = <0x7f00c000 0x8>;
217 sri-cambridge,width = <4>;
218 sri-cambridge,fileio = "rw";
219 sri-cambridge,devname = "de4tempfan";
220 };
221 */
222 };
223 };
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