The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/i386/cpufreq/smist.c

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    1 /*-
    2  * Copyright (c) 2005 Bruno Ducrot
    3  *
    4  * Redistribution and use in source and binary forms, with or without
    5  * modification, are permitted provided that the following conditions
    6  * are met:
    7  * 1. Redistributions of source code must retain the above copyright
    8  *    notice, this list of conditions and the following disclaimer.
    9  * 2. Redistributions in binary form must reproduce the above copyright
   10  *    notice, this list of conditions and the following disclaimer in the
   11  *    documentation and/or other materials provided with the distribution.
   12  *
   13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   14  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   15  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   16  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   17  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   18  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   19  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   20  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   21  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   22  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   23  */
   24 
   25 /*
   26  * This driver is based upon information found by examining speedstep-0.5
   27  * from Marc Lehman, which includes all the reverse engineering effort of
   28  * Malik Martin (function 1 and 2 of the GSI).
   29  *
   30  * The correct way for the OS to take ownership from the BIOS was found by
   31  * Hiroshi Miura (function 0 of the GSI).
   32  *
   33  * Finally, the int 15h call interface was (partially) documented by Intel.
   34  *
   35  * Many thanks to Jon Noack for testing and debugging this driver.
   36  */
   37 
   38 #include <sys/cdefs.h>
   39 __FBSDID("$FreeBSD$");
   40 
   41 #include <sys/param.h>
   42 #include <sys/bus.h>
   43 #include <sys/cpu.h>
   44 #include <sys/kernel.h>
   45 #include <sys/lock.h>
   46 #include <sys/module.h>
   47 #include <sys/mutex.h>
   48 #include <sys/systm.h>
   49 
   50 #include <machine/bus.h>
   51 #include <machine/md_var.h>
   52 #include <machine/vm86.h>
   53 
   54 #include <dev/pci/pcivar.h>
   55 #include <dev/pci/pcireg.h>
   56 
   57 #include <vm/vm.h>
   58 #include <vm/pmap.h>
   59 
   60 #include "cpufreq_if.h"
   61 
   62 #if 0
   63 #define DPRINT(dev, x...)       device_printf(dev, x)
   64 #else
   65 #define DPRINT(dev, x...)
   66 #endif
   67 
   68 struct smist_softc {
   69         device_t                 dev;
   70         int                      smi_cmd;
   71         int                      smi_data;
   72         int                      command;
   73         int                      flags;
   74         struct cf_setting        sets[2];       /* Only two settings. */
   75 };
   76 
   77 static char smist_magic[] = "Copyright (c) 1999 Intel Corporation";
   78 
   79 static void     smist_identify(driver_t *driver, device_t parent);
   80 static int      smist_probe(device_t dev);
   81 static int      smist_attach(device_t dev);
   82 static int      smist_detach(device_t dev);
   83 static int      smist_settings(device_t dev, struct cf_setting *sets,
   84                     int *count);
   85 static int      smist_set(device_t dev, const struct cf_setting *set);
   86 static int      smist_get(device_t dev, struct cf_setting *set);
   87 static int      smist_type(device_t dev, int *type);
   88 
   89 static device_method_t smist_methods[] = {
   90         /* Device interface */
   91         DEVMETHOD(device_identify,      smist_identify),
   92         DEVMETHOD(device_probe,         smist_probe),
   93         DEVMETHOD(device_attach,        smist_attach),
   94         DEVMETHOD(device_detach,        smist_detach),
   95 
   96         /* cpufreq interface */
   97         DEVMETHOD(cpufreq_drv_set,      smist_set),
   98         DEVMETHOD(cpufreq_drv_get,      smist_get),
   99         DEVMETHOD(cpufreq_drv_type,     smist_type),
  100         DEVMETHOD(cpufreq_drv_settings, smist_settings),
  101 
  102         {0, 0}
  103 };
  104 
  105 static driver_t smist_driver = {
  106         "smist", smist_methods, sizeof(struct smist_softc)
  107 };
  108 static devclass_t smist_devclass;
  109 DRIVER_MODULE(smist, cpu, smist_driver, smist_devclass, 0, 0);
  110 
  111 struct piix4_pci_device {
  112         uint16_t                 vendor;
  113         uint16_t                 device;
  114         char                    *desc;
  115 };
  116 
  117 static struct piix4_pci_device piix4_pci_devices[] = {
  118         {0x8086, 0x7113, "Intel PIIX4 ISA bridge"},
  119         {0x8086, 0x719b, "Intel PIIX4 ISA bridge (embedded in MX440 chipset)"},
  120 
  121         {0, 0, NULL},
  122 };
  123 
  124 #define SET_OWNERSHIP           0
  125 #define GET_STATE               1
  126 #define SET_STATE               2
  127 
  128 static int
  129 int15_gsic_call(int *sig, int *smi_cmd, int *command, int *smi_data, int *flags)
  130 {
  131         struct vm86frame vmf;
  132 
  133         bzero(&vmf, sizeof(vmf));
  134         vmf.vmf_eax = 0x0000E980;       /* IST support */
  135         vmf.vmf_edx = 0x47534943;       /* 'GSIC' in ASCII */
  136         vm86_intcall(0x15, &vmf);
  137 
  138         if (vmf.vmf_eax == 0x47534943) {
  139                 *sig = vmf.vmf_eax;
  140                 *smi_cmd = vmf.vmf_ebx & 0xff;
  141                 *command = (vmf.vmf_ebx >> 16) & 0xff;
  142                 *smi_data = vmf.vmf_ecx;
  143                 *flags = vmf.vmf_edx;
  144         } else {
  145                 *sig = -1;
  146                 *smi_cmd = -1;
  147                 *command = -1;
  148                 *smi_data = -1;
  149                 *flags = -1;
  150         }
  151 
  152         return (0);
  153 }
  154 
  155 /* Temporary structure to hold mapped page and status. */
  156 struct set_ownership_data {
  157         int     smi_cmd;
  158         int     command;
  159         int     result;
  160         void    *buf;
  161 };
  162 
  163 /* Perform actual SMI call to enable SpeedStep. */
  164 static void
  165 set_ownership_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
  166 {
  167         struct set_ownership_data *data;
  168 
  169         data = arg;
  170         if (error) {
  171                 data->result = error;
  172                 return;
  173         }
  174 
  175         /* Copy in the magic string and send it by writing to the SMI port. */
  176         strlcpy(data->buf, smist_magic, PAGE_SIZE);
  177         __asm __volatile(
  178             "movl $-1, %%edi\n\t"
  179             "out %%al, (%%dx)\n"
  180             : "=D" (data->result)
  181             : "a" (data->command),
  182               "b" (0),
  183               "c" (0),
  184               "d" (data->smi_cmd),
  185               "S" ((uint32_t)segs[0].ds_addr)
  186         );
  187 }
  188 
  189 static int
  190 set_ownership(device_t dev)
  191 {
  192         struct smist_softc *sc;
  193         struct set_ownership_data cb_data;
  194         bus_dma_tag_t tag;
  195         bus_dmamap_t map;
  196 
  197         /*
  198          * Specify the region to store the magic string.  Since its address is
  199          * passed to the BIOS in a 32-bit register, we have to make sure it is
  200          * located in a physical page below 4 GB (i.e., for PAE.)
  201          */
  202         sc = device_get_softc(dev);
  203         if (bus_dma_tag_create(/*parent*/ NULL,
  204             /*alignment*/ PAGE_SIZE, /*no boundary*/ 0,
  205             /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, /*highaddr*/ BUS_SPACE_MAXADDR,
  206             NULL, NULL, /*maxsize*/ PAGE_SIZE, /*segments*/ 1,
  207             /*maxsegsize*/ PAGE_SIZE, 0, busdma_lock_mutex, &Giant,
  208             &tag) != 0) {
  209                 device_printf(dev, "can't create mem tag\n");
  210                 return (ENXIO);
  211         }
  212         if (bus_dmamem_alloc(tag, &cb_data.buf, BUS_DMA_NOWAIT, &map) != 0) {
  213                 bus_dma_tag_destroy(tag);
  214                 device_printf(dev, "can't alloc mapped mem\n");
  215                 return (ENXIO);
  216         }
  217 
  218         /* Load the physical page map and take ownership in the callback. */
  219         cb_data.smi_cmd = sc->smi_cmd;
  220         cb_data.command = sc->command;
  221         if (bus_dmamap_load(tag, map, cb_data.buf, PAGE_SIZE, set_ownership_cb,
  222             &cb_data, BUS_DMA_NOWAIT) != 0) {
  223                 bus_dmamem_free(tag, cb_data.buf, map);
  224                 bus_dma_tag_destroy(tag);
  225                 device_printf(dev, "can't load mem\n");
  226                 return (ENXIO);
  227         };
  228         DPRINT(dev, "taking ownership over BIOS return %d\n", cb_data.result);
  229         bus_dmamap_unload(tag, map);
  230         bus_dmamem_free(tag, cb_data.buf, map);
  231         bus_dma_tag_destroy(tag);
  232         return (cb_data.result ? ENXIO : 0);
  233 }
  234 
  235 static int
  236 getset_state(struct smist_softc *sc, int *state, int function)
  237 {
  238         int new_state;
  239         int result;
  240         int eax;
  241 
  242         if (!sc)
  243                 return (ENXIO);
  244 
  245         if (function != GET_STATE && function != SET_STATE)
  246                 return (EINVAL);
  247 
  248         DPRINT(sc->dev, "calling GSI\n");
  249 
  250         __asm __volatile(
  251              "movl $-1, %%edi\n\t"
  252              "out %%al, (%%dx)\n"
  253            : "=a" (eax),
  254              "=b" (new_state),
  255              "=D" (result)
  256            : "a" (sc->command),
  257              "b" (function),
  258              "c" (*state),
  259              "d" (sc->smi_cmd)
  260         );
  261 
  262         DPRINT(sc->dev, "GSI returned: eax %.8x ebx %.8x edi %.8x\n",
  263             eax, new_state, result);
  264 
  265         *state = new_state & 1;
  266 
  267         switch (function) {
  268         case GET_STATE:
  269                 if (eax)
  270                         return (ENXIO);
  271                 break;
  272         case SET_STATE:
  273                 if (result)
  274                         return (ENXIO);
  275                 break;
  276         }
  277         return (0);
  278 }
  279 
  280 static void
  281 smist_identify(driver_t *driver, device_t parent)
  282 {
  283         struct piix4_pci_device *id;
  284         device_t piix4 = NULL;
  285 
  286         if (resource_disabled("ichst", 0))
  287                 return;
  288 
  289         /* Check for a supported processor */
  290         if (strcmp(cpu_vendor, "GenuineIntel") != 0)
  291                 return;
  292         switch (cpu_id & 0xff0) {
  293         case 0x680:     /* Pentium III [coppermine] */
  294         case 0x6a0:     /* Pentium III [Tualatin] */
  295                 break;
  296         default:
  297                 return;
  298         }
  299 
  300         /* Check for a supported PCI-ISA bridge */
  301         for (id = piix4_pci_devices; id->desc != NULL; ++id) {
  302                 if ((piix4 = pci_find_device(id->vendor, id->device)) != NULL)
  303                         break;
  304         }
  305         if (!piix4)
  306                 return;
  307 
  308         if (bootverbose)
  309                 printf("smist: found supported isa bridge %s\n", id->desc);
  310 
  311         if (device_find_child(parent, "smist", -1) != NULL)
  312                 return;
  313         if (BUS_ADD_CHILD(parent, 0, "smist", -1) == NULL)
  314                 device_printf(parent, "smist: add child failed\n");
  315 }
  316 
  317 static int
  318 smist_probe(device_t dev)
  319 {
  320         struct smist_softc *sc;
  321         device_t ichss_dev, perf_dev;
  322         int sig, smi_cmd, command, smi_data, flags;
  323         int type;
  324         int rv;
  325 
  326         if (resource_disabled("smist", 0))
  327                 return (ENXIO);
  328 
  329         sc = device_get_softc(dev);
  330 
  331         /*
  332          * If the ACPI perf or ICH SpeedStep drivers have attached and not
  333          * just offering info, let them manage things.
  334          */
  335         perf_dev = device_find_child(device_get_parent(dev), "acpi_perf", -1);
  336         if (perf_dev && device_is_attached(perf_dev)) {
  337                 rv = CPUFREQ_DRV_TYPE(perf_dev, &type);
  338                 if (rv == 0 && (type & CPUFREQ_FLAG_INFO_ONLY) == 0)
  339                         return (ENXIO);
  340         }
  341         ichss_dev = device_find_child(device_get_parent(dev), "ichss", -1);
  342         if (ichss_dev && device_is_attached(ichss_dev))
  343                 return (ENXIO);
  344 
  345         int15_gsic_call(&sig, &smi_cmd, &command, &smi_data, &flags);
  346         if (bootverbose)
  347                 device_printf(dev, "sig %.8x smi_cmd %.4x command %.2x "
  348                     "smi_data %.4x flags %.8x\n",
  349                     sig, smi_cmd, command, smi_data, flags);
  350 
  351         if (sig != -1) {
  352                 sc->smi_cmd = smi_cmd;
  353                 sc->smi_data = smi_data;
  354 
  355                 /*
  356                  * Sometimes int 15h 'GSIC' returns 0x80 for command, when
  357                  * it is actually 0x82.  The Windows driver will overwrite
  358                  * this value given by the registry.
  359                  */
  360                 if (command == 0x80) {
  361                         device_printf(dev,
  362                             "GSIC returned cmd 0x80, should be 0x82\n");
  363                         command = 0x82;
  364                 }
  365                 sc->command = (sig & 0xffffff00) | (command & 0xff);
  366                 sc->flags = flags;
  367         } else {
  368                 /* Give some default values */
  369                 sc->smi_cmd = 0xb2;
  370                 sc->smi_data = 0xb3;
  371                 sc->command = 0x47534982;
  372                 sc->flags = 0;
  373         }
  374 
  375         device_set_desc(dev, "SpeedStep SMI");
  376 
  377         return (-1500);
  378 }
  379 
  380 static int
  381 smist_attach(device_t dev)
  382 {
  383         struct smist_softc *sc;
  384 
  385         sc = device_get_softc(dev);
  386         sc->dev = dev;
  387 
  388         /* If we can't take ownership over BIOS, then bail out */
  389         if (set_ownership(dev) != 0)
  390                 return (ENXIO);
  391 
  392         /* Setup some defaults for our exported settings. */
  393         sc->sets[0].freq = CPUFREQ_VAL_UNKNOWN;
  394         sc->sets[0].volts = CPUFREQ_VAL_UNKNOWN;
  395         sc->sets[0].power = CPUFREQ_VAL_UNKNOWN;
  396         sc->sets[0].lat = 1000;
  397         sc->sets[0].dev = dev;
  398         sc->sets[1] = sc->sets[0];
  399 
  400         cpufreq_register(dev);
  401 
  402         return (0);
  403 }
  404 
  405 static int
  406 smist_detach(device_t dev)
  407 {
  408 
  409         return (cpufreq_unregister(dev));
  410 }
  411 
  412 static int
  413 smist_settings(device_t dev, struct cf_setting *sets, int *count)
  414 {
  415         struct smist_softc *sc;
  416         struct cf_setting set;
  417         int first, i;
  418 
  419         if (sets == NULL || count == NULL)
  420                 return (EINVAL);
  421         if (*count < 2) {
  422                 *count = 2;
  423                 return (E2BIG);
  424         }
  425         sc = device_get_softc(dev);
  426 
  427         /*
  428          * Estimate frequencies for both levels, temporarily switching to
  429          * the other one if we haven't calibrated it yet.
  430          */
  431         for (i = 0; i < 2; i++) {
  432                 if (sc->sets[i].freq == CPUFREQ_VAL_UNKNOWN) {
  433                         first = (i == 0) ? 1 : 0;
  434                         smist_set(dev, &sc->sets[i]);
  435                         smist_get(dev, &set);
  436                         smist_set(dev, &sc->sets[first]);
  437                 }
  438         }
  439 
  440         bcopy(sc->sets, sets, sizeof(sc->sets));
  441         *count = 2;
  442 
  443         return (0);
  444 }
  445 
  446 static int
  447 smist_set(device_t dev, const struct cf_setting *set)
  448 {
  449         struct smist_softc *sc;
  450         int rv, state, req_state, try;
  451 
  452         /* Look up appropriate bit value based on frequency. */
  453         sc = device_get_softc(dev);
  454         if (CPUFREQ_CMP(set->freq, sc->sets[0].freq))
  455                 req_state = 0;
  456         else if (CPUFREQ_CMP(set->freq, sc->sets[1].freq))
  457                 req_state = 1;
  458         else
  459                 return (EINVAL);
  460 
  461         DPRINT(dev, "requested setting %d\n", req_state);
  462 
  463         rv = getset_state(sc, &state, GET_STATE);
  464         if (state == req_state)
  465                 return (0);
  466 
  467         try = 3;
  468         do {
  469                 rv = getset_state(sc, &req_state, SET_STATE);
  470 
  471                 /* Sleep for 200 microseconds.  This value is just a guess. */
  472                 if (rv)
  473                         DELAY(200);
  474         } while (rv && --try);
  475         DPRINT(dev, "set_state return %d, tried %d times\n",
  476             rv, 4 - try);
  477 
  478         return (rv);
  479 }
  480 
  481 static int
  482 smist_get(device_t dev, struct cf_setting *set)
  483 {
  484         struct smist_softc *sc;
  485         uint64_t rate;
  486         int state;
  487         int rv;
  488 
  489         sc = device_get_softc(dev);
  490         rv = getset_state(sc, &state, GET_STATE);
  491         if (rv != 0)
  492                 return (rv);
  493 
  494         /* If we haven't changed settings yet, estimate the current value. */
  495         if (sc->sets[state].freq == CPUFREQ_VAL_UNKNOWN) {
  496                 cpu_est_clockrate(0, &rate);
  497                 sc->sets[state].freq = rate / 1000000;
  498                 DPRINT(dev, "get calibrated new rate of %d\n",
  499                     sc->sets[state].freq);
  500         }
  501         *set = sc->sets[state];
  502 
  503         return (0);
  504 }
  505 
  506 static int
  507 smist_type(device_t dev, int *type)
  508 {
  509 
  510         if (type == NULL)
  511                 return (EINVAL);
  512 
  513         *type = CPUFREQ_TYPE_ABSOLUTE;
  514         return (0);
  515 }

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