The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/i386/hardclock.c

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    1 /* 
    2  * Mach Operating System
    3  * Copyright (c) 1991,1990 Carnegie Mellon University
    4  * Copyright (c) 1991 IBM Corporation 
    5  * All Rights Reserved.
    6  * 
    7  * Permission to use, copy, modify and distribute this software and its
    8  * documentation is hereby granted, provided that both the copyright
    9  * notice and this permission notice appear in all copies of the
   10  * software, derivative works or modified versions, and any portions
   11  * thereof, and that both notices appear in supporting documentation,
   12  * and that the name IBM not be used in advertising or publicity 
   13  * pertaining to distribution of the software without specific, written
   14  * prior permission.
   15  * 
   16  * CARNEGIE MELLON AND IBM ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS"
   17  * CONDITION.  CARNEGIE MELLON AND IBM DISCLAIM ANY LIABILITY OF ANY KIND FOR
   18  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
   19  * 
   20  * Carnegie Mellon requests users of this software to return to
   21  * 
   22  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
   23  *  School of Computer Science
   24  *  Carnegie Mellon University
   25  *  Pittsburgh PA 15213-3890
   26  * 
   27  * any improvements or extensions that they make and grant Carnegie Mellon
   28  * the rights to redistribute these changes.
   29  */
   30 
   31 
   32 /*
   33  * HISTORY
   34  * $Log:        hardclock.c,v $
   35  * Revision 2.9  93/02/04  07:56:18  danner
   36  *      Integrate PS2 and non PS2 cases into one routine.
   37  *      [93/01/25            rvb]
   38  * 
   39  *      Don't check for SPL 0 here.  Interrupt return code checks
   40  *      for pending softclock interrupt.
   41  *      [92/04/19            dbg@ibm]
   42  * 
   43  *      PS2-only version.  Different interrupt stack format,
   44  *      clock interrupt reset code.  Does NOT use ABIOS.
   45  *      [92/03/30            dbg@ibm]
   46  * 
   47  * Revision 2.8  91/07/31  17:36:33  dbg
   48  *      New interrupt save area.
   49  *      [91/07/30  16:50:59  dbg]
   50  * 
   51  * Revision 2.7  91/06/19  11:55:09  rvb
   52  *      cputypes.h->platforms.h
   53  *      [91/06/12  13:44:49  rvb]
   54  * 
   55  * Revision 2.6  91/05/14  16:08:38  mrt
   56  *      Correcting copyright
   57  * 
   58  * Revision 2.5  91/05/08  12:37:56  dbg
   59  *      Include sqt/intctl.h if building for Sequent.
   60  *      [91/03/21            dbg]
   61  * 
   62  * Revision 2.4  91/02/05  17:12:01  mrt
   63  *      Changed to new Mach copyright
   64  *      [91/02/01  17:34:29  mrt]
   65  * 
   66  * Revision 2.3  91/01/08  17:32:02  rpd
   67  *      EFL_VM => user_mode
   68  *      [90/12/21  10:50:54  rvb]
   69  * 
   70  * Revision 2.2  90/05/03  15:27:35  dbg
   71  *      Created.
   72  *      [90/03/06            dbg]
   73  * 
   74  */
   75 
   76 /*
   77  * Clock interrupt.
   78  */
   79 #include <platforms.h>
   80 
   81 #include <kern/time_out.h>
   82 #include <i386/thread.h>
   83 #include <i386/eflags.h>
   84 
   85 #ifdef  SYMMETRY
   86 #include <sqt/intctl.h>
   87 #endif
   88 #if     defined(AT386) || defined(iPSC386)
   89 #include <i386/ipl.h>
   90 #endif
   91 #ifdef  PS2
   92 #include <i386/pic.h>
   93 #include <i386/pio.h>
   94 #endif  PS2
   95 
   96 extern void     clock_interrupt();
   97 extern char     return_to_iret[];
   98 
   99 void
  100 #ifdef  PS2
  101 hardclock(iunit, ivect, old_ipl, ret_addr, regs)
  102         int     iunit;          /* 'unit' number */
  103         int     ivect;          /* interrupt number */
  104 #else   /* PS2 */
  105 hardclock(iunit,        old_ipl, ret_addr, regs)
  106         int     iunit;          /* 'unit' number */
  107         int     old_ipl;        /* old interrupt level */
  108 #endif  /* PS2 */
  109         char *  ret_addr;       /* return address in interrupt handler */
  110         struct i386_interrupt_state *regs;
  111                                 /* saved registers */
  112 {
  113         if (ret_addr == return_to_iret)
  114             /*
  115              * Interrupt from user mode or from thread stack.
  116              */
  117             clock_interrupt(tick,                       /* usec per tick */
  118                             (regs->efl & EFL_VM) ||     /* user mode */
  119                             ((regs->cs & 0x03) != 0),   /* user mode */
  120 #ifdef  PS2
  121                             FALSE                       /* ignore SPL0 */
  122 #else   /* PS2 */
  123                             old_ipl == SPL0             /* base priority */
  124 #endif  /* PS2 */
  125                             );
  126         else
  127             /*
  128              * Interrupt from interrupt stack.
  129              */
  130             clock_interrupt(tick,                       /* usec per tick */
  131                             FALSE,                      /* kernel mode */
  132                             FALSE);                     /* not SPL0 */
  133 
  134 #ifdef  PS2
  135         /*
  136          * Reset the clock interrupt line.
  137          */
  138         outb(0x61, inb(0x61) | 0x80);
  139 #endif  /* PS2 */
  140 }                               

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