The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/apic_vector.s

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    1 /*-
    2  * Copyright (c) 1989, 1990 William F. Jolitz.
    3  * Copyright (c) 1990 The Regents of the University of California.
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  * 4. Neither the name of the University nor the names of its contributors
   15  *    may be used to endorse or promote products derived from this software
   16  *    without specific prior written permission.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  *
   30  *      from: vector.s, 386BSD 0.1 unknown origin
   31  * $FreeBSD: releng/10.3/sys/i386/i386/apic_vector.s 283280 2015-05-22 09:03:55Z whu $
   32  */
   33 
   34 /*
   35  * Interrupt entry points for external interrupts triggered by I/O APICs
   36  * as well as IPI handlers.
   37  */
   38 
   39 #include "opt_smp.h"
   40 
   41 #include <machine/asmacros.h>
   42 #include <x86/apicreg.h>
   43 
   44 #include "assym.s"
   45 
   46 /*
   47  * I/O Interrupt Entry Point.  Rather than having one entry point for
   48  * each interrupt source, we use one entry point for each 32-bit word
   49  * in the ISR.  The handler determines the highest bit set in the ISR,
   50  * translates that into a vector, and passes the vector to the
   51  * lapic_handle_intr() function.
   52  */
   53 #define ISR_VEC(index, vec_name)                                        \
   54         .text ;                                                         \
   55         SUPERALIGN_TEXT ;                                               \
   56 IDTVEC(vec_name) ;                                                      \
   57         PUSH_FRAME ;                                                    \
   58         SET_KERNEL_SREGS ;                                              \
   59         cld ;                                                           \
   60         FAKE_MCOUNT(TF_EIP(%esp)) ;                                     \
   61         movl    lapic, %edx ;   /* pointer to local APIC */             \
   62         movl    LA_ISR + 16 * (index)(%edx), %eax ;     /* load ISR */  \
   63         bsrl    %eax, %eax ;    /* index of highest set bit in ISR */   \
   64         jz      1f ;                                                    \
   65         addl    $(32 * index),%eax ;                                    \
   66         pushl   %esp            ;                                       \
   67         pushl   %eax ;          /* pass the IRQ */                      \
   68         call    lapic_handle_intr ;                                     \
   69         addl    $8, %esp ;      /* discard parameter */                 \
   70 1: ;                                                                    \
   71         MEXITCOUNT ;                                                    \
   72         jmp     doreti
   73 
   74 /*
   75  * Handle "spurious INTerrupts".
   76  * Notes:
   77  *  This is different than the "spurious INTerrupt" generated by an
   78  *   8259 PIC for missing INTs.  See the APIC documentation for details.
   79  *  This routine should NOT do an 'EOI' cycle.
   80  */
   81         .text
   82         SUPERALIGN_TEXT
   83 IDTVEC(spuriousint)
   84 
   85         /* No EOI cycle used here */
   86 
   87         iret
   88 
   89         ISR_VEC(1, apic_isr1)
   90         ISR_VEC(2, apic_isr2)
   91         ISR_VEC(3, apic_isr3)
   92         ISR_VEC(4, apic_isr4)
   93         ISR_VEC(5, apic_isr5)
   94         ISR_VEC(6, apic_isr6)
   95         ISR_VEC(7, apic_isr7)
   96 
   97 /*
   98  * Local APIC periodic timer handler.
   99  */
  100         .text
  101         SUPERALIGN_TEXT
  102 IDTVEC(timerint)
  103         PUSH_FRAME
  104         SET_KERNEL_SREGS
  105         cld
  106         FAKE_MCOUNT(TF_EIP(%esp))
  107         pushl   %esp
  108         call    lapic_handle_timer
  109         add     $4, %esp
  110         MEXITCOUNT
  111         jmp     doreti
  112 
  113 /*
  114  * Local APIC CMCI handler.
  115  */
  116         .text
  117         SUPERALIGN_TEXT
  118 IDTVEC(cmcint)
  119         PUSH_FRAME
  120         SET_KERNEL_SREGS
  121         cld
  122         FAKE_MCOUNT(TF_EIP(%esp))
  123         call    lapic_handle_cmc
  124         MEXITCOUNT
  125         jmp     doreti
  126 
  127 /*
  128  * Local APIC error interrupt handler.
  129  */
  130         .text
  131         SUPERALIGN_TEXT
  132 IDTVEC(errorint)
  133         PUSH_FRAME
  134         SET_KERNEL_SREGS
  135         cld
  136         FAKE_MCOUNT(TF_EIP(%esp))
  137         call    lapic_handle_error
  138         MEXITCOUNT
  139         jmp     doreti
  140 
  141 #ifdef XENHVM
  142 /*
  143  * Xen event channel upcall interrupt handler.
  144  * Only used when the hypervisor supports direct vector callbacks.
  145  */
  146         .text
  147         SUPERALIGN_TEXT
  148 IDTVEC(xen_intr_upcall)
  149         PUSH_FRAME
  150         SET_KERNEL_SREGS
  151         cld
  152         FAKE_MCOUNT(TF_EIP(%esp))
  153         pushl   %esp
  154         call    xen_intr_handle_upcall
  155         add     $4, %esp
  156         MEXITCOUNT
  157         jmp     doreti
  158 #endif
  159 
  160 #ifdef HYPERV
  161 /*
  162  * This is the Hyper-V vmbus channel direct callback interrupt.
  163  * Only used when it is running on Hyper-V.
  164  */
  165         .text
  166         SUPERALIGN_TEXT
  167 IDTVEC(hv_vmbus_callback)
  168         PUSH_FRAME
  169         SET_KERNEL_SREGS
  170         cld
  171         FAKE_MCOUNT(TF_EIP(%esp))
  172         pushl   %esp
  173         call    hv_vector_handler
  174         add     $4, %esp
  175         MEXITCOUNT
  176         jmp     doreti
  177 #endif
  178 
  179 #ifdef SMP
  180 /*
  181  * Global address space TLB shootdown.
  182  */
  183         .text
  184         SUPERALIGN_TEXT
  185 invltlb_ret:
  186         movl    lapic, %eax
  187         movl    $0, LA_EOI(%eax)        /* End Of Interrupt to APIC */
  188         POP_FRAME
  189         iret
  190 
  191         SUPERALIGN_TEXT
  192 IDTVEC(invltlb)
  193         PUSH_FRAME
  194         SET_KERNEL_SREGS
  195         cld
  196 
  197         call    invltlb_handler
  198 
  199         jmp     invltlb_ret
  200 
  201 /*
  202  * Single page TLB shootdown
  203  */
  204         .text
  205         SUPERALIGN_TEXT
  206 IDTVEC(invlpg)
  207         PUSH_FRAME
  208         SET_KERNEL_SREGS
  209         cld
  210 
  211         call    invlpg_handler
  212 
  213         jmp     invltlb_ret
  214 
  215 /*
  216  * Page range TLB shootdown.
  217  */
  218         .text
  219         SUPERALIGN_TEXT
  220 IDTVEC(invlrng)
  221         PUSH_FRAME
  222         SET_KERNEL_SREGS
  223         cld
  224 
  225         call    invlrng_handler
  226 
  227         jmp     invltlb_ret
  228 
  229 /*
  230  * Invalidate cache.
  231  */
  232         .text
  233         SUPERALIGN_TEXT
  234 IDTVEC(invlcache)
  235         PUSH_FRAME
  236         SET_KERNEL_SREGS
  237         cld
  238 
  239         call    invlcache_handler
  240 
  241         jmp     invltlb_ret
  242 
  243 /*
  244  * Handler for IPIs sent via the per-cpu IPI bitmap.
  245  */
  246 #ifndef XEN
  247         .text
  248         SUPERALIGN_TEXT
  249 IDTVEC(ipi_intr_bitmap_handler) 
  250         PUSH_FRAME
  251         SET_KERNEL_SREGS
  252         cld
  253 
  254         movl    lapic, %edx
  255         movl    $0, LA_EOI(%edx)        /* End Of Interrupt to APIC */
  256         
  257         FAKE_MCOUNT(TF_EIP(%esp))
  258 
  259         call    ipi_bitmap_handler
  260         MEXITCOUNT
  261         jmp     doreti
  262 #endif
  263 /*
  264  * Executed by a CPU when it receives an IPI_STOP from another CPU.
  265  */
  266         .text
  267         SUPERALIGN_TEXT
  268 IDTVEC(cpustop)
  269         PUSH_FRAME
  270         SET_KERNEL_SREGS
  271         cld
  272 
  273         movl    lapic, %eax
  274         movl    $0, LA_EOI(%eax)        /* End Of Interrupt to APIC */
  275 
  276         call    cpustop_handler
  277 
  278         POP_FRAME
  279         iret
  280 
  281 /*
  282  * Executed by a CPU when it receives an IPI_SUSPEND from another CPU.
  283  */
  284 #ifndef XEN
  285         .text
  286         SUPERALIGN_TEXT
  287 IDTVEC(cpususpend)
  288         PUSH_FRAME
  289         SET_KERNEL_SREGS
  290         cld
  291 
  292         movl    lapic, %eax
  293         movl    $0, LA_EOI(%eax)        /* End Of Interrupt to APIC */
  294 
  295         call    cpususpend_handler
  296 
  297         POP_FRAME
  298         jmp     doreti_iret
  299 #endif
  300 
  301 /*
  302  * Executed by a CPU when it receives a RENDEZVOUS IPI from another CPU.
  303  *
  304  * - Calls the generic rendezvous action function.
  305  */
  306         .text
  307         SUPERALIGN_TEXT
  308 IDTVEC(rendezvous)
  309         PUSH_FRAME
  310         SET_KERNEL_SREGS
  311         cld
  312 
  313 #ifdef COUNT_IPIS
  314         movl    PCPU(CPUID), %eax
  315         movl    ipi_rendezvous_counts(,%eax,4), %eax
  316         incl    (%eax)
  317 #endif
  318         call    smp_rendezvous_action
  319 
  320         movl    lapic, %eax
  321         movl    $0, LA_EOI(%eax)        /* End Of Interrupt to APIC */
  322         POP_FRAME
  323         iret
  324         
  325 /*
  326  * Clean up when we lose out on the lazy context switch optimization.
  327  * ie: when we are about to release a PTD but a cpu is still borrowing it.
  328  */
  329         SUPERALIGN_TEXT
  330 IDTVEC(lazypmap)
  331         PUSH_FRAME
  332         SET_KERNEL_SREGS
  333         cld
  334 
  335         call    pmap_lazyfix_action
  336 
  337         movl    lapic, %eax
  338         movl    $0, LA_EOI(%eax)        /* End Of Interrupt to APIC */
  339         POP_FRAME
  340         iret
  341 #endif /* SMP */

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