The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/apic_vector.s

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    1 /*-
    2  * Copyright (c) 1989, 1990 William F. Jolitz.
    3  * Copyright (c) 1990 The Regents of the University of California.
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  * 4. Neither the name of the University nor the names of its contributors
   15  *    may be used to endorse or promote products derived from this software
   16  *    without specific prior written permission.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  *
   30  *      from: vector.s, 386BSD 0.1 unknown origin
   31  * $FreeBSD: releng/11.2/sys/i386/i386/apic_vector.s 329462 2018-02-17 18:00:01Z kib $
   32  */
   33 
   34 /*
   35  * Interrupt entry points for external interrupts triggered by I/O APICs
   36  * as well as IPI handlers.
   37  */
   38 
   39 #include "opt_smp.h"
   40 
   41 #include <machine/asmacros.h>
   42 #include <machine/specialreg.h>
   43 #include <x86/apicreg.h>
   44 
   45 #include "assym.s"
   46 
   47         .text
   48         SUPERALIGN_TEXT
   49         /* End Of Interrupt to APIC */
   50 as_lapic_eoi:
   51         cmpl    $0,x2apic_mode
   52         jne     1f
   53         movl    lapic_map,%eax
   54         movl    $0,LA_EOI(%eax)
   55         ret
   56 1:
   57         movl    $MSR_APIC_EOI,%ecx
   58         xorl    %eax,%eax
   59         xorl    %edx,%edx
   60         wrmsr
   61         ret
   62 
   63 /*
   64  * I/O Interrupt Entry Point.  Rather than having one entry point for
   65  * each interrupt source, we use one entry point for each 32-bit word
   66  * in the ISR.  The handler determines the highest bit set in the ISR,
   67  * translates that into a vector, and passes the vector to the
   68  * lapic_handle_intr() function.
   69  */
   70 #define ISR_VEC(index, vec_name)                                        \
   71         .text ;                                                         \
   72         SUPERALIGN_TEXT ;                                               \
   73 IDTVEC(vec_name ## _pti) ;                                              \
   74 IDTVEC(vec_name) ;                                                      \
   75         PUSH_FRAME ;                                                    \
   76         SET_KERNEL_SREGS ;                                              \
   77         cld ;                                                           \
   78         FAKE_MCOUNT(TF_EIP(%esp)) ;                                     \
   79         cmpl    $0,x2apic_mode ;                                        \
   80         je      1f ;                                                    \
   81         movl    $(MSR_APIC_ISR0 + index),%ecx ;                         \
   82         rdmsr ;                                                         \
   83         jmp     2f ;                                                    \
   84 1: ;                                                                    \
   85         movl    lapic_map, %edx ;/* pointer to local APIC */            \
   86         movl    LA_ISR + 16 * (index)(%edx), %eax ;     /* load ISR */  \
   87 2: ;                                                                    \
   88         bsrl    %eax, %eax ;    /* index of highest set bit in ISR */   \
   89         jz      3f ;                                                    \
   90         addl    $(32 * index),%eax ;                                    \
   91         pushl   %esp            ;                                       \
   92         pushl   %eax ;          /* pass the IRQ */                      \
   93         call    lapic_handle_intr ;                                     \
   94         addl    $8, %esp ;      /* discard parameter */                 \
   95 3: ;                                                                    \
   96         MEXITCOUNT ;                                                    \
   97         jmp     doreti
   98 
   99 /*
  100  * Handle "spurious INTerrupts".
  101  * Notes:
  102  *  This is different than the "spurious INTerrupt" generated by an
  103  *   8259 PIC for missing INTs.  See the APIC documentation for details.
  104  *  This routine should NOT do an 'EOI' cycle.
  105  */
  106         .text
  107         SUPERALIGN_TEXT
  108 IDTVEC(spuriousint)
  109 
  110         /* No EOI cycle used here */
  111 
  112         iret
  113 
  114         ISR_VEC(1, apic_isr1)
  115         ISR_VEC(2, apic_isr2)
  116         ISR_VEC(3, apic_isr3)
  117         ISR_VEC(4, apic_isr4)
  118         ISR_VEC(5, apic_isr5)
  119         ISR_VEC(6, apic_isr6)
  120         ISR_VEC(7, apic_isr7)
  121 
  122 /*
  123  * Local APIC periodic timer handler.
  124  */
  125         .text
  126         SUPERALIGN_TEXT
  127 IDTVEC(timerint_pti)
  128 IDTVEC(timerint)
  129         PUSH_FRAME
  130         SET_KERNEL_SREGS
  131         cld
  132         FAKE_MCOUNT(TF_EIP(%esp))
  133         pushl   %esp
  134         call    lapic_handle_timer
  135         add     $4, %esp
  136         MEXITCOUNT
  137         jmp     doreti
  138 
  139 /*
  140  * Local APIC CMCI handler.
  141  */
  142         .text
  143         SUPERALIGN_TEXT
  144 IDTVEC(cmcint_pti)
  145 IDTVEC(cmcint)
  146         PUSH_FRAME
  147         SET_KERNEL_SREGS
  148         cld
  149         FAKE_MCOUNT(TF_EIP(%esp))
  150         call    lapic_handle_cmc
  151         MEXITCOUNT
  152         jmp     doreti
  153 
  154 /*
  155  * Local APIC error interrupt handler.
  156  */
  157         .text
  158         SUPERALIGN_TEXT
  159 IDTVEC(errorint_pti)
  160 IDTVEC(errorint)
  161         PUSH_FRAME
  162         SET_KERNEL_SREGS
  163         cld
  164         FAKE_MCOUNT(TF_EIP(%esp))
  165         call    lapic_handle_error
  166         MEXITCOUNT
  167         jmp     doreti
  168 
  169 #ifdef XENHVM
  170 /*
  171  * Xen event channel upcall interrupt handler.
  172  * Only used when the hypervisor supports direct vector callbacks.
  173  */
  174         .text
  175         SUPERALIGN_TEXT
  176 IDTVEC(xen_intr_upcall)
  177         PUSH_FRAME
  178         SET_KERNEL_SREGS
  179         cld
  180         FAKE_MCOUNT(TF_EIP(%esp))
  181         pushl   %esp
  182         call    xen_intr_handle_upcall
  183         add     $4, %esp
  184         MEXITCOUNT
  185         jmp     doreti
  186 #endif
  187 
  188 #ifdef SMP
  189 /*
  190  * Global address space TLB shootdown.
  191  */
  192         .text
  193         SUPERALIGN_TEXT
  194 invltlb_ret:
  195         call    as_lapic_eoi
  196         jmp     doreti
  197 
  198         SUPERALIGN_TEXT
  199 IDTVEC(invltlb)
  200         PUSH_FRAME
  201         SET_KERNEL_SREGS
  202         cld
  203 
  204         call    invltlb_handler
  205 
  206         jmp     invltlb_ret
  207 
  208 /*
  209  * Single page TLB shootdown
  210  */
  211         .text
  212         SUPERALIGN_TEXT
  213 IDTVEC(invlpg)
  214         PUSH_FRAME
  215         SET_KERNEL_SREGS
  216         cld
  217 
  218         call    invlpg_handler
  219 
  220         jmp     invltlb_ret
  221 
  222 /*
  223  * Page range TLB shootdown.
  224  */
  225         .text
  226         SUPERALIGN_TEXT
  227 IDTVEC(invlrng)
  228         PUSH_FRAME
  229         SET_KERNEL_SREGS
  230         cld
  231 
  232         call    invlrng_handler
  233 
  234         jmp     invltlb_ret
  235 
  236 /*
  237  * Invalidate cache.
  238  */
  239         .text
  240         SUPERALIGN_TEXT
  241 IDTVEC(invlcache)
  242         PUSH_FRAME
  243         SET_KERNEL_SREGS
  244         cld
  245 
  246         call    invlcache_handler
  247 
  248         jmp     invltlb_ret
  249 
  250 /*
  251  * Handler for IPIs sent via the per-cpu IPI bitmap.
  252  */
  253         .text
  254         SUPERALIGN_TEXT
  255 IDTVEC(ipi_intr_bitmap_handler) 
  256         PUSH_FRAME
  257         SET_KERNEL_SREGS
  258         cld
  259 
  260         call    as_lapic_eoi
  261         
  262         FAKE_MCOUNT(TF_EIP(%esp))
  263 
  264         call    ipi_bitmap_handler
  265         MEXITCOUNT
  266         jmp     doreti
  267 
  268 /*
  269  * Executed by a CPU when it receives an IPI_STOP from another CPU.
  270  */
  271         .text
  272         SUPERALIGN_TEXT
  273 IDTVEC(cpustop)
  274         PUSH_FRAME
  275         SET_KERNEL_SREGS
  276         cld
  277 
  278         call    as_lapic_eoi
  279         call    cpustop_handler
  280         jmp     doreti
  281 
  282 /*
  283  * Executed by a CPU when it receives an IPI_SUSPEND from another CPU.
  284  */
  285         .text
  286         SUPERALIGN_TEXT
  287 IDTVEC(cpususpend)
  288         PUSH_FRAME
  289         SET_KERNEL_SREGS
  290         cld
  291 
  292         call    as_lapic_eoi
  293         call    cpususpend_handler
  294         jmp     doreti
  295 
  296 /*
  297  * Executed by a CPU when it receives a RENDEZVOUS IPI from another CPU.
  298  *
  299  * - Calls the generic rendezvous action function.
  300  */
  301         .text
  302         SUPERALIGN_TEXT
  303 IDTVEC(rendezvous)
  304         PUSH_FRAME
  305         SET_KERNEL_SREGS
  306         cld
  307 
  308 #ifdef COUNT_IPIS
  309         movl    PCPU(CPUID), %eax
  310         movl    ipi_rendezvous_counts(,%eax,4), %eax
  311         incl    (%eax)
  312 #endif
  313         call    smp_rendezvous_action
  314 
  315         call    as_lapic_eoi
  316         jmp     doreti
  317         
  318 #endif /* SMP */

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