1 /*-
2 * Copyright (C) 2002-2003 NetGroup, Politecnico di Torino (Italy)
3 * Copyright (C) 2005-2008 Jung-uk Kim <jkim@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of the Politecnico di Torino nor the names of its
16 * contributors may be used to endorse or promote products derived from
17 * this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
22 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
23 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
25 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * $FreeBSD$
32 */
33
34 #ifndef _BPF_JIT_MACHDEP_H_
35 #define _BPF_JIT_MACHDEP_H_
36
37 /*
38 * Registers
39 */
40 #define EAX 0
41 #define ECX 1
42 #define EDX 2
43 #define EBX 3
44 #define ESP 4
45 #define EBP 5
46 #define ESI 6
47 #define EDI 7
48
49 #define AX 0
50 #define CX 1
51 #define DX 2
52 #define BX 3
53 #define SP 4
54 #define BP 5
55 #define SI 6
56 #define DI 7
57
58 #define AL 0
59 #define CL 1
60 #define DL 2
61 #define BL 3
62
63 /* A stream of native binary code.*/
64 typedef struct bpf_bin_stream {
65 /* Current native instruction pointer. */
66 int cur_ip;
67
68 /*
69 * Current BPF instruction pointer, i.e. position in
70 * the BPF program reached by the jitter.
71 */
72 int bpf_pc;
73
74 /* Instruction buffer, contains the generated native code. */
75 char *ibuf;
76
77 /* Jumps reference table. */
78 u_int *refs;
79 } bpf_bin_stream;
80
81 /*
82 * Prototype of the emit functions.
83 *
84 * Different emit functions are used to create the reference table and
85 * to generate the actual filtering code. This allows to have simpler
86 * instruction macros.
87 * The first parameter is the stream that will receive the data.
88 * The second one is a variable containing the data.
89 * The third one is the length, that can be 1, 2, or 4 since it is possible
90 * to emit a byte, a short, or a word at a time.
91 */
92 typedef void (*emit_func)(bpf_bin_stream *stream, u_int value, u_int n);
93
94 /*
95 * native Instruction Macros
96 */
97
98 /* movl i32,r32 */
99 #define MOVid(i32, r32) do { \
100 emitm(&stream, (11 << 4) | (1 << 3) | (r32 & 0x7), 1); \
101 emitm(&stream, i32, 4); \
102 } while (0)
103
104 /* movl sr32,dr32 */
105 #define MOVrd(sr32, dr32) do { \
106 emitm(&stream, 0x89, 1); \
107 emitm(&stream, \
108 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
109 } while (0)
110
111 /* movl off(sr32),dr32 */
112 #define MOVodd(off, sr32, dr32) do { \
113 emitm(&stream, 0x8b, 1); \
114 emitm(&stream, \
115 (1 << 6) | ((dr32 & 0x7) << 3) | (sr32 & 0x7), 1); \
116 emitm(&stream, off, 1); \
117 } while (0)
118
119 /* movl (sr32,or32,1),dr32 */
120 #define MOVobd(sr32, or32, dr32) do { \
121 emitm(&stream, 0x8b, 1); \
122 emitm(&stream, ((dr32 & 0x7) << 3) | 4, 1); \
123 emitm(&stream, ((or32 & 0x7) << 3) | (sr32 & 0x7), 1); \
124 } while (0)
125
126 /* movw (sr32,or32,1),dr16 */
127 #define MOVobw(sr32, or32, dr16) do { \
128 emitm(&stream, 0x8b66, 2); \
129 emitm(&stream, ((dr16 & 0x7) << 3) | 4, 1); \
130 emitm(&stream, ((or32 & 0x7) << 3) | (sr32 & 0x7), 1); \
131 } while (0)
132
133 /* movb (sr32,or32,1),dr8 */
134 #define MOVobb(sr32, or32, dr8) do { \
135 emitm(&stream, 0x8a, 1); \
136 emitm(&stream, ((dr8 & 0x7) << 3) | 4, 1); \
137 emitm(&stream, ((or32 & 0x7) << 3) | (sr32 & 0x7), 1); \
138 } while (0)
139
140 /* movl sr32,(dr32,or32,1) */
141 #define MOVomd(sr32, dr32, or32) do { \
142 emitm(&stream, 0x89, 1); \
143 emitm(&stream, ((sr32 & 0x7) << 3) | 4, 1); \
144 emitm(&stream, ((or32 & 0x7) << 3) | (dr32 & 0x7), 1); \
145 } while (0)
146
147 /* bswapl dr32 */
148 #define BSWAP(dr32) do { \
149 emitm(&stream, 0xf, 1); \
150 emitm(&stream, (0x19 << 3) | dr32, 1); \
151 } while (0)
152
153 /* xchgb %al,%ah */
154 #define SWAP_AX() do { \
155 emitm(&stream, 0xc486, 2); \
156 } while (0)
157
158 /* pushl r32 */
159 #define PUSH(r32) do { \
160 emitm(&stream, (5 << 4) | (0 << 3) | (r32 & 0x7), 1); \
161 } while (0)
162
163 /* popl r32 */
164 #define POP(r32) do { \
165 emitm(&stream, (5 << 4) | (1 << 3) | (r32 & 0x7), 1); \
166 } while (0)
167
168 /* leave/ret */
169 #define LEAVE_RET() do { \
170 emitm(&stream, 0xc3c9, 2); \
171 } while (0)
172
173 /* addl sr32,dr32 */
174 #define ADDrd(sr32, dr32) do { \
175 emitm(&stream, 0x01, 1); \
176 emitm(&stream, \
177 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
178 } while (0)
179
180 /* addl i32,%eax */
181 #define ADD_EAXi(i32) do { \
182 emitm(&stream, 0x05, 1); \
183 emitm(&stream, i32, 4); \
184 } while (0)
185
186 /* addl i8,r32 */
187 #define ADDib(i8, r32) do { \
188 emitm(&stream, 0x83, 1); \
189 emitm(&stream, (24 << 3) | r32, 1); \
190 emitm(&stream, i8, 1); \
191 } while (0)
192
193 /* subl sr32,dr32 */
194 #define SUBrd(sr32, dr32) do { \
195 emitm(&stream, 0x29, 1); \
196 emitm(&stream, \
197 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
198 } while (0)
199
200 /* subl i32,%eax */
201 #define SUB_EAXi(i32) do { \
202 emitm(&stream, 0x2d, 1); \
203 emitm(&stream, i32, 4); \
204 } while (0)
205
206 /* mull r32 */
207 #define MULrd(r32) do { \
208 emitm(&stream, 0xf7, 1); \
209 emitm(&stream, (7 << 5) | (r32 & 0x7), 1); \
210 } while (0)
211
212 /* divl r32 */
213 #define DIVrd(r32) do { \
214 emitm(&stream, 0xf7, 1); \
215 emitm(&stream, (15 << 4) | (r32 & 0x7), 1); \
216 } while (0)
217
218 /* andb i8,r8 */
219 #define ANDib(i8, r8) do { \
220 if (r8 == AL) { \
221 emitm(&stream, 0x24, 1); \
222 } else { \
223 emitm(&stream, 0x80, 1); \
224 emitm(&stream, (7 << 5) | r8, 1); \
225 } \
226 emitm(&stream, i8, 1); \
227 } while (0)
228
229 /* andl i32,r32 */
230 #define ANDid(i32, r32) do { \
231 if (r32 == EAX) { \
232 emitm(&stream, 0x25, 1); \
233 } else { \
234 emitm(&stream, 0x81, 1); \
235 emitm(&stream, (7 << 5) | r32, 1); \
236 } \
237 emitm(&stream, i32, 4); \
238 } while (0)
239
240 /* andl sr32,dr32 */
241 #define ANDrd(sr32, dr32) do { \
242 emitm(&stream, 0x21, 1); \
243 emitm(&stream, \
244 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
245 } while (0)
246
247 /* testl i32,r32 */
248 #define TESTid(i32, r32) do { \
249 if (r32 == EAX) { \
250 emitm(&stream, 0xa9, 1); \
251 } else { \
252 emitm(&stream, 0xf7, 1); \
253 emitm(&stream, (3 << 6) | r32, 1); \
254 } \
255 emitm(&stream, i32, 4); \
256 } while (0)
257
258 /* testl sr32,dr32 */
259 #define TESTrd(sr32, dr32) do { \
260 emitm(&stream, 0x85, 1); \
261 emitm(&stream, \
262 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
263 } while (0)
264
265 /* orl sr32,dr32 */
266 #define ORrd(sr32, dr32) do { \
267 emitm(&stream, 0x09, 1); \
268 emitm(&stream, \
269 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
270 } while (0)
271
272 /* orl i32,r32 */
273 #define ORid(i32, r32) do { \
274 if (r32 == EAX) { \
275 emitm(&stream, 0x0d, 1); \
276 } else { \
277 emitm(&stream, 0x81, 1); \
278 emitm(&stream, (25 << 3) | r32, 1); \
279 } \
280 emitm(&stream, i32, 4); \
281 } while (0)
282
283 /* shll i8,r32 */
284 #define SHLib(i8, r32) do { \
285 emitm(&stream, 0xc1, 1); \
286 emitm(&stream, (7 << 5) | (r32 & 0x7), 1); \
287 emitm(&stream, i8, 1); \
288 } while (0)
289
290 /* shll %cl,dr32 */
291 #define SHL_CLrb(dr32) do { \
292 emitm(&stream, 0xd3, 1); \
293 emitm(&stream, (7 << 5) | (dr32 & 0x7), 1); \
294 } while (0)
295
296 /* shrl i8,r32 */
297 #define SHRib(i8, r32) do { \
298 emitm(&stream, 0xc1, 1); \
299 emitm(&stream, (29 << 3) | (r32 & 0x7), 1); \
300 emitm(&stream, i8, 1); \
301 } while (0)
302
303 /* shrl %cl,dr32 */
304 #define SHR_CLrb(dr32) do { \
305 emitm(&stream, 0xd3, 1); \
306 emitm(&stream, (29 << 3) | (dr32 & 0x7), 1); \
307 } while (0)
308
309 /* negl r32 */
310 #define NEGd(r32) do { \
311 emitm(&stream, 0xf7, 1); \
312 emitm(&stream, (27 << 3) | (r32 & 0x7), 1); \
313 } while (0)
314
315 /* cmpl sr32,dr32 */
316 #define CMPrd(sr32, dr32) do { \
317 emitm(&stream, 0x39, 1); \
318 emitm(&stream, \
319 (3 << 6) | ((sr32 & 0x7) << 3) | (dr32 & 0x7), 1); \
320 } while (0)
321
322 /* cmpl i32,dr32 */
323 #define CMPid(i32, dr32) do { \
324 if (dr32 == EAX){ \
325 emitm(&stream, 0x3d, 1); \
326 emitm(&stream, i32, 4); \
327 } else { \
328 emitm(&stream, 0x81, 1); \
329 emitm(&stream, (0x1f << 3) | (dr32 & 0x7), 1); \
330 emitm(&stream, i32, 4); \
331 } \
332 } while (0)
333
334 /* jb off8 */
335 #define JBb(off8) do { \
336 emitm(&stream, 0x72, 1); \
337 emitm(&stream, off8, 1); \
338 } while (0)
339
340 /* jae off8 */
341 #define JAEb(off8) do { \
342 emitm(&stream, 0x73, 1); \
343 emitm(&stream, off8, 1); \
344 } while (0)
345
346 /* jne off8 */
347 #define JNEb(off8) do { \
348 emitm(&stream, 0x75, 1); \
349 emitm(&stream, off8, 1); \
350 } while (0)
351
352 /* ja off8 */
353 #define JAb(off8) do { \
354 emitm(&stream, 0x77, 1); \
355 emitm(&stream, off8, 1); \
356 } while (0)
357
358 /* jmp off32 */
359 #define JMP(off32) do { \
360 emitm(&stream, 0xe9, 1); \
361 emitm(&stream, off32, 4); \
362 } while (0)
363
364 /* xorl r32,r32 */
365 #define ZEROrd(r32) do { \
366 emitm(&stream, 0x31, 1); \
367 emitm(&stream, (3 << 6) | ((r32 & 0x7) << 3) | (r32 & 0x7), 1); \
368 } while (0)
369
370 /*
371 * Conditional long jumps
372 */
373 #define JB 0x82
374 #define JAE 0x83
375 #define JE 0x84
376 #define JNE 0x85
377 #define JBE 0x86
378 #define JA 0x87
379
380 #define JCC(t, f) do { \
381 if (ins->jt != 0 && ins->jf != 0) { \
382 /* 5 is the size of the following jmp */ \
383 emitm(&stream, ((t) << 8) | 0x0f, 2); \
384 emitm(&stream, stream.refs[stream.bpf_pc + ins->jt] - \
385 stream.refs[stream.bpf_pc] + 5, 4); \
386 JMP(stream.refs[stream.bpf_pc + ins->jf] - \
387 stream.refs[stream.bpf_pc]); \
388 } else if (ins->jt != 0) { \
389 emitm(&stream, ((t) << 8) | 0x0f, 2); \
390 emitm(&stream, stream.refs[stream.bpf_pc + ins->jt] - \
391 stream.refs[stream.bpf_pc], 4); \
392 } else { \
393 emitm(&stream, ((f) << 8) | 0x0f, 2); \
394 emitm(&stream, stream.refs[stream.bpf_pc + ins->jf] - \
395 stream.refs[stream.bpf_pc], 4); \
396 } \
397 } while (0)
398
399 #endif /* _BPF_JIT_MACHDEP_H_ */
Cache object: 25a486a626d40ddec40b2fa783acbad1
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