Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/exception.s
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1 /*- 2 * Copyright (c) 1989, 1990 William F. Jolitz. 3 * Copyright (c) 1990 The Regents of the University of California. 4 * Copyright (c) 2007, 2018 The FreeBSD Foundation 5 * All rights reserved. 6 * 7 * Portions of this software were developed by A. Joseph Koshy under 8 * sponsorship from the FreeBSD Foundation and Google, Inc. 9 * Portions of this software were developed by Konstantin Belousov 10 * <kib@FreeBSD.org> under sponsorship from the FreeBSD Foundation. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * $FreeBSD: releng/12.0/sys/i386/i386/exception.s 334520 2018-06-02 04:25:09Z bde $ 37 */ 38 39 #include "opt_apic.h" 40 #include "opt_atpic.h" 41 #include "opt_hwpmc_hooks.h" 42 43 #include "assym.inc" 44 45 #include <machine/psl.h> 46 #include <machine/asmacros.h> 47 #include <machine/trap.h> 48 49 #ifdef KDTRACE_HOOKS 50 .bss 51 .globl dtrace_invop_jump_addr 52 .align 4 53 .type dtrace_invop_jump_addr, @object 54 .size dtrace_invop_jump_addr, 4 55 dtrace_invop_jump_addr: 56 .zero 4 57 .globl dtrace_invop_calltrap_addr 58 .align 4 59 .type dtrace_invop_calltrap_addr, @object 60 .size dtrace_invop_calltrap_addr, 4 61 dtrace_invop_calltrap_addr: 62 .zero 8 63 #endif 64 .text 65 ENTRY(start_exceptions) 66 .globl tramp_idleptd 67 tramp_idleptd: .long 0 68 69 /*****************************************************************************/ 70 /* Trap handling */ 71 /*****************************************************************************/ 72 /* 73 * Trap and fault vector routines. 74 * 75 * All traps are 'interrupt gates', SDT_SYS386IGT. Interrupts are disabled 76 * by hardware to not allow interrupts until code switched to the kernel 77 * address space and the kernel thread stack. 78 * 79 * The cpu will push a certain amount of state onto the kernel stack for 80 * the current process. The amount of state depends on the type of trap 81 * and whether the trap crossed rings or not. See i386/include/frame.h. 82 * At the very least the current EFLAGS (status register, which includes 83 * the interrupt disable state prior to the trap), the code segment register, 84 * and the return instruction pointer are pushed by the cpu. The cpu 85 * will also push an 'error' code for certain traps. We push a dummy 86 * error code for those traps where the cpu doesn't in order to maintain 87 * a consistent frame. We also push a contrived 'trap number'. 88 * 89 * The cpu does not push the general registers, we must do that, and we 90 * must restore them prior to calling 'iret'. The cpu adjusts the %cs and 91 * %ss segment registers, but does not mess with %ds, %es, or %fs. Thus we 92 * must load them with appropriate values for supervisor mode operation. 93 * 94 * This code is not executed at the linked address, it is copied to the 95 * trampoline area. As the consequence, all code there and in included files 96 * must be PIC. 97 */ 98 99 MCOUNT_LABEL(user) 100 MCOUNT_LABEL(btrap) 101 102 #define TRAP(a) pushl $(a) ; jmp alltraps 103 104 IDTVEC(div) 105 pushl $0; TRAP(T_DIVIDE) 106 IDTVEC(bpt) 107 pushl $0; TRAP(T_BPTFLT) 108 IDTVEC(dtrace_ret) 109 pushl $0; TRAP(T_DTRACE_RET) 110 IDTVEC(ofl) 111 pushl $0; TRAP(T_OFLOW) 112 IDTVEC(bnd) 113 pushl $0; TRAP(T_BOUND) 114 #ifndef KDTRACE_HOOKS 115 IDTVEC(ill) 116 pushl $0; TRAP(T_PRIVINFLT) 117 #endif 118 IDTVEC(dna) 119 pushl $0; TRAP(T_DNA) 120 IDTVEC(fpusegm) 121 pushl $0; TRAP(T_FPOPFLT) 122 IDTVEC(tss) 123 TRAP(T_TSSFLT) 124 IDTVEC(missing) 125 pushl $T_SEGNPFLT 126 jmp irettraps 127 IDTVEC(stk) 128 pushl $T_STKFLT 129 jmp irettraps 130 IDTVEC(prot) 131 pushl $T_PROTFLT 132 jmp irettraps 133 IDTVEC(page) 134 cmpl $PMAP_TRM_MIN_ADDRESS, TF_EIP-TF_ERR(%esp) 135 jb 1f 136 movl %ebx, %cr3 137 movl %edx, TF_EIP-TF_ERR(%esp) 138 addl $4, %esp 139 iret 140 1: pushl $T_PAGEFLT 141 jmp alltraps 142 IDTVEC(rsvd_pti) 143 IDTVEC(rsvd) 144 pushl $0; TRAP(T_RESERVED) 145 IDTVEC(fpu) 146 pushl $0; TRAP(T_ARITHTRAP) 147 IDTVEC(align) 148 TRAP(T_ALIGNFLT) 149 IDTVEC(xmm) 150 pushl $0; TRAP(T_XMMFLT) 151 152 /* 153 * All traps except ones for syscalls or invalid segment, 154 * jump to alltraps. If 155 * interrupts were enabled when the trap occurred, then interrupts 156 * are enabled now if the trap was through a trap gate, else 157 * disabled if the trap was through an interrupt gate. Note that 158 * int0x80_syscall is a trap gate. Interrupt gates are used by 159 * page faults, non-maskable interrupts, debug and breakpoint 160 * exceptions. 161 */ 162 SUPERALIGN_TEXT 163 .globl alltraps 164 .type alltraps,@function 165 alltraps: 166 PUSH_FRAME2 167 alltraps_with_regs_pushed: 168 SET_KERNEL_SREGS 169 cld 170 KENTER 171 FAKE_MCOUNT(TF_EIP(%esp)) 172 calltrap: 173 pushl %esp 174 movl $trap,%eax 175 call *%eax 176 add $4, %esp 177 178 /* 179 * Return via doreti to handle ASTs. 180 */ 181 MEXITCOUNT 182 jmp doreti 183 184 .globl irettraps 185 .type irettraps,@function 186 irettraps: 187 testl $PSL_VM, TF_EFLAGS-TF_TRAPNO(%esp) 188 jnz alltraps 189 testb $SEL_RPL_MASK, TF_CS-TF_TRAPNO(%esp) 190 jnz alltraps 191 192 /* 193 * Kernel mode. 194 * The special case there is the kernel mode with user %cr3 and 195 * trampoline stack. We need to copy both current frame and the 196 * hardware portion of the frame we tried to return to, to the 197 * normal stack. This logic must follow the stack unwind order 198 * in doreti. 199 */ 200 PUSH_FRAME2 201 SET_KERNEL_SREGS 202 cld 203 call 1f 204 1: popl %ebx 205 leal (doreti_iret - 1b)(%ebx), %edx 206 cmpl %edx, TF_EIP(%esp) 207 jne 2f 208 movl $(2 * TF_SZ - TF_EIP), %ecx 209 jmp 6f 210 2: leal (doreti_popl_ds - 1b)(%ebx), %edx 211 cmpl %edx, TF_EIP(%esp) 212 jne 3f 213 movl $(2 * TF_SZ - TF_DS), %ecx 214 jmp 6f 215 3: leal (doreti_popl_es - 1b)(%ebx), %edx 216 cmpl %edx, TF_EIP(%esp) 217 jne 4f 218 movl $(2 * TF_SZ - TF_ES), %ecx 219 jmp 6f 220 4: leal (doreti_popl_fs - 1b)(%ebx), %edx 221 cmpl %edx, TF_EIP(%esp) 222 jne 5f 223 movl $(2 * TF_SZ - TF_FS), %ecx 224 jmp 6f 225 /* kernel mode, normal */ 226 5: FAKE_MCOUNT(TF_EIP(%esp)) 227 jmp calltrap 228 6: cmpl $PMAP_TRM_MIN_ADDRESS, %esp /* trampoline stack ? */ 229 jb 5b /* if not, no need to change stacks */ 230 movl (tramp_idleptd - 1b)(%ebx), %eax 231 movl %eax, %cr3 232 movl PCPU(KESP0), %edx 233 subl %ecx, %edx 234 movl %edx, %edi 235 movl %esp, %esi 236 rep; movsb 237 movl %edx, %esp 238 FAKE_MCOUNT(TF_EIP(%esp)) 239 jmp calltrap 240 241 /* 242 * Privileged instruction fault. 243 */ 244 #ifdef KDTRACE_HOOKS 245 SUPERALIGN_TEXT 246 IDTVEC(ill) 247 /* 248 * Check if this is a user fault. If so, just handle it as a normal 249 * trap. 250 */ 251 testl $PSL_VM, 8(%esp) /* and vm86 mode. */ 252 jnz norm_ill 253 cmpl $GSEL_KPL, 4(%esp) /* Check the code segment */ 254 jne norm_ill 255 256 /* 257 * Check if a DTrace hook is registered. The trampoline cannot 258 * be instrumented. 259 */ 260 cmpl $0, dtrace_invop_jump_addr 261 je norm_ill 262 263 /* 264 * This is a kernel instruction fault that might have been caused 265 * by a DTrace provider. 266 */ 267 pushal 268 cld 269 270 /* 271 * Set our jump address for the jump back in the event that 272 * the exception wasn't caused by DTrace at all. 273 */ 274 movl $norm_ill, dtrace_invop_calltrap_addr 275 276 /* Jump to the code hooked in by DTrace. */ 277 jmpl *dtrace_invop_jump_addr 278 279 /* 280 * Process the instruction fault in the normal way. 281 */ 282 norm_ill: 283 pushl $0 284 pushl $T_PRIVINFLT 285 jmp alltraps 286 #endif 287 288 /* 289 * See comment in the handler for the kernel case T_TRCTRAP in trap.c. 290 * The exception handler must be ready to execute with wrong %cr3. 291 * We save original %cr3 in frame->tf_err, similarly to NMI and MCE 292 * handlers. 293 */ 294 IDTVEC(dbg) 295 pushl $0 296 pushl $T_TRCTRAP 297 PUSH_FRAME2 298 SET_KERNEL_SREGS 299 cld 300 movl %cr3, %eax 301 movl %eax, TF_ERR(%esp) 302 call 1f 303 1: popl %eax 304 movl (tramp_idleptd - 1b)(%eax), %eax 305 movl %eax, %cr3 306 FAKE_MCOUNT(TF_EIP(%esp)) 307 testl $PSL_VM, TF_EFLAGS(%esp) 308 jnz dbg_user 309 testb $SEL_RPL_MASK,TF_CS(%esp) 310 jz calltrap 311 dbg_user: 312 NMOVE_STACKS 313 movl $handle_ibrs_entry,%eax 314 call *%eax 315 pushl %esp 316 movl $trap,%eax 317 call *%eax 318 add $4, %esp 319 movl $T_RESERVED, TF_TRAPNO(%esp) 320 MEXITCOUNT 321 jmp doreti 322 323 IDTVEC(mchk) 324 pushl $0 325 pushl $T_MCHK 326 jmp nmi_mchk_common 327 328 IDTVEC(nmi) 329 pushl $0 330 pushl $T_NMI 331 nmi_mchk_common: 332 PUSH_FRAME2 333 SET_KERNEL_SREGS 334 cld 335 /* 336 * Save %cr3 into tf_err. There is no good place to put it. 337 * Always reload %cr3, since we might have interrupted the 338 * kernel entry or exit. 339 * Do not switch to the thread kernel stack, otherwise we might 340 * obliterate the previous context partially copied from the 341 * trampoline stack. 342 * Do not re-enable IBRS, there is no good place to store 343 * previous state if we come from the kernel. 344 */ 345 movl %cr3, %eax 346 movl %eax, TF_ERR(%esp) 347 call 1f 348 1: popl %eax 349 movl (tramp_idleptd - 1b)(%eax), %eax 350 movl %eax, %cr3 351 FAKE_MCOUNT(TF_EIP(%esp)) 352 jmp calltrap 353 354 /* 355 * Trap gate entry for syscalls (int 0x80). 356 * This is used by FreeBSD ELF executables, "new" a.out executables, and all 357 * Linux executables. 358 * 359 * Even though the name says 'int0x80', this is actually a trap gate, not an 360 * interrupt gate. Thus interrupts are enabled on entry just as they are for 361 * a normal syscall. 362 */ 363 SUPERALIGN_TEXT 364 IDTVEC(int0x80_syscall) 365 pushl $2 /* sizeof "int 0x80" */ 366 pushl $0 /* tf_trapno */ 367 PUSH_FRAME2 368 SET_KERNEL_SREGS 369 cld 370 MOVE_STACKS 371 movl $handle_ibrs_entry,%eax 372 call *%eax 373 sti 374 FAKE_MCOUNT(TF_EIP(%esp)) 375 pushl %esp 376 movl $syscall, %eax 377 call *%eax 378 add $4, %esp 379 MEXITCOUNT 380 jmp doreti 381 382 ENTRY(fork_trampoline) 383 pushl %esp /* trapframe pointer */ 384 pushl %ebx /* arg1 */ 385 pushl %esi /* function */ 386 movl $fork_exit, %eax 387 call *%eax 388 addl $12,%esp 389 /* cut from syscall */ 390 391 /* 392 * Return via doreti to handle ASTs. 393 */ 394 MEXITCOUNT 395 jmp doreti 396 397 398 /* 399 * To efficiently implement classification of trap and interrupt handlers 400 * for profiling, there must be only trap handlers between the labels btrap 401 * and bintr, and only interrupt handlers between the labels bintr and 402 * eintr. This is implemented (partly) by including files that contain 403 * some of the handlers. Before including the files, set up a normal asm 404 * environment so that the included files doen't need to know that they are 405 * included. 406 */ 407 408 .data 409 .p2align 4 410 .text 411 SUPERALIGN_TEXT 412 MCOUNT_LABEL(bintr) 413 414 #ifdef DEV_ATPIC 415 #include <i386/i386/atpic_vector.s> 416 #endif 417 418 #if defined(DEV_APIC) && defined(DEV_ATPIC) 419 .data 420 .p2align 4 421 .text 422 SUPERALIGN_TEXT 423 #endif 424 425 #ifdef DEV_APIC 426 #include <i386/i386/apic_vector.s> 427 #endif 428 429 .data 430 .p2align 4 431 .text 432 SUPERALIGN_TEXT 433 #include <i386/i386/vm86bios.s> 434 435 .text 436 MCOUNT_LABEL(eintr) 437 438 #include <i386/i386/copyout_fast.s> 439 440 /* 441 * void doreti(struct trapframe) 442 * 443 * Handle return from interrupts, traps and syscalls. 444 */ 445 .text 446 SUPERALIGN_TEXT 447 .type doreti,@function 448 .globl doreti 449 doreti: 450 FAKE_MCOUNT($bintr) /* init "from" bintr -> doreti */ 451 doreti_next: 452 /* 453 * Check if ASTs can be handled now. ASTs cannot be safely 454 * processed when returning from an NMI. 455 */ 456 cmpb $T_NMI,TF_TRAPNO(%esp) 457 #ifdef HWPMC_HOOKS 458 je doreti_nmi 459 #else 460 je doreti_exit 461 #endif 462 /* 463 * PSL_VM must be checked first since segment registers only 464 * have an RPL in non-VM86 mode. 465 * ASTs can not be handled now if we are in a vm86 call. 466 */ 467 testl $PSL_VM,TF_EFLAGS(%esp) 468 jz doreti_notvm86 469 movl PCPU(CURPCB),%ecx 470 testl $PCB_VM86CALL,PCB_FLAGS(%ecx) 471 jz doreti_ast 472 jmp doreti_popl_fs 473 474 doreti_notvm86: 475 testb $SEL_RPL_MASK,TF_CS(%esp) /* are we returning to user mode? */ 476 jz doreti_exit /* can't handle ASTs now if not */ 477 478 doreti_ast: 479 /* 480 * Check for ASTs atomically with returning. Disabling CPU 481 * interrupts provides sufficient locking even in the SMP case, 482 * since we will be informed of any new ASTs by an IPI. 483 */ 484 cli 485 movl PCPU(CURTHREAD),%eax 486 testl $TDF_ASTPENDING | TDF_NEEDRESCHED,TD_FLAGS(%eax) 487 je doreti_exit 488 sti 489 pushl %esp /* pass a pointer to the trapframe */ 490 movl $ast, %eax 491 call *%eax 492 add $4,%esp 493 jmp doreti_ast 494 495 /* 496 * doreti_exit: pop registers, iret. 497 * 498 * The segment register pop is a special case, since it may 499 * fault if (for example) a sigreturn specifies bad segment 500 * registers. The fault is handled in trap.c. 501 */ 502 doreti_exit: 503 MEXITCOUNT 504 505 cmpl $T_NMI, TF_TRAPNO(%esp) 506 je doreti_iret_nmi 507 cmpl $T_MCHK, TF_TRAPNO(%esp) 508 je doreti_iret_nmi 509 cmpl $T_TRCTRAP, TF_TRAPNO(%esp) 510 je doreti_iret_nmi 511 movl $TF_SZ, %ecx 512 testl $PSL_VM,TF_EFLAGS(%esp) 513 jz 1f /* PCB_VM86CALL is not set */ 514 addl $VM86_STACK_SPACE, %ecx 515 jmp 2f 516 1: testl $SEL_RPL_MASK, TF_CS(%esp) 517 jz doreti_popl_fs 518 2: movl $handle_ibrs_exit,%eax 519 pushl %ecx /* preserve enough call-used regs */ 520 call *%eax 521 popl %ecx 522 movl %esp, %esi 523 movl PCPU(TRAMPSTK), %edx 524 subl %ecx, %edx 525 movl %edx, %edi 526 rep; movsb 527 movl %edx, %esp 528 movl PCPU(CURPCB),%eax 529 movl PCB_CR3(%eax), %eax 530 movl %eax, %cr3 531 532 .globl doreti_popl_fs 533 doreti_popl_fs: 534 popl %fs 535 .globl doreti_popl_es 536 doreti_popl_es: 537 popl %es 538 .globl doreti_popl_ds 539 doreti_popl_ds: 540 popl %ds 541 popal 542 addl $8,%esp 543 .globl doreti_iret 544 doreti_iret: 545 iret 546 547 doreti_iret_nmi: 548 movl TF_ERR(%esp), %eax 549 movl %eax, %cr3 550 jmp doreti_popl_fs 551 552 /* 553 * doreti_iret_fault and friends. Alternative return code for 554 * the case where we get a fault in the doreti_exit code 555 * above. trap() (i386/i386/trap.c) catches this specific 556 * case, and continues in the corresponding place in the code 557 * below. 558 * 559 * If the fault occured during return to usermode, we recreate 560 * the trap frame and call trap() to send a signal. Otherwise 561 * the kernel was tricked into fault by attempt to restore invalid 562 * usermode segment selectors on return from nested fault or 563 * interrupt, where interrupted kernel entry code not yet loaded 564 * kernel selectors. In the latter case, emulate iret and zero 565 * the invalid selector. 566 */ 567 ALIGN_TEXT 568 .globl doreti_iret_fault 569 doreti_iret_fault: 570 pushl $0 /* tf_err */ 571 pushl $0 /* tf_trapno XXXKIB: provide more useful value ? */ 572 pushal 573 pushl $0 574 movw %ds,(%esp) 575 .globl doreti_popl_ds_fault 576 doreti_popl_ds_fault: 577 testb $SEL_RPL_MASK,TF_CS-TF_DS(%esp) 578 jz doreti_popl_ds_kfault 579 pushl $0 580 movw %es,(%esp) 581 .globl doreti_popl_es_fault 582 doreti_popl_es_fault: 583 testb $SEL_RPL_MASK,TF_CS-TF_ES(%esp) 584 jz doreti_popl_es_kfault 585 pushl $0 586 movw %fs,(%esp) 587 .globl doreti_popl_fs_fault 588 doreti_popl_fs_fault: 589 testb $SEL_RPL_MASK,TF_CS-TF_FS(%esp) 590 jz doreti_popl_fs_kfault 591 movl $0,TF_ERR(%esp) /* XXX should be the error code */ 592 movl $T_PROTFLT,TF_TRAPNO(%esp) 593 SET_KERNEL_SREGS 594 jmp calltrap 595 596 doreti_popl_ds_kfault: 597 movl $0,(%esp) 598 jmp doreti_popl_ds 599 doreti_popl_es_kfault: 600 movl $0,(%esp) 601 jmp doreti_popl_es 602 doreti_popl_fs_kfault: 603 movl $0,(%esp) 604 jmp doreti_popl_fs 605 606 #ifdef HWPMC_HOOKS 607 doreti_nmi: 608 /* 609 * Since we are returning from an NMI, check if the current trap 610 * was from user mode and if so whether the current thread 611 * needs a user call chain capture. 612 */ 613 testl $PSL_VM, TF_EFLAGS(%esp) 614 jnz doreti_exit 615 testb $SEL_RPL_MASK,TF_CS(%esp) 616 jz doreti_exit 617 movl PCPU(CURTHREAD),%eax /* curthread present? */ 618 orl %eax,%eax 619 jz doreti_exit 620 testl $TDP_CALLCHAIN,TD_PFLAGS(%eax) /* flagged for capture? */ 621 jz doreti_exit 622 /* 623 * Switch to thread stack. Reset tf_trapno to not indicate NMI, 624 * to cause normal userspace exit. 625 */ 626 movl $T_RESERVED, TF_TRAPNO(%esp) 627 NMOVE_STACKS 628 /* 629 * Take the processor out of NMI mode by executing a fake "iret". 630 */ 631 pushfl 632 pushl %cs 633 call 1f 634 1: popl %eax 635 leal (outofnmi-1b)(%eax),%eax 636 pushl %eax 637 iret 638 outofnmi: 639 /* 640 * Call the callchain capture hook after turning interrupts back on. 641 */ 642 movl pmc_hook,%ecx 643 orl %ecx,%ecx 644 jz doreti_exit 645 pushl %esp /* frame pointer */ 646 pushl $PMC_FN_USER_CALLCHAIN /* command */ 647 movl PCPU(CURTHREAD),%eax 648 pushl %eax /* curthread */ 649 sti 650 call *%ecx 651 addl $12,%esp 652 jmp doreti_ast 653 #endif 654 655 ENTRY(end_exceptions)
Cache object: dd541f4c55ca8a846fa448e30516ca91
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