1 /*-
2 * Copyright (c) 1989, 1990 William F. Jolitz.
3 * Copyright (c) 1990 The Regents of the University of California.
4 * Copyright (c) 2007, 2018 The FreeBSD Foundation
5 * All rights reserved.
6 *
7 * Portions of this software were developed by A. Joseph Koshy under
8 * sponsorship from the FreeBSD Foundation and Google, Inc.
9 * Portions of this software were developed by Konstantin Belousov
10 * <kib@FreeBSD.org> under sponsorship from the FreeBSD Foundation.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * $FreeBSD$
37 */
38
39 #include "opt_apic.h"
40 #include "opt_atpic.h"
41 #include "opt_hwpmc_hooks.h"
42 #include "opt_hyperv.h"
43
44 #include "assym.inc"
45
46 #include <machine/psl.h>
47 #include <machine/asmacros.h>
48 #include <machine/trap.h>
49
50 #ifdef KDTRACE_HOOKS
51 .bss
52 .globl dtrace_invop_jump_addr
53 .align 4
54 .type dtrace_invop_jump_addr, @object
55 .size dtrace_invop_jump_addr, 4
56 dtrace_invop_jump_addr:
57 .zero 4
58 .globl dtrace_invop_calltrap_addr
59 .align 4
60 .type dtrace_invop_calltrap_addr, @object
61 .size dtrace_invop_calltrap_addr, 4
62 dtrace_invop_calltrap_addr:
63 .zero 8
64 #endif
65 .text
66 ENTRY(start_exceptions)
67 .globl tramp_idleptd
68 tramp_idleptd: .long 0
69
70 /*****************************************************************************/
71 /* Trap handling */
72 /*****************************************************************************/
73 /*
74 * Trap and fault vector routines.
75 *
76 * All traps are 'interrupt gates', SDT_SYS386IGT. Interrupts are disabled
77 * by hardware to not allow interrupts until code switched to the kernel
78 * address space and the kernel thread stack.
79 *
80 * The cpu will push a certain amount of state onto the kernel stack for
81 * the current process. The amount of state depends on the type of trap
82 * and whether the trap crossed rings or not. See i386/include/frame.h.
83 * At the very least the current EFLAGS (status register, which includes
84 * the interrupt disable state prior to the trap), the code segment register,
85 * and the return instruction pointer are pushed by the cpu. The cpu
86 * will also push an 'error' code for certain traps. We push a dummy
87 * error code for those traps where the cpu doesn't in order to maintain
88 * a consistent frame. We also push a contrived 'trap number'.
89 *
90 * The cpu does not push the general registers, we must do that, and we
91 * must restore them prior to calling 'iret'. The cpu adjusts the %cs and
92 * %ss segment registers, but does not mess with %ds, %es, or %fs. Thus we
93 * must load them with appropriate values for supervisor mode operation.
94 *
95 * This code is not executed at the linked address, it is copied to the
96 * trampoline area. As the consequence, all code there and in included files
97 * must be PIC.
98 */
99
100 MCOUNT_LABEL(user)
101 MCOUNT_LABEL(btrap)
102
103 #define TRAP(a) pushl $(a) ; jmp alltraps
104
105 IDTVEC(div)
106 pushl $0; TRAP(T_DIVIDE)
107 IDTVEC(bpt)
108 pushl $0; TRAP(T_BPTFLT)
109 IDTVEC(dtrace_ret)
110 pushl $0; TRAP(T_DTRACE_RET)
111 IDTVEC(ofl)
112 pushl $0; TRAP(T_OFLOW)
113 IDTVEC(bnd)
114 pushl $0; TRAP(T_BOUND)
115 #ifndef KDTRACE_HOOKS
116 IDTVEC(ill)
117 pushl $0; TRAP(T_PRIVINFLT)
118 #endif
119 IDTVEC(dna)
120 pushl $0; TRAP(T_DNA)
121 IDTVEC(fpusegm)
122 pushl $0; TRAP(T_FPOPFLT)
123 IDTVEC(tss)
124 TRAP(T_TSSFLT)
125 IDTVEC(missing)
126 pushl $T_SEGNPFLT
127 jmp irettraps
128 IDTVEC(stk)
129 pushl $T_STKFLT
130 jmp irettraps
131 IDTVEC(prot)
132 pushl $T_PROTFLT
133 jmp irettraps
134 IDTVEC(page)
135 testl $PSL_VM, TF_EFLAGS-TF_ERR(%esp)
136 jnz upf
137 testb $SEL_RPL_MASK, TF_CS-TF_ERR(%esp)
138 jnz upf
139 cmpl $PMAP_TRM_MIN_ADDRESS, TF_EIP-TF_ERR(%esp)
140 jb upf
141
142 /*
143 * This is a handshake between copyout_fast.s and page fault
144 * handler. We check for page fault occuring at the special
145 * places in the copyout fast path, where page fault can
146 * legitimately happen while accessing either user space or
147 * kernel pageable memory, and return control to *%edx.
148 * We switch to the idleptd page table from a user page table,
149 * if needed.
150 */
151 pushl %eax
152 movl TF_EIP-TF_ERR+4(%esp), %eax
153 addl $1f, %eax
154 call 5f
155 1: cmpl $pf_x1, %eax
156 je 2f
157 cmpl $pf_x2, %eax
158 je 2f
159 cmpl $pf_x3, %eax
160 je 2f
161 cmpl $pf_x4, %eax
162 je 2f
163 cmpl $pf_x5, %eax
164 je 2f
165 cmpl $pf_x6, %eax
166 je 2f
167 cmpl $pf_x7, %eax
168 je 2f
169 cmpl $pf_x8, %eax
170 je 2f
171 cmpl $pf_y1, %eax
172 je 4f
173 cmpl $pf_y2, %eax
174 je 4f
175 jmp upf_eax
176 2: movl $tramp_idleptd, %eax
177 subl $3f, %eax
178 call 6f
179 3: movl (%eax), %eax
180 movl %eax, %cr3
181 4: popl %eax
182 movl %edx, TF_EIP-TF_ERR(%esp)
183 addl $4, %esp
184 iret
185 5: subl (%esp), %eax
186 retl
187 6: addl (%esp), %eax
188 retl
189
190 upf_eax:popl %eax
191 upf: pushl $T_PAGEFLT
192 jmp alltraps
193 IDTVEC(rsvd_pti)
194 IDTVEC(rsvd)
195 pushl $0; TRAP(T_RESERVED)
196 IDTVEC(fpu)
197 pushl $0; TRAP(T_ARITHTRAP)
198 IDTVEC(align)
199 TRAP(T_ALIGNFLT)
200 IDTVEC(xmm)
201 pushl $0; TRAP(T_XMMFLT)
202
203 /*
204 * All traps except ones for syscalls or invalid segment,
205 * jump to alltraps. If
206 * interrupts were enabled when the trap occurred, then interrupts
207 * are enabled now if the trap was through a trap gate, else
208 * disabled if the trap was through an interrupt gate. Note that
209 * int0x80_syscall is a trap gate. Interrupt gates are used by
210 * page faults, non-maskable interrupts, debug and breakpoint
211 * exceptions.
212 */
213 SUPERALIGN_TEXT
214 .globl alltraps
215 .type alltraps,@function
216 alltraps:
217 PUSH_FRAME2
218 alltraps_with_regs_pushed:
219 SET_KERNEL_SREGS
220 cld
221 KENTER
222 FAKE_MCOUNT(TF_EIP(%esp))
223 calltrap:
224 pushl %esp
225 movl $trap,%eax
226 call *%eax
227 add $4, %esp
228
229 /*
230 * Return via doreti to handle ASTs.
231 */
232 MEXITCOUNT
233 jmp doreti
234
235 .globl irettraps
236 .type irettraps,@function
237 irettraps:
238 testl $PSL_VM, TF_EFLAGS-TF_TRAPNO(%esp)
239 jnz alltraps
240 testb $SEL_RPL_MASK, TF_CS-TF_TRAPNO(%esp)
241 jnz alltraps
242
243 /*
244 * Kernel mode.
245 * The special case there is the kernel mode with user %cr3 and
246 * trampoline stack. We need to copy both current frame and the
247 * hardware portion of the frame we tried to return to, to the
248 * normal stack. This logic must follow the stack unwind order
249 * in doreti.
250 */
251 PUSH_FRAME2
252 SET_KERNEL_SREGS
253 cld
254 call 1f
255 1: popl %ebx
256 leal (doreti_iret - 1b)(%ebx), %edx
257 cmpl %edx, TF_EIP(%esp)
258 jne 2f
259 /* -8 because exception did not switch ring */
260 movl $(2 * TF_SZ - TF_EIP - 8), %ecx
261 jmp 5f
262 2: leal (doreti_popl_ds - 1b)(%ebx), %edx
263 cmpl %edx, TF_EIP(%esp)
264 jne 3f
265 movl $(2 * TF_SZ - TF_DS - 8), %ecx
266 jmp 5f
267 3: leal (doreti_popl_es - 1b)(%ebx), %edx
268 cmpl %edx, TF_EIP(%esp)
269 jne 4f
270 movl $(2 * TF_SZ - TF_ES - 8), %ecx
271 jmp 5f
272 4: leal (doreti_popl_fs - 1b)(%ebx), %edx
273 cmpl %edx, TF_EIP(%esp)
274 jne calltrap
275 movl $(2 * TF_SZ - TF_FS - 8), %ecx
276 5: cmpl $PMAP_TRM_MIN_ADDRESS, %esp /* trampoline stack ? */
277 jb calltrap /* if not, no need to change stacks */
278 movl (tramp_idleptd - 1b)(%ebx), %eax
279 movl %eax, %cr3
280 movl PCPU(KESP0), %edx
281 subl %ecx, %edx
282 movl %edx, %edi
283 movl %esp, %esi
284 rep; movsb
285 movl %edx, %esp
286 /* kernel mode, normal */
287 jmp calltrap
288
289 /*
290 * Privileged instruction fault.
291 */
292 #ifdef KDTRACE_HOOKS
293 SUPERALIGN_TEXT
294 IDTVEC(ill)
295 /*
296 * Check if this is a user fault. If so, just handle it as a normal
297 * trap.
298 */
299 testl $PSL_VM, 8(%esp) /* and vm86 mode. */
300 jnz norm_ill
301 cmpl $GSEL_KPL, 4(%esp) /* Check the code segment */
302 jne norm_ill
303
304 /*
305 * Check if a DTrace hook is registered. The trampoline cannot
306 * be instrumented.
307 */
308 cmpl $0, dtrace_invop_jump_addr
309 je norm_ill
310
311 /*
312 * This is a kernel instruction fault that might have been caused
313 * by a DTrace provider.
314 */
315 pushal
316 cld
317
318 /*
319 * Set our jump address for the jump back in the event that
320 * the exception wasn't caused by DTrace at all.
321 */
322 movl $norm_ill, dtrace_invop_calltrap_addr
323
324 /* Jump to the code hooked in by DTrace. */
325 jmpl *dtrace_invop_jump_addr
326
327 /*
328 * Process the instruction fault in the normal way.
329 */
330 norm_ill:
331 pushl $0
332 pushl $T_PRIVINFLT
333 jmp alltraps
334 #endif
335
336 /*
337 * See comment in the handler for the kernel case T_TRCTRAP in trap.c.
338 * The exception handler must be ready to execute with wrong %cr3.
339 * We save original %cr3 in frame->tf_err, similarly to NMI and MCE
340 * handlers.
341 */
342 IDTVEC(dbg)
343 pushl $0
344 pushl $T_TRCTRAP
345 PUSH_FRAME2
346 SET_KERNEL_SREGS
347 cld
348 movl %cr3, %eax
349 movl %eax, TF_ERR(%esp)
350 call 1f
351 1: popl %eax
352 movl (tramp_idleptd - 1b)(%eax), %eax
353 movl %eax, %cr3
354 FAKE_MCOUNT(TF_EIP(%esp))
355 testl $PSL_VM, TF_EFLAGS(%esp)
356 jnz dbg_user
357 testb $SEL_RPL_MASK,TF_CS(%esp)
358 jz calltrap
359 dbg_user:
360 NMOVE_STACKS
361 movl $handle_ibrs_entry,%eax
362 call *%eax
363 pushl %esp
364 movl $trap,%eax
365 call *%eax
366 add $4, %esp
367 movl $T_RESERVED, TF_TRAPNO(%esp)
368 MEXITCOUNT
369 jmp doreti
370
371 IDTVEC(mchk)
372 pushl $0
373 pushl $T_MCHK
374 jmp nmi_mchk_common
375
376 IDTVEC(nmi)
377 pushl $0
378 pushl $T_NMI
379 nmi_mchk_common:
380 PUSH_FRAME2
381 SET_KERNEL_SREGS
382 cld
383 /*
384 * Save %cr3 into tf_err. There is no good place to put it.
385 * Always reload %cr3, since we might have interrupted the
386 * kernel entry or exit.
387 * Do not switch to the thread kernel stack, otherwise we might
388 * obliterate the previous context partially copied from the
389 * trampoline stack.
390 * Do not re-enable IBRS, there is no good place to store
391 * previous state if we come from the kernel.
392 */
393 movl %cr3, %eax
394 movl %eax, TF_ERR(%esp)
395 call 1f
396 1: popl %eax
397 movl (tramp_idleptd - 1b)(%eax), %eax
398 movl %eax, %cr3
399 FAKE_MCOUNT(TF_EIP(%esp))
400 jmp calltrap
401
402 /*
403 * Trap gate entry for syscalls (int 0x80).
404 * This is used by FreeBSD ELF executables, "new" a.out executables, and all
405 * Linux executables.
406 *
407 * Even though the name says 'int0x80', this is actually a trap gate, not an
408 * interrupt gate. Thus interrupts are enabled on entry just as they are for
409 * a normal syscall.
410 */
411 SUPERALIGN_TEXT
412 IDTVEC(int0x80_syscall)
413 pushl $2 /* sizeof "int 0x80" */
414 pushl $0 /* tf_trapno */
415 PUSH_FRAME2
416 SET_KERNEL_SREGS
417 cld
418 MOVE_STACKS
419 movl $handle_ibrs_entry,%eax
420 call *%eax
421 sti
422 FAKE_MCOUNT(TF_EIP(%esp))
423 pushl %esp
424 movl $syscall, %eax
425 call *%eax
426 add $4, %esp
427 MEXITCOUNT
428 jmp doreti
429
430 ENTRY(fork_trampoline)
431 pushl %esp /* trapframe pointer */
432 pushl %ebx /* arg1 */
433 pushl %esi /* function */
434 movl $fork_exit, %eax
435 call *%eax
436 addl $12,%esp
437 /* cut from syscall */
438
439 /*
440 * Return via doreti to handle ASTs.
441 */
442 MEXITCOUNT
443 jmp doreti
444
445
446 /*
447 * To efficiently implement classification of trap and interrupt handlers
448 * for profiling, there must be only trap handlers between the labels btrap
449 * and bintr, and only interrupt handlers between the labels bintr and
450 * eintr. This is implemented (partly) by including files that contain
451 * some of the handlers. Before including the files, set up a normal asm
452 * environment so that the included files doen't need to know that they are
453 * included.
454 */
455
456 .data
457 .p2align 4
458 .text
459 SUPERALIGN_TEXT
460 MCOUNT_LABEL(bintr)
461
462 #ifdef DEV_ATPIC
463 #include <i386/i386/atpic_vector.s>
464 #endif
465
466 #if defined(DEV_APIC) && defined(DEV_ATPIC)
467 .data
468 .p2align 4
469 .text
470 SUPERALIGN_TEXT
471 #endif
472
473 #ifdef DEV_APIC
474 #include <i386/i386/apic_vector.s>
475 #endif
476
477 #ifdef HYPERV
478 .data
479 .p2align 4
480 .text
481 SUPERALIGN_TEXT
482 #include <dev/hyperv/vmbus/i386/vmbus_vector.S>
483 #endif
484
485 .data
486 .p2align 4
487 .text
488 SUPERALIGN_TEXT
489 #include <i386/i386/vm86bios.s>
490
491 .text
492 MCOUNT_LABEL(eintr)
493
494 #include <i386/i386/copyout_fast.s>
495
496 /*
497 * void doreti(struct trapframe)
498 *
499 * Handle return from interrupts, traps and syscalls.
500 */
501 .text
502 SUPERALIGN_TEXT
503 .type doreti,@function
504 .globl doreti
505 doreti:
506 FAKE_MCOUNT($bintr) /* init "from" bintr -> doreti */
507 doreti_next:
508 /*
509 * Check if ASTs can be handled now. ASTs cannot be safely
510 * processed when returning from an NMI.
511 */
512 cmpb $T_NMI,TF_TRAPNO(%esp)
513 #ifdef HWPMC_HOOKS
514 je doreti_nmi
515 #else
516 je doreti_exit
517 #endif
518 /*
519 * PSL_VM must be checked first since segment registers only
520 * have an RPL in non-VM86 mode.
521 * ASTs can not be handled now if we are in a vm86 call.
522 */
523 testl $PSL_VM,TF_EFLAGS(%esp)
524 jz doreti_notvm86
525 movl PCPU(CURPCB),%ecx
526 testl $PCB_VM86CALL,PCB_FLAGS(%ecx)
527 jz doreti_ast
528 jmp doreti_popl_fs
529
530 doreti_notvm86:
531 testb $SEL_RPL_MASK,TF_CS(%esp) /* are we returning to user mode? */
532 jz doreti_exit /* can't handle ASTs now if not */
533
534 doreti_ast:
535 /*
536 * Check for ASTs atomically with returning. Disabling CPU
537 * interrupts provides sufficient locking even in the SMP case,
538 * since we will be informed of any new ASTs by an IPI.
539 */
540 cli
541 movl PCPU(CURTHREAD),%eax
542 testl $TDF_ASTPENDING | TDF_NEEDRESCHED,TD_FLAGS(%eax)
543 je doreti_exit
544 sti
545 pushl %esp /* pass a pointer to the trapframe */
546 movl $ast, %eax
547 call *%eax
548 add $4,%esp
549 jmp doreti_ast
550
551 /*
552 * doreti_exit: pop registers, iret.
553 *
554 * The segment register pop is a special case, since it may
555 * fault if (for example) a sigreturn specifies bad segment
556 * registers. The fault is handled in trap.c.
557 */
558 doreti_exit:
559 MEXITCOUNT
560
561 cmpl $T_NMI, TF_TRAPNO(%esp)
562 je doreti_iret_nmi
563 cmpl $T_MCHK, TF_TRAPNO(%esp)
564 je doreti_iret_nmi
565 cmpl $T_TRCTRAP, TF_TRAPNO(%esp)
566 je doreti_iret_nmi
567 testl $PSL_VM,TF_EFLAGS(%esp)
568 jnz 1f /* PCB_VM86CALL is not set */
569 testl $SEL_RPL_MASK, TF_CS(%esp)
570 jz doreti_popl_fs
571 1: movl $handle_ibrs_exit,%eax
572 call *%eax
573 movl mds_handler,%eax
574 call *%eax
575 movl %esp, %esi
576 movl PCPU(TRAMPSTK), %edx
577 movl $TF_SZ, %ecx
578 testl $PSL_VM,TF_EFLAGS(%esp)
579 jz 2f /* PCB_VM86CALL is not set */
580 addl $VM86_STACK_SPACE, %ecx
581 2: subl %ecx, %edx
582 movl %edx, %edi
583 rep; movsb
584 movl %edx, %esp
585 movl PCPU(CURPCB),%eax
586 movl PCB_CR3(%eax), %eax
587 movl %eax, %cr3
588
589 .globl doreti_popl_fs
590 doreti_popl_fs:
591 popl %fs
592 .globl doreti_popl_es
593 doreti_popl_es:
594 popl %es
595 .globl doreti_popl_ds
596 doreti_popl_ds:
597 popl %ds
598 popal
599 addl $8,%esp
600 .globl doreti_iret
601 doreti_iret:
602 iret
603
604 doreti_iret_nmi:
605 movl TF_ERR(%esp), %eax
606 movl %eax, %cr3
607 jmp doreti_popl_fs
608
609 /*
610 * doreti_iret_fault and friends. Alternative return code for
611 * the case where we get a fault in the doreti_exit code
612 * above. trap() (i386/i386/trap.c) catches this specific
613 * case, and continues in the corresponding place in the code
614 * below.
615 *
616 * If the fault occurred during return to usermode, we recreate
617 * the trap frame and call trap() to send a signal. Otherwise
618 * the kernel was tricked into fault by attempt to restore invalid
619 * usermode segment selectors on return from nested fault or
620 * interrupt, where interrupted kernel entry code not yet loaded
621 * kernel selectors. In the latter case, emulate iret and zero
622 * the invalid selector.
623 */
624 ALIGN_TEXT
625 .globl doreti_iret_fault
626 doreti_iret_fault:
627 pushl $0 /* tf_err */
628 pushl $0 /* tf_trapno XXXKIB: provide more useful value ? */
629 pushal
630 pushl $0
631 movw %ds,(%esp)
632 .globl doreti_popl_ds_fault
633 doreti_popl_ds_fault:
634 testb $SEL_RPL_MASK,TF_CS-TF_DS(%esp)
635 jz doreti_popl_ds_kfault
636 pushl $0
637 movw %es,(%esp)
638 .globl doreti_popl_es_fault
639 doreti_popl_es_fault:
640 testb $SEL_RPL_MASK,TF_CS-TF_ES(%esp)
641 jz doreti_popl_es_kfault
642 pushl $0
643 movw %fs,(%esp)
644 .globl doreti_popl_fs_fault
645 doreti_popl_fs_fault:
646 testb $SEL_RPL_MASK,TF_CS-TF_FS(%esp)
647 jz doreti_popl_fs_kfault
648 movl $0,TF_ERR(%esp) /* XXX should be the error code */
649 movl $T_PROTFLT,TF_TRAPNO(%esp)
650 SET_KERNEL_SREGS
651 jmp calltrap
652
653 doreti_popl_ds_kfault:
654 movl $0,(%esp)
655 jmp doreti_popl_ds
656 doreti_popl_es_kfault:
657 movl $0,(%esp)
658 jmp doreti_popl_es
659 doreti_popl_fs_kfault:
660 movl $0,(%esp)
661 jmp doreti_popl_fs
662
663 #ifdef HWPMC_HOOKS
664 doreti_nmi:
665 /*
666 * Since we are returning from an NMI, check if the current trap
667 * was from user mode and if so whether the current thread
668 * needs a user call chain capture.
669 */
670 testl $PSL_VM, TF_EFLAGS(%esp)
671 jnz doreti_exit
672 testb $SEL_RPL_MASK,TF_CS(%esp)
673 jz doreti_exit
674 movl PCPU(CURTHREAD),%eax /* curthread present? */
675 orl %eax,%eax
676 jz doreti_exit
677 testl $TDP_CALLCHAIN,TD_PFLAGS(%eax) /* flagged for capture? */
678 jz doreti_exit
679 /*
680 * Switch to thread stack. Reset tf_trapno to not indicate NMI,
681 * to cause normal userspace exit.
682 */
683 movl $T_RESERVED, TF_TRAPNO(%esp)
684 NMOVE_STACKS
685 /*
686 * Take the processor out of NMI mode by executing a fake "iret".
687 */
688 pushfl
689 pushl %cs
690 call 1f
691 1: popl %eax
692 leal (outofnmi-1b)(%eax),%eax
693 pushl %eax
694 iret
695 outofnmi:
696 /*
697 * Call the callchain capture hook after turning interrupts back on.
698 */
699 movl pmc_hook,%ecx
700 orl %ecx,%ecx
701 jz doreti_exit
702 pushl %esp /* frame pointer */
703 pushl $PMC_FN_USER_CALLCHAIN /* command */
704 movl PCPU(CURTHREAD),%eax
705 pushl %eax /* curthread */
706 sti
707 call *%ecx
708 addl $12,%esp
709 jmp doreti_ast
710 #endif
711
712 ENTRY(end_exceptions)
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