Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/exception.s
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1 /*- 2 * Copyright (c) 1989, 1990 William F. Jolitz. 3 * Copyright (c) 1990 The Regents of the University of California. 4 * Copyright (c) 2007 The FreeBSD Foundation 5 * All rights reserved. 6 * 7 * Portions of this software were developed by A. Joseph Koshy under 8 * sponsorship from the FreeBSD Foundation and Google, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * $FreeBSD: releng/8.2/sys/i386/i386/exception.s 215026 2010-11-09 01:57:56Z attilio $ 35 */ 36 37 #include "opt_apic.h" 38 #include "opt_hwpmc_hooks.h" 39 #include "opt_kdtrace.h" 40 #include "opt_npx.h" 41 42 #include <machine/asmacros.h> 43 #include <machine/psl.h> 44 #include <machine/trap.h> 45 46 #include "assym.s" 47 48 #define SEL_RPL_MASK 0x0003 49 #define GSEL_KPL 0x0020 /* GSEL(GCODE_SEL, SEL_KPL) */ 50 51 #ifdef KDTRACE_HOOKS 52 .bss 53 .globl dtrace_invop_jump_addr 54 .align 4 55 .type dtrace_invop_jump_addr, @object 56 .size dtrace_invop_jump_addr, 4 57 dtrace_invop_jump_addr: 58 .zero 4 59 .globl dtrace_invop_calltrap_addr 60 .align 4 61 .type dtrace_invop_calltrap_addr, @object 62 .size dtrace_invop_calltrap_addr, 4 63 dtrace_invop_calltrap_addr: 64 .zero 8 65 #endif 66 .text 67 #ifdef HWPMC_HOOKS 68 ENTRY(start_exceptions) 69 #endif 70 /*****************************************************************************/ 71 /* Trap handling */ 72 /*****************************************************************************/ 73 /* 74 * Trap and fault vector routines. 75 * 76 * Most traps are 'trap gates', SDT_SYS386TGT. A trap gate pushes state on 77 * the stack that mostly looks like an interrupt, but does not disable 78 * interrupts. A few of the traps we are use are interrupt gates, 79 * SDT_SYS386IGT, which are nearly the same thing except interrupts are 80 * disabled on entry. 81 * 82 * The cpu will push a certain amount of state onto the kernel stack for 83 * the current process. The amount of state depends on the type of trap 84 * and whether the trap crossed rings or not. See i386/include/frame.h. 85 * At the very least the current EFLAGS (status register, which includes 86 * the interrupt disable state prior to the trap), the code segment register, 87 * and the return instruction pointer are pushed by the cpu. The cpu 88 * will also push an 'error' code for certain traps. We push a dummy 89 * error code for those traps where the cpu doesn't in order to maintain 90 * a consistent frame. We also push a contrived 'trap number'. 91 * 92 * The cpu does not push the general registers, we must do that, and we 93 * must restore them prior to calling 'iret'. The cpu adjusts the %cs and 94 * %ss segment registers, but does not mess with %ds, %es, or %fs. Thus we 95 * must load them with appropriate values for supervisor mode operation. 96 */ 97 98 MCOUNT_LABEL(user) 99 MCOUNT_LABEL(btrap) 100 101 #define TRAP(a) pushl $(a) ; jmp alltraps 102 103 IDTVEC(div) 104 pushl $0; TRAP(T_DIVIDE) 105 IDTVEC(dbg) 106 pushl $0; TRAP(T_TRCTRAP) 107 IDTVEC(nmi) 108 pushl $0; TRAP(T_NMI) 109 IDTVEC(bpt) 110 pushl $0; TRAP(T_BPTFLT) 111 IDTVEC(ofl) 112 pushl $0; TRAP(T_OFLOW) 113 IDTVEC(bnd) 114 pushl $0; TRAP(T_BOUND) 115 #ifndef KDTRACE_HOOKS 116 IDTVEC(ill) 117 pushl $0; TRAP(T_PRIVINFLT) 118 #endif 119 IDTVEC(dna) 120 pushl $0; TRAP(T_DNA) 121 IDTVEC(fpusegm) 122 pushl $0; TRAP(T_FPOPFLT) 123 IDTVEC(tss) 124 TRAP(T_TSSFLT) 125 IDTVEC(missing) 126 TRAP(T_SEGNPFLT) 127 IDTVEC(stk) 128 TRAP(T_STKFLT) 129 IDTVEC(prot) 130 TRAP(T_PROTFLT) 131 IDTVEC(page) 132 TRAP(T_PAGEFLT) 133 IDTVEC(mchk) 134 pushl $0; TRAP(T_MCHK) 135 IDTVEC(rsvd) 136 pushl $0; TRAP(T_RESERVED) 137 IDTVEC(fpu) 138 pushl $0; TRAP(T_ARITHTRAP) 139 IDTVEC(align) 140 TRAP(T_ALIGNFLT) 141 IDTVEC(xmm) 142 pushl $0; TRAP(T_XMMFLT) 143 144 /* 145 * alltraps entry point. Interrupts are enabled if this was a trap 146 * gate (TGT), else disabled if this was an interrupt gate (IGT). 147 * Note that int0x80_syscall is a trap gate. Interrupt gates are 148 * used by page faults, non-maskable interrupts, debug and breakpoint 149 * exceptions. 150 */ 151 152 SUPERALIGN_TEXT 153 .globl alltraps 154 .type alltraps,@function 155 alltraps: 156 pushal 157 pushl %ds 158 pushl %es 159 pushl %fs 160 alltraps_with_regs_pushed: 161 SET_KERNEL_SREGS 162 cld 163 FAKE_MCOUNT(TF_EIP(%esp)) 164 calltrap: 165 pushl %esp 166 call trap 167 add $4, %esp 168 169 /* 170 * Return via doreti to handle ASTs. 171 */ 172 MEXITCOUNT 173 jmp doreti 174 175 /* 176 * Privileged instruction fault. 177 */ 178 #ifdef KDTRACE_HOOKS 179 SUPERALIGN_TEXT 180 IDTVEC(ill) 181 /* Check if there is no DTrace hook registered. */ 182 cmpl $0,dtrace_invop_jump_addr 183 je norm_ill 184 185 /* Check if this is a user fault. */ 186 cmpl $GSEL_KPL, 4(%esp) /* Check the code segment. */ 187 188 /* If so, just handle it as a normal trap. */ 189 jne norm_ill 190 191 /* 192 * This is a kernel instruction fault that might have been caused 193 * by a DTrace provider. 194 */ 195 pushal /* Push all registers onto the stack. */ 196 197 /* 198 * Set our jump address for the jump back in the event that 199 * the exception wasn't caused by DTrace at all. 200 */ 201 movl $norm_ill, dtrace_invop_calltrap_addr 202 203 /* Jump to the code hooked in by DTrace. */ 204 jmpl *dtrace_invop_jump_addr 205 206 /* 207 * Process the instruction fault in the normal way. 208 */ 209 norm_ill: 210 pushl $0 211 TRAP(T_PRIVINFLT) 212 #endif 213 214 /* 215 * SYSCALL CALL GATE (old entry point for a.out binaries) 216 * 217 * The intersegment call has been set up to specify one dummy parameter. 218 * 219 * This leaves a place to put eflags so that the call frame can be 220 * converted to a trap frame. Note that the eflags is (semi-)bogusly 221 * pushed into (what will be) tf_err and then copied later into the 222 * final spot. It has to be done this way because esp can't be just 223 * temporarily altered for the pushfl - an interrupt might come in 224 * and clobber the saved cs/eip. 225 */ 226 SUPERALIGN_TEXT 227 IDTVEC(lcall_syscall) 228 pushfl /* save eflags */ 229 popl 8(%esp) /* shuffle into tf_eflags */ 230 pushl $7 /* sizeof "lcall 7,0" */ 231 subl $4,%esp /* skip over tf_trapno */ 232 pushal 233 pushl %ds 234 pushl %es 235 pushl %fs 236 SET_KERNEL_SREGS 237 cld 238 FAKE_MCOUNT(TF_EIP(%esp)) 239 pushl %esp 240 call syscall 241 add $4, %esp 242 MEXITCOUNT 243 jmp doreti 244 245 /* 246 * Call gate entry for FreeBSD ELF and Linux/NetBSD syscall (int 0x80) 247 * 248 * Even though the name says 'int0x80', this is actually a TGT (trap gate) 249 * rather then an IGT (interrupt gate). Thus interrupts are enabled on 250 * entry just as they are for a normal syscall. 251 */ 252 SUPERALIGN_TEXT 253 IDTVEC(int0x80_syscall) 254 pushl $2 /* sizeof "int 0x80" */ 255 subl $4,%esp /* skip over tf_trapno */ 256 pushal 257 pushl %ds 258 pushl %es 259 pushl %fs 260 SET_KERNEL_SREGS 261 cld 262 FAKE_MCOUNT(TF_EIP(%esp)) 263 pushl %esp 264 call syscall 265 add $4, %esp 266 MEXITCOUNT 267 jmp doreti 268 269 ENTRY(fork_trampoline) 270 pushl %esp /* trapframe pointer */ 271 pushl %ebx /* arg1 */ 272 pushl %esi /* function */ 273 call fork_exit 274 addl $12,%esp 275 /* cut from syscall */ 276 277 /* 278 * Return via doreti to handle ASTs. 279 */ 280 MEXITCOUNT 281 jmp doreti 282 283 284 /* 285 * To efficiently implement classification of trap and interrupt handlers 286 * for profiling, there must be only trap handlers between the labels btrap 287 * and bintr, and only interrupt handlers between the labels bintr and 288 * eintr. This is implemented (partly) by including files that contain 289 * some of the handlers. Before including the files, set up a normal asm 290 * environment so that the included files doen't need to know that they are 291 * included. 292 */ 293 294 .data 295 .p2align 4 296 .text 297 SUPERALIGN_TEXT 298 MCOUNT_LABEL(bintr) 299 300 #include <i386/i386/atpic_vector.s> 301 302 #ifdef DEV_APIC 303 .data 304 .p2align 4 305 .text 306 SUPERALIGN_TEXT 307 308 #include <i386/i386/apic_vector.s> 309 #endif 310 311 .data 312 .p2align 4 313 .text 314 SUPERALIGN_TEXT 315 #include <i386/i386/vm86bios.s> 316 317 .text 318 MCOUNT_LABEL(eintr) 319 320 /* 321 * void doreti(struct trapframe) 322 * 323 * Handle return from interrupts, traps and syscalls. 324 */ 325 .text 326 SUPERALIGN_TEXT 327 .type doreti,@function 328 doreti: 329 FAKE_MCOUNT($bintr) /* init "from" bintr -> doreti */ 330 doreti_next: 331 /* 332 * Check if ASTs can be handled now. ASTs cannot be safely 333 * processed when returning from an NMI. 334 */ 335 cmpb $T_NMI,TF_TRAPNO(%esp) 336 #ifdef HWPMC_HOOKS 337 je doreti_nmi 338 #else 339 je doreti_exit 340 #endif 341 /* 342 * PSL_VM must be checked first since segment registers only 343 * have an RPL in non-VM86 mode. 344 */ 345 testl $PSL_VM,TF_EFLAGS(%esp) /* are we in vm86 mode? */ 346 jz doreti_notvm86 347 movl PCPU(CURPCB),%ecx 348 testl $PCB_VM86CALL,PCB_FLAGS(%ecx) /* are we in a vm86 call? */ 349 jz doreti_ast /* can handle ASTS now if not */ 350 jmp doreti_exit 351 352 doreti_notvm86: 353 testb $SEL_RPL_MASK,TF_CS(%esp) /* are we returning to user mode? */ 354 jz doreti_exit /* can't handle ASTs now if not */ 355 356 doreti_ast: 357 /* 358 * Check for ASTs atomically with returning. Disabling CPU 359 * interrupts provides sufficient locking even in the SMP case, 360 * since we will be informed of any new ASTs by an IPI. 361 */ 362 cli 363 movl PCPU(CURTHREAD),%eax 364 testl $TDF_ASTPENDING | TDF_NEEDRESCHED,TD_FLAGS(%eax) 365 je doreti_exit 366 sti 367 pushl %esp /* pass a pointer to the trapframe */ 368 call ast 369 add $4,%esp 370 jmp doreti_ast 371 372 /* 373 * doreti_exit: pop registers, iret. 374 * 375 * The segment register pop is a special case, since it may 376 * fault if (for example) a sigreturn specifies bad segment 377 * registers. The fault is handled in trap.c. 378 */ 379 doreti_exit: 380 MEXITCOUNT 381 382 .globl doreti_popl_fs 383 doreti_popl_fs: 384 popl %fs 385 .globl doreti_popl_es 386 doreti_popl_es: 387 popl %es 388 .globl doreti_popl_ds 389 doreti_popl_ds: 390 popl %ds 391 popal 392 addl $8,%esp 393 .globl doreti_iret 394 doreti_iret: 395 iret 396 397 /* 398 * doreti_iret_fault and friends. Alternative return code for 399 * the case where we get a fault in the doreti_exit code 400 * above. trap() (i386/i386/trap.c) catches this specific 401 * case, sends the process a signal and continues in the 402 * corresponding place in the code below. 403 */ 404 ALIGN_TEXT 405 .globl doreti_iret_fault 406 doreti_iret_fault: 407 subl $8,%esp 408 pushal 409 pushl %ds 410 .globl doreti_popl_ds_fault 411 doreti_popl_ds_fault: 412 pushl %es 413 .globl doreti_popl_es_fault 414 doreti_popl_es_fault: 415 pushl %fs 416 .globl doreti_popl_fs_fault 417 doreti_popl_fs_fault: 418 movl $0,TF_ERR(%esp) /* XXX should be the error code */ 419 movl $T_PROTFLT,TF_TRAPNO(%esp) 420 jmp alltraps_with_regs_pushed 421 #ifdef HWPMC_HOOKS 422 doreti_nmi: 423 /* 424 * Since we are returning from an NMI, check if the current trap 425 * was from user mode and if so whether the current thread 426 * needs a user call chain capture. 427 */ 428 testb $SEL_RPL_MASK,TF_CS(%esp) 429 jz doreti_exit 430 movl PCPU(CURTHREAD),%eax /* curthread present? */ 431 orl %eax,%eax 432 jz doreti_exit 433 testl $TDP_CALLCHAIN,TD_PFLAGS(%eax) /* flagged for capture? */ 434 jz doreti_exit 435 /* 436 * Take the processor out of NMI mode by executing a fake "iret". 437 */ 438 pushfl 439 pushl %cs 440 pushl $outofnmi 441 iret 442 outofnmi: 443 /* 444 * Call the callchain capture hook after turning interrupts back on. 445 */ 446 movl pmc_hook,%ecx 447 orl %ecx,%ecx 448 jz doreti_exit 449 pushl %esp /* frame pointer */ 450 pushl $PMC_FN_USER_CALLCHAIN /* command */ 451 movl PCPU(CURTHREAD),%eax 452 pushl %eax /* curthread */ 453 sti 454 call *%ecx 455 addl $12,%esp 456 jmp doreti_ast 457 ENTRY(end_exceptions) 458 #endif
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