The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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sys/i386/i386/exception.s

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    1 /*-
    2  * Copyright (c) 1989, 1990 William F. Jolitz.
    3  * Copyright (c) 1990 The Regents of the University of California.
    4  * Copyright (c) 2007 The FreeBSD Foundation
    5  * All rights reserved.
    6  *
    7  * Portions of this software were developed by A. Joseph Koshy under
    8  * sponsorship from the FreeBSD Foundation and Google, Inc.
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 4. Neither the name of the University nor the names of its contributors
   19  *    may be used to endorse or promote products derived from this software
   20  *    without specific prior written permission.
   21  *
   22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   32  * SUCH DAMAGE.
   33  *
   34  * $FreeBSD: releng/9.1/sys/i386/i386/exception.s 234144 2012-04-11 20:04:31Z jhb $
   35  */
   36 
   37 #include "opt_apic.h"
   38 #include "opt_atpic.h"
   39 #include "opt_hwpmc_hooks.h"
   40 #include "opt_kdtrace.h"
   41 #include "opt_npx.h"
   42 
   43 #include <machine/asmacros.h>
   44 #include <machine/psl.h>
   45 #include <machine/trap.h>
   46 
   47 #include "assym.s"
   48 
   49 #define SEL_RPL_MASK    0x0003
   50 #define GSEL_KPL        0x0020  /* GSEL(GCODE_SEL, SEL_KPL) */
   51 
   52 #ifdef KDTRACE_HOOKS
   53         .bss
   54         .globl  dtrace_invop_jump_addr
   55         .align  4
   56         .type   dtrace_invop_jump_addr, @object
   57         .size   dtrace_invop_jump_addr, 4
   58 dtrace_invop_jump_addr:
   59         .zero   4
   60         .globl  dtrace_invop_calltrap_addr
   61         .align  4
   62         .type   dtrace_invop_calltrap_addr, @object
   63         .size   dtrace_invop_calltrap_addr, 4
   64 dtrace_invop_calltrap_addr:
   65         .zero   8
   66 #endif
   67         .text
   68 #ifdef HWPMC_HOOKS
   69         ENTRY(start_exceptions)
   70 #endif
   71 /*****************************************************************************/
   72 /* Trap handling                                                             */
   73 /*****************************************************************************/
   74 /*
   75  * Trap and fault vector routines.
   76  *
   77  * Most traps are 'trap gates', SDT_SYS386TGT.  A trap gate pushes state on
   78  * the stack that mostly looks like an interrupt, but does not disable 
   79  * interrupts.  A few of the traps we are use are interrupt gates, 
   80  * SDT_SYS386IGT, which are nearly the same thing except interrupts are
   81  * disabled on entry.
   82  *
   83  * The cpu will push a certain amount of state onto the kernel stack for
   84  * the current process.  The amount of state depends on the type of trap 
   85  * and whether the trap crossed rings or not.  See i386/include/frame.h.  
   86  * At the very least the current EFLAGS (status register, which includes 
   87  * the interrupt disable state prior to the trap), the code segment register,
   88  * and the return instruction pointer are pushed by the cpu.  The cpu 
   89  * will also push an 'error' code for certain traps.  We push a dummy 
   90  * error code for those traps where the cpu doesn't in order to maintain 
   91  * a consistent frame.  We also push a contrived 'trap number'.
   92  *
   93  * The cpu does not push the general registers, we must do that, and we 
   94  * must restore them prior to calling 'iret'.  The cpu adjusts the %cs and
   95  * %ss segment registers, but does not mess with %ds, %es, or %fs.  Thus we
   96  * must load them with appropriate values for supervisor mode operation.
   97  */
   98 
   99 MCOUNT_LABEL(user)
  100 MCOUNT_LABEL(btrap)
  101 
  102 #define TRAP(a)         pushl $(a) ; jmp alltraps
  103 
  104 IDTVEC(div)
  105         pushl $0; TRAP(T_DIVIDE)
  106 IDTVEC(dbg)
  107         pushl $0; TRAP(T_TRCTRAP)
  108 IDTVEC(nmi)
  109         pushl $0; TRAP(T_NMI)
  110 IDTVEC(bpt)
  111         pushl $0; TRAP(T_BPTFLT)
  112 IDTVEC(dtrace_ret)
  113         pushl $0; TRAP(T_DTRACE_RET)
  114 IDTVEC(ofl)
  115         pushl $0; TRAP(T_OFLOW)
  116 IDTVEC(bnd)
  117         pushl $0; TRAP(T_BOUND)
  118 #ifndef KDTRACE_HOOKS
  119 IDTVEC(ill)
  120         pushl $0; TRAP(T_PRIVINFLT)
  121 #endif
  122 IDTVEC(dna)
  123         pushl $0; TRAP(T_DNA)
  124 IDTVEC(fpusegm)
  125         pushl $0; TRAP(T_FPOPFLT)
  126 IDTVEC(tss)
  127         TRAP(T_TSSFLT)
  128 IDTVEC(missing)
  129         TRAP(T_SEGNPFLT)
  130 IDTVEC(stk)
  131         TRAP(T_STKFLT)
  132 IDTVEC(prot)
  133         TRAP(T_PROTFLT)
  134 IDTVEC(page)
  135         TRAP(T_PAGEFLT)
  136 IDTVEC(mchk)
  137         pushl $0; TRAP(T_MCHK)
  138 IDTVEC(rsvd)
  139         pushl $0; TRAP(T_RESERVED)
  140 IDTVEC(fpu)
  141         pushl $0; TRAP(T_ARITHTRAP)
  142 IDTVEC(align)
  143         TRAP(T_ALIGNFLT)
  144 IDTVEC(xmm)
  145         pushl $0; TRAP(T_XMMFLT)
  146 
  147         /*
  148          * alltraps entry point.  Interrupts are enabled if this was a trap
  149          * gate (TGT), else disabled if this was an interrupt gate (IGT).
  150          * Note that int0x80_syscall is a trap gate.   Interrupt gates are
  151          * used by page faults, non-maskable interrupts, debug and breakpoint
  152          * exceptions.
  153          */
  154 
  155         SUPERALIGN_TEXT
  156         .globl  alltraps
  157         .type   alltraps,@function
  158 alltraps:
  159         pushal
  160         pushl   %ds
  161         pushl   %es
  162         pushl   %fs
  163 alltraps_with_regs_pushed:
  164         SET_KERNEL_SREGS
  165         cld
  166         FAKE_MCOUNT(TF_EIP(%esp))
  167 calltrap:
  168         pushl   %esp
  169         call    trap
  170         add     $4, %esp
  171         
  172         /*
  173          * Return via doreti to handle ASTs.
  174          */
  175         MEXITCOUNT
  176         jmp     doreti
  177 
  178 /*
  179  * Privileged instruction fault.
  180  */
  181 #ifdef KDTRACE_HOOKS
  182         SUPERALIGN_TEXT
  183 IDTVEC(ill)
  184         /* Check if there is no DTrace hook registered. */
  185         cmpl    $0,dtrace_invop_jump_addr
  186         je      norm_ill
  187 
  188         /* Check if this is a user fault. */
  189         cmpl    $GSEL_KPL, 4(%esp)      /* Check the code segment. */
  190               
  191         /* If so, just handle it as a normal trap. */
  192         jne     norm_ill
  193               
  194         /*
  195          * This is a kernel instruction fault that might have been caused
  196          * by a DTrace provider.
  197          */
  198         pushal                          /* Push all registers onto the stack. */
  199 
  200         /*
  201          * Set our jump address for the jump back in the event that
  202          * the exception wasn't caused by DTrace at all.
  203          */
  204         movl    $norm_ill, dtrace_invop_calltrap_addr
  205 
  206         /* Jump to the code hooked in by DTrace. */
  207         jmpl    *dtrace_invop_jump_addr
  208 
  209         /*
  210          * Process the instruction fault in the normal way.
  211          */
  212 norm_ill:
  213         pushl $0
  214         TRAP(T_PRIVINFLT)
  215 #endif
  216 
  217 /*
  218  * SYSCALL CALL GATE (old entry point for a.out binaries)
  219  *
  220  * The intersegment call has been set up to specify one dummy parameter.
  221  *
  222  * This leaves a place to put eflags so that the call frame can be
  223  * converted to a trap frame. Note that the eflags is (semi-)bogusly
  224  * pushed into (what will be) tf_err and then copied later into the
  225  * final spot. It has to be done this way because esp can't be just
  226  * temporarily altered for the pushfl - an interrupt might come in
  227  * and clobber the saved cs/eip.
  228  */
  229         SUPERALIGN_TEXT
  230 IDTVEC(lcall_syscall)
  231         pushfl                          /* save eflags */
  232         popl    8(%esp)                 /* shuffle into tf_eflags */
  233         pushl   $7                      /* sizeof "lcall 7,0" */
  234         subl    $4,%esp                 /* skip over tf_trapno */
  235         pushal
  236         pushl   %ds
  237         pushl   %es
  238         pushl   %fs
  239         SET_KERNEL_SREGS
  240         cld
  241         FAKE_MCOUNT(TF_EIP(%esp))
  242         pushl   %esp
  243         call    syscall
  244         add     $4, %esp
  245         MEXITCOUNT
  246         jmp     doreti
  247 
  248 /*
  249  * Call gate entry for FreeBSD ELF and Linux/NetBSD syscall (int 0x80)
  250  *
  251  * Even though the name says 'int0x80', this is actually a TGT (trap gate)
  252  * rather then an IGT (interrupt gate).  Thus interrupts are enabled on
  253  * entry just as they are for a normal syscall.
  254  */
  255         SUPERALIGN_TEXT
  256 IDTVEC(int0x80_syscall)
  257         pushl   $2                      /* sizeof "int 0x80" */
  258         subl    $4,%esp                 /* skip over tf_trapno */
  259         pushal
  260         pushl   %ds
  261         pushl   %es
  262         pushl   %fs
  263         SET_KERNEL_SREGS
  264         cld
  265         FAKE_MCOUNT(TF_EIP(%esp))
  266         pushl   %esp
  267         call    syscall
  268         add     $4, %esp
  269         MEXITCOUNT
  270         jmp     doreti
  271 
  272 ENTRY(fork_trampoline)
  273         pushl   %esp                    /* trapframe pointer */
  274         pushl   %ebx                    /* arg1 */
  275         pushl   %esi                    /* function */
  276         call    fork_exit
  277         addl    $12,%esp
  278         /* cut from syscall */
  279 
  280         /*
  281          * Return via doreti to handle ASTs.
  282          */
  283         MEXITCOUNT
  284         jmp     doreti
  285 
  286 
  287 /*
  288  * To efficiently implement classification of trap and interrupt handlers
  289  * for profiling, there must be only trap handlers between the labels btrap
  290  * and bintr, and only interrupt handlers between the labels bintr and
  291  * eintr.  This is implemented (partly) by including files that contain
  292  * some of the handlers.  Before including the files, set up a normal asm
  293  * environment so that the included files doen't need to know that they are
  294  * included.
  295  */
  296 
  297         .data
  298         .p2align 4
  299         .text
  300         SUPERALIGN_TEXT
  301 MCOUNT_LABEL(bintr)
  302 
  303 #ifdef DEV_ATPIC
  304 #include <i386/i386/atpic_vector.s>
  305 #endif
  306 
  307 #if defined(DEV_APIC) && defined(DEV_ATPIC)
  308         .data
  309         .p2align 4
  310         .text
  311         SUPERALIGN_TEXT
  312 #endif
  313 
  314 #ifdef DEV_APIC
  315 #include <i386/i386/apic_vector.s>
  316 #endif
  317 
  318         .data
  319         .p2align 4
  320         .text
  321         SUPERALIGN_TEXT
  322 #include <i386/i386/vm86bios.s>
  323 
  324         .text
  325 MCOUNT_LABEL(eintr)
  326 
  327 /*
  328  * void doreti(struct trapframe)
  329  *
  330  * Handle return from interrupts, traps and syscalls.
  331  */
  332         .text
  333         SUPERALIGN_TEXT
  334         .type   doreti,@function
  335 doreti:
  336         FAKE_MCOUNT($bintr)             /* init "from" bintr -> doreti */
  337 doreti_next:
  338         /*
  339          * Check if ASTs can be handled now.  ASTs cannot be safely
  340          * processed when returning from an NMI.
  341          */
  342         cmpb    $T_NMI,TF_TRAPNO(%esp)
  343 #ifdef HWPMC_HOOKS
  344         je      doreti_nmi
  345 #else
  346         je      doreti_exit
  347 #endif
  348         /*
  349          * PSL_VM must be checked first since segment registers only
  350          * have an RPL in non-VM86 mode.
  351          */
  352         testl   $PSL_VM,TF_EFLAGS(%esp) /* are we in vm86 mode? */
  353         jz      doreti_notvm86
  354         movl    PCPU(CURPCB),%ecx
  355         testl   $PCB_VM86CALL,PCB_FLAGS(%ecx)   /* are we in a vm86 call? */
  356         jz      doreti_ast              /* can handle ASTS now if not */
  357         jmp     doreti_exit
  358 
  359 doreti_notvm86:
  360         testb   $SEL_RPL_MASK,TF_CS(%esp) /* are we returning to user mode? */
  361         jz      doreti_exit             /* can't handle ASTs now if not */
  362 
  363 doreti_ast:
  364         /*
  365          * Check for ASTs atomically with returning.  Disabling CPU
  366          * interrupts provides sufficient locking even in the SMP case,
  367          * since we will be informed of any new ASTs by an IPI.
  368          */
  369         cli
  370         movl    PCPU(CURTHREAD),%eax
  371         testl   $TDF_ASTPENDING | TDF_NEEDRESCHED,TD_FLAGS(%eax)
  372         je      doreti_exit
  373         sti
  374         pushl   %esp                    /* pass a pointer to the trapframe */
  375         call    ast
  376         add     $4,%esp
  377         jmp     doreti_ast
  378 
  379         /*
  380          * doreti_exit: pop registers, iret.
  381          *
  382          *      The segment register pop is a special case, since it may
  383          *      fault if (for example) a sigreturn specifies bad segment
  384          *      registers.  The fault is handled in trap.c.
  385          */
  386 doreti_exit:
  387         MEXITCOUNT
  388 
  389         .globl  doreti_popl_fs
  390 doreti_popl_fs:
  391         popl    %fs
  392         .globl  doreti_popl_es
  393 doreti_popl_es:
  394         popl    %es
  395         .globl  doreti_popl_ds
  396 doreti_popl_ds:
  397         popl    %ds
  398         popal
  399         addl    $8,%esp
  400         .globl  doreti_iret
  401 doreti_iret:
  402         iret
  403 
  404         /*
  405          * doreti_iret_fault and friends.  Alternative return code for
  406          * the case where we get a fault in the doreti_exit code
  407          * above.  trap() (i386/i386/trap.c) catches this specific
  408          * case, sends the process a signal and continues in the
  409          * corresponding place in the code below.
  410          */
  411         ALIGN_TEXT
  412         .globl  doreti_iret_fault
  413 doreti_iret_fault:
  414         subl    $8,%esp
  415         pushal
  416         pushl   %ds
  417         .globl  doreti_popl_ds_fault
  418 doreti_popl_ds_fault:
  419         pushl   %es
  420         .globl  doreti_popl_es_fault
  421 doreti_popl_es_fault:
  422         pushl   %fs
  423         .globl  doreti_popl_fs_fault
  424 doreti_popl_fs_fault:
  425         movl    $0,TF_ERR(%esp) /* XXX should be the error code */
  426         movl    $T_PROTFLT,TF_TRAPNO(%esp)
  427         jmp     alltraps_with_regs_pushed
  428 #ifdef HWPMC_HOOKS
  429 doreti_nmi:
  430         /*
  431          * Since we are returning from an NMI, check if the current trap
  432          * was from user mode and if so whether the current thread
  433          * needs a user call chain capture.
  434          */
  435         testb   $SEL_RPL_MASK,TF_CS(%esp)
  436         jz      doreti_exit
  437         movl    PCPU(CURTHREAD),%eax    /* curthread present? */
  438         orl     %eax,%eax
  439         jz      doreti_exit
  440         testl   $TDP_CALLCHAIN,TD_PFLAGS(%eax) /* flagged for capture? */
  441         jz      doreti_exit
  442         /*
  443          * Take the processor out of NMI mode by executing a fake "iret".
  444          */
  445         pushfl
  446         pushl   %cs
  447         pushl   $outofnmi
  448         iret
  449 outofnmi:
  450         /*
  451          * Call the callchain capture hook after turning interrupts back on.
  452          */
  453         movl    pmc_hook,%ecx
  454         orl     %ecx,%ecx
  455         jz      doreti_exit
  456         pushl   %esp                    /* frame pointer */
  457         pushl   $PMC_FN_USER_CALLCHAIN  /* command */
  458         movl    PCPU(CURTHREAD),%eax
  459         pushl   %eax                    /* curthread */
  460         sti
  461         call    *%ecx
  462         addl    $12,%esp
  463         jmp     doreti_ast
  464         ENTRY(end_exceptions)
  465 #endif

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