1 /*-
2 * Copyright (c) 1999 Michael Smith <msmith@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD: releng/10.3/sys/i386/i386/i686_mem.c 217506 2011-01-17 17:30:35Z jkim $");
29
30 #include <sys/param.h>
31 #include <sys/kernel.h>
32 #include <sys/systm.h>
33 #include <sys/malloc.h>
34 #include <sys/memrange.h>
35 #include <sys/smp.h>
36 #include <sys/sysctl.h>
37
38 #include <machine/cputypes.h>
39 #include <machine/md_var.h>
40 #include <machine/specialreg.h>
41
42 /*
43 * i686 memory range operations
44 *
45 * This code will probably be impenetrable without reference to the
46 * Intel Pentium Pro documentation.
47 */
48
49 static char *mem_owner_bios = "BIOS";
50
51 #define MR686_FIXMTRR (1<<0)
52
53 #define mrwithin(mr, a) \
54 (((a) >= (mr)->mr_base) && ((a) < ((mr)->mr_base + (mr)->mr_len)))
55 #define mroverlap(mra, mrb) \
56 (mrwithin(mra, mrb->mr_base) || mrwithin(mrb, mra->mr_base))
57
58 #define mrvalid(base, len) \
59 ((!(base & ((1 << 12) - 1))) && /* base is multiple of 4k */ \
60 ((len) >= (1 << 12)) && /* length is >= 4k */ \
61 powerof2((len)) && /* ... and power of two */ \
62 !((base) & ((len) - 1))) /* range is not discontiuous */
63
64 #define mrcopyflags(curr, new) \
65 (((curr) & ~MDF_ATTRMASK) | ((new) & MDF_ATTRMASK))
66
67 static int mtrrs_disabled;
68 TUNABLE_INT("machdep.disable_mtrrs", &mtrrs_disabled);
69 SYSCTL_INT(_machdep, OID_AUTO, disable_mtrrs, CTLFLAG_RDTUN,
70 &mtrrs_disabled, 0, "Disable i686 MTRRs.");
71
72 static void i686_mrinit(struct mem_range_softc *sc);
73 static int i686_mrset(struct mem_range_softc *sc,
74 struct mem_range_desc *mrd, int *arg);
75 static void i686_mrAPinit(struct mem_range_softc *sc);
76 static void i686_mrreinit(struct mem_range_softc *sc);
77
78 static struct mem_range_ops i686_mrops = {
79 i686_mrinit,
80 i686_mrset,
81 i686_mrAPinit,
82 i686_mrreinit
83 };
84
85 /* XXX for AP startup hook */
86 static u_int64_t mtrrcap, mtrrdef;
87
88 /* The bitmask for the PhysBase and PhysMask fields of the variable MTRRs. */
89 static u_int64_t mtrr_physmask;
90
91 static struct mem_range_desc *mem_range_match(struct mem_range_softc *sc,
92 struct mem_range_desc *mrd);
93 static void i686_mrfetch(struct mem_range_softc *sc);
94 static int i686_mtrrtype(int flags);
95 static int i686_mrt2mtrr(int flags, int oldval);
96 static int i686_mtrrconflict(int flag1, int flag2);
97 static void i686_mrstore(struct mem_range_softc *sc);
98 static void i686_mrstoreone(void *arg);
99 static struct mem_range_desc *i686_mtrrfixsearch(struct mem_range_softc *sc,
100 u_int64_t addr);
101 static int i686_mrsetlow(struct mem_range_softc *sc,
102 struct mem_range_desc *mrd, int *arg);
103 static int i686_mrsetvariable(struct mem_range_softc *sc,
104 struct mem_range_desc *mrd, int *arg);
105
106 /* i686 MTRR type to memory range type conversion */
107 static int i686_mtrrtomrt[] = {
108 MDF_UNCACHEABLE,
109 MDF_WRITECOMBINE,
110 MDF_UNKNOWN,
111 MDF_UNKNOWN,
112 MDF_WRITETHROUGH,
113 MDF_WRITEPROTECT,
114 MDF_WRITEBACK
115 };
116
117 #define MTRRTOMRTLEN (sizeof(i686_mtrrtomrt) / sizeof(i686_mtrrtomrt[0]))
118
119 static int
120 i686_mtrr2mrt(int val)
121 {
122
123 if (val < 0 || val >= MTRRTOMRTLEN)
124 return (MDF_UNKNOWN);
125 return (i686_mtrrtomrt[val]);
126 }
127
128 /*
129 * i686 MTRR conflicts. Writeback and uncachable may overlap.
130 */
131 static int
132 i686_mtrrconflict(int flag1, int flag2)
133 {
134
135 flag1 &= MDF_ATTRMASK;
136 flag2 &= MDF_ATTRMASK;
137 if (flag1 == flag2 ||
138 (flag1 == MDF_WRITEBACK && flag2 == MDF_UNCACHEABLE) ||
139 (flag2 == MDF_WRITEBACK && flag1 == MDF_UNCACHEABLE))
140 return (0);
141 return (1);
142 }
143
144 /*
145 * Look for an exactly-matching range.
146 */
147 static struct mem_range_desc *
148 mem_range_match(struct mem_range_softc *sc, struct mem_range_desc *mrd)
149 {
150 struct mem_range_desc *cand;
151 int i;
152
153 for (i = 0, cand = sc->mr_desc; i < sc->mr_ndesc; i++, cand++)
154 if ((cand->mr_base == mrd->mr_base) &&
155 (cand->mr_len == mrd->mr_len))
156 return (cand);
157 return (NULL);
158 }
159
160 /*
161 * Fetch the current mtrr settings from the current CPU (assumed to
162 * all be in sync in the SMP case). Note that if we are here, we
163 * assume that MTRRs are enabled, and we may or may not have fixed
164 * MTRRs.
165 */
166 static void
167 i686_mrfetch(struct mem_range_softc *sc)
168 {
169 struct mem_range_desc *mrd;
170 u_int64_t msrv;
171 int i, j, msr;
172
173 mrd = sc->mr_desc;
174
175 /* Get fixed-range MTRRs. */
176 if (sc->mr_cap & MR686_FIXMTRR) {
177 msr = MSR_MTRR64kBase;
178 for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
179 msrv = rdmsr(msr);
180 for (j = 0; j < 8; j++, mrd++) {
181 mrd->mr_flags =
182 (mrd->mr_flags & ~MDF_ATTRMASK) |
183 i686_mtrr2mrt(msrv & 0xff) | MDF_ACTIVE;
184 if (mrd->mr_owner[0] == 0)
185 strcpy(mrd->mr_owner, mem_owner_bios);
186 msrv = msrv >> 8;
187 }
188 }
189 msr = MSR_MTRR16kBase;
190 for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
191 msrv = rdmsr(msr);
192 for (j = 0; j < 8; j++, mrd++) {
193 mrd->mr_flags =
194 (mrd->mr_flags & ~MDF_ATTRMASK) |
195 i686_mtrr2mrt(msrv & 0xff) | MDF_ACTIVE;
196 if (mrd->mr_owner[0] == 0)
197 strcpy(mrd->mr_owner, mem_owner_bios);
198 msrv = msrv >> 8;
199 }
200 }
201 msr = MSR_MTRR4kBase;
202 for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
203 msrv = rdmsr(msr);
204 for (j = 0; j < 8; j++, mrd++) {
205 mrd->mr_flags =
206 (mrd->mr_flags & ~MDF_ATTRMASK) |
207 i686_mtrr2mrt(msrv & 0xff) | MDF_ACTIVE;
208 if (mrd->mr_owner[0] == 0)
209 strcpy(mrd->mr_owner, mem_owner_bios);
210 msrv = msrv >> 8;
211 }
212 }
213 }
214
215 /* Get remainder which must be variable MTRRs. */
216 msr = MSR_MTRRVarBase;
217 for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
218 msrv = rdmsr(msr);
219 mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
220 i686_mtrr2mrt(msrv & MTRR_PHYSBASE_TYPE);
221 mrd->mr_base = msrv & mtrr_physmask;
222 msrv = rdmsr(msr + 1);
223 mrd->mr_flags = (msrv & MTRR_PHYSMASK_VALID) ?
224 (mrd->mr_flags | MDF_ACTIVE) :
225 (mrd->mr_flags & ~MDF_ACTIVE);
226
227 /* Compute the range from the mask. Ick. */
228 mrd->mr_len = (~(msrv & mtrr_physmask) &
229 (mtrr_physmask | 0xfffLL)) + 1;
230 if (!mrvalid(mrd->mr_base, mrd->mr_len))
231 mrd->mr_flags |= MDF_BOGUS;
232
233 /* If unclaimed and active, must be the BIOS. */
234 if ((mrd->mr_flags & MDF_ACTIVE) && (mrd->mr_owner[0] == 0))
235 strcpy(mrd->mr_owner, mem_owner_bios);
236 }
237 }
238
239 /*
240 * Return the MTRR memory type matching a region's flags
241 */
242 static int
243 i686_mtrrtype(int flags)
244 {
245 int i;
246
247 flags &= MDF_ATTRMASK;
248
249 for (i = 0; i < MTRRTOMRTLEN; i++) {
250 if (i686_mtrrtomrt[i] == MDF_UNKNOWN)
251 continue;
252 if (flags == i686_mtrrtomrt[i])
253 return (i);
254 }
255 return (-1);
256 }
257
258 static int
259 i686_mrt2mtrr(int flags, int oldval)
260 {
261 int val;
262
263 if ((val = i686_mtrrtype(flags)) == -1)
264 return (oldval & 0xff);
265 return (val & 0xff);
266 }
267
268 /*
269 * Update running CPU(s) MTRRs to match the ranges in the descriptor
270 * list.
271 *
272 * XXX Must be called with interrupts enabled.
273 */
274 static void
275 i686_mrstore(struct mem_range_softc *sc)
276 {
277 #ifdef SMP
278 /*
279 * We should use ipi_all_but_self() to call other CPUs into a
280 * locking gate, then call a target function to do this work.
281 * The "proper" solution involves a generalised locking gate
282 * implementation, not ready yet.
283 */
284 smp_rendezvous(NULL, i686_mrstoreone, NULL, sc);
285 #else
286 disable_intr(); /* disable interrupts */
287 i686_mrstoreone(sc);
288 enable_intr();
289 #endif
290 }
291
292 /*
293 * Update the current CPU's MTRRs with those represented in the
294 * descriptor list. Note that we do this wholesale rather than just
295 * stuffing one entry; this is simpler (but slower, of course).
296 */
297 static void
298 i686_mrstoreone(void *arg)
299 {
300 struct mem_range_softc *sc = arg;
301 struct mem_range_desc *mrd;
302 u_int64_t omsrv, msrv;
303 int i, j, msr;
304 u_long cr0, cr4;
305
306 mrd = sc->mr_desc;
307
308 critical_enter();
309
310 /* Disable PGE. */
311 cr4 = rcr4();
312 load_cr4(cr4 & ~CR4_PGE);
313
314 /* Disable caches (CD = 1, NW = 0). */
315 cr0 = rcr0();
316 load_cr0((cr0 & ~CR0_NW) | CR0_CD);
317
318 /* Flushes caches and TLBs. */
319 wbinvd();
320 invltlb();
321
322 /* Disable MTRRs (E = 0). */
323 wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~MTRR_DEF_ENABLE);
324
325 /* Set fixed-range MTRRs. */
326 if (sc->mr_cap & MR686_FIXMTRR) {
327 msr = MSR_MTRR64kBase;
328 for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
329 msrv = 0;
330 omsrv = rdmsr(msr);
331 for (j = 7; j >= 0; j--) {
332 msrv = msrv << 8;
333 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags,
334 omsrv >> (j * 8));
335 }
336 wrmsr(msr, msrv);
337 mrd += 8;
338 }
339 msr = MSR_MTRR16kBase;
340 for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
341 msrv = 0;
342 omsrv = rdmsr(msr);
343 for (j = 7; j >= 0; j--) {
344 msrv = msrv << 8;
345 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags,
346 omsrv >> (j * 8));
347 }
348 wrmsr(msr, msrv);
349 mrd += 8;
350 }
351 msr = MSR_MTRR4kBase;
352 for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
353 msrv = 0;
354 omsrv = rdmsr(msr);
355 for (j = 7; j >= 0; j--) {
356 msrv = msrv << 8;
357 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags,
358 omsrv >> (j * 8));
359 }
360 wrmsr(msr, msrv);
361 mrd += 8;
362 }
363 }
364
365 /* Set remainder which must be variable MTRRs. */
366 msr = MSR_MTRRVarBase;
367 for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
368 /* base/type register */
369 omsrv = rdmsr(msr);
370 if (mrd->mr_flags & MDF_ACTIVE) {
371 msrv = mrd->mr_base & mtrr_physmask;
372 msrv |= i686_mrt2mtrr(mrd->mr_flags, omsrv);
373 } else {
374 msrv = 0;
375 }
376 wrmsr(msr, msrv);
377
378 /* mask/active register */
379 if (mrd->mr_flags & MDF_ACTIVE) {
380 msrv = MTRR_PHYSMASK_VALID |
381 (~(mrd->mr_len - 1) & mtrr_physmask);
382 } else {
383 msrv = 0;
384 }
385 wrmsr(msr + 1, msrv);
386 }
387
388 /* Flush caches and TLBs. */
389 wbinvd();
390 invltlb();
391
392 /* Enable MTRRs. */
393 wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | MTRR_DEF_ENABLE);
394
395 /* Restore caches and PGE. */
396 load_cr0(cr0);
397 load_cr4(cr4);
398
399 critical_exit();
400 }
401
402 /*
403 * Hunt for the fixed MTRR referencing (addr)
404 */
405 static struct mem_range_desc *
406 i686_mtrrfixsearch(struct mem_range_softc *sc, u_int64_t addr)
407 {
408 struct mem_range_desc *mrd;
409 int i;
410
411 for (i = 0, mrd = sc->mr_desc; i < (MTRR_N64K + MTRR_N16K + MTRR_N4K);
412 i++, mrd++)
413 if ((addr >= mrd->mr_base) &&
414 (addr < (mrd->mr_base + mrd->mr_len)))
415 return (mrd);
416 return (NULL);
417 }
418
419 /*
420 * Try to satisfy the given range request by manipulating the fixed
421 * MTRRs that cover low memory.
422 *
423 * Note that we try to be generous here; we'll bloat the range out to
424 * the next higher/lower boundary to avoid the consumer having to know
425 * too much about the mechanisms here.
426 *
427 * XXX note that this will have to be updated when we start supporting
428 * "busy" ranges.
429 */
430 static int
431 i686_mrsetlow(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
432 {
433 struct mem_range_desc *first_md, *last_md, *curr_md;
434
435 /* Range check. */
436 if (((first_md = i686_mtrrfixsearch(sc, mrd->mr_base)) == NULL) ||
437 ((last_md = i686_mtrrfixsearch(sc, mrd->mr_base + mrd->mr_len - 1)) == NULL))
438 return (EINVAL);
439
440 /* Check that we aren't doing something risky. */
441 if (!(mrd->mr_flags & MDF_FORCE))
442 for (curr_md = first_md; curr_md <= last_md; curr_md++) {
443 if ((curr_md->mr_flags & MDF_ATTRMASK) == MDF_UNKNOWN)
444 return (EACCES);
445 }
446
447 /* Set flags, clear set-by-firmware flag. */
448 for (curr_md = first_md; curr_md <= last_md; curr_md++) {
449 curr_md->mr_flags = mrcopyflags(curr_md->mr_flags &
450 ~MDF_FIRMWARE, mrd->mr_flags);
451 bcopy(mrd->mr_owner, curr_md->mr_owner, sizeof(mrd->mr_owner));
452 }
453
454 return (0);
455 }
456
457 /*
458 * Modify/add a variable MTRR to satisfy the request.
459 *
460 * XXX needs to be updated to properly support "busy" ranges.
461 */
462 static int
463 i686_mrsetvariable(struct mem_range_softc *sc, struct mem_range_desc *mrd,
464 int *arg)
465 {
466 struct mem_range_desc *curr_md, *free_md;
467 int i;
468
469 /*
470 * Scan the currently active variable descriptors, look for
471 * one we exactly match (straight takeover) and for possible
472 * accidental overlaps.
473 *
474 * Keep track of the first empty variable descriptor in case
475 * we can't perform a takeover.
476 */
477 i = (sc->mr_cap & MR686_FIXMTRR) ? MTRR_N64K + MTRR_N16K + MTRR_N4K : 0;
478 curr_md = sc->mr_desc + i;
479 free_md = NULL;
480 for (; i < sc->mr_ndesc; i++, curr_md++) {
481 if (curr_md->mr_flags & MDF_ACTIVE) {
482 /* Exact match? */
483 if ((curr_md->mr_base == mrd->mr_base) &&
484 (curr_md->mr_len == mrd->mr_len)) {
485
486 /* Whoops, owned by someone. */
487 if (curr_md->mr_flags & MDF_BUSY)
488 return (EBUSY);
489
490 /* Check that we aren't doing something risky */
491 if (!(mrd->mr_flags & MDF_FORCE) &&
492 ((curr_md->mr_flags & MDF_ATTRMASK) ==
493 MDF_UNKNOWN))
494 return (EACCES);
495
496 /* Ok, just hijack this entry. */
497 free_md = curr_md;
498 break;
499 }
500
501 /* Non-exact overlap? */
502 if (mroverlap(curr_md, mrd)) {
503 /* Between conflicting region types? */
504 if (i686_mtrrconflict(curr_md->mr_flags,
505 mrd->mr_flags))
506 return (EINVAL);
507 }
508 } else if (free_md == NULL) {
509 free_md = curr_md;
510 }
511 }
512
513 /* Got somewhere to put it? */
514 if (free_md == NULL)
515 return (ENOSPC);
516
517 /* Set up new descriptor. */
518 free_md->mr_base = mrd->mr_base;
519 free_md->mr_len = mrd->mr_len;
520 free_md->mr_flags = mrcopyflags(MDF_ACTIVE, mrd->mr_flags);
521 bcopy(mrd->mr_owner, free_md->mr_owner, sizeof(mrd->mr_owner));
522 return (0);
523 }
524
525 /*
526 * Handle requests to set memory range attributes by manipulating MTRRs.
527 */
528 static int
529 i686_mrset(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
530 {
531 struct mem_range_desc *targ;
532 int error = 0;
533
534 switch(*arg) {
535 case MEMRANGE_SET_UPDATE:
536 /*
537 * Make sure that what's being asked for is even
538 * possible at all.
539 */
540 if (!mrvalid(mrd->mr_base, mrd->mr_len) ||
541 i686_mtrrtype(mrd->mr_flags) == -1)
542 return (EINVAL);
543
544 #define FIXTOP ((MTRR_N64K * 0x10000) + (MTRR_N16K * 0x4000) + (MTRR_N4K * 0x1000))
545
546 /* Are the "low memory" conditions applicable? */
547 if ((sc->mr_cap & MR686_FIXMTRR) &&
548 ((mrd->mr_base + mrd->mr_len) <= FIXTOP)) {
549 if ((error = i686_mrsetlow(sc, mrd, arg)) != 0)
550 return (error);
551 } else {
552 /* It's time to play with variable MTRRs. */
553 if ((error = i686_mrsetvariable(sc, mrd, arg)) != 0)
554 return (error);
555 }
556 break;
557
558 case MEMRANGE_SET_REMOVE:
559 if ((targ = mem_range_match(sc, mrd)) == NULL)
560 return (ENOENT);
561 if (targ->mr_flags & MDF_FIXACTIVE)
562 return (EPERM);
563 if (targ->mr_flags & MDF_BUSY)
564 return (EBUSY);
565 targ->mr_flags &= ~MDF_ACTIVE;
566 targ->mr_owner[0] = 0;
567 break;
568
569 default:
570 return (EOPNOTSUPP);
571 }
572
573 /* Update the hardware. */
574 i686_mrstore(sc);
575
576 /* Refetch to see where we're at. */
577 i686_mrfetch(sc);
578 return (0);
579 }
580
581 /*
582 * Work out how many ranges we support, initialise storage for them,
583 * and fetch the initial settings.
584 */
585 static void
586 i686_mrinit(struct mem_range_softc *sc)
587 {
588 struct mem_range_desc *mrd;
589 u_int regs[4];
590 int i, nmdesc = 0, pabits;
591
592 mtrrcap = rdmsr(MSR_MTRRcap);
593 mtrrdef = rdmsr(MSR_MTRRdefType);
594
595 /* For now, bail out if MTRRs are not enabled. */
596 if (!(mtrrdef & MTRR_DEF_ENABLE)) {
597 if (bootverbose)
598 printf("CPU supports MTRRs but not enabled\n");
599 return;
600 }
601 nmdesc = mtrrcap & MTRR_CAP_VCNT;
602 if (bootverbose)
603 printf("Pentium Pro MTRR support enabled\n");
604
605 /*
606 * Determine the size of the PhysMask and PhysBase fields in
607 * the variable range MTRRs. If the extended CPUID 0x80000008
608 * is present, use that to figure out how many physical
609 * address bits the CPU supports. Otherwise, default to 36
610 * address bits.
611 */
612 if (cpu_exthigh >= 0x80000008) {
613 do_cpuid(0x80000008, regs);
614 pabits = regs[0] & 0xff;
615 } else
616 pabits = 36;
617 mtrr_physmask = ((1ULL << pabits) - 1) & ~0xfffULL;
618
619 /* If fixed MTRRs supported and enabled. */
620 if ((mtrrcap & MTRR_CAP_FIXED) && (mtrrdef & MTRR_DEF_FIXED_ENABLE)) {
621 sc->mr_cap = MR686_FIXMTRR;
622 nmdesc += MTRR_N64K + MTRR_N16K + MTRR_N4K;
623 }
624
625 sc->mr_desc = malloc(nmdesc * sizeof(struct mem_range_desc), M_MEMDESC,
626 M_WAITOK | M_ZERO);
627 sc->mr_ndesc = nmdesc;
628
629 mrd = sc->mr_desc;
630
631 /* Populate the fixed MTRR entries' base/length. */
632 if (sc->mr_cap & MR686_FIXMTRR) {
633 for (i = 0; i < MTRR_N64K; i++, mrd++) {
634 mrd->mr_base = i * 0x10000;
635 mrd->mr_len = 0x10000;
636 mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN |
637 MDF_FIXACTIVE;
638 }
639 for (i = 0; i < MTRR_N16K; i++, mrd++) {
640 mrd->mr_base = i * 0x4000 + 0x80000;
641 mrd->mr_len = 0x4000;
642 mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN |
643 MDF_FIXACTIVE;
644 }
645 for (i = 0; i < MTRR_N4K; i++, mrd++) {
646 mrd->mr_base = i * 0x1000 + 0xc0000;
647 mrd->mr_len = 0x1000;
648 mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN |
649 MDF_FIXACTIVE;
650 }
651 }
652
653 /*
654 * Get current settings, anything set now is considered to
655 * have been set by the firmware. (XXX has something already
656 * played here?)
657 */
658 i686_mrfetch(sc);
659 mrd = sc->mr_desc;
660 for (i = 0; i < sc->mr_ndesc; i++, mrd++) {
661 if (mrd->mr_flags & MDF_ACTIVE)
662 mrd->mr_flags |= MDF_FIRMWARE;
663 }
664 }
665
666 /*
667 * Initialise MTRRs on an AP after the BSP has run the init code.
668 */
669 static void
670 i686_mrAPinit(struct mem_range_softc *sc)
671 {
672
673 i686_mrstoreone(sc);
674 wrmsr(MSR_MTRRdefType, mtrrdef);
675 }
676
677 /*
678 * Re-initialise running CPU(s) MTRRs to match the ranges in the descriptor
679 * list.
680 *
681 * XXX Must be called with interrupts enabled.
682 */
683 static void
684 i686_mrreinit(struct mem_range_softc *sc)
685 {
686 #ifdef SMP
687 /*
688 * We should use ipi_all_but_self() to call other CPUs into a
689 * locking gate, then call a target function to do this work.
690 * The "proper" solution involves a generalised locking gate
691 * implementation, not ready yet.
692 */
693 smp_rendezvous(NULL, (void *)i686_mrAPinit, NULL, sc);
694 #else
695 disable_intr(); /* disable interrupts */
696 i686_mrAPinit(sc);
697 enable_intr();
698 #endif
699 }
700
701 static void
702 i686_mem_drvinit(void *unused)
703 {
704
705 if (mtrrs_disabled)
706 return;
707 if (!(cpu_feature & CPUID_MTRR))
708 return;
709 if ((cpu_id & 0xf00) != 0x600 && (cpu_id & 0xf00) != 0xf00)
710 return;
711 switch (cpu_vendor_id) {
712 case CPU_VENDOR_INTEL:
713 case CPU_VENDOR_AMD:
714 case CPU_VENDOR_CENTAUR:
715 break;
716 default:
717 return;
718 }
719 mem_range_softc.mr_op = &i686_mrops;
720 }
721 SYSINIT(i686memdev, SI_SUB_DRIVERS, SI_ORDER_FIRST, i686_mem_drvinit, NULL);
Cache object: 4da78e842a52981d53cb9f791d581d12
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