i686_mem.c

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    1 /*-
    2  * Copyright (c) 1999 Michael Smith <msmith@freebsd.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD: releng/11.0/sys/i386/i386/i686_mem.c 298435 2016-04-21 20:30:38Z pfg $");
   29 
   30 #include <sys/param.h>
   31 #include <sys/kernel.h>
   32 #include <sys/systm.h>
   33 #include <sys/malloc.h>
   34 #include <sys/memrange.h>
   35 #include <sys/smp.h>
   36 #include <sys/sysctl.h>
   37 
   38 #include <machine/cputypes.h>
   39 #include <machine/md_var.h>
   40 #include <machine/specialreg.h>
   41 
   42 /*
   43  * i686 memory range operations
   44  *
   45  * This code will probably be impenetrable without reference to the
   46  * Intel Pentium Pro documentation.
   47  */
   48 
   49 static char *mem_owner_bios = "BIOS";
   50 
   51 #define MR686_FIXMTRR   (1<<0)
   52 
   53 #define mrwithin(mr, a)                                                 \
   54         (((a) >= (mr)->mr_base) && ((a) < ((mr)->mr_base + (mr)->mr_len)))
   55 #define mroverlap(mra, mrb)                                             \
   56         (mrwithin(mra, mrb->mr_base) || mrwithin(mrb, mra->mr_base))
   57 
   58 #define mrvalid(base, len)                                              \
   59         ((!(base & ((1 << 12) - 1))) && /* base is multiple of 4k */    \
   60             ((len) >= (1 << 12)) &&     /* length is >= 4k */           \
   61             powerof2((len)) &&          /* ... and power of two */      \
   62             !((base) & ((len) - 1)))    /* range is not discontiuous */
   63 
   64 #define mrcopyflags(curr, new)                                          \
   65         (((curr) & ~MDF_ATTRMASK) | ((new) & MDF_ATTRMASK))
   66 
   67 static int mtrrs_disabled;
   68 SYSCTL_INT(_machdep, OID_AUTO, disable_mtrrs, CTLFLAG_RDTUN,
   69     &mtrrs_disabled, 0, "Disable i686 MTRRs.");
   70 
   71 static void     i686_mrinit(struct mem_range_softc *sc);
   72 static int      i686_mrset(struct mem_range_softc *sc,
   73                     struct mem_range_desc *mrd, int *arg);
   74 static void     i686_mrAPinit(struct mem_range_softc *sc);
   75 static void     i686_mrreinit(struct mem_range_softc *sc);
   76 
   77 static struct mem_range_ops i686_mrops = {
   78         i686_mrinit,
   79         i686_mrset,
   80         i686_mrAPinit,
   81         i686_mrreinit
   82 };
   83 
   84 /* XXX for AP startup hook */
   85 static u_int64_t mtrrcap, mtrrdef;
   86 
   87 /* The bitmask for the PhysBase and PhysMask fields of the variable MTRRs. */
   88 static u_int64_t mtrr_physmask;
   89 
   90 static struct mem_range_desc *mem_range_match(struct mem_range_softc *sc,
   91                     struct mem_range_desc *mrd);
   92 static void     i686_mrfetch(struct mem_range_softc *sc);
   93 static int      i686_mtrrtype(int flags);
   94 static int      i686_mrt2mtrr(int flags, int oldval);
   95 static int      i686_mtrrconflict(int flag1, int flag2);
   96 static void     i686_mrstore(struct mem_range_softc *sc);
   97 static void     i686_mrstoreone(void *arg);
   98 static struct mem_range_desc *i686_mtrrfixsearch(struct mem_range_softc *sc,
   99                     u_int64_t addr);
  100 static int      i686_mrsetlow(struct mem_range_softc *sc,
  101                     struct mem_range_desc *mrd, int *arg);
  102 static int      i686_mrsetvariable(struct mem_range_softc *sc,
  103                     struct mem_range_desc *mrd, int *arg);
  104 
  105 /* i686 MTRR type to memory range type conversion */
  106 static int i686_mtrrtomrt[] = {
  107         MDF_UNCACHEABLE,
  108         MDF_WRITECOMBINE,
  109         MDF_UNKNOWN,
  110         MDF_UNKNOWN,
  111         MDF_WRITETHROUGH,
  112         MDF_WRITEPROTECT,
  113         MDF_WRITEBACK
  114 };
  115 
  116 #define MTRRTOMRTLEN nitems(i686_mtrrtomrt)
  117 
  118 static int
  119 i686_mtrr2mrt(int val)
  120 {
  121 
  122         if (val < 0 || val >= MTRRTOMRTLEN)
  123                 return (MDF_UNKNOWN);
  124         return (i686_mtrrtomrt[val]);
  125 }
  126 
  127 /*
  128  * i686 MTRR conflicts. Writeback and uncachable may overlap.
  129  */
  130 static int
  131 i686_mtrrconflict(int flag1, int flag2)
  132 {
  133 
  134         flag1 &= MDF_ATTRMASK;
  135         flag2 &= MDF_ATTRMASK;
  136         if (flag1 == flag2 ||
  137             (flag1 == MDF_WRITEBACK && flag2 == MDF_UNCACHEABLE) ||
  138             (flag2 == MDF_WRITEBACK && flag1 == MDF_UNCACHEABLE))
  139                 return (0);
  140         return (1);
  141 }
  142 
  143 /*
  144  * Look for an exactly-matching range.
  145  */
  146 static struct mem_range_desc *
  147 mem_range_match(struct mem_range_softc *sc, struct mem_range_desc *mrd)
  148 {
  149         struct mem_range_desc *cand;
  150         int i;
  151 
  152         for (i = 0, cand = sc->mr_desc; i < sc->mr_ndesc; i++, cand++)
  153                 if ((cand->mr_base == mrd->mr_base) &&
  154                     (cand->mr_len == mrd->mr_len))
  155                         return (cand);
  156         return (NULL);
  157 }
  158 
  159 /*
  160  * Fetch the current mtrr settings from the current CPU (assumed to
  161  * all be in sync in the SMP case).  Note that if we are here, we
  162  * assume that MTRRs are enabled, and we may or may not have fixed
  163  * MTRRs.
  164  */
  165 static void
  166 i686_mrfetch(struct mem_range_softc *sc)
  167 {
  168         struct mem_range_desc *mrd;
  169         u_int64_t msrv;
  170         int i, j, msr;
  171 
  172         mrd = sc->mr_desc;
  173 
  174         /* Get fixed-range MTRRs. */
  175         if (sc->mr_cap & MR686_FIXMTRR) {
  176                 msr = MSR_MTRR64kBase;
  177                 for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
  178                         msrv = rdmsr(msr);
  179                         for (j = 0; j < 8; j++, mrd++) {
  180                                 mrd->mr_flags =
  181                                     (mrd->mr_flags & ~MDF_ATTRMASK) |
  182                                     i686_mtrr2mrt(msrv & 0xff) | MDF_ACTIVE;
  183                                 if (mrd->mr_owner[0] == 0)
  184                                         strcpy(mrd->mr_owner, mem_owner_bios);
  185                                 msrv = msrv >> 8;
  186                         }
  187                 }
  188                 msr = MSR_MTRR16kBase;
  189                 for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
  190                         msrv = rdmsr(msr);
  191                         for (j = 0; j < 8; j++, mrd++) {
  192                                 mrd->mr_flags =
  193                                     (mrd->mr_flags & ~MDF_ATTRMASK) |
  194                                     i686_mtrr2mrt(msrv & 0xff) | MDF_ACTIVE;
  195                                 if (mrd->mr_owner[0] == 0)
  196                                         strcpy(mrd->mr_owner, mem_owner_bios);
  197                                 msrv = msrv >> 8;
  198                         }
  199                 }
  200                 msr = MSR_MTRR4kBase;
  201                 for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
  202                         msrv = rdmsr(msr);
  203                         for (j = 0; j < 8; j++, mrd++) {
  204                                 mrd->mr_flags =
  205                                     (mrd->mr_flags & ~MDF_ATTRMASK) |
  206                                     i686_mtrr2mrt(msrv & 0xff) | MDF_ACTIVE;
  207                                 if (mrd->mr_owner[0] == 0)
  208                                         strcpy(mrd->mr_owner, mem_owner_bios);
  209                                 msrv = msrv >> 8;
  210                         }
  211                 }
  212         }
  213 
  214         /* Get remainder which must be variable MTRRs. */
  215         msr = MSR_MTRRVarBase;
  216         for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
  217                 msrv = rdmsr(msr);
  218                 mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
  219                     i686_mtrr2mrt(msrv & MTRR_PHYSBASE_TYPE);
  220                 mrd->mr_base = msrv & mtrr_physmask;
  221                 msrv = rdmsr(msr + 1);
  222                 mrd->mr_flags = (msrv & MTRR_PHYSMASK_VALID) ?
  223                     (mrd->mr_flags | MDF_ACTIVE) :
  224                     (mrd->mr_flags & ~MDF_ACTIVE);
  225 
  226                 /* Compute the range from the mask. Ick. */
  227                 mrd->mr_len = (~(msrv & mtrr_physmask) &
  228                     (mtrr_physmask | 0xfffLL)) + 1;
  229                 if (!mrvalid(mrd->mr_base, mrd->mr_len))
  230                         mrd->mr_flags |= MDF_BOGUS;
  231 
  232                 /* If unclaimed and active, must be the BIOS. */
  233                 if ((mrd->mr_flags & MDF_ACTIVE) && (mrd->mr_owner[0] == 0))
  234                         strcpy(mrd->mr_owner, mem_owner_bios);
  235         }
  236 }
  237 
  238 /*
  239  * Return the MTRR memory type matching a region's flags
  240  */
  241 static int
  242 i686_mtrrtype(int flags)
  243 {
  244         int i;
  245 
  246         flags &= MDF_ATTRMASK;
  247 
  248         for (i = 0; i < MTRRTOMRTLEN; i++) {
  249                 if (i686_mtrrtomrt[i] == MDF_UNKNOWN)
  250                         continue;
  251                 if (flags == i686_mtrrtomrt[i])
  252                         return (i);
  253         }
  254         return (-1);
  255 }
  256 
  257 static int
  258 i686_mrt2mtrr(int flags, int oldval)
  259 {
  260         int val;
  261 
  262         if ((val = i686_mtrrtype(flags)) == -1)
  263                 return (oldval & 0xff);
  264         return (val & 0xff);
  265 }
  266 
  267 /*
  268  * Update running CPU(s) MTRRs to match the ranges in the descriptor
  269  * list.
  270  *
  271  * XXX Must be called with interrupts enabled.
  272  */
  273 static void
  274 i686_mrstore(struct mem_range_softc *sc)
  275 {
  276 #ifdef SMP
  277         /*
  278          * We should use ipi_all_but_self() to call other CPUs into a
  279          * locking gate, then call a target function to do this work.
  280          * The "proper" solution involves a generalised locking gate
  281          * implementation, not ready yet.
  282          */
  283         smp_rendezvous(NULL, i686_mrstoreone, NULL, sc);
  284 #else
  285         disable_intr();                         /* disable interrupts */
  286         i686_mrstoreone(sc);
  287         enable_intr();
  288 #endif
  289 }
  290 
  291 /*
  292  * Update the current CPU's MTRRs with those represented in the
  293  * descriptor list.  Note that we do this wholesale rather than just
  294  * stuffing one entry; this is simpler (but slower, of course).
  295  */
  296 static void
  297 i686_mrstoreone(void *arg)
  298 {
  299         struct mem_range_softc *sc = arg;
  300         struct mem_range_desc *mrd;
  301         u_int64_t omsrv, msrv;
  302         int i, j, msr;
  303         u_long cr0, cr4;
  304 
  305         mrd = sc->mr_desc;
  306 
  307         critical_enter();
  308 
  309         /* Disable PGE. */
  310         cr4 = rcr4();
  311         load_cr4(cr4 & ~CR4_PGE);
  312 
  313         /* Disable caches (CD = 1, NW = 0). */
  314         cr0 = rcr0();
  315         load_cr0((cr0 & ~CR0_NW) | CR0_CD);
  316 
  317         /* Flushes caches and TLBs. */
  318         wbinvd();
  319         invltlb();
  320 
  321         /* Disable MTRRs (E = 0). */
  322         wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~MTRR_DEF_ENABLE);
  323 
  324         /* Set fixed-range MTRRs. */
  325         if (sc->mr_cap & MR686_FIXMTRR) {
  326                 msr = MSR_MTRR64kBase;
  327                 for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
  328                         msrv = 0;
  329                         omsrv = rdmsr(msr);
  330                         for (j = 7; j >= 0; j--) {
  331                                 msrv = msrv << 8;
  332                                 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags,
  333                                     omsrv >> (j * 8));
  334                         }
  335                         wrmsr(msr, msrv);
  336                         mrd += 8;
  337                 }
  338                 msr = MSR_MTRR16kBase;
  339                 for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
  340                         msrv = 0;
  341                         omsrv = rdmsr(msr);
  342                         for (j = 7; j >= 0; j--) {
  343                                 msrv = msrv << 8;
  344                                 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags,
  345                                     omsrv >> (j * 8));
  346                         }
  347                         wrmsr(msr, msrv);
  348                         mrd += 8;
  349                 }
  350                 msr = MSR_MTRR4kBase;
  351                 for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
  352                         msrv = 0;
  353                         omsrv = rdmsr(msr);
  354                         for (j = 7; j >= 0; j--) {
  355                                 msrv = msrv << 8;
  356                                 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags,
  357                                     omsrv >> (j * 8));
  358                         }
  359                         wrmsr(msr, msrv);
  360                         mrd += 8;
  361                 }
  362         }
  363 
  364         /* Set remainder which must be variable MTRRs. */
  365         msr = MSR_MTRRVarBase;
  366         for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
  367                 /* base/type register */
  368                 omsrv = rdmsr(msr);
  369                 if (mrd->mr_flags & MDF_ACTIVE) {
  370                         msrv = mrd->mr_base & mtrr_physmask;
  371                         msrv |= i686_mrt2mtrr(mrd->mr_flags, omsrv);
  372                 } else {
  373                         msrv = 0;
  374                 }
  375                 wrmsr(msr, msrv);
  376 
  377                 /* mask/active register */
  378                 if (mrd->mr_flags & MDF_ACTIVE) {
  379                         msrv = MTRR_PHYSMASK_VALID |
  380                             rounddown2(mtrr_physmask, mrd->mr_len);
  381                 } else {
  382                         msrv = 0;
  383                 }
  384                 wrmsr(msr + 1, msrv);
  385         }
  386 
  387         /* Flush caches and TLBs. */
  388         wbinvd();
  389         invltlb();
  390 
  391         /* Enable MTRRs. */
  392         wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | MTRR_DEF_ENABLE);
  393 
  394         /* Restore caches and PGE. */
  395         load_cr0(cr0);
  396         load_cr4(cr4);
  397 
  398         critical_exit();
  399 }
  400 
  401 /*
  402  * Hunt for the fixed MTRR referencing (addr)
  403  */
  404 static struct mem_range_desc *
  405 i686_mtrrfixsearch(struct mem_range_softc *sc, u_int64_t addr)
  406 {
  407         struct mem_range_desc *mrd;
  408         int i;
  409 
  410         for (i = 0, mrd = sc->mr_desc; i < (MTRR_N64K + MTRR_N16K + MTRR_N4K);
  411              i++, mrd++)
  412                 if ((addr >= mrd->mr_base) &&
  413                     (addr < (mrd->mr_base + mrd->mr_len)))
  414                         return (mrd);
  415         return (NULL);
  416 }
  417 
  418 /*
  419  * Try to satisfy the given range request by manipulating the fixed
  420  * MTRRs that cover low memory.
  421  *
  422  * Note that we try to be generous here; we'll bloat the range out to
  423  * the next higher/lower boundary to avoid the consumer having to know
  424  * too much about the mechanisms here.
  425  *
  426  * XXX note that this will have to be updated when we start supporting
  427  * "busy" ranges.
  428  */
  429 static int
  430 i686_mrsetlow(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
  431 {
  432         struct mem_range_desc *first_md, *last_md, *curr_md;
  433 
  434         /* Range check. */
  435         if (((first_md = i686_mtrrfixsearch(sc, mrd->mr_base)) == NULL) ||
  436             ((last_md = i686_mtrrfixsearch(sc, mrd->mr_base + mrd->mr_len - 1)) == NULL))
  437                 return (EINVAL);
  438 
  439         /* Check that we aren't doing something risky. */
  440         if (!(mrd->mr_flags & MDF_FORCE))
  441                 for (curr_md = first_md; curr_md <= last_md; curr_md++) {
  442                         if ((curr_md->mr_flags & MDF_ATTRMASK) == MDF_UNKNOWN)
  443                                 return (EACCES);
  444                 }
  445 
  446         /* Set flags, clear set-by-firmware flag. */
  447         for (curr_md = first_md; curr_md <= last_md; curr_md++) {
  448                 curr_md->mr_flags = mrcopyflags(curr_md->mr_flags &
  449                     ~MDF_FIRMWARE, mrd->mr_flags);
  450                 bcopy(mrd->mr_owner, curr_md->mr_owner, sizeof(mrd->mr_owner));
  451         }
  452 
  453         return (0);
  454 }
  455 
  456 /*
  457  * Modify/add a variable MTRR to satisfy the request.
  458  *
  459  * XXX needs to be updated to properly support "busy" ranges.
  460  */
  461 static int
  462 i686_mrsetvariable(struct mem_range_softc *sc, struct mem_range_desc *mrd,
  463     int *arg)
  464 {
  465         struct mem_range_desc *curr_md, *free_md;
  466         int i;
  467 
  468         /*
  469          * Scan the currently active variable descriptors, look for
  470          * one we exactly match (straight takeover) and for possible
  471          * accidental overlaps.
  472          *
  473          * Keep track of the first empty variable descriptor in case
  474          * we can't perform a takeover.
  475          */
  476         i = (sc->mr_cap & MR686_FIXMTRR) ? MTRR_N64K + MTRR_N16K + MTRR_N4K : 0;
  477         curr_md = sc->mr_desc + i;
  478         free_md = NULL;
  479         for (; i < sc->mr_ndesc; i++, curr_md++) {
  480                 if (curr_md->mr_flags & MDF_ACTIVE) {
  481                         /* Exact match? */
  482                         if ((curr_md->mr_base == mrd->mr_base) &&
  483                             (curr_md->mr_len == mrd->mr_len)) {
  484 
  485                                 /* Whoops, owned by someone. */
  486                                 if (curr_md->mr_flags & MDF_BUSY)
  487                                         return (EBUSY);
  488 
  489                                 /* Check that we aren't doing something risky */
  490                                 if (!(mrd->mr_flags & MDF_FORCE) &&
  491                                     ((curr_md->mr_flags & MDF_ATTRMASK) ==
  492                                     MDF_UNKNOWN))
  493                                         return (EACCES);
  494 
  495                                 /* Ok, just hijack this entry. */
  496                                 free_md = curr_md;
  497                                 break;
  498                         }
  499 
  500                         /* Non-exact overlap? */
  501                         if (mroverlap(curr_md, mrd)) {
  502                                 /* Between conflicting region types? */
  503                                 if (i686_mtrrconflict(curr_md->mr_flags,
  504                                     mrd->mr_flags))
  505                                         return (EINVAL);
  506                         }
  507                 } else if (free_md == NULL) {
  508                         free_md = curr_md;
  509                 }
  510         }
  511 
  512         /* Got somewhere to put it? */
  513         if (free_md == NULL)
  514                 return (ENOSPC);
  515 
  516         /* Set up new descriptor. */
  517         free_md->mr_base = mrd->mr_base;
  518         free_md->mr_len = mrd->mr_len;
  519         free_md->mr_flags = mrcopyflags(MDF_ACTIVE, mrd->mr_flags);
  520         bcopy(mrd->mr_owner, free_md->mr_owner, sizeof(mrd->mr_owner));
  521         return (0);
  522 }
  523 
  524 /*
  525  * Handle requests to set memory range attributes by manipulating MTRRs.
  526  */
  527 static int
  528 i686_mrset(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
  529 {
  530         struct mem_range_desc *targ;
  531         int error = 0;
  532 
  533         switch(*arg) {
  534         case MEMRANGE_SET_UPDATE:
  535                 /*
  536                  * Make sure that what's being asked for is even
  537                  * possible at all.
  538                  */
  539                 if (!mrvalid(mrd->mr_base, mrd->mr_len) ||
  540                     i686_mtrrtype(mrd->mr_flags) == -1)
  541                         return (EINVAL);
  542 
  543 #define FIXTOP  ((MTRR_N64K * 0x10000) + (MTRR_N16K * 0x4000) + (MTRR_N4K * 0x1000))
  544 
  545                 /* Are the "low memory" conditions applicable? */
  546                 if ((sc->mr_cap & MR686_FIXMTRR) &&
  547                     ((mrd->mr_base + mrd->mr_len) <= FIXTOP)) {
  548                         if ((error = i686_mrsetlow(sc, mrd, arg)) != 0)
  549                                 return (error);
  550                 } else {
  551                         /* It's time to play with variable MTRRs. */
  552                         if ((error = i686_mrsetvariable(sc, mrd, arg)) != 0)
  553                                 return (error);
  554                 }
  555                 break;
  556 
  557         case MEMRANGE_SET_REMOVE:
  558                 if ((targ = mem_range_match(sc, mrd)) == NULL)
  559                         return (ENOENT);
  560                 if (targ->mr_flags & MDF_FIXACTIVE)
  561                         return (EPERM);
  562                 if (targ->mr_flags & MDF_BUSY)
  563                         return (EBUSY);
  564                 targ->mr_flags &= ~MDF_ACTIVE;
  565                 targ->mr_owner[0] = 0;
  566                 break;
  567 
  568         default:
  569                 return (EOPNOTSUPP);
  570         }
  571 
  572         /* Update the hardware. */
  573         i686_mrstore(sc);
  574 
  575         /* Refetch to see where we're at. */
  576         i686_mrfetch(sc);
  577         return (0);
  578 }
  579 
  580 /*
  581  * Work out how many ranges we support, initialise storage for them,
  582  * and fetch the initial settings.
  583  */
  584 static void
  585 i686_mrinit(struct mem_range_softc *sc)
  586 {
  587         struct mem_range_desc *mrd;
  588         u_int regs[4];
  589         int i, nmdesc = 0, pabits;
  590 
  591         mtrrcap = rdmsr(MSR_MTRRcap);
  592         mtrrdef = rdmsr(MSR_MTRRdefType);
  593 
  594         /* For now, bail out if MTRRs are not enabled. */
  595         if (!(mtrrdef & MTRR_DEF_ENABLE)) {
  596                 if (bootverbose)
  597                         printf("CPU supports MTRRs but not enabled\n");
  598                 return;
  599         }
  600         nmdesc = mtrrcap & MTRR_CAP_VCNT;
  601         if (bootverbose)
  602                 printf("Pentium Pro MTRR support enabled\n");
  603 
  604         /*
  605          * Determine the size of the PhysMask and PhysBase fields in
  606          * the variable range MTRRs.  If the extended CPUID 0x80000008
  607          * is present, use that to figure out how many physical
  608          * address bits the CPU supports.  Otherwise, default to 36
  609          * address bits.
  610          */
  611         if (cpu_exthigh >= 0x80000008) {
  612                 do_cpuid(0x80000008, regs);
  613                 pabits = regs[0] & 0xff;
  614         } else
  615                 pabits = 36;
  616         mtrr_physmask = ((1ULL << pabits) - 1) & ~0xfffULL;
  617 
  618         /* If fixed MTRRs supported and enabled. */
  619         if ((mtrrcap & MTRR_CAP_FIXED) && (mtrrdef & MTRR_DEF_FIXED_ENABLE)) {
  620                 sc->mr_cap = MR686_FIXMTRR;
  621                 nmdesc += MTRR_N64K + MTRR_N16K + MTRR_N4K;
  622         }
  623 
  624         sc->mr_desc = malloc(nmdesc * sizeof(struct mem_range_desc), M_MEMDESC,
  625             M_WAITOK | M_ZERO);
  626         sc->mr_ndesc = nmdesc;
  627 
  628         mrd = sc->mr_desc;
  629 
  630         /* Populate the fixed MTRR entries' base/length. */
  631         if (sc->mr_cap & MR686_FIXMTRR) {
  632                 for (i = 0; i < MTRR_N64K; i++, mrd++) {
  633                         mrd->mr_base = i * 0x10000;
  634                         mrd->mr_len = 0x10000;
  635                         mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN |
  636                             MDF_FIXACTIVE;
  637                 }
  638                 for (i = 0; i < MTRR_N16K; i++, mrd++) {
  639                         mrd->mr_base = i * 0x4000 + 0x80000;
  640                         mrd->mr_len = 0x4000;
  641                         mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN |
  642                             MDF_FIXACTIVE;
  643                 }
  644                 for (i = 0; i < MTRR_N4K; i++, mrd++) {
  645                         mrd->mr_base = i * 0x1000 + 0xc0000;
  646                         mrd->mr_len = 0x1000;
  647                         mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN |
  648                             MDF_FIXACTIVE;
  649                 }
  650         }
  651 
  652         /*
  653          * Get current settings, anything set now is considered to
  654          * have been set by the firmware. (XXX has something already
  655          * played here?)
  656          */
  657         i686_mrfetch(sc);
  658         mrd = sc->mr_desc;
  659         for (i = 0; i < sc->mr_ndesc; i++, mrd++) {
  660                 if (mrd->mr_flags & MDF_ACTIVE)
  661                         mrd->mr_flags |= MDF_FIRMWARE;
  662         }
  663 }
  664 
  665 /*
  666  * Initialise MTRRs on an AP after the BSP has run the init code.
  667  */
  668 static void
  669 i686_mrAPinit(struct mem_range_softc *sc)
  670 {
  671 
  672         i686_mrstoreone(sc);
  673         wrmsr(MSR_MTRRdefType, mtrrdef);
  674 }
  675 
  676 /*
  677  * Re-initialise running CPU(s) MTRRs to match the ranges in the descriptor
  678  * list.
  679  *
  680  * XXX Must be called with interrupts enabled.
  681  */
  682 static void
  683 i686_mrreinit(struct mem_range_softc *sc)
  684 {
  685 #ifdef SMP
  686         /*
  687          * We should use ipi_all_but_self() to call other CPUs into a
  688          * locking gate, then call a target function to do this work.
  689          * The "proper" solution involves a generalised locking gate
  690          * implementation, not ready yet.
  691          */
  692         smp_rendezvous(NULL, (void *)i686_mrAPinit, NULL, sc);
  693 #else
  694         disable_intr();                         /* disable interrupts */
  695         i686_mrAPinit(sc);
  696         enable_intr();
  697 #endif
  698 }
  699 
  700 static void
  701 i686_mem_drvinit(void *unused)
  702 {
  703 
  704         if (mtrrs_disabled)
  705                 return;
  706         if (!(cpu_feature & CPUID_MTRR))
  707                 return;
  708         if ((cpu_id & 0xf00) != 0x600 && (cpu_id & 0xf00) != 0xf00)
  709                 return;
  710         switch (cpu_vendor_id) {
  711         case CPU_VENDOR_INTEL:
  712         case CPU_VENDOR_AMD:
  713         case CPU_VENDOR_CENTAUR:
  714                 break;
  715         default:
  716                 return;
  717         }
  718         mem_range_softc.mr_op = &i686_mrops;
  719 }
  720 SYSINIT(i686memdev, SI_SUB_DRIVERS, SI_ORDER_FIRST, i686_mem_drvinit, NULL);
Cache object: 418adf6863ea3d2df01247899c65b9d4
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FreeBSD/Linux Kernel Cross Reference sys/i386/i386/i686_mem.c

FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/i686_mem.c
