The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/i686_mem.c

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    1 /*-
    2  * Copyright (c) 1999 Michael Smith <msmith@freebsd.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  *
   26  * $FreeBSD$
   27  */
   28 
   29 #include <sys/param.h>
   30 #include <sys/kernel.h>
   31 #include <sys/systm.h>
   32 #include <sys/malloc.h>
   33 #include <sys/memrange.h>
   34 
   35 #include <machine/md_var.h>
   36 #include <machine/specialreg.h>
   37 
   38 #ifdef SMP
   39 #include <machine/smp.h>
   40 #endif
   41 
   42 /*
   43  * i686 memory range operations
   44  *
   45  * This code will probably be impenetrable without reference to the
   46  * Intel Pentium Pro documentation.
   47  */
   48 
   49 static char *mem_owner_bios = "BIOS";
   50 
   51 #define MR686_FIXMTRR   (1<<0)
   52 
   53 #define mrwithin(mr, a) \
   54     (((a) >= (mr)->mr_base) && ((a) < ((mr)->mr_base + (mr)->mr_len)))
   55 #define mroverlap(mra, mrb) \
   56     (mrwithin(mra, mrb->mr_base) || mrwithin(mrb, mra->mr_base))
   57 
   58 #define mrvalid(base, len)                                              \
   59     ((!(base & ((1 << 12) - 1))) &&     /* base is multiple of 4k */    \
   60      ((len) >= (1 << 12)) &&            /* length is >= 4k */           \
   61      powerof2((len)) &&                 /* ... and power of two */      \
   62      !((base) & ((len) - 1)))           /* range is not discontiuous */
   63 
   64 #define mrcopyflags(curr, new) (((curr) & ~MDF_ATTRMASK) | ((new) & MDF_ATTRMASK))
   65 
   66 static void                     i686_mrinit(struct mem_range_softc *sc);
   67 static int                      i686_mrset(struct mem_range_softc *sc,
   68                                            struct mem_range_desc *mrd,
   69                                            int *arg);
   70 static void                     i686_mrAPinit(struct mem_range_softc *sc);
   71 
   72 static struct mem_range_ops i686_mrops = {
   73     i686_mrinit,
   74     i686_mrset,
   75     i686_mrAPinit
   76 };
   77 
   78 /* XXX for AP startup hook */
   79 static u_int64_t                mtrrcap, mtrrdef;
   80 
   81 static struct mem_range_desc    *mem_range_match(struct mem_range_softc *sc,
   82                                                  struct mem_range_desc *mrd);
   83 static void                     i686_mrfetch(struct mem_range_softc *sc);
   84 static int                      i686_mtrrtype(int flags);
   85 static int                      i686_mrt2mtrr(int flags, int oldval);
   86 static int                      i686_mtrrconflict(int flag1, int flag2);
   87 static void                     i686_mrstore(struct mem_range_softc *sc);
   88 static void                     i686_mrstoreone(void *arg);
   89 static struct mem_range_desc    *i686_mtrrfixsearch(struct mem_range_softc *sc,
   90                                                     u_int64_t addr);
   91 static int                      i686_mrsetlow(struct mem_range_softc *sc,
   92                                               struct mem_range_desc *mrd,
   93                                               int *arg);
   94 static int                      i686_mrsetvariable(struct mem_range_softc *sc,
   95                                                    struct mem_range_desc *mrd,
   96                                                    int *arg);
   97 
   98 /* i686 MTRR type to memory range type conversion */
   99 static int i686_mtrrtomrt[] = {
  100     MDF_UNCACHEABLE,
  101     MDF_WRITECOMBINE,
  102     MDF_UNKNOWN,
  103     MDF_UNKNOWN,
  104     MDF_WRITETHROUGH,
  105     MDF_WRITEPROTECT,
  106     MDF_WRITEBACK
  107 };
  108 
  109 #define MTRRTOMRTLEN (sizeof(i686_mtrrtomrt) / sizeof(i686_mtrrtomrt[0]))
  110 
  111 static int
  112 i686_mtrr2mrt(int val) {
  113         if (val < 0 || val >= MTRRTOMRTLEN)
  114                 return MDF_UNKNOWN;
  115         return i686_mtrrtomrt[val];
  116 }
  117 
  118 /* 
  119  * i686 MTRR conflicts. Writeback and uncachable may overlap.
  120  */
  121 static int
  122 i686_mtrrconflict(int flag1, int flag2) {
  123         flag1 &= MDF_ATTRMASK;
  124         flag2 &= MDF_ATTRMASK;
  125         if (flag1 == flag2 ||
  126             (flag1 == MDF_WRITEBACK && flag2 == MDF_UNCACHEABLE) ||
  127             (flag2 == MDF_WRITEBACK && flag1 == MDF_UNCACHEABLE))
  128                 return 0;
  129         return 1;
  130 }
  131 
  132 /*
  133  * Look for an exactly-matching range.
  134  */
  135 static struct mem_range_desc *
  136 mem_range_match(struct mem_range_softc *sc, struct mem_range_desc *mrd) 
  137 {
  138     struct mem_range_desc       *cand;
  139     int                         i;
  140         
  141     for (i = 0, cand = sc->mr_desc; i < sc->mr_ndesc; i++, cand++)
  142         if ((cand->mr_base == mrd->mr_base) &&
  143             (cand->mr_len == mrd->mr_len))
  144             return(cand);
  145     return(NULL);
  146 }
  147 
  148 /*
  149  * Fetch the current mtrr settings from the current CPU (assumed to all
  150  * be in sync in the SMP case).  Note that if we are here, we assume
  151  * that MTRRs are enabled, and we may or may not have fixed MTRRs.
  152  */
  153 static void
  154 i686_mrfetch(struct mem_range_softc *sc)
  155 {
  156     struct mem_range_desc       *mrd;
  157     u_int64_t                   msrv;
  158     int                         i, j, msr;
  159 
  160     mrd = sc->mr_desc;
  161 
  162     /* Get fixed-range MTRRs */
  163     if (sc->mr_cap & MR686_FIXMTRR) {
  164         msr = MSR_MTRR64kBase;
  165         for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
  166             msrv = rdmsr(msr);
  167             for (j = 0; j < 8; j++, mrd++) {
  168                 mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
  169                     i686_mtrr2mrt(msrv & 0xff) |
  170                     MDF_ACTIVE;
  171                 if (mrd->mr_owner[0] == 0)
  172                     strcpy(mrd->mr_owner, mem_owner_bios);
  173                 msrv = msrv >> 8;
  174             }
  175         }
  176         msr = MSR_MTRR16kBase;
  177         for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
  178             msrv = rdmsr(msr);
  179             for (j = 0; j < 8; j++, mrd++) {
  180                 mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
  181                     i686_mtrr2mrt(msrv & 0xff) |
  182                     MDF_ACTIVE;
  183                 if (mrd->mr_owner[0] == 0)
  184                     strcpy(mrd->mr_owner, mem_owner_bios);
  185                 msrv = msrv >> 8;
  186             }
  187         }
  188         msr = MSR_MTRR4kBase;
  189         for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
  190             msrv = rdmsr(msr);
  191             for (j = 0; j < 8; j++, mrd++) {
  192                 mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
  193                     i686_mtrr2mrt(msrv & 0xff) |
  194                     MDF_ACTIVE;
  195                 if (mrd->mr_owner[0] == 0)
  196                     strcpy(mrd->mr_owner, mem_owner_bios);
  197                 msrv = msrv >> 8;
  198             }
  199         }
  200     }
  201 
  202     /* Get remainder which must be variable MTRRs */
  203     msr = MSR_MTRRVarBase;
  204     for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
  205         msrv = rdmsr(msr);
  206         mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
  207             i686_mtrr2mrt(msrv & 0xff);
  208         mrd->mr_base = msrv & 0x0000000ffffff000LL;
  209         msrv = rdmsr(msr + 1);
  210         mrd->mr_flags = (msrv & 0x800) ? 
  211             (mrd->mr_flags | MDF_ACTIVE) :
  212             (mrd->mr_flags & ~MDF_ACTIVE);
  213         /* Compute the range from the mask. Ick. */
  214         mrd->mr_len = (~(msrv & 0x0000000ffffff000LL) & 0x0000000fffffffffLL) + 1;
  215         if (!mrvalid(mrd->mr_base, mrd->mr_len))
  216             mrd->mr_flags |= MDF_BOGUS;
  217         /* If unclaimed and active, must be the BIOS */
  218         if ((mrd->mr_flags & MDF_ACTIVE) && (mrd->mr_owner[0] == 0))
  219             strcpy(mrd->mr_owner, mem_owner_bios);
  220     }
  221 }
  222 
  223 /*
  224  * Return the MTRR memory type matching a region's flags
  225  */
  226 static int
  227 i686_mtrrtype(int flags)
  228 {
  229     int         i;
  230 
  231     flags &= MDF_ATTRMASK;
  232 
  233     for (i = 0; i < MTRRTOMRTLEN; i++) {
  234         if (i686_mtrrtomrt[i] == MDF_UNKNOWN)
  235             continue;
  236         if (flags == i686_mtrrtomrt[i])
  237             return(i);
  238     }
  239     return(-1);
  240 }
  241 
  242 static int
  243 i686_mrt2mtrr(int flags, int oldval)
  244 {
  245         int val;
  246 
  247         if ((val = i686_mtrrtype(flags)) == -1)
  248                 return oldval & 0xff;
  249         return val & 0xff;
  250 }
  251 
  252 /*
  253  * Update running CPU(s) MTRRs to match the ranges in the descriptor
  254  * list.
  255  *
  256  * XXX Must be called with interrupts enabled.
  257  */
  258 static void
  259 i686_mrstore(struct mem_range_softc *sc)
  260 {
  261 #ifdef SMP
  262     /*
  263      * We should use all_but_self_ipi() to call other CPUs into a 
  264      * locking gate, then call a target function to do this work.
  265      * The "proper" solution involves a generalised locking gate
  266      * implementation, not ready yet.
  267      */
  268     smp_rendezvous(NULL, i686_mrstoreone, NULL, (void *)sc);
  269 #else
  270     disable_intr();                             /* disable interrupts */
  271     i686_mrstoreone((void *)sc);
  272     enable_intr();
  273 #endif
  274 }
  275 
  276 /*
  277  * Update the current CPU's MTRRs with those represented in the
  278  * descriptor list.  Note that we do this wholesale rather than
  279  * just stuffing one entry; this is simpler (but slower, of course).
  280  */
  281 static void
  282 i686_mrstoreone(void *arg)
  283 {
  284     struct mem_range_softc      *sc = (struct mem_range_softc *)arg;
  285     struct mem_range_desc       *mrd;
  286     u_int64_t                   omsrv, msrv;
  287     int                         i, j, msr;
  288     u_int                       cr4save;
  289 
  290     mrd = sc->mr_desc;
  291 
  292     cr4save = rcr4();                           /* save cr4 */
  293     if (cr4save & CR4_PGE)
  294         load_cr4(cr4save & ~CR4_PGE);
  295     load_cr0((rcr0() & ~CR0_NW) | CR0_CD);      /* disable caches (CD = 1, NW = 0) */
  296     wbinvd();                                   /* flush caches, TLBs */
  297     wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~0x800);    /* disable MTRRs (E = 0) */
  298 
  299     /* Set fixed-range MTRRs */
  300     if (sc->mr_cap & MR686_FIXMTRR) {
  301         msr = MSR_MTRR64kBase;
  302         for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
  303             msrv = 0;
  304             omsrv = rdmsr(msr);
  305             for (j = 7; j >= 0; j--) {
  306                 msrv = msrv << 8;
  307                 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags, omsrv >> (j*8));
  308             }
  309             wrmsr(msr, msrv);
  310             mrd += 8;
  311         }
  312         msr = MSR_MTRR16kBase;
  313         for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
  314             msrv = 0;
  315             omsrv = rdmsr(msr);
  316             for (j = 7; j >= 0; j--) {
  317                 msrv = msrv << 8;
  318                 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags, omsrv >> (j*8));
  319             }
  320             wrmsr(msr, msrv);
  321             mrd += 8;
  322         }
  323         msr = MSR_MTRR4kBase;
  324         for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
  325             msrv = 0;
  326             omsrv = rdmsr(msr);
  327             for (j = 7; j >= 0; j--) {
  328                 msrv = msrv << 8;
  329                 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags, omsrv >> (j*8));
  330             }
  331             wrmsr(msr, msrv);
  332             mrd += 8;
  333         }
  334     }
  335 
  336     /* Set remainder which must be variable MTRRs */
  337     msr = MSR_MTRRVarBase;
  338     for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
  339         /* base/type register */
  340         omsrv = rdmsr(msr);
  341         if (mrd->mr_flags & MDF_ACTIVE) {
  342             msrv = mrd->mr_base & 0x0000000ffffff000LL;
  343             msrv |= i686_mrt2mtrr(mrd->mr_flags, omsrv);
  344         } else {
  345             msrv = 0;
  346         }
  347         wrmsr(msr, msrv);       
  348             
  349         /* mask/active register */
  350         if (mrd->mr_flags & MDF_ACTIVE) {
  351             msrv = 0x800 | (~(mrd->mr_len - 1) & 0x0000000ffffff000LL);
  352         } else {
  353             msrv = 0;
  354         }
  355         wrmsr(msr + 1, msrv);
  356     }
  357     wbinvd();                                                   /* flush caches, TLBs */
  358     wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | 0x800);     /* restore MTRR state */
  359     load_cr0(rcr0() & ~(CR0_CD | CR0_NW));                      /* enable caches CD = 0 and NW = 0 */
  360     load_cr4(cr4save);                                          /* restore cr4 */
  361 }
  362 
  363 /*
  364  * Hunt for the fixed MTRR referencing (addr)
  365  */
  366 static struct mem_range_desc *
  367 i686_mtrrfixsearch(struct mem_range_softc *sc, u_int64_t addr)
  368 {
  369     struct mem_range_desc *mrd;
  370     int                 i;
  371     
  372     for (i = 0, mrd = sc->mr_desc; i < (MTRR_N64K + MTRR_N16K + MTRR_N4K); i++, mrd++)
  373         if ((addr >= mrd->mr_base) && (addr < (mrd->mr_base + mrd->mr_len)))
  374             return(mrd);
  375     return(NULL);
  376 }
  377 
  378 /*
  379  * Try to satisfy the given range request by manipulating the fixed MTRRs that
  380  * cover low memory.
  381  *
  382  * Note that we try to be generous here; we'll bloat the range out to the 
  383  * next higher/lower boundary to avoid the consumer having to know too much
  384  * about the mechanisms here.
  385  *
  386  * XXX note that this will have to be updated when we start supporting "busy" ranges.
  387  */
  388 static int
  389 i686_mrsetlow(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
  390 {
  391     struct mem_range_desc       *first_md, *last_md, *curr_md;
  392 
  393     /* range check */
  394     if (((first_md = i686_mtrrfixsearch(sc, mrd->mr_base)) == NULL) ||
  395         ((last_md = i686_mtrrfixsearch(sc, mrd->mr_base + mrd->mr_len - 1)) == NULL))
  396         return(EINVAL);
  397 
  398     /* check we aren't doing something risky */
  399     if (!(mrd->mr_flags & MDF_FORCE))
  400         for (curr_md = first_md; curr_md <= last_md; curr_md++) {
  401             if ((curr_md->mr_flags & MDF_ATTRMASK) == MDF_UNKNOWN)
  402                 return (EACCES);
  403         }
  404 
  405     /* set flags, clear set-by-firmware flag */
  406     for (curr_md = first_md; curr_md <= last_md; curr_md++) {
  407         curr_md->mr_flags = mrcopyflags(curr_md->mr_flags & ~MDF_FIRMWARE, mrd->mr_flags);
  408         bcopy(mrd->mr_owner, curr_md->mr_owner, sizeof(mrd->mr_owner));
  409     }
  410 
  411     return(0);
  412 }
  413 
  414 
  415 /*
  416  * Modify/add a variable MTRR to satisfy the request.
  417  *
  418  * XXX needs to be updated to properly support "busy" ranges.
  419  */
  420 static int
  421 i686_mrsetvariable(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
  422 {
  423     struct mem_range_desc       *curr_md, *free_md;
  424     int                         i;
  425     
  426     /* 
  427      * Scan the currently active variable descriptors, look for 
  428      * one we exactly match (straight takeover) and for possible
  429      * accidental overlaps.
  430      * Keep track of the first empty variable descriptor in case we
  431      * can't perform a takeover.
  432      */
  433     i = (sc->mr_cap & MR686_FIXMTRR) ? MTRR_N64K + MTRR_N16K + MTRR_N4K : 0;
  434     curr_md = sc->mr_desc + i;
  435     free_md = NULL;
  436     for (; i < sc->mr_ndesc; i++, curr_md++) {
  437         if (curr_md->mr_flags & MDF_ACTIVE) {
  438             /* exact match? */
  439             if ((curr_md->mr_base == mrd->mr_base) &&
  440                 (curr_md->mr_len == mrd->mr_len)) {
  441                 /* whoops, owned by someone */
  442                 if (curr_md->mr_flags & MDF_BUSY)
  443                     return(EBUSY);
  444                 /* check we aren't doing something risky */
  445                 if (!(mrd->mr_flags & MDF_FORCE) &&
  446                   ((curr_md->mr_flags & MDF_ATTRMASK) == MDF_UNKNOWN))
  447                     return (EACCES);
  448                 /* Ok, just hijack this entry */
  449                 free_md = curr_md;
  450                 break;
  451             }
  452             /* non-exact overlap ? */
  453             if (mroverlap(curr_md, mrd)) {
  454                 /* between conflicting region types? */
  455                 if (i686_mtrrconflict(curr_md->mr_flags, mrd->mr_flags))
  456                     return(EINVAL);
  457             }
  458         } else if (free_md == NULL) {
  459             free_md = curr_md;
  460         }
  461     }
  462     /* got somewhere to put it? */
  463     if (free_md == NULL)
  464         return(ENOSPC);
  465 
  466     /* Set up new descriptor */
  467     free_md->mr_base = mrd->mr_base;
  468     free_md->mr_len = mrd->mr_len;
  469     free_md->mr_flags = mrcopyflags(MDF_ACTIVE, mrd->mr_flags);
  470     bcopy(mrd->mr_owner, free_md->mr_owner, sizeof(mrd->mr_owner));
  471     return(0);
  472 }
  473 
  474 /*
  475  * Handle requests to set memory range attributes by manipulating MTRRs.
  476  *
  477  */
  478 static int
  479 i686_mrset(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
  480 {
  481     struct mem_range_desc       *targ;
  482     int                         error = 0;
  483 
  484     switch(*arg) {
  485     case MEMRANGE_SET_UPDATE:
  486         /* make sure that what's being asked for is even possible at all */
  487         if (!mrvalid(mrd->mr_base, mrd->mr_len) ||
  488             i686_mtrrtype(mrd->mr_flags) == -1)
  489             return(EINVAL);
  490 
  491 #define FIXTOP  ((MTRR_N64K * 0x10000) + (MTRR_N16K * 0x4000) + (MTRR_N4K * 0x1000))
  492 
  493         /* are the "low memory" conditions applicable? */
  494         if ((sc->mr_cap & MR686_FIXMTRR) &&
  495             ((mrd->mr_base + mrd->mr_len) <= FIXTOP)) {
  496             if ((error = i686_mrsetlow(sc, mrd, arg)) != 0)
  497                 return(error);
  498         } else {
  499             /* it's time to play with variable MTRRs */
  500             if ((error = i686_mrsetvariable(sc, mrd, arg)) != 0)
  501                 return(error);
  502         }
  503         break;
  504 
  505     case MEMRANGE_SET_REMOVE:
  506         if ((targ = mem_range_match(sc, mrd)) == NULL)
  507             return(ENOENT);
  508         if (targ->mr_flags & MDF_FIXACTIVE)
  509             return(EPERM);
  510         if (targ->mr_flags & MDF_BUSY)
  511             return(EBUSY);
  512         targ->mr_flags &= ~MDF_ACTIVE;
  513         targ->mr_owner[0] = 0;
  514         break;
  515 
  516     default:
  517         return(EOPNOTSUPP);
  518     }
  519 
  520     /* update the hardware */
  521     i686_mrstore(sc);
  522     i686_mrfetch(sc);   /* refetch to see where we're at */
  523     return(0);
  524 }
  525 
  526 /*
  527  * Work out how many ranges we support, initialise storage for them, 
  528  * fetch the initial settings.
  529  */
  530 static void
  531 i686_mrinit(struct mem_range_softc *sc)
  532 {
  533     struct mem_range_desc       *mrd;
  534     int                         nmdesc = 0;
  535     int                         i;
  536 
  537     mtrrcap = rdmsr(MSR_MTRRcap);
  538     mtrrdef = rdmsr(MSR_MTRRdefType);
  539 
  540     /* For now, bail out if MTRRs are not enabled */
  541     if (!(mtrrdef & 0x800)) {
  542         if (bootverbose)
  543             printf("CPU supports MTRRs but not enabled\n");
  544         return;
  545     }
  546     nmdesc = mtrrcap & 0xff;
  547     printf("Pentium Pro MTRR support enabled\n");
  548 
  549     /* If fixed MTRRs supported and enabled */
  550     if ((mtrrcap & 0x100) && (mtrrdef & 0x400)) {
  551         sc->mr_cap = MR686_FIXMTRR;
  552         nmdesc += MTRR_N64K + MTRR_N16K + MTRR_N4K;
  553     }
  554 
  555     sc->mr_desc = 
  556         (struct mem_range_desc *)malloc(nmdesc * sizeof(struct mem_range_desc), 
  557                                         M_MEMDESC, M_WAITOK);
  558     bzero(sc->mr_desc, nmdesc * sizeof(struct mem_range_desc));
  559     sc->mr_ndesc = nmdesc;
  560 
  561     mrd = sc->mr_desc;
  562 
  563     /* Populate the fixed MTRR entries' base/length */
  564     if (sc->mr_cap & MR686_FIXMTRR) {
  565         for (i = 0; i < MTRR_N64K; i++, mrd++) {
  566             mrd->mr_base = i * 0x10000;
  567             mrd->mr_len = 0x10000;
  568             mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN | MDF_FIXACTIVE;
  569         }
  570         for (i = 0; i < MTRR_N16K; i++, mrd++) {
  571             mrd->mr_base = i * 0x4000 + 0x80000;
  572             mrd->mr_len = 0x4000;
  573             mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN | MDF_FIXACTIVE;
  574         }
  575         for (i = 0; i < MTRR_N4K; i++, mrd++) {
  576             mrd->mr_base = i * 0x1000 + 0xc0000;
  577             mrd->mr_len = 0x1000;
  578             mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN | MDF_FIXACTIVE;
  579         }
  580     }
  581 
  582     /* 
  583      * Get current settings, anything set now is considered to have 
  584      * been set by the firmware. (XXX has something already played here?)
  585      */
  586     i686_mrfetch(sc);
  587     mrd = sc->mr_desc;
  588     for (i = 0; i < sc->mr_ndesc; i++, mrd++) {
  589         if (mrd->mr_flags & MDF_ACTIVE)
  590             mrd->mr_flags |= MDF_FIRMWARE;
  591     }
  592 }
  593 
  594 /*
  595  * Initialise MTRRs on an AP after the BSP has run the init code.
  596  */
  597 static void
  598 i686_mrAPinit(struct mem_range_softc *sc)
  599 {
  600     i686_mrstoreone((void *)sc);        /* set MTRRs to match BSP */
  601     wrmsr(MSR_MTRRdefType, mtrrdef);    /* set MTRR behaviour to match BSP */
  602 }
  603 
  604 static void
  605 i686_mem_drvinit(void *unused)
  606 {
  607     /* Try for i686 MTRRs */
  608     if ((cpu_feature & CPUID_MTRR) &&
  609         ((cpu_id & 0xf00) == 0x600 || (cpu_id & 0xf00) == 0xf00) &&
  610         ((strcmp(cpu_vendor, "GenuineIntel") == 0) ||
  611         (strcmp(cpu_vendor, "AuthenticAMD") == 0))) {
  612         mem_range_softc.mr_op = &i686_mrops;
  613     }
  614 }
  615 
  616 SYSINIT(i686memdev,SI_SUB_DRIVERS,SI_ORDER_FIRST,i686_mem_drvinit,NULL)

Cache object: d029f07930de6c2680de7b64ae7165f5


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