The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/i686_mem.c

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    1 /*-
    2  * Copyright (c) 1999 Michael Smith <msmith@freebsd.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD: releng/5.4/sys/i386/i386/i686_mem.c 145335 2005-04-20 19:11:07Z cvs2svn $");
   29 
   30 #include <sys/param.h>
   31 #include <sys/kernel.h>
   32 #include <sys/systm.h>
   33 #include <sys/malloc.h>
   34 #include <sys/memrange.h>
   35 #include <sys/smp.h>
   36 #include <sys/sysctl.h>
   37 
   38 #include <machine/md_var.h>
   39 #include <machine/specialreg.h>
   40 
   41 /*
   42  * i686 memory range operations
   43  *
   44  * This code will probably be impenetrable without reference to the
   45  * Intel Pentium Pro documentation.
   46  */
   47 
   48 static char *mem_owner_bios = "BIOS";
   49 
   50 #define MR686_FIXMTRR   (1<<0)
   51 
   52 #define mrwithin(mr, a) \
   53     (((a) >= (mr)->mr_base) && ((a) < ((mr)->mr_base + (mr)->mr_len)))
   54 #define mroverlap(mra, mrb) \
   55     (mrwithin(mra, mrb->mr_base) || mrwithin(mrb, mra->mr_base))
   56 
   57 #define mrvalid(base, len)                                              \
   58     ((!(base & ((1 << 12) - 1))) &&     /* base is multiple of 4k */    \
   59      ((len) >= (1 << 12)) &&            /* length is >= 4k */           \
   60      powerof2((len)) &&                 /* ... and power of two */      \
   61      !((base) & ((len) - 1)))           /* range is not discontiuous */
   62 
   63 #define mrcopyflags(curr, new) (((curr) & ~MDF_ATTRMASK) | ((new) & MDF_ATTRMASK))
   64 
   65 static int                      mtrrs_disabled;
   66 TUNABLE_INT("machdep.disable_mtrrs", &mtrrs_disabled);
   67 SYSCTL_INT(_machdep, OID_AUTO, disable_mtrrs, CTLFLAG_RDTUN,
   68         &mtrrs_disabled, 0, "Disable i686 MTRRs.");
   69 
   70 static void                     i686_mrinit(struct mem_range_softc *sc);
   71 static int                      i686_mrset(struct mem_range_softc *sc,
   72                                            struct mem_range_desc *mrd,
   73                                            int *arg);
   74 static void                     i686_mrAPinit(struct mem_range_softc *sc);
   75 
   76 static struct mem_range_ops i686_mrops = {
   77     i686_mrinit,
   78     i686_mrset,
   79     i686_mrAPinit
   80 };
   81 
   82 /* XXX for AP startup hook */
   83 static u_int64_t                mtrrcap, mtrrdef;
   84 
   85 static struct mem_range_desc    *mem_range_match(struct mem_range_softc *sc,
   86                                                  struct mem_range_desc *mrd);
   87 static void                     i686_mrfetch(struct mem_range_softc *sc);
   88 static int                      i686_mtrrtype(int flags);
   89 static int                      i686_mrt2mtrr(int flags, int oldval);
   90 static int                      i686_mtrrconflict(int flag1, int flag2);
   91 static void                     i686_mrstore(struct mem_range_softc *sc);
   92 static void                     i686_mrstoreone(void *arg);
   93 static struct mem_range_desc    *i686_mtrrfixsearch(struct mem_range_softc *sc,
   94                                                     u_int64_t addr);
   95 static int                      i686_mrsetlow(struct mem_range_softc *sc,
   96                                               struct mem_range_desc *mrd,
   97                                               int *arg);
   98 static int                      i686_mrsetvariable(struct mem_range_softc *sc,
   99                                                    struct mem_range_desc *mrd,
  100                                                    int *arg);
  101 
  102 /* i686 MTRR type to memory range type conversion */
  103 static int i686_mtrrtomrt[] = {
  104     MDF_UNCACHEABLE,
  105     MDF_WRITECOMBINE,
  106     MDF_UNKNOWN,
  107     MDF_UNKNOWN,
  108     MDF_WRITETHROUGH,
  109     MDF_WRITEPROTECT,
  110     MDF_WRITEBACK
  111 };
  112 
  113 #define MTRRTOMRTLEN (sizeof(i686_mtrrtomrt) / sizeof(i686_mtrrtomrt[0]))
  114 
  115 static int
  116 i686_mtrr2mrt(int val) {
  117         if (val < 0 || val >= MTRRTOMRTLEN)
  118                 return MDF_UNKNOWN;
  119         return i686_mtrrtomrt[val];
  120 }
  121 
  122 /* 
  123  * i686 MTRR conflicts. Writeback and uncachable may overlap.
  124  */
  125 static int
  126 i686_mtrrconflict(int flag1, int flag2) {
  127         flag1 &= MDF_ATTRMASK;
  128         flag2 &= MDF_ATTRMASK;
  129         if (flag1 == flag2 ||
  130             (flag1 == MDF_WRITEBACK && flag2 == MDF_UNCACHEABLE) ||
  131             (flag2 == MDF_WRITEBACK && flag1 == MDF_UNCACHEABLE))
  132                 return 0;
  133         return 1;
  134 }
  135 
  136 /*
  137  * Look for an exactly-matching range.
  138  */
  139 static struct mem_range_desc *
  140 mem_range_match(struct mem_range_softc *sc, struct mem_range_desc *mrd) 
  141 {
  142     struct mem_range_desc       *cand;
  143     int                         i;
  144         
  145     for (i = 0, cand = sc->mr_desc; i < sc->mr_ndesc; i++, cand++)
  146         if ((cand->mr_base == mrd->mr_base) &&
  147             (cand->mr_len == mrd->mr_len))
  148             return(cand);
  149     return(NULL);
  150 }
  151 
  152 /*
  153  * Fetch the current mtrr settings from the current CPU (assumed to all
  154  * be in sync in the SMP case).  Note that if we are here, we assume
  155  * that MTRRs are enabled, and we may or may not have fixed MTRRs.
  156  */
  157 static void
  158 i686_mrfetch(struct mem_range_softc *sc)
  159 {
  160     struct mem_range_desc       *mrd;
  161     u_int64_t                   msrv;
  162     int                         i, j, msr;
  163 
  164     mrd = sc->mr_desc;
  165 
  166     /* Get fixed-range MTRRs */
  167     if (sc->mr_cap & MR686_FIXMTRR) {
  168         msr = MSR_MTRR64kBase;
  169         for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
  170             msrv = rdmsr(msr);
  171             for (j = 0; j < 8; j++, mrd++) {
  172                 mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
  173                     i686_mtrr2mrt(msrv & 0xff) |
  174                     MDF_ACTIVE;
  175                 if (mrd->mr_owner[0] == 0)
  176                     strcpy(mrd->mr_owner, mem_owner_bios);
  177                 msrv = msrv >> 8;
  178             }
  179         }
  180         msr = MSR_MTRR16kBase;
  181         for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
  182             msrv = rdmsr(msr);
  183             for (j = 0; j < 8; j++, mrd++) {
  184                 mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
  185                     i686_mtrr2mrt(msrv & 0xff) |
  186                     MDF_ACTIVE;
  187                 if (mrd->mr_owner[0] == 0)
  188                     strcpy(mrd->mr_owner, mem_owner_bios);
  189                 msrv = msrv >> 8;
  190             }
  191         }
  192         msr = MSR_MTRR4kBase;
  193         for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
  194             msrv = rdmsr(msr);
  195             for (j = 0; j < 8; j++, mrd++) {
  196                 mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
  197                     i686_mtrr2mrt(msrv & 0xff) |
  198                     MDF_ACTIVE;
  199                 if (mrd->mr_owner[0] == 0)
  200                     strcpy(mrd->mr_owner, mem_owner_bios);
  201                 msrv = msrv >> 8;
  202             }
  203         }
  204     }
  205 
  206     /* Get remainder which must be variable MTRRs */
  207     msr = MSR_MTRRVarBase;
  208     for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
  209         msrv = rdmsr(msr);
  210         mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
  211             i686_mtrr2mrt(msrv & 0xff);
  212         mrd->mr_base = msrv & 0x0000000ffffff000LL;
  213         msrv = rdmsr(msr + 1);
  214         mrd->mr_flags = (msrv & 0x800) ? 
  215             (mrd->mr_flags | MDF_ACTIVE) :
  216             (mrd->mr_flags & ~MDF_ACTIVE);
  217         /* Compute the range from the mask. Ick. */
  218         mrd->mr_len = (~(msrv & 0x0000000ffffff000LL) & 0x0000000fffffffffLL) + 1;
  219         if (!mrvalid(mrd->mr_base, mrd->mr_len))
  220             mrd->mr_flags |= MDF_BOGUS;
  221         /* If unclaimed and active, must be the BIOS */
  222         if ((mrd->mr_flags & MDF_ACTIVE) && (mrd->mr_owner[0] == 0))
  223             strcpy(mrd->mr_owner, mem_owner_bios);
  224     }
  225 }
  226 
  227 /*
  228  * Return the MTRR memory type matching a region's flags
  229  */
  230 static int
  231 i686_mtrrtype(int flags)
  232 {
  233     int         i;
  234 
  235     flags &= MDF_ATTRMASK;
  236 
  237     for (i = 0; i < MTRRTOMRTLEN; i++) {
  238         if (i686_mtrrtomrt[i] == MDF_UNKNOWN)
  239             continue;
  240         if (flags == i686_mtrrtomrt[i])
  241             return(i);
  242     }
  243     return(-1);
  244 }
  245 
  246 static int
  247 i686_mrt2mtrr(int flags, int oldval)
  248 {
  249         int val;
  250 
  251         if ((val = i686_mtrrtype(flags)) == -1)
  252                 return oldval & 0xff;
  253         return val & 0xff;
  254 }
  255 
  256 /*
  257  * Update running CPU(s) MTRRs to match the ranges in the descriptor
  258  * list.
  259  *
  260  * XXX Must be called with interrupts enabled.
  261  */
  262 static void
  263 i686_mrstore(struct mem_range_softc *sc)
  264 {
  265 #ifdef SMP
  266     /*
  267      * We should use ipi_all_but_self() to call other CPUs into a 
  268      * locking gate, then call a target function to do this work.
  269      * The "proper" solution involves a generalised locking gate
  270      * implementation, not ready yet.
  271      */
  272     smp_rendezvous(NULL, i686_mrstoreone, NULL, (void *)sc);
  273 #else
  274     disable_intr();                             /* disable interrupts */
  275     i686_mrstoreone((void *)sc);
  276     enable_intr();
  277 #endif
  278 }
  279 
  280 /*
  281  * Update the current CPU's MTRRs with those represented in the
  282  * descriptor list.  Note that we do this wholesale rather than
  283  * just stuffing one entry; this is simpler (but slower, of course).
  284  */
  285 static void
  286 i686_mrstoreone(void *arg)
  287 {
  288     struct mem_range_softc      *sc = (struct mem_range_softc *)arg;
  289     struct mem_range_desc       *mrd;
  290     u_int64_t                   omsrv, msrv;
  291     int                         i, j, msr;
  292     u_int                       cr4save;
  293 
  294     mrd = sc->mr_desc;
  295 
  296     cr4save = rcr4();                           /* save cr4 */
  297     if (cr4save & CR4_PGE)
  298         load_cr4(cr4save & ~CR4_PGE);
  299     load_cr0((rcr0() & ~CR0_NW) | CR0_CD);      /* disable caches (CD = 1, NW = 0) */
  300     wbinvd();                                   /* flush caches, TLBs */
  301     wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~0x800);    /* disable MTRRs (E = 0) */
  302 
  303     /* Set fixed-range MTRRs */
  304     if (sc->mr_cap & MR686_FIXMTRR) {
  305         msr = MSR_MTRR64kBase;
  306         for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
  307             msrv = 0;
  308             omsrv = rdmsr(msr);
  309             for (j = 7; j >= 0; j--) {
  310                 msrv = msrv << 8;
  311                 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags, omsrv >> (j*8));
  312             }
  313             wrmsr(msr, msrv);
  314             mrd += 8;
  315         }
  316         msr = MSR_MTRR16kBase;
  317         for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
  318             msrv = 0;
  319             omsrv = rdmsr(msr);
  320             for (j = 7; j >= 0; j--) {
  321                 msrv = msrv << 8;
  322                 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags, omsrv >> (j*8));
  323             }
  324             wrmsr(msr, msrv);
  325             mrd += 8;
  326         }
  327         msr = MSR_MTRR4kBase;
  328         for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
  329             msrv = 0;
  330             omsrv = rdmsr(msr);
  331             for (j = 7; j >= 0; j--) {
  332                 msrv = msrv << 8;
  333                 msrv |= i686_mrt2mtrr((mrd + j)->mr_flags, omsrv >> (j*8));
  334             }
  335             wrmsr(msr, msrv);
  336             mrd += 8;
  337         }
  338     }
  339 
  340     /* Set remainder which must be variable MTRRs */
  341     msr = MSR_MTRRVarBase;
  342     for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
  343         /* base/type register */
  344         omsrv = rdmsr(msr);
  345         if (mrd->mr_flags & MDF_ACTIVE) {
  346             msrv = mrd->mr_base & 0x0000000ffffff000LL;
  347             msrv |= i686_mrt2mtrr(mrd->mr_flags, omsrv);
  348         } else {
  349             msrv = 0;
  350         }
  351         wrmsr(msr, msrv);       
  352             
  353         /* mask/active register */
  354         if (mrd->mr_flags & MDF_ACTIVE) {
  355             msrv = 0x800 | (~(mrd->mr_len - 1) & 0x0000000ffffff000LL);
  356         } else {
  357             msrv = 0;
  358         }
  359         wrmsr(msr + 1, msrv);
  360     }
  361     wbinvd();                                                   /* flush caches, TLBs */
  362     wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | 0x800);     /* restore MTRR state */
  363     load_cr0(rcr0() & ~(CR0_CD | CR0_NW));                      /* enable caches CD = 0 and NW = 0 */
  364     load_cr4(cr4save);                                          /* restore cr4 */
  365 }
  366 
  367 /*
  368  * Hunt for the fixed MTRR referencing (addr)
  369  */
  370 static struct mem_range_desc *
  371 i686_mtrrfixsearch(struct mem_range_softc *sc, u_int64_t addr)
  372 {
  373     struct mem_range_desc *mrd;
  374     int                 i;
  375     
  376     for (i = 0, mrd = sc->mr_desc; i < (MTRR_N64K + MTRR_N16K + MTRR_N4K); i++, mrd++)
  377         if ((addr >= mrd->mr_base) && (addr < (mrd->mr_base + mrd->mr_len)))
  378             return(mrd);
  379     return(NULL);
  380 }
  381 
  382 /*
  383  * Try to satisfy the given range request by manipulating the fixed MTRRs that
  384  * cover low memory.
  385  *
  386  * Note that we try to be generous here; we'll bloat the range out to the 
  387  * next higher/lower boundary to avoid the consumer having to know too much
  388  * about the mechanisms here.
  389  *
  390  * XXX note that this will have to be updated when we start supporting "busy" ranges.
  391  */
  392 static int
  393 i686_mrsetlow(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
  394 {
  395     struct mem_range_desc       *first_md, *last_md, *curr_md;
  396 
  397     /* range check */
  398     if (((first_md = i686_mtrrfixsearch(sc, mrd->mr_base)) == NULL) ||
  399         ((last_md = i686_mtrrfixsearch(sc, mrd->mr_base + mrd->mr_len - 1)) == NULL))
  400         return(EINVAL);
  401 
  402     /* check we aren't doing something risky */
  403     if (!(mrd->mr_flags & MDF_FORCE))
  404         for (curr_md = first_md; curr_md <= last_md; curr_md++) {
  405             if ((curr_md->mr_flags & MDF_ATTRMASK) == MDF_UNKNOWN)
  406                 return (EACCES);
  407         }
  408 
  409     /* set flags, clear set-by-firmware flag */
  410     for (curr_md = first_md; curr_md <= last_md; curr_md++) {
  411         curr_md->mr_flags = mrcopyflags(curr_md->mr_flags & ~MDF_FIRMWARE, mrd->mr_flags);
  412         bcopy(mrd->mr_owner, curr_md->mr_owner, sizeof(mrd->mr_owner));
  413     }
  414 
  415     return(0);
  416 }
  417 
  418 
  419 /*
  420  * Modify/add a variable MTRR to satisfy the request.
  421  *
  422  * XXX needs to be updated to properly support "busy" ranges.
  423  */
  424 static int
  425 i686_mrsetvariable(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
  426 {
  427     struct mem_range_desc       *curr_md, *free_md;
  428     int                         i;
  429     
  430     /* 
  431      * Scan the currently active variable descriptors, look for 
  432      * one we exactly match (straight takeover) and for possible
  433      * accidental overlaps.
  434      * Keep track of the first empty variable descriptor in case we
  435      * can't perform a takeover.
  436      */
  437     i = (sc->mr_cap & MR686_FIXMTRR) ? MTRR_N64K + MTRR_N16K + MTRR_N4K : 0;
  438     curr_md = sc->mr_desc + i;
  439     free_md = NULL;
  440     for (; i < sc->mr_ndesc; i++, curr_md++) {
  441         if (curr_md->mr_flags & MDF_ACTIVE) {
  442             /* exact match? */
  443             if ((curr_md->mr_base == mrd->mr_base) &&
  444                 (curr_md->mr_len == mrd->mr_len)) {
  445                 /* whoops, owned by someone */
  446                 if (curr_md->mr_flags & MDF_BUSY)
  447                     return(EBUSY);
  448                 /* check we aren't doing something risky */
  449                 if (!(mrd->mr_flags & MDF_FORCE) &&
  450                   ((curr_md->mr_flags & MDF_ATTRMASK) == MDF_UNKNOWN))
  451                     return (EACCES);
  452                 /* Ok, just hijack this entry */
  453                 free_md = curr_md;
  454                 break;
  455             }
  456             /* non-exact overlap ? */
  457             if (mroverlap(curr_md, mrd)) {
  458                 /* between conflicting region types? */
  459                 if (i686_mtrrconflict(curr_md->mr_flags, mrd->mr_flags))
  460                     return(EINVAL);
  461             }
  462         } else if (free_md == NULL) {
  463             free_md = curr_md;
  464         }
  465     }
  466     /* got somewhere to put it? */
  467     if (free_md == NULL)
  468         return(ENOSPC);
  469 
  470     /* Set up new descriptor */
  471     free_md->mr_base = mrd->mr_base;
  472     free_md->mr_len = mrd->mr_len;
  473     free_md->mr_flags = mrcopyflags(MDF_ACTIVE, mrd->mr_flags);
  474     bcopy(mrd->mr_owner, free_md->mr_owner, sizeof(mrd->mr_owner));
  475     return(0);
  476 }
  477 
  478 /*
  479  * Handle requests to set memory range attributes by manipulating MTRRs.
  480  *
  481  */
  482 static int
  483 i686_mrset(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
  484 {
  485     struct mem_range_desc       *targ;
  486     int                         error = 0;
  487 
  488     switch(*arg) {
  489     case MEMRANGE_SET_UPDATE:
  490         /* make sure that what's being asked for is even possible at all */
  491         if (!mrvalid(mrd->mr_base, mrd->mr_len) ||
  492             i686_mtrrtype(mrd->mr_flags) == -1)
  493             return(EINVAL);
  494 
  495 #define FIXTOP  ((MTRR_N64K * 0x10000) + (MTRR_N16K * 0x4000) + (MTRR_N4K * 0x1000))
  496 
  497         /* are the "low memory" conditions applicable? */
  498         if ((sc->mr_cap & MR686_FIXMTRR) &&
  499             ((mrd->mr_base + mrd->mr_len) <= FIXTOP)) {
  500             if ((error = i686_mrsetlow(sc, mrd, arg)) != 0)
  501                 return(error);
  502         } else {
  503             /* it's time to play with variable MTRRs */
  504             if ((error = i686_mrsetvariable(sc, mrd, arg)) != 0)
  505                 return(error);
  506         }
  507         break;
  508 
  509     case MEMRANGE_SET_REMOVE:
  510         if ((targ = mem_range_match(sc, mrd)) == NULL)
  511             return(ENOENT);
  512         if (targ->mr_flags & MDF_FIXACTIVE)
  513             return(EPERM);
  514         if (targ->mr_flags & MDF_BUSY)
  515             return(EBUSY);
  516         targ->mr_flags &= ~MDF_ACTIVE;
  517         targ->mr_owner[0] = 0;
  518         break;
  519 
  520     default:
  521         return(EOPNOTSUPP);
  522     }
  523 
  524     /* update the hardware */
  525     i686_mrstore(sc);
  526     i686_mrfetch(sc);   /* refetch to see where we're at */
  527     return(0);
  528 }
  529 
  530 /*
  531  * Work out how many ranges we support, initialise storage for them, 
  532  * fetch the initial settings.
  533  */
  534 static void
  535 i686_mrinit(struct mem_range_softc *sc)
  536 {
  537     struct mem_range_desc       *mrd;
  538     int                         nmdesc = 0;
  539     int                         i;
  540 
  541     mtrrcap = rdmsr(MSR_MTRRcap);
  542     mtrrdef = rdmsr(MSR_MTRRdefType);
  543 
  544     /* For now, bail out if MTRRs are not enabled */
  545     if (!(mtrrdef & 0x800)) {
  546         if (bootverbose)
  547             printf("CPU supports MTRRs but not enabled\n");
  548         return;
  549     }
  550     nmdesc = mtrrcap & 0xff;
  551     if (bootverbose)
  552         printf("Pentium Pro MTRR support enabled\n");
  553 
  554     /* If fixed MTRRs supported and enabled */
  555     if ((mtrrcap & 0x100) && (mtrrdef & 0x400)) {
  556         sc->mr_cap = MR686_FIXMTRR;
  557         nmdesc += MTRR_N64K + MTRR_N16K + MTRR_N4K;
  558     }
  559 
  560     sc->mr_desc = 
  561         (struct mem_range_desc *)malloc(nmdesc * sizeof(struct mem_range_desc), 
  562                                         M_MEMDESC, M_WAITOK | M_ZERO);
  563     sc->mr_ndesc = nmdesc;
  564 
  565     mrd = sc->mr_desc;
  566 
  567     /* Populate the fixed MTRR entries' base/length */
  568     if (sc->mr_cap & MR686_FIXMTRR) {
  569         for (i = 0; i < MTRR_N64K; i++, mrd++) {
  570             mrd->mr_base = i * 0x10000;
  571             mrd->mr_len = 0x10000;
  572             mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN | MDF_FIXACTIVE;
  573         }
  574         for (i = 0; i < MTRR_N16K; i++, mrd++) {
  575             mrd->mr_base = i * 0x4000 + 0x80000;
  576             mrd->mr_len = 0x4000;
  577             mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN | MDF_FIXACTIVE;
  578         }
  579         for (i = 0; i < MTRR_N4K; i++, mrd++) {
  580             mrd->mr_base = i * 0x1000 + 0xc0000;
  581             mrd->mr_len = 0x1000;
  582             mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN | MDF_FIXACTIVE;
  583         }
  584     }
  585 
  586     /* 
  587      * Get current settings, anything set now is considered to have 
  588      * been set by the firmware. (XXX has something already played here?)
  589      */
  590     i686_mrfetch(sc);
  591     mrd = sc->mr_desc;
  592     for (i = 0; i < sc->mr_ndesc; i++, mrd++) {
  593         if (mrd->mr_flags & MDF_ACTIVE)
  594             mrd->mr_flags |= MDF_FIRMWARE;
  595     }
  596 }
  597 
  598 /*
  599  * Initialise MTRRs on an AP after the BSP has run the init code.
  600  */
  601 static void
  602 i686_mrAPinit(struct mem_range_softc *sc)
  603 {
  604     i686_mrstoreone((void *)sc);        /* set MTRRs to match BSP */
  605     wrmsr(MSR_MTRRdefType, mtrrdef);    /* set MTRR behaviour to match BSP */
  606 }
  607 
  608 static void
  609 i686_mem_drvinit(void *unused)
  610 {
  611     /* Try for i686 MTRRs */
  612     if (!mtrrs_disabled && (cpu_feature & CPUID_MTRR) &&
  613         ((cpu_id & 0xf00) == 0x600 || (cpu_id & 0xf00) == 0xf00) &&
  614         ((strcmp(cpu_vendor, "GenuineIntel") == 0) ||
  615         (strcmp(cpu_vendor, "AuthenticAMD") == 0))) {
  616         mem_range_softc.mr_op = &i686_mrops;
  617     }
  618 }
  619 
  620 SYSINIT(i686memdev,SI_SUB_DRIVERS,SI_ORDER_FIRST,i686_mem_drvinit,NULL)

Cache object: 44688a8a64ff60fdfd6f641a8a3d67ae


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