1 /*-
2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the author nor the names of any co-contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $FreeBSD$
30 */
31
32 /*
33 * Machine dependent interrupt code for i386. For the i386, we have to
34 * deal with different PICs. Thus, we use the passed in vector to lookup
35 * an interrupt source associated with that vector. The interrupt source
36 * describes which PIC the source belongs to and includes methods to handle
37 * that source.
38 */
39
40 #include "opt_ddb.h"
41
42 #include <sys/param.h>
43 #include <sys/bus.h>
44 #include <sys/interrupt.h>
45 #include <sys/ktr.h>
46 #include <sys/kernel.h>
47 #include <sys/lock.h>
48 #include <sys/mutex.h>
49 #include <sys/proc.h>
50 #include <sys/smp.h>
51 #include <sys/syslog.h>
52 #include <sys/systm.h>
53 #include <sys/sx.h>
54 #include <machine/clock.h>
55 #include <machine/intr_machdep.h>
56 #include <machine/smp.h>
57 #ifdef DDB
58 #include <ddb/ddb.h>
59 #endif
60
61 #define MAX_STRAY_LOG 5
62
63 typedef void (*mask_fn)(void *);
64
65 static int intrcnt_index;
66 static struct intsrc *interrupt_sources[NUM_IO_INTS];
67 static struct sx intr_table_lock;
68 static struct mtx intrcnt_lock;
69 static STAILQ_HEAD(, pic) pics;
70
71 #ifdef SMP
72 static int assign_cpu;
73
74 static void intr_assign_next_cpu(struct intsrc *isrc);
75 #endif
76
77 static int intr_assign_cpu(void *arg, u_char cpu);
78 static void intr_disable_src(void *arg);
79 static void intr_init(void *__dummy);
80 static int intr_pic_registered(struct pic *pic);
81 static void intrcnt_setname(const char *name, int index);
82 static void intrcnt_updatename(struct intsrc *is);
83 static void intrcnt_register(struct intsrc *is);
84
85 static int
86 intr_pic_registered(struct pic *pic)
87 {
88 struct pic *p;
89
90 STAILQ_FOREACH(p, &pics, pics) {
91 if (p == pic)
92 return (1);
93 }
94 return (0);
95 }
96
97 /*
98 * Register a new interrupt controller (PIC). This is to support suspend
99 * and resume where we suspend/resume controllers rather than individual
100 * sources. This also allows controllers with no active sources (such as
101 * 8259As in a system using the APICs) to participate in suspend and resume.
102 */
103 int
104 intr_register_pic(struct pic *pic)
105 {
106 int error;
107
108 sx_xlock(&intr_table_lock);
109 if (intr_pic_registered(pic))
110 error = EBUSY;
111 else {
112 STAILQ_INSERT_TAIL(&pics, pic, pics);
113 error = 0;
114 }
115 sx_xunlock(&intr_table_lock);
116 return (error);
117 }
118
119 /*
120 * Register a new interrupt source with the global interrupt system.
121 * The global interrupts need to be disabled when this function is
122 * called.
123 */
124 int
125 intr_register_source(struct intsrc *isrc)
126 {
127 int error, vector;
128
129 KASSERT(intr_pic_registered(isrc->is_pic), ("unregistered PIC"));
130 vector = isrc->is_pic->pic_vector(isrc);
131 if (interrupt_sources[vector] != NULL)
132 return (EEXIST);
133 error = intr_event_create(&isrc->is_event, isrc, 0, vector,
134 intr_disable_src, (mask_fn)isrc->is_pic->pic_enable_source,
135 (mask_fn)isrc->is_pic->pic_eoi_source, intr_assign_cpu, "irq%d:",
136 vector);
137 if (error)
138 return (error);
139 sx_xlock(&intr_table_lock);
140 if (interrupt_sources[vector] != NULL) {
141 sx_xunlock(&intr_table_lock);
142 intr_event_destroy(isrc->is_event);
143 return (EEXIST);
144 }
145 intrcnt_register(isrc);
146 interrupt_sources[vector] = isrc;
147 isrc->is_handlers = 0;
148 sx_xunlock(&intr_table_lock);
149 return (0);
150 }
151
152 struct intsrc *
153 intr_lookup_source(int vector)
154 {
155
156 return (interrupt_sources[vector]);
157 }
158
159 int
160 intr_add_handler(const char *name, int vector, driver_filter_t filter,
161 driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep)
162 {
163 struct intsrc *isrc;
164 int error;
165
166 isrc = intr_lookup_source(vector);
167 if (isrc == NULL)
168 return (EINVAL);
169 error = intr_event_add_handler(isrc->is_event, name, filter, handler,
170 arg, intr_priority(flags), flags, cookiep);
171 if (error == 0) {
172 sx_xlock(&intr_table_lock);
173 intrcnt_updatename(isrc);
174 isrc->is_handlers++;
175 if (isrc->is_handlers == 1) {
176 #ifdef SMP
177 if (assign_cpu)
178 intr_assign_next_cpu(isrc);
179 #endif
180 isrc->is_pic->pic_enable_intr(isrc);
181 isrc->is_pic->pic_enable_source(isrc);
182 }
183 sx_xunlock(&intr_table_lock);
184 }
185 return (error);
186 }
187
188 int
189 intr_remove_handler(void *cookie)
190 {
191 struct intsrc *isrc;
192 int error;
193
194 isrc = intr_handler_source(cookie);
195 error = intr_event_remove_handler(cookie);
196 if (error == 0) {
197 sx_xlock(&intr_table_lock);
198 isrc->is_handlers--;
199 if (isrc->is_handlers == 0) {
200 isrc->is_pic->pic_disable_source(isrc, PIC_NO_EOI);
201 isrc->is_pic->pic_disable_intr(isrc);
202 }
203 intrcnt_updatename(isrc);
204 sx_xunlock(&intr_table_lock);
205 }
206 return (error);
207 }
208
209 int
210 intr_config_intr(int vector, enum intr_trigger trig, enum intr_polarity pol)
211 {
212 struct intsrc *isrc;
213
214 isrc = intr_lookup_source(vector);
215 if (isrc == NULL)
216 return (EINVAL);
217 return (isrc->is_pic->pic_config_intr(isrc, trig, pol));
218 }
219
220 static void
221 intr_disable_src(void *arg)
222 {
223 struct intsrc *isrc;
224
225 isrc = arg;
226 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
227 }
228
229 void
230 intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame)
231 {
232 struct intr_event *ie;
233 struct thread *td;
234 int vector;
235
236 td = curthread;
237
238 /*
239 * We count software interrupts when we process them. The
240 * code here follows previous practice, but there's an
241 * argument for counting hardware interrupts when they're
242 * processed too.
243 */
244 (*isrc->is_count)++;
245 PCPU_INC(cnt.v_intr);
246
247 ie = isrc->is_event;
248
249 /*
250 * XXX: We assume that IRQ 0 is only used for the ISA timer
251 * device (clk).
252 */
253 vector = isrc->is_pic->pic_vector(isrc);
254 if (vector == 0)
255 clkintr_pending = 1;
256
257 /*
258 * For stray interrupts, mask and EOI the source, bump the
259 * stray count, and log the condition.
260 */
261 if (intr_event_handle(ie, frame) != 0) {
262 isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
263 (*isrc->is_straycount)++;
264 if (*isrc->is_straycount < MAX_STRAY_LOG)
265 log(LOG_ERR, "stray irq%d\n", vector);
266 else if (*isrc->is_straycount == MAX_STRAY_LOG)
267 log(LOG_CRIT,
268 "too many stray irq %d's: not logging anymore\n",
269 vector);
270 }
271 }
272
273 void
274 intr_resume(void)
275 {
276 struct pic *pic;
277
278 sx_xlock(&intr_table_lock);
279 STAILQ_FOREACH(pic, &pics, pics) {
280 if (pic->pic_resume != NULL)
281 pic->pic_resume(pic);
282 }
283 sx_xunlock(&intr_table_lock);
284 }
285
286 void
287 intr_suspend(void)
288 {
289 struct pic *pic;
290
291 sx_xlock(&intr_table_lock);
292 STAILQ_FOREACH(pic, &pics, pics) {
293 if (pic->pic_suspend != NULL)
294 pic->pic_suspend(pic);
295 }
296 sx_xunlock(&intr_table_lock);
297 }
298
299 static int
300 intr_assign_cpu(void *arg, u_char cpu)
301 {
302 #ifdef SMP
303 struct intsrc *isrc;
304
305 /*
306 * Don't do anything during early boot. We will pick up the
307 * assignment once the APs are started.
308 */
309 if (assign_cpu && cpu != NOCPU) {
310 isrc = arg;
311 sx_xlock(&intr_table_lock);
312 isrc->is_pic->pic_assign_cpu(isrc, cpu_apic_ids[cpu]);
313 sx_xunlock(&intr_table_lock);
314 }
315 return (0);
316 #else
317 return (EOPNOTSUPP);
318 #endif
319 }
320
321 static void
322 intrcnt_setname(const char *name, int index)
323 {
324
325 snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
326 MAXCOMLEN, name);
327 }
328
329 static void
330 intrcnt_updatename(struct intsrc *is)
331 {
332
333 intrcnt_setname(is->is_event->ie_fullname, is->is_index);
334 }
335
336 static void
337 intrcnt_register(struct intsrc *is)
338 {
339 char straystr[MAXCOMLEN + 1];
340
341 KASSERT(is->is_event != NULL, ("%s: isrc with no event", __func__));
342 mtx_lock_spin(&intrcnt_lock);
343 is->is_index = intrcnt_index;
344 intrcnt_index += 2;
345 snprintf(straystr, MAXCOMLEN + 1, "stray irq%d",
346 is->is_pic->pic_vector(is));
347 intrcnt_updatename(is);
348 is->is_count = &intrcnt[is->is_index];
349 intrcnt_setname(straystr, is->is_index + 1);
350 is->is_straycount = &intrcnt[is->is_index + 1];
351 mtx_unlock_spin(&intrcnt_lock);
352 }
353
354 void
355 intrcnt_add(const char *name, u_long **countp)
356 {
357
358 mtx_lock_spin(&intrcnt_lock);
359 *countp = &intrcnt[intrcnt_index];
360 intrcnt_setname(name, intrcnt_index);
361 intrcnt_index++;
362 mtx_unlock_spin(&intrcnt_lock);
363 }
364
365 static void
366 intr_init(void *dummy __unused)
367 {
368
369 intrcnt_setname("???", 0);
370 intrcnt_index = 1;
371 STAILQ_INIT(&pics);
372 sx_init(&intr_table_lock, "intr sources");
373 mtx_init(&intrcnt_lock, "intrcnt", NULL, MTX_SPIN);
374 }
375 SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL);
376
377 /* Add a description to an active interrupt handler. */
378 int
379 intr_describe(u_int vector, void *ih, const char *descr)
380 {
381 struct intsrc *isrc;
382 int error;
383
384 isrc = intr_lookup_source(vector);
385 if (isrc == NULL)
386 return (EINVAL);
387 error = intr_event_describe_handler(isrc->is_event, ih, descr);
388 if (error)
389 return (error);
390 intrcnt_updatename(isrc);
391 return (0);
392 }
393
394 #ifdef DDB
395 /*
396 * Dump data about interrupt handlers
397 */
398 DB_SHOW_COMMAND(irqs, db_show_irqs)
399 {
400 struct intsrc **isrc;
401 int i, verbose;
402
403 if (strcmp(modif, "v") == 0)
404 verbose = 1;
405 else
406 verbose = 0;
407 isrc = interrupt_sources;
408 for (i = 0; i < NUM_IO_INTS && !db_pager_quit; i++, isrc++)
409 if (*isrc != NULL)
410 db_dump_intr_event((*isrc)->is_event, verbose);
411 }
412 #endif
413
414 #ifdef SMP
415 /*
416 * Support for balancing interrupt sources across CPUs. For now we just
417 * allocate CPUs round-robin.
418 */
419
420 /* The BSP is always a valid target. */
421 static cpumask_t intr_cpus = (1 << 0);
422 static int current_cpu;
423
424 static void
425 intr_assign_next_cpu(struct intsrc *isrc)
426 {
427
428 /*
429 * Assign this source to a local APIC in a round-robin fashion.
430 */
431 isrc->is_pic->pic_assign_cpu(isrc, cpu_apic_ids[current_cpu]);
432 do {
433 current_cpu++;
434 if (current_cpu > mp_maxid)
435 current_cpu = 0;
436 } while (!(intr_cpus & (1 << current_cpu)));
437 }
438
439 /* Attempt to bind the specified IRQ to the specified CPU. */
440 int
441 intr_bind(u_int vector, u_char cpu)
442 {
443 struct intsrc *isrc;
444
445 isrc = intr_lookup_source(vector);
446 if (isrc == NULL)
447 return (EINVAL);
448 return (intr_event_bind(isrc->is_event, cpu));
449 }
450
451 /*
452 * Add a CPU to our mask of valid CPUs that can be destinations of
453 * interrupts.
454 */
455 void
456 intr_add_cpu(u_int cpu)
457 {
458
459 if (cpu >= MAXCPU)
460 panic("%s: Invalid CPU ID", __func__);
461 if (bootverbose)
462 printf("INTR: Adding local APIC %d as a target\n",
463 cpu_apic_ids[cpu]);
464
465 intr_cpus |= (1 << cpu);
466 }
467
468 /*
469 * Distribute all the interrupt sources among the available CPUs once the
470 * AP's have been launched.
471 */
472 static void
473 intr_shuffle_irqs(void *arg __unused)
474 {
475 struct intsrc *isrc;
476 int i;
477
478 /* Don't bother on UP. */
479 if (mp_ncpus == 1)
480 return;
481
482 /* Round-robin assign a CPU to each enabled source. */
483 sx_xlock(&intr_table_lock);
484 assign_cpu = 1;
485 for (i = 0; i < NUM_IO_INTS; i++) {
486 isrc = interrupt_sources[i];
487 if (isrc != NULL && isrc->is_handlers > 0) {
488 /*
489 * If this event is already bound to a CPU,
490 * then assign the source to that CPU instead
491 * of picking one via round-robin.
492 */
493 if (isrc->is_event->ie_cpu != NOCPU)
494 isrc->is_pic->pic_assign_cpu(isrc,
495 cpu_apic_ids[isrc->is_event->ie_cpu]);
496 else
497 intr_assign_next_cpu(isrc);
498 }
499 }
500 sx_xunlock(&intr_table_lock);
501 }
502 SYSINIT(intr_shuffle_irqs, SI_SUB_SMP, SI_ORDER_SECOND, intr_shuffle_irqs,
503 NULL);
504 #endif
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