The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/k6_mem.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 1999 Brian Fundakowski Feldman
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  */
   28 
   29 #include <sys/cdefs.h>
   30 __FBSDID("$FreeBSD: releng/12.0/sys/i386/i386/k6_mem.c 328218 2018-01-21 15:42:36Z pfg $");
   31 
   32 #include <sys/param.h>
   33 #include <sys/kernel.h>
   34 #include <sys/systm.h>
   35 #include <sys/malloc.h>
   36 #include <sys/memrange.h>
   37 
   38 #include <machine/cputypes.h>
   39 #include <machine/md_var.h>
   40 #include <machine/specialreg.h>
   41 
   42 /*
   43  * A K6-2 MTRR is defined as the highest 15 bits having the address, the next
   44  * 15 having the mask, the 1st bit being "write-combining" and the 0th bit
   45  * being "uncacheable".
   46  *
   47  *      Address             Mask        WC  UC
   48  * | XXXXXXXXXXXXXXX | XXXXXXXXXXXXXXX | X | X |
   49  *
   50  * There are two of these in the 64-bit UWCCR.
   51  */
   52 
   53 #define UWCCR 0xc0000085
   54 
   55 #define K6_REG_GET(reg, addr, mask, wc, uc) do {                        \
   56                 addr = (reg) & 0xfffe0000;                              \
   57                 mask = ((reg) & 0x1fffc) >> 2;                          \
   58                 wc = ((reg) & 0x2) >> 1;                                \
   59                 uc = (reg) & 0x1;                                       \
   60         } while (0)
   61 
   62 #define K6_REG_MAKE(addr, mask, wc, uc)                                 \
   63         ((addr) | ((mask) << 2) | ((wc) << 1) | uc)
   64 
   65 static void     k6_mrinit(struct mem_range_softc *sc);
   66 static int      k6_mrset(struct mem_range_softc *, struct mem_range_desc *,
   67                     int *);
   68 static __inline int k6_mrmake(struct mem_range_desc *, u_int32_t *);
   69 static void     k6_mem_drvinit(void *);
   70 
   71 static struct mem_range_ops k6_mrops =
   72 {
   73         k6_mrinit,
   74         k6_mrset,
   75         NULL,
   76         NULL
   77 };
   78 
   79 static __inline int
   80 k6_mrmake(struct mem_range_desc *desc, u_int32_t *mtrr)
   81 {
   82         u_int32_t len = 0, wc, uc;
   83         int bit;
   84 
   85         if (desc->mr_base &~ 0xfffe0000)
   86                 return (EINVAL);
   87         if (desc->mr_len < 131072 || !powerof2(desc->mr_len))
   88                 return (EINVAL);
   89         if (desc->mr_flags &~ (MDF_WRITECOMBINE|MDF_UNCACHEABLE|MDF_FORCE))
   90                 return (EOPNOTSUPP);
   91 
   92         for (bit = ffs(desc->mr_len >> 17) - 1; bit < 15; bit++)
   93                 len |= 1 << bit; 
   94         wc = (desc->mr_flags & MDF_WRITECOMBINE) ? 1 : 0;
   95         uc = (desc->mr_flags & MDF_UNCACHEABLE) ? 1 : 0;
   96 
   97         *mtrr = K6_REG_MAKE(desc->mr_base, len, wc, uc);
   98         return (0);
   99 }
  100 
  101 static void
  102 k6_mrinit(struct mem_range_softc *sc)
  103 {
  104         u_int64_t reg;
  105         u_int32_t addr, mask, wc, uc;
  106         int d;
  107 
  108         sc->mr_cap = 0;
  109         sc->mr_ndesc = 2; /* XXX (BFF) For now, we only have one msr for this */
  110         sc->mr_desc = malloc(sc->mr_ndesc * sizeof(struct mem_range_desc),
  111             M_MEMDESC, M_NOWAIT | M_ZERO);
  112         if (sc->mr_desc == NULL)
  113                 panic("k6_mrinit: malloc returns NULL");
  114 
  115         reg = rdmsr(UWCCR);
  116         for (d = 0; d < sc->mr_ndesc; d++) {
  117                 u_int32_t one = (reg & (0xffffffff << (32 * d))) >> (32 * d);
  118 
  119                 K6_REG_GET(one, addr, mask, wc, uc);
  120                 sc->mr_desc[d].mr_base = addr;
  121                 sc->mr_desc[d].mr_len = ffs(mask) << 17;
  122                 if (wc)
  123                         sc->mr_desc[d].mr_flags |= MDF_WRITECOMBINE;
  124                 if (uc)
  125                         sc->mr_desc[d].mr_flags |= MDF_UNCACHEABLE;
  126         }
  127 
  128         printf("K6-family MTRR support enabled (%d registers)\n", sc->mr_ndesc);
  129 }
  130 
  131 static int
  132 k6_mrset(struct mem_range_softc *sc, struct mem_range_desc *desc, int *arg)
  133 {
  134         u_int64_t reg;
  135         u_int32_t mtrr;
  136         int error, d;
  137 
  138         switch (*arg) {
  139         case MEMRANGE_SET_UPDATE:
  140                 error = k6_mrmake(desc, &mtrr);
  141                 if (error)
  142                         return (error);
  143                 for (d = 0; d < sc->mr_ndesc; d++) {
  144                         if (!sc->mr_desc[d].mr_len) {
  145                                 sc->mr_desc[d] = *desc;
  146                                 goto out;
  147                         }
  148                         if (sc->mr_desc[d].mr_base == desc->mr_base &&
  149                             sc->mr_desc[d].mr_len == desc->mr_len)
  150                                 return (EEXIST);
  151                 }
  152                 return (ENOSPC);
  153         case MEMRANGE_SET_REMOVE:
  154                 mtrr = 0;
  155                 for (d = 0; d < sc->mr_ndesc; d++)
  156                         if (sc->mr_desc[d].mr_base == desc->mr_base &&
  157                             sc->mr_desc[d].mr_len == desc->mr_len) {
  158                                 bzero(&sc->mr_desc[d], sizeof(sc->mr_desc[d]));
  159                                 goto out;
  160                         }
  161                 return (ENOENT);
  162         default:
  163                 return (EOPNOTSUPP);
  164         }
  165 out:    
  166         disable_intr();
  167         wbinvd();
  168         reg = rdmsr(UWCCR);
  169         reg &= ~(0xffffffff << (32 * d));
  170         reg |= mtrr << (32 * d);
  171         wrmsr(UWCCR, reg);
  172         wbinvd();
  173         enable_intr();
  174 
  175         return (0);
  176 }
  177 
  178 static void
  179 k6_mem_drvinit(void *unused)
  180 {
  181 
  182         if (cpu_vendor_id != CPU_VENDOR_AMD)
  183                 return;
  184         if ((cpu_id & 0xf00) != 0x500)
  185                 return;
  186         if ((cpu_id & 0xf0) < 0x80 ||
  187             ((cpu_id & 0xf0) == 0x80 && (cpu_id & 0xf) <= 0x7))
  188                 return;
  189         mem_range_softc.mr_op = &k6_mrops;
  190 }
  191 SYSINIT(k6memdev, SI_SUB_DRIVERS, SI_ORDER_FIRST, k6_mem_drvinit, NULL);

Cache object: 61a0b636affa9b808241918948f31430


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