k6_mem.c

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    1 /*-
    2  * Copyright (c) 1999 Brian Fundakowski Feldman
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  *
   26  * $FreeBSD$
   27  *
   28  */
   29 
   30 #include <sys/param.h>
   31 #include <sys/kernel.h>
   32 #include <sys/systm.h>
   33 #include <sys/ioccom.h>
   34 #include <sys/malloc.h>
   35 #include <sys/memrange.h>
   36 
   37 #include <machine/md_var.h>
   38 #include <machine/specialreg.h>
   39 
   40 /*
   41  * A K6-2 MTRR is defined as the highest 15 bits having the address, the next
   42  * 15 having the mask, the 1st bit being "write-combining" and the 0th bit
   43  * being "uncacheable".
   44  *
   45  *      Address             Mask        WC  UC
   46  * | XXXXXXXXXXXXXXX | XXXXXXXXXXXXXXX | X | X |
   47  *
   48  * There are two of these in the 64-bit UWCCR.
   49  */
   50 
   51 /*
   52  * NOTE: I do _not_ comment my code unless it's truly necessary. Don't
   53  *       expect anything frivolous here, and do NOT touch my bit-shifts
   54  *       unless you want to break this.
   55  */
   56 
   57 #define UWCCR 0xc0000085
   58 
   59 #define k6_reg_get(reg, addr, mask, wc, uc)     do {                    \
   60                 addr = (reg) & 0xfffe0000;                              \
   61                 mask = ((reg) & 0x1fffc) >> 2;                          \
   62                 wc = ((reg) & 0x2) >> 1;                                \
   63                 uc = (reg) & 0x1;                                       \
   64         } while (0)
   65 
   66 #define k6_reg_make(addr, mask, wc, uc)                                 \
   67                 ((addr) | ((mask) << 2) | ((wc) << 1) | uc)
   68 
   69 static void k6_mrinit(struct mem_range_softc *sc);
   70 static int k6_mrset(struct mem_range_softc *, struct mem_range_desc *, int *);
   71 static __inline int k6_mrmake(struct mem_range_desc *, u_int32_t *);
   72 static void k6_mem_drvinit(void *);
   73 
   74 static struct mem_range_ops k6_mrops = {
   75         k6_mrinit,
   76         k6_mrset,
   77         NULL
   78 };
   79 
   80 static __inline int
   81 k6_mrmake(struct mem_range_desc *desc, u_int32_t *mtrr) {
   82         u_int32_t len = 0, wc, uc;
   83         register int bit;
   84 
   85         if (desc->mr_base &~ 0xfffe0000)
   86                 return EINVAL;
   87         if (desc->mr_len < 131072 || !powerof2(desc->mr_len))
   88                 return EINVAL;
   89         if (desc->mr_flags &~ (MDF_WRITECOMBINE|MDF_UNCACHEABLE))
   90                 return EOPNOTSUPP;
   91 
   92         for (bit = ffs(desc->mr_len >> 17) - 1; bit < 15; bit++)
   93                 len |= 1 << bit; 
   94         wc = (desc->mr_flags & MDF_WRITECOMBINE) ? 1 : 0;
   95         uc = (desc->mr_flags & MDF_UNCACHEABLE) ? 1 : 0;
   96 
   97         *mtrr = k6_reg_make(desc->mr_base, len, wc, uc);
   98         return 0;
   99 }
  100 
  101 static void
  102 k6_mrinit(struct mem_range_softc *sc) {
  103         u_int64_t reg;
  104         u_int32_t addr, mask, wc, uc;
  105         int d;
  106 
  107         sc->mr_cap = 0;
  108         sc->mr_ndesc = 2; /* XXX (BFF) For now, we only have one msr for this */
  109         sc->mr_desc = malloc(sc->mr_ndesc * sizeof(struct mem_range_desc),
  110                              M_MEMDESC, M_WAITOK);
  111         bzero(sc->mr_desc, sc->mr_ndesc * sizeof(struct mem_range_desc));
  112 
  113         reg = rdmsr(UWCCR);
  114         for (d = 0; d < sc->mr_ndesc; d++) {
  115                 u_int32_t one = (reg & (0xffffffff << (32 * d))) >> (32 * d);
  116 
  117                 k6_reg_get(one, addr, mask, wc, uc);
  118                 sc->mr_desc[d].mr_base = addr;
  119                 sc->mr_desc[d].mr_len = ffs(mask) << 17;
  120                 if (wc)
  121                         sc->mr_desc[d].mr_flags |= MDF_WRITECOMBINE;
  122                 if (uc)
  123                         sc->mr_desc[d].mr_flags |= MDF_UNCACHEABLE;
  124         }
  125         
  126         printf("K6-family MTRR support enabled (%d registers)\n", sc->mr_ndesc);
  127 }
  128 
  129 static int
  130 k6_mrset(struct mem_range_softc *sc, struct mem_range_desc *desc, int *arg) {
  131         u_int64_t reg;
  132         u_int32_t mtrr;
  133         int error, d;
  134 
  135         switch (*arg) {
  136         case MEMRANGE_SET_UPDATE:
  137                 error = k6_mrmake(desc, &mtrr);
  138                 if (error)
  139                         return error;
  140                 for (d = 0; d < sc->mr_ndesc; d++) {
  141                         if (!sc->mr_desc[d].mr_len) {
  142                                 sc->mr_desc[d] = *desc;
  143                                 goto out;
  144                         }
  145                         if (sc->mr_desc[d].mr_base == desc->mr_base &&
  146                             sc->mr_desc[d].mr_len == desc->mr_len)
  147                                 return EEXIST;
  148                 }
  149 
  150                 return ENOSPC;
  151         case MEMRANGE_SET_REMOVE:
  152                 mtrr = 0;
  153                 for (d = 0; d < sc->mr_ndesc; d++)
  154                         if (sc->mr_desc[d].mr_base == desc->mr_base &&
  155                             sc->mr_desc[d].mr_len == desc->mr_len) {
  156                                 bzero(&sc->mr_desc[d], sizeof(sc->mr_desc[d]));
  157                                 goto out;
  158                         }
  159 
  160                 return ENOENT;
  161         default:
  162                 return EOPNOTSUPP;
  163         }
  164 
  165 out:
  166         
  167         disable_intr();
  168         wbinvd();
  169         reg = rdmsr(UWCCR);
  170         reg &= ~(0xffffffff << (32 * d));
  171         reg |= mtrr << (32 * d);
  172         wrmsr(UWCCR, reg);
  173         wbinvd();
  174         enable_intr();
  175 
  176         return 0;
  177 }
  178 
  179 static void
  180 k6_mem_drvinit(void *unused) {
  181         if (!strcmp(cpu_vendor, "AuthenticAMD") &&
  182             (cpu_id & 0xf00) == 0x500 &&
  183                 ((cpu_id & 0xf0) > 0x80 ||
  184                     ((cpu_id & 0xf0) == 0x80 &&
  185                      (cpu_id & 0xf) > 0x7))
  186             )
  187                 mem_range_softc.mr_op = &k6_mrops;
  188 }
  189 
  190 SYSINIT(k6memdev, SI_SUB_DRIVERS, SI_ORDER_FIRST, k6_mem_drvinit, NULL)

Cache object: 7b62255606a95361ca6c56768074d1c4

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FreeBSD/Linux Kernel Cross Reference sys/i386/i386/k6_mem.c

FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/k6_mem.c