The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/k6_mem.c

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    1 /*-
    2  * Copyright (c) 1999 Brian Fundakowski Feldman
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD: releng/6.0/sys/i386/i386/k6_mem.c 119452 2003-08-25 09:48:48Z obrien $");
   29 
   30 #include <sys/param.h>
   31 #include <sys/kernel.h>
   32 #include <sys/systm.h>
   33 #include <sys/malloc.h>
   34 #include <sys/memrange.h>
   35 
   36 #include <machine/md_var.h>
   37 #include <machine/specialreg.h>
   38 
   39 /*
   40  * A K6-2 MTRR is defined as the highest 15 bits having the address, the next
   41  * 15 having the mask, the 1st bit being "write-combining" and the 0th bit
   42  * being "uncacheable".
   43  *
   44  *      Address             Mask        WC  UC
   45  * | XXXXXXXXXXXXXXX | XXXXXXXXXXXXXXX | X | X |
   46  *
   47  * There are two of these in the 64-bit UWCCR.
   48  */
   49 
   50 #define UWCCR 0xc0000085
   51 
   52 #define K6_REG_GET(reg, addr, mask, wc, uc)     do {                    \
   53                 addr = (reg) & 0xfffe0000;                              \
   54                 mask = ((reg) & 0x1fffc) >> 2;                          \
   55                 wc = ((reg) & 0x2) >> 1;                                \
   56                 uc = (reg) & 0x1;                                       \
   57         } while (0)
   58 
   59 #define K6_REG_MAKE(addr, mask, wc, uc)                                 \
   60                 ((addr) | ((mask) << 2) | ((wc) << 1) | uc)
   61 
   62 static void k6_mrinit(struct mem_range_softc *sc);
   63 static int k6_mrset(struct mem_range_softc *, struct mem_range_desc *, int *);
   64 static __inline int k6_mrmake(struct mem_range_desc *, u_int32_t *);
   65 static void k6_mem_drvinit(void *);
   66 
   67 static struct mem_range_ops k6_mrops = {
   68         k6_mrinit,
   69         k6_mrset,
   70         NULL
   71 };
   72 
   73 static __inline int
   74 k6_mrmake(struct mem_range_desc *desc, u_int32_t *mtrr) {
   75         u_int32_t len = 0, wc, uc;
   76         register int bit;
   77 
   78         if (desc->mr_base &~ 0xfffe0000)
   79                 return EINVAL;
   80         if (desc->mr_len < 131072 || !powerof2(desc->mr_len))
   81                 return EINVAL;
   82         if (desc->mr_flags &~ (MDF_WRITECOMBINE|MDF_UNCACHEABLE|MDF_FORCE))
   83                 return EOPNOTSUPP;
   84 
   85         for (bit = ffs(desc->mr_len >> 17) - 1; bit < 15; bit++)
   86                 len |= 1 << bit; 
   87         wc = (desc->mr_flags & MDF_WRITECOMBINE) ? 1 : 0;
   88         uc = (desc->mr_flags & MDF_UNCACHEABLE) ? 1 : 0;
   89 
   90         *mtrr = K6_REG_MAKE(desc->mr_base, len, wc, uc);
   91         return 0;
   92 }
   93 
   94 static void
   95 k6_mrinit(struct mem_range_softc *sc) {
   96         u_int64_t reg;
   97         u_int32_t addr, mask, wc, uc;
   98         int d;
   99 
  100         sc->mr_cap = 0;
  101         sc->mr_ndesc = 2; /* XXX (BFF) For now, we only have one msr for this */
  102         sc->mr_desc = malloc(sc->mr_ndesc * sizeof(struct mem_range_desc),
  103                              M_MEMDESC, M_NOWAIT | M_ZERO);
  104         if (sc->mr_desc == NULL)
  105                 panic("k6_mrinit: malloc returns NULL");
  106 
  107         reg = rdmsr(UWCCR);
  108         for (d = 0; d < sc->mr_ndesc; d++) {
  109                 u_int32_t one = (reg & (0xffffffff << (32 * d))) >> (32 * d);
  110 
  111                 K6_REG_GET(one, addr, mask, wc, uc);
  112                 sc->mr_desc[d].mr_base = addr;
  113                 sc->mr_desc[d].mr_len = ffs(mask) << 17;
  114                 if (wc)
  115                         sc->mr_desc[d].mr_flags |= MDF_WRITECOMBINE;
  116                 if (uc)
  117                         sc->mr_desc[d].mr_flags |= MDF_UNCACHEABLE;
  118         }
  119         
  120         printf("K6-family MTRR support enabled (%d registers)\n", sc->mr_ndesc);
  121 }
  122 
  123 static int
  124 k6_mrset(struct mem_range_softc *sc, struct mem_range_desc *desc, int *arg) {
  125         u_int64_t reg;
  126         u_int32_t mtrr;
  127         int error, d;
  128 
  129         switch (*arg) {
  130         case MEMRANGE_SET_UPDATE:
  131                 error = k6_mrmake(desc, &mtrr);
  132                 if (error)
  133                         return error;
  134                 for (d = 0; d < sc->mr_ndesc; d++) {
  135                         if (!sc->mr_desc[d].mr_len) {
  136                                 sc->mr_desc[d] = *desc;
  137                                 goto out;
  138                         }
  139                         if (sc->mr_desc[d].mr_base == desc->mr_base &&
  140                             sc->mr_desc[d].mr_len == desc->mr_len)
  141                                 return EEXIST;
  142                 }
  143 
  144                 return ENOSPC;
  145         case MEMRANGE_SET_REMOVE:
  146                 mtrr = 0;
  147                 for (d = 0; d < sc->mr_ndesc; d++)
  148                         if (sc->mr_desc[d].mr_base == desc->mr_base &&
  149                             sc->mr_desc[d].mr_len == desc->mr_len) {
  150                                 bzero(&sc->mr_desc[d], sizeof(sc->mr_desc[d]));
  151                                 goto out;
  152                         }
  153 
  154                 return ENOENT;
  155         default:
  156                 return EOPNOTSUPP;
  157         }
  158 
  159 out:
  160         
  161         disable_intr();
  162         wbinvd();
  163         reg = rdmsr(UWCCR);
  164         reg &= ~(0xffffffff << (32 * d));
  165         reg |= mtrr << (32 * d);
  166         wrmsr(UWCCR, reg);
  167         wbinvd();
  168         enable_intr();
  169 
  170         return 0;
  171 }
  172 
  173 static void
  174 k6_mem_drvinit(void *unused) {
  175         if (!strcmp(cpu_vendor, "AuthenticAMD") &&
  176             (cpu_id & 0xf00) == 0x500 &&
  177                 ((cpu_id & 0xf0) > 0x80 ||
  178                     ((cpu_id & 0xf0) == 0x80 &&
  179                      (cpu_id & 0xf) > 0x7))
  180             )
  181                 mem_range_softc.mr_op = &k6_mrops;
  182 }
  183 
  184 SYSINIT(k6memdev, SI_SUB_DRIVERS, SI_ORDER_FIRST, k6_mem_drvinit, NULL)

Cache object: 05ae3df8c51bf68398387ebe4d3dbc43


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