Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/machdep.c
Version:
- FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
SearchContext: - none - 3 - 10
1 /*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 */ 39 40 #include <sys/cdefs.h> 41 __FBSDID("$FreeBSD: releng/5.2/sys/i386/i386/machdep.c 123135 2003-12-03 21:12:09Z jhb $"); 42 43 #include "opt_apic.h" 44 #include "opt_atalk.h" 45 #include "opt_compat.h" 46 #include "opt_cpu.h" 47 #include "opt_ddb.h" 48 #include "opt_inet.h" 49 #include "opt_ipx.h" 50 #include "opt_isa.h" 51 #include "opt_kstack_pages.h" 52 #include "opt_maxmem.h" 53 #include "opt_msgbuf.h" 54 #include "opt_npx.h" 55 #include "opt_perfmon.h" 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/sysproto.h> 60 #include <sys/signalvar.h> 61 #include <sys/imgact.h> 62 #include <sys/kernel.h> 63 #include <sys/ktr.h> 64 #include <sys/linker.h> 65 #include <sys/lock.h> 66 #include <sys/malloc.h> 67 #include <sys/mutex.h> 68 #include <sys/pcpu.h> 69 #include <sys/proc.h> 70 #include <sys/bio.h> 71 #include <sys/buf.h> 72 #include <sys/reboot.h> 73 #include <sys/callout.h> 74 #include <sys/msgbuf.h> 75 #include <sys/sched.h> 76 #include <sys/sysent.h> 77 #include <sys/sysctl.h> 78 #include <sys/ucontext.h> 79 #include <sys/vmmeter.h> 80 #include <sys/bus.h> 81 #include <sys/eventhandler.h> 82 83 #include <vm/vm.h> 84 #include <vm/vm_param.h> 85 #include <vm/vm_kern.h> 86 #include <vm/vm_object.h> 87 #include <vm/vm_page.h> 88 #include <vm/vm_map.h> 89 #include <vm/vm_pager.h> 90 #include <vm/vm_extern.h> 91 92 #include <sys/user.h> 93 #include <sys/exec.h> 94 #include <sys/cons.h> 95 96 #ifdef DDB 97 #include <ddb/ddb.h> 98 #include <ddb/db_sym.h> 99 #endif 100 101 #include <net/netisr.h> 102 103 #include <machine/cpu.h> 104 #include <machine/cputypes.h> 105 #include <machine/reg.h> 106 #include <machine/clock.h> 107 #include <machine/specialreg.h> 108 #include <machine/bootinfo.h> 109 #include <machine/intr_machdep.h> 110 #include <machine/md_var.h> 111 #include <machine/pc/bios.h> 112 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */ 113 #include <machine/proc.h> 114 #ifdef PERFMON 115 #include <machine/perfmon.h> 116 #endif 117 #ifdef SMP 118 #include <machine/privatespace.h> 119 #include <machine/smp.h> 120 #endif 121 122 #ifdef DEV_ISA 123 #include <i386/isa/icu.h> 124 #endif 125 126 #include <isa/rtc.h> 127 #include <machine/vm86.h> 128 #include <sys/ptrace.h> 129 #include <machine/sigframe.h> 130 131 /* Sanity check for __curthread() */ 132 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 133 134 extern void init386(int first); 135 extern void dblfault_handler(void); 136 137 extern void printcpuinfo(void); /* XXX header file */ 138 extern void finishidentcpu(void); 139 extern void panicifcpuunsupported(void); 140 extern void initializecpu(void); 141 142 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 143 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 144 145 #if !defined(CPU_ENABLE_SSE) && defined(I686_CPU) 146 #define CPU_ENABLE_SSE 147 #endif 148 #if defined(CPU_DISABLE_SSE) 149 #undef CPU_ENABLE_SSE 150 #endif 151 152 static void cpu_startup(void *); 153 static void fpstate_drop(struct thread *td); 154 static void get_fpcontext(struct thread *td, mcontext_t *mcp); 155 static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 156 #ifdef CPU_ENABLE_SSE 157 static void set_fpregs_xmm(struct save87 *, struct savexmm *); 158 static void fill_fpregs_xmm(struct savexmm *, struct save87 *); 159 #endif /* CPU_ENABLE_SSE */ 160 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 161 162 int _udatasel, _ucodesel; 163 u_int atdevbase, basemem; 164 165 int cold = 1; 166 167 #ifdef COMPAT_43 168 static void osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code); 169 #endif 170 #ifdef COMPAT_FREEBSD4 171 static void freebsd4_sendsig(sig_t catcher, int sig, sigset_t *mask, 172 u_long code); 173 #endif 174 175 long Maxmem = 0; 176 177 vm_paddr_t phys_avail[10]; 178 179 /* must be 2 less so 0 0 can signal end of chunks */ 180 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 181 182 struct kva_md_info kmi; 183 184 static struct trapframe proc0_tf; 185 #ifndef SMP 186 static struct pcpu __pcpu; 187 #endif 188 189 struct mtx icu_lock; 190 191 static void 192 cpu_startup(dummy) 193 void *dummy; 194 { 195 /* 196 * Good {morning,afternoon,evening,night}. 197 */ 198 startrtclock(); 199 printcpuinfo(); 200 panicifcpuunsupported(); 201 #ifdef PERFMON 202 perfmon_init(); 203 #endif 204 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem), 205 ptoa((uintmax_t)Maxmem) / 1048576); 206 /* 207 * Display any holes after the first chunk of extended memory. 208 */ 209 if (bootverbose) { 210 int indx; 211 212 printf("Physical memory chunk(s):\n"); 213 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 214 vm_paddr_t size; 215 216 size = phys_avail[indx + 1] - phys_avail[indx]; 217 printf( 218 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 219 (uintmax_t)phys_avail[indx], 220 (uintmax_t)phys_avail[indx + 1] - 1, 221 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 222 } 223 } 224 225 vm_ksubmap_init(&kmi); 226 227 printf("avail memory = %ju (%ju MB)\n", 228 ptoa((uintmax_t)cnt.v_free_count), 229 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 230 231 /* 232 * Set up buffers, so they can be used to read disk labels. 233 */ 234 bufinit(); 235 vm_pager_bufferinit(); 236 237 cpu_setregs(); 238 } 239 240 /* 241 * Send an interrupt to process. 242 * 243 * Stack is set up to allow sigcode stored 244 * at top to call routine, followed by kcall 245 * to sigreturn routine below. After sigreturn 246 * resets the signal mask, the stack, and the 247 * frame pointer, it returns to the user 248 * specified pc, psl. 249 */ 250 #ifdef COMPAT_43 251 static void 252 osendsig(catcher, sig, mask, code) 253 sig_t catcher; 254 int sig; 255 sigset_t *mask; 256 u_long code; 257 { 258 struct osigframe sf, *fp; 259 struct proc *p; 260 struct thread *td; 261 struct sigacts *psp; 262 struct trapframe *regs; 263 int oonstack; 264 265 td = curthread; 266 p = td->td_proc; 267 PROC_LOCK_ASSERT(p, MA_OWNED); 268 psp = p->p_sigacts; 269 mtx_assert(&psp->ps_mtx, MA_OWNED); 270 regs = td->td_frame; 271 oonstack = sigonstack(regs->tf_esp); 272 273 /* Allocate space for the signal handler context. */ 274 if ((p->p_flag & P_ALTSTACK) && !oonstack && 275 SIGISMEMBER(psp->ps_sigonstack, sig)) { 276 fp = (struct osigframe *)(p->p_sigstk.ss_sp + 277 p->p_sigstk.ss_size - sizeof(struct osigframe)); 278 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 279 p->p_sigstk.ss_flags |= SS_ONSTACK; 280 #endif 281 } else 282 fp = (struct osigframe *)regs->tf_esp - 1; 283 284 /* Translate the signal if appropriate. */ 285 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 286 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 287 288 /* Build the argument list for the signal handler. */ 289 sf.sf_signum = sig; 290 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; 291 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 292 /* Signal handler installed with SA_SIGINFO. */ 293 sf.sf_arg2 = (register_t)&fp->sf_siginfo; 294 sf.sf_siginfo.si_signo = sig; 295 sf.sf_siginfo.si_code = code; 296 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher; 297 } else { 298 /* Old FreeBSD-style arguments. */ 299 sf.sf_arg2 = code; 300 sf.sf_addr = regs->tf_err; 301 sf.sf_ahu.sf_handler = catcher; 302 } 303 mtx_unlock(&psp->ps_mtx); 304 PROC_UNLOCK(p); 305 306 /* Save most if not all of trap frame. */ 307 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax; 308 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx; 309 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx; 310 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx; 311 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi; 312 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi; 313 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs; 314 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds; 315 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss; 316 sf.sf_siginfo.si_sc.sc_es = regs->tf_es; 317 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs; 318 sf.sf_siginfo.si_sc.sc_gs = rgs(); 319 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp; 320 321 /* Build the signal context to be used by osigreturn(). */ 322 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0; 323 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask); 324 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp; 325 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp; 326 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip; 327 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags; 328 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno; 329 sf.sf_siginfo.si_sc.sc_err = regs->tf_err; 330 331 /* 332 * If we're a vm86 process, we want to save the segment registers. 333 * We also change eflags to be our emulated eflags, not the actual 334 * eflags. 335 */ 336 if (regs->tf_eflags & PSL_VM) { 337 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */ 338 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 339 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 340 341 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs; 342 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs; 343 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es; 344 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds; 345 346 if (vm86->vm86_has_vme == 0) 347 sf.sf_siginfo.si_sc.sc_ps = 348 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 349 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 350 351 /* See sendsig() for comments. */ 352 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 353 } 354 355 /* 356 * Copy the sigframe out to the user's stack. 357 */ 358 if (copyout(&sf, fp, sizeof(*fp)) != 0) { 359 #ifdef DEBUG 360 printf("process %ld has trashed its stack\n", (long)p->p_pid); 361 #endif 362 PROC_LOCK(p); 363 sigexit(td, SIGILL); 364 } 365 366 regs->tf_esp = (int)fp; 367 regs->tf_eip = PS_STRINGS - szosigcode; 368 regs->tf_eflags &= ~PSL_T; 369 regs->tf_cs = _ucodesel; 370 regs->tf_ds = _udatasel; 371 regs->tf_es = _udatasel; 372 regs->tf_fs = _udatasel; 373 load_gs(_udatasel); 374 regs->tf_ss = _udatasel; 375 PROC_LOCK(p); 376 mtx_lock(&psp->ps_mtx); 377 } 378 #endif /* COMPAT_43 */ 379 380 #ifdef COMPAT_FREEBSD4 381 static void 382 freebsd4_sendsig(catcher, sig, mask, code) 383 sig_t catcher; 384 int sig; 385 sigset_t *mask; 386 u_long code; 387 { 388 struct sigframe4 sf, *sfp; 389 struct proc *p; 390 struct thread *td; 391 struct sigacts *psp; 392 struct trapframe *regs; 393 int oonstack; 394 395 td = curthread; 396 p = td->td_proc; 397 PROC_LOCK_ASSERT(p, MA_OWNED); 398 psp = p->p_sigacts; 399 mtx_assert(&psp->ps_mtx, MA_OWNED); 400 regs = td->td_frame; 401 oonstack = sigonstack(regs->tf_esp); 402 403 /* Save user context. */ 404 bzero(&sf, sizeof(sf)); 405 sf.sf_uc.uc_sigmask = *mask; 406 sf.sf_uc.uc_stack = p->p_sigstk; 407 sf.sf_uc.uc_stack.ss_flags = (p->p_flag & P_ALTSTACK) 408 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 409 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 410 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 411 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 412 413 /* Allocate space for the signal handler context. */ 414 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack && 415 SIGISMEMBER(psp->ps_sigonstack, sig)) { 416 sfp = (struct sigframe4 *)(p->p_sigstk.ss_sp + 417 p->p_sigstk.ss_size - sizeof(struct sigframe4)); 418 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 419 p->p_sigstk.ss_flags |= SS_ONSTACK; 420 #endif 421 } else 422 sfp = (struct sigframe4 *)regs->tf_esp - 1; 423 424 /* Translate the signal if appropriate. */ 425 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 426 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 427 428 /* Build the argument list for the signal handler. */ 429 sf.sf_signum = sig; 430 sf.sf_ucontext = (register_t)&sfp->sf_uc; 431 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 432 /* Signal handler installed with SA_SIGINFO. */ 433 sf.sf_siginfo = (register_t)&sfp->sf_si; 434 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 435 436 /* Fill in POSIX parts */ 437 sf.sf_si.si_signo = sig; 438 sf.sf_si.si_code = code; 439 sf.sf_si.si_addr = (void *)regs->tf_err; 440 } else { 441 /* Old FreeBSD-style arguments. */ 442 sf.sf_siginfo = code; 443 sf.sf_addr = regs->tf_err; 444 sf.sf_ahu.sf_handler = catcher; 445 } 446 mtx_unlock(&psp->ps_mtx); 447 PROC_UNLOCK(p); 448 449 /* 450 * If we're a vm86 process, we want to save the segment registers. 451 * We also change eflags to be our emulated eflags, not the actual 452 * eflags. 453 */ 454 if (regs->tf_eflags & PSL_VM) { 455 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 456 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 457 458 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 459 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 460 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 461 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 462 463 if (vm86->vm86_has_vme == 0) 464 sf.sf_uc.uc_mcontext.mc_eflags = 465 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 466 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 467 468 /* 469 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 470 * syscalls made by the signal handler. This just avoids 471 * wasting time for our lazy fixup of such faults. PSL_NT 472 * does nothing in vm86 mode, but vm86 programs can set it 473 * almost legitimately in probes for old cpu types. 474 */ 475 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 476 } 477 478 /* 479 * Copy the sigframe out to the user's stack. 480 */ 481 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 482 #ifdef DEBUG 483 printf("process %ld has trashed its stack\n", (long)p->p_pid); 484 #endif 485 PROC_LOCK(p); 486 sigexit(td, SIGILL); 487 } 488 489 regs->tf_esp = (int)sfp; 490 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode; 491 regs->tf_eflags &= ~PSL_T; 492 regs->tf_cs = _ucodesel; 493 regs->tf_ds = _udatasel; 494 regs->tf_es = _udatasel; 495 regs->tf_fs = _udatasel; 496 regs->tf_ss = _udatasel; 497 PROC_LOCK(p); 498 mtx_lock(&psp->ps_mtx); 499 } 500 #endif /* COMPAT_FREEBSD4 */ 501 502 void 503 sendsig(catcher, sig, mask, code) 504 sig_t catcher; 505 int sig; 506 sigset_t *mask; 507 u_long code; 508 { 509 struct sigframe sf, *sfp; 510 struct proc *p; 511 struct thread *td; 512 struct sigacts *psp; 513 char *sp; 514 struct trapframe *regs; 515 int oonstack; 516 517 td = curthread; 518 p = td->td_proc; 519 PROC_LOCK_ASSERT(p, MA_OWNED); 520 psp = p->p_sigacts; 521 mtx_assert(&psp->ps_mtx, MA_OWNED); 522 #ifdef COMPAT_FREEBSD4 523 if (SIGISMEMBER(psp->ps_freebsd4, sig)) { 524 freebsd4_sendsig(catcher, sig, mask, code); 525 return; 526 } 527 #endif 528 #ifdef COMPAT_43 529 if (SIGISMEMBER(psp->ps_osigset, sig)) { 530 osendsig(catcher, sig, mask, code); 531 return; 532 } 533 #endif 534 regs = td->td_frame; 535 oonstack = sigonstack(regs->tf_esp); 536 537 /* Save user context. */ 538 bzero(&sf, sizeof(sf)); 539 sf.sf_uc.uc_sigmask = *mask; 540 sf.sf_uc.uc_stack = p->p_sigstk; 541 sf.sf_uc.uc_stack.ss_flags = (p->p_flag & P_ALTSTACK) 542 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 543 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 544 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 545 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 546 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 547 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 548 fpstate_drop(td); 549 550 /* Allocate space for the signal handler context. */ 551 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack && 552 SIGISMEMBER(psp->ps_sigonstack, sig)) { 553 sp = p->p_sigstk.ss_sp + 554 p->p_sigstk.ss_size - sizeof(struct sigframe); 555 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 556 p->p_sigstk.ss_flags |= SS_ONSTACK; 557 #endif 558 } else 559 sp = (char *)regs->tf_esp - sizeof(struct sigframe); 560 /* Align to 16 bytes. */ 561 sfp = (struct sigframe *)((unsigned int)sp & ~0xF); 562 563 /* Translate the signal if appropriate. */ 564 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 565 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 566 567 /* Build the argument list for the signal handler. */ 568 sf.sf_signum = sig; 569 sf.sf_ucontext = (register_t)&sfp->sf_uc; 570 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 571 /* Signal handler installed with SA_SIGINFO. */ 572 sf.sf_siginfo = (register_t)&sfp->sf_si; 573 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 574 575 /* Fill in POSIX parts */ 576 sf.sf_si.si_signo = sig; 577 sf.sf_si.si_code = code; 578 sf.sf_si.si_addr = (void *)regs->tf_err; 579 } else { 580 /* Old FreeBSD-style arguments. */ 581 sf.sf_siginfo = code; 582 sf.sf_addr = regs->tf_err; 583 sf.sf_ahu.sf_handler = catcher; 584 } 585 mtx_unlock(&psp->ps_mtx); 586 PROC_UNLOCK(p); 587 588 /* 589 * If we're a vm86 process, we want to save the segment registers. 590 * We also change eflags to be our emulated eflags, not the actual 591 * eflags. 592 */ 593 if (regs->tf_eflags & PSL_VM) { 594 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 595 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 596 597 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 598 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 599 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 600 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 601 602 if (vm86->vm86_has_vme == 0) 603 sf.sf_uc.uc_mcontext.mc_eflags = 604 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 605 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 606 607 /* 608 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 609 * syscalls made by the signal handler. This just avoids 610 * wasting time for our lazy fixup of such faults. PSL_NT 611 * does nothing in vm86 mode, but vm86 programs can set it 612 * almost legitimately in probes for old cpu types. 613 */ 614 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 615 } 616 617 /* 618 * Copy the sigframe out to the user's stack. 619 */ 620 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 621 #ifdef DEBUG 622 printf("process %ld has trashed its stack\n", (long)p->p_pid); 623 #endif 624 PROC_LOCK(p); 625 sigexit(td, SIGILL); 626 } 627 628 regs->tf_esp = (int)sfp; 629 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 630 regs->tf_eflags &= ~PSL_T; 631 regs->tf_cs = _ucodesel; 632 regs->tf_ds = _udatasel; 633 regs->tf_es = _udatasel; 634 regs->tf_fs = _udatasel; 635 regs->tf_ss = _udatasel; 636 PROC_LOCK(p); 637 mtx_lock(&psp->ps_mtx); 638 } 639 640 /* 641 * Build siginfo_t for SA thread 642 */ 643 void 644 cpu_thread_siginfo(int sig, u_long code, siginfo_t *si) 645 { 646 struct proc *p; 647 struct thread *td; 648 649 td = curthread; 650 p = td->td_proc; 651 PROC_LOCK_ASSERT(p, MA_OWNED); 652 653 bzero(si, sizeof(*si)); 654 si->si_signo = sig; 655 si->si_code = code; 656 si->si_addr = (void *)td->td_frame->tf_err; 657 /* XXXKSE fill other fields */ 658 } 659 660 /* 661 * System call to cleanup state after a signal 662 * has been taken. Reset signal mask and 663 * stack state from context left by sendsig (above). 664 * Return to previous pc and psl as specified by 665 * context left by sendsig. Check carefully to 666 * make sure that the user has not modified the 667 * state to gain improper privileges. 668 * 669 * MPSAFE 670 */ 671 #ifdef COMPAT_43 672 int 673 osigreturn(td, uap) 674 struct thread *td; 675 struct osigreturn_args /* { 676 struct osigcontext *sigcntxp; 677 } */ *uap; 678 { 679 struct osigcontext sc; 680 struct trapframe *regs; 681 struct osigcontext *scp; 682 struct proc *p = td->td_proc; 683 int eflags, error; 684 685 regs = td->td_frame; 686 error = copyin(uap->sigcntxp, &sc, sizeof(sc)); 687 if (error != 0) 688 return (error); 689 scp = ≻ 690 eflags = scp->sc_ps; 691 if (eflags & PSL_VM) { 692 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 693 struct vm86_kernel *vm86; 694 695 /* 696 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 697 * set up the vm86 area, and we can't enter vm86 mode. 698 */ 699 if (td->td_pcb->pcb_ext == 0) 700 return (EINVAL); 701 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 702 if (vm86->vm86_inited == 0) 703 return (EINVAL); 704 705 /* Go back to user mode if both flags are set. */ 706 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 707 trapsignal(td, SIGBUS, 0); 708 709 if (vm86->vm86_has_vme) { 710 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 711 (eflags & VME_USERCHANGE) | PSL_VM; 712 } else { 713 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 714 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 715 (eflags & VM_USERCHANGE) | PSL_VM; 716 } 717 tf->tf_vm86_ds = scp->sc_ds; 718 tf->tf_vm86_es = scp->sc_es; 719 tf->tf_vm86_fs = scp->sc_fs; 720 tf->tf_vm86_gs = scp->sc_gs; 721 tf->tf_ds = _udatasel; 722 tf->tf_es = _udatasel; 723 tf->tf_fs = _udatasel; 724 } else { 725 /* 726 * Don't allow users to change privileged or reserved flags. 727 */ 728 /* 729 * XXX do allow users to change the privileged flag PSL_RF. 730 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 731 * should sometimes set it there too. tf_eflags is kept in 732 * the signal context during signal handling and there is no 733 * other place to remember it, so the PSL_RF bit may be 734 * corrupted by the signal handler without us knowing. 735 * Corruption of the PSL_RF bit at worst causes one more or 736 * one less debugger trap, so allowing it is fairly harmless. 737 */ 738 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 739 return (EINVAL); 740 } 741 742 /* 743 * Don't allow users to load a valid privileged %cs. Let the 744 * hardware check for invalid selectors, excess privilege in 745 * other selectors, invalid %eip's and invalid %esp's. 746 */ 747 if (!CS_SECURE(scp->sc_cs)) { 748 trapsignal(td, SIGBUS, T_PROTFLT); 749 return (EINVAL); 750 } 751 regs->tf_ds = scp->sc_ds; 752 regs->tf_es = scp->sc_es; 753 regs->tf_fs = scp->sc_fs; 754 } 755 756 /* Restore remaining registers. */ 757 regs->tf_eax = scp->sc_eax; 758 regs->tf_ebx = scp->sc_ebx; 759 regs->tf_ecx = scp->sc_ecx; 760 regs->tf_edx = scp->sc_edx; 761 regs->tf_esi = scp->sc_esi; 762 regs->tf_edi = scp->sc_edi; 763 regs->tf_cs = scp->sc_cs; 764 regs->tf_ss = scp->sc_ss; 765 regs->tf_isp = scp->sc_isp; 766 regs->tf_ebp = scp->sc_fp; 767 regs->tf_esp = scp->sc_sp; 768 regs->tf_eip = scp->sc_pc; 769 regs->tf_eflags = eflags; 770 771 PROC_LOCK(p); 772 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 773 if (scp->sc_onstack & 1) 774 p->p_sigstk.ss_flags |= SS_ONSTACK; 775 else 776 p->p_sigstk.ss_flags &= ~SS_ONSTACK; 777 #endif 778 SIGSETOLD(td->td_sigmask, scp->sc_mask); 779 SIG_CANTMASK(td->td_sigmask); 780 signotify(td); 781 PROC_UNLOCK(p); 782 return (EJUSTRETURN); 783 } 784 #endif /* COMPAT_43 */ 785 786 #ifdef COMPAT_FREEBSD4 787 /* 788 * MPSAFE 789 */ 790 int 791 freebsd4_sigreturn(td, uap) 792 struct thread *td; 793 struct freebsd4_sigreturn_args /* { 794 const ucontext4 *sigcntxp; 795 } */ *uap; 796 { 797 struct ucontext4 uc; 798 struct proc *p = td->td_proc; 799 struct trapframe *regs; 800 const struct ucontext4 *ucp; 801 int cs, eflags, error; 802 803 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 804 if (error != 0) 805 return (error); 806 ucp = &uc; 807 regs = td->td_frame; 808 eflags = ucp->uc_mcontext.mc_eflags; 809 if (eflags & PSL_VM) { 810 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 811 struct vm86_kernel *vm86; 812 813 /* 814 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 815 * set up the vm86 area, and we can't enter vm86 mode. 816 */ 817 if (td->td_pcb->pcb_ext == 0) 818 return (EINVAL); 819 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 820 if (vm86->vm86_inited == 0) 821 return (EINVAL); 822 823 /* Go back to user mode if both flags are set. */ 824 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 825 trapsignal(td, SIGBUS, 0); 826 827 if (vm86->vm86_has_vme) { 828 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 829 (eflags & VME_USERCHANGE) | PSL_VM; 830 } else { 831 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 832 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 833 (eflags & VM_USERCHANGE) | PSL_VM; 834 } 835 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 836 tf->tf_eflags = eflags; 837 tf->tf_vm86_ds = tf->tf_ds; 838 tf->tf_vm86_es = tf->tf_es; 839 tf->tf_vm86_fs = tf->tf_fs; 840 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 841 tf->tf_ds = _udatasel; 842 tf->tf_es = _udatasel; 843 tf->tf_fs = _udatasel; 844 } else { 845 /* 846 * Don't allow users to change privileged or reserved flags. 847 */ 848 /* 849 * XXX do allow users to change the privileged flag PSL_RF. 850 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 851 * should sometimes set it there too. tf_eflags is kept in 852 * the signal context during signal handling and there is no 853 * other place to remember it, so the PSL_RF bit may be 854 * corrupted by the signal handler without us knowing. 855 * Corruption of the PSL_RF bit at worst causes one more or 856 * one less debugger trap, so allowing it is fairly harmless. 857 */ 858 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 859 printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags); 860 return (EINVAL); 861 } 862 863 /* 864 * Don't allow users to load a valid privileged %cs. Let the 865 * hardware check for invalid selectors, excess privilege in 866 * other selectors, invalid %eip's and invalid %esp's. 867 */ 868 cs = ucp->uc_mcontext.mc_cs; 869 if (!CS_SECURE(cs)) { 870 printf("freebsd4_sigreturn: cs = 0x%x\n", cs); 871 trapsignal(td, SIGBUS, T_PROTFLT); 872 return (EINVAL); 873 } 874 875 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 876 } 877 878 PROC_LOCK(p); 879 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 880 if (ucp->uc_mcontext.mc_onstack & 1) 881 p->p_sigstk.ss_flags |= SS_ONSTACK; 882 else 883 p->p_sigstk.ss_flags &= ~SS_ONSTACK; 884 #endif 885 886 td->td_sigmask = ucp->uc_sigmask; 887 SIG_CANTMASK(td->td_sigmask); 888 signotify(td); 889 PROC_UNLOCK(p); 890 return (EJUSTRETURN); 891 } 892 #endif /* COMPAT_FREEBSD4 */ 893 894 /* 895 * MPSAFE 896 */ 897 int 898 sigreturn(td, uap) 899 struct thread *td; 900 struct sigreturn_args /* { 901 const __ucontext *sigcntxp; 902 } */ *uap; 903 { 904 ucontext_t uc; 905 struct proc *p = td->td_proc; 906 struct trapframe *regs; 907 const ucontext_t *ucp; 908 int cs, eflags, error, ret; 909 910 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 911 if (error != 0) 912 return (error); 913 ucp = &uc; 914 regs = td->td_frame; 915 eflags = ucp->uc_mcontext.mc_eflags; 916 if (eflags & PSL_VM) { 917 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 918 struct vm86_kernel *vm86; 919 920 /* 921 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 922 * set up the vm86 area, and we can't enter vm86 mode. 923 */ 924 if (td->td_pcb->pcb_ext == 0) 925 return (EINVAL); 926 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 927 if (vm86->vm86_inited == 0) 928 return (EINVAL); 929 930 /* Go back to user mode if both flags are set. */ 931 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 932 trapsignal(td, SIGBUS, 0); 933 934 if (vm86->vm86_has_vme) { 935 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 936 (eflags & VME_USERCHANGE) | PSL_VM; 937 } else { 938 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 939 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 940 (eflags & VM_USERCHANGE) | PSL_VM; 941 } 942 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 943 tf->tf_eflags = eflags; 944 tf->tf_vm86_ds = tf->tf_ds; 945 tf->tf_vm86_es = tf->tf_es; 946 tf->tf_vm86_fs = tf->tf_fs; 947 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 948 tf->tf_ds = _udatasel; 949 tf->tf_es = _udatasel; 950 tf->tf_fs = _udatasel; 951 } else { 952 /* 953 * Don't allow users to change privileged or reserved flags. 954 */ 955 /* 956 * XXX do allow users to change the privileged flag PSL_RF. 957 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 958 * should sometimes set it there too. tf_eflags is kept in 959 * the signal context during signal handling and there is no 960 * other place to remember it, so the PSL_RF bit may be 961 * corrupted by the signal handler without us knowing. 962 * Corruption of the PSL_RF bit at worst causes one more or 963 * one less debugger trap, so allowing it is fairly harmless. 964 */ 965 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 966 printf("sigreturn: eflags = 0x%x\n", eflags); 967 return (EINVAL); 968 } 969 970 /* 971 * Don't allow users to load a valid privileged %cs. Let the 972 * hardware check for invalid selectors, excess privilege in 973 * other selectors, invalid %eip's and invalid %esp's. 974 */ 975 cs = ucp->uc_mcontext.mc_cs; 976 if (!CS_SECURE(cs)) { 977 printf("sigreturn: cs = 0x%x\n", cs); 978 trapsignal(td, SIGBUS, T_PROTFLT); 979 return (EINVAL); 980 } 981 982 ret = set_fpcontext(td, &ucp->uc_mcontext); 983 if (ret != 0) 984 return (ret); 985 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 986 } 987 988 PROC_LOCK(p); 989 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 990 if (ucp->uc_mcontext.mc_onstack & 1) 991 p->p_sigstk.ss_flags |= SS_ONSTACK; 992 else 993 p->p_sigstk.ss_flags &= ~SS_ONSTACK; 994 #endif 995 996 td->td_sigmask = ucp->uc_sigmask; 997 SIG_CANTMASK(td->td_sigmask); 998 signotify(td); 999 PROC_UNLOCK(p); 1000 return (EJUSTRETURN); 1001 } 1002 1003 /* 1004 * Machine dependent boot() routine 1005 * 1006 * I haven't seen anything to put here yet 1007 * Possibly some stuff might be grafted back here from boot() 1008 */ 1009 void 1010 cpu_boot(int howto) 1011 { 1012 } 1013 1014 /* 1015 * Shutdown the CPU as much as possible 1016 */ 1017 void 1018 cpu_halt(void) 1019 { 1020 for (;;) 1021 __asm__ ("hlt"); 1022 } 1023 1024 /* 1025 * Hook to idle the CPU when possible. In the SMP case we default to 1026 * off because a halted cpu will not currently pick up a new thread in the 1027 * run queue until the next timer tick. If turned on this will result in 1028 * approximately a 4.2% loss in real time performance in buildworld tests 1029 * (but improves user and sys times oddly enough), and saves approximately 1030 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 1031 * 1032 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 1033 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 1034 * Then we can have our cake and eat it too. 1035 * 1036 * XXX I'm turning it on for SMP as well by default for now. It seems to 1037 * help lock contention somewhat, and this is critical for HTT. -Peter 1038 */ 1039 static int cpu_idle_hlt = 1; 1040 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 1041 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 1042 1043 static void 1044 cpu_idle_default(void) 1045 { 1046 /* 1047 * we must absolutely guarentee that hlt is the 1048 * absolute next instruction after sti or we 1049 * introduce a timing window. 1050 */ 1051 __asm __volatile("sti; hlt"); 1052 } 1053 1054 /* 1055 * Note that we have to be careful here to avoid a race between checking 1056 * sched_runnable() and actually halting. If we don't do this, we may waste 1057 * the time between calling hlt and the next interrupt even though there 1058 * is a runnable process. 1059 */ 1060 void 1061 cpu_idle(void) 1062 { 1063 1064 #ifdef SMP 1065 if (mp_grab_cpu_hlt()) 1066 return; 1067 #endif 1068 1069 if (cpu_idle_hlt) { 1070 disable_intr(); 1071 if (sched_runnable()) 1072 enable_intr(); 1073 else 1074 (*cpu_idle_hook)(); 1075 } 1076 } 1077 1078 /* Other subsystems (e.g., ACPI) can hook this later. */ 1079 void (*cpu_idle_hook)(void) = cpu_idle_default; 1080 1081 /* 1082 * Clear registers on exec 1083 */ 1084 void 1085 exec_setregs(td, entry, stack, ps_strings) 1086 struct thread *td; 1087 u_long entry; 1088 u_long stack; 1089 u_long ps_strings; 1090 { 1091 struct trapframe *regs = td->td_frame; 1092 struct pcb *pcb = td->td_pcb; 1093 1094 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */ 1095 pcb->pcb_gs = _udatasel; 1096 load_gs(_udatasel); 1097 1098 if (td->td_proc->p_md.md_ldt) 1099 user_ldt_free(td); 1100 1101 bzero((char *)regs, sizeof(struct trapframe)); 1102 regs->tf_eip = entry; 1103 regs->tf_esp = stack; 1104 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 1105 regs->tf_ss = _udatasel; 1106 regs->tf_ds = _udatasel; 1107 regs->tf_es = _udatasel; 1108 regs->tf_fs = _udatasel; 1109 regs->tf_cs = _ucodesel; 1110 1111 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */ 1112 regs->tf_ebx = ps_strings; 1113 1114 /* 1115 * Reset the hardware debug registers if they were in use. 1116 * They won't have any meaning for the newly exec'd process. 1117 */ 1118 if (pcb->pcb_flags & PCB_DBREGS) { 1119 pcb->pcb_dr0 = 0; 1120 pcb->pcb_dr1 = 0; 1121 pcb->pcb_dr2 = 0; 1122 pcb->pcb_dr3 = 0; 1123 pcb->pcb_dr6 = 0; 1124 pcb->pcb_dr7 = 0; 1125 if (pcb == PCPU_GET(curpcb)) { 1126 /* 1127 * Clear the debug registers on the running 1128 * CPU, otherwise they will end up affecting 1129 * the next process we switch to. 1130 */ 1131 reset_dbregs(); 1132 } 1133 pcb->pcb_flags &= ~PCB_DBREGS; 1134 } 1135 1136 /* 1137 * Initialize the math emulator (if any) for the current process. 1138 * Actually, just clear the bit that says that the emulator has 1139 * been initialized. Initialization is delayed until the process 1140 * traps to the emulator (if it is done at all) mainly because 1141 * emulators don't provide an entry point for initialization. 1142 */ 1143 td->td_pcb->pcb_flags &= ~FP_SOFTFP; 1144 1145 /* 1146 * Arrange to trap the next npx or `fwait' instruction (see npx.c 1147 * for why fwait must be trapped at least if there is an npx or an 1148 * emulator). This is mainly to handle the case where npx0 is not 1149 * configured, since the npx routines normally set up the trap 1150 * otherwise. It should be done only at boot time, but doing it 1151 * here allows modifying `npx_exists' for testing the emulator on 1152 * systems with an npx. 1153 */ 1154 load_cr0(rcr0() | CR0_MP | CR0_TS); 1155 1156 /* Initialize the npx (if any) for the current process. */ 1157 /* 1158 * XXX the above load_cr0() also initializes it and is a layering 1159 * violation if NPX is configured. It drops the npx partially 1160 * and this would be fatal if we were interrupted now, and decided 1161 * to force the state to the pcb, and checked the invariant 1162 * (CR0_TS clear) if and only if PCPU_GET(fpcurthread) != NULL). 1163 * ALL of this can happen except the check. The check used to 1164 * happen and be fatal later when we didn't complete the drop 1165 * before returning to user mode. This should be fixed properly 1166 * soon. 1167 */ 1168 fpstate_drop(td); 1169 1170 /* 1171 * XXX - Linux emulator 1172 * Make sure sure edx is 0x0 on entry. Linux binaries depend 1173 * on it. 1174 */ 1175 td->td_retval[1] = 0; 1176 } 1177 1178 void 1179 cpu_setregs(void) 1180 { 1181 unsigned int cr0; 1182 1183 cr0 = rcr0(); 1184 #ifdef SMP 1185 cr0 |= CR0_NE; /* Done by npxinit() */ 1186 #endif 1187 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */ 1188 #ifndef I386_CPU 1189 cr0 |= CR0_WP | CR0_AM; 1190 #endif 1191 load_cr0(cr0); 1192 load_gs(_udatasel); 1193 } 1194 1195 static int 1196 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 1197 { 1198 int error; 1199 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 1200 req); 1201 if (!error && req->newptr) 1202 resettodr(); 1203 return (error); 1204 } 1205 1206 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 1207 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 1208 1209 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 1210 CTLFLAG_RW, &disable_rtc_set, 0, ""); 1211 1212 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 1213 CTLFLAG_RD, &bootinfo, bootinfo, ""); 1214 1215 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 1216 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 1217 1218 u_long bootdev; /* not a dev_t - encoding is different */ 1219 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 1220 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in dev_t format)"); 1221 1222 /* 1223 * Initialize 386 and configure to run kernel 1224 */ 1225 1226 /* 1227 * Initialize segments & interrupt table 1228 */ 1229 1230 int _default_ldt; 1231 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ 1232 static struct gate_descriptor idt0[NIDT]; 1233 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 1234 union descriptor ldt[NLDT]; /* local descriptor table */ 1235 struct region_descriptor r_gdt, r_idt; /* table descriptors */ 1236 1237 int private_tss; /* flag indicating private tss */ 1238 1239 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 1240 extern int has_f00f_bug; 1241 #endif 1242 1243 static struct i386tss dblfault_tss; 1244 static char dblfault_stack[PAGE_SIZE]; 1245 1246 extern struct user *proc0uarea; 1247 extern vm_offset_t proc0kstack; 1248 1249 1250 /* software prototypes -- in more palatable form */ 1251 struct soft_segment_descriptor gdt_segs[] = { 1252 /* GNULL_SEL 0 Null Descriptor */ 1253 { 0x0, /* segment base address */ 1254 0x0, /* length */ 1255 0, /* segment type */ 1256 0, /* segment descriptor priority level */ 1257 0, /* segment descriptor present */ 1258 0, 0, 1259 0, /* default 32 vs 16 bit size */ 1260 0 /* limit granularity (byte/page units)*/ }, 1261 /* GCODE_SEL 1 Code Descriptor for kernel */ 1262 { 0x0, /* segment base address */ 1263 0xfffff, /* length - all address space */ 1264 SDT_MEMERA, /* segment type */ 1265 0, /* segment descriptor priority level */ 1266 1, /* segment descriptor present */ 1267 0, 0, 1268 1, /* default 32 vs 16 bit size */ 1269 1 /* limit granularity (byte/page units)*/ }, 1270 /* GDATA_SEL 2 Data Descriptor for kernel */ 1271 { 0x0, /* segment base address */ 1272 0xfffff, /* length - all address space */ 1273 SDT_MEMRWA, /* segment type */ 1274 0, /* segment descriptor priority level */ 1275 1, /* segment descriptor present */ 1276 0, 0, 1277 1, /* default 32 vs 16 bit size */ 1278 1 /* limit granularity (byte/page units)*/ }, 1279 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */ 1280 { 0x0, /* segment base address */ 1281 0xfffff, /* length - all address space */ 1282 SDT_MEMRWA, /* segment type */ 1283 0, /* segment descriptor priority level */ 1284 1, /* segment descriptor present */ 1285 0, 0, 1286 1, /* default 32 vs 16 bit size */ 1287 1 /* limit granularity (byte/page units)*/ }, 1288 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */ 1289 { 1290 0x0, /* segment base address */ 1291 sizeof(struct i386tss)-1,/* length */ 1292 SDT_SYS386TSS, /* segment type */ 1293 0, /* segment descriptor priority level */ 1294 1, /* segment descriptor present */ 1295 0, 0, 1296 0, /* unused - default 32 vs 16 bit size */ 1297 0 /* limit granularity (byte/page units)*/ }, 1298 /* GLDT_SEL 5 LDT Descriptor */ 1299 { (int) ldt, /* segment base address */ 1300 sizeof(ldt)-1, /* length - all address space */ 1301 SDT_SYSLDT, /* segment type */ 1302 SEL_UPL, /* segment descriptor priority level */ 1303 1, /* segment descriptor present */ 1304 0, 0, 1305 0, /* unused - default 32 vs 16 bit size */ 1306 0 /* limit granularity (byte/page units)*/ }, 1307 /* GUSERLDT_SEL 6 User LDT Descriptor per process */ 1308 { (int) ldt, /* segment base address */ 1309 (512 * sizeof(union descriptor)-1), /* length */ 1310 SDT_SYSLDT, /* segment type */ 1311 0, /* segment descriptor priority level */ 1312 1, /* segment descriptor present */ 1313 0, 0, 1314 0, /* unused - default 32 vs 16 bit size */ 1315 0 /* limit granularity (byte/page units)*/ }, 1316 /* GTGATE_SEL 7 Null Descriptor - Placeholder */ 1317 { 0x0, /* segment base address */ 1318 0x0, /* length - all address space */ 1319 0, /* segment type */ 1320 0, /* segment descriptor priority level */ 1321 0, /* segment descriptor present */ 1322 0, 0, 1323 0, /* default 32 vs 16 bit size */ 1324 0 /* limit granularity (byte/page units)*/ }, 1325 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */ 1326 { 0x400, /* segment base address */ 1327 0xfffff, /* length */ 1328 SDT_MEMRWA, /* segment type */ 1329 0, /* segment descriptor priority level */ 1330 1, /* segment descriptor present */ 1331 0, 0, 1332 1, /* default 32 vs 16 bit size */ 1333 1 /* limit granularity (byte/page units)*/ }, 1334 /* GPANIC_SEL 9 Panic Tss Descriptor */ 1335 { (int) &dblfault_tss, /* segment base address */ 1336 sizeof(struct i386tss)-1,/* length - all address space */ 1337 SDT_SYS386TSS, /* segment type */ 1338 0, /* segment descriptor priority level */ 1339 1, /* segment descriptor present */ 1340 0, 0, 1341 0, /* unused - default 32 vs 16 bit size */ 1342 0 /* limit granularity (byte/page units)*/ }, 1343 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */ 1344 { 0, /* segment base address (overwritten) */ 1345 0xfffff, /* length */ 1346 SDT_MEMERA, /* segment type */ 1347 0, /* segment descriptor priority level */ 1348 1, /* segment descriptor present */ 1349 0, 0, 1350 0, /* default 32 vs 16 bit size */ 1351 1 /* limit granularity (byte/page units)*/ }, 1352 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */ 1353 { 0, /* segment base address (overwritten) */ 1354 0xfffff, /* length */ 1355 SDT_MEMERA, /* segment type */ 1356 0, /* segment descriptor priority level */ 1357 1, /* segment descriptor present */ 1358 0, 0, 1359 0, /* default 32 vs 16 bit size */ 1360 1 /* limit granularity (byte/page units)*/ }, 1361 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */ 1362 { 0, /* segment base address (overwritten) */ 1363 0xfffff, /* length */ 1364 SDT_MEMRWA, /* segment type */ 1365 0, /* segment descriptor priority level */ 1366 1, /* segment descriptor present */ 1367 0, 0, 1368 1, /* default 32 vs 16 bit size */ 1369 1 /* limit granularity (byte/page units)*/ }, 1370 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */ 1371 { 0, /* segment base address (overwritten) */ 1372 0xfffff, /* length */ 1373 SDT_MEMRWA, /* segment type */ 1374 0, /* segment descriptor priority level */ 1375 1, /* segment descriptor present */ 1376 0, 0, 1377 0, /* default 32 vs 16 bit size */ 1378 1 /* limit granularity (byte/page units)*/ }, 1379 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */ 1380 { 0, /* segment base address (overwritten) */ 1381 0xfffff, /* length */ 1382 SDT_MEMRWA, /* segment type */ 1383 0, /* segment descriptor priority level */ 1384 1, /* segment descriptor present */ 1385 0, 0, 1386 0, /* default 32 vs 16 bit size */ 1387 1 /* limit granularity (byte/page units)*/ }, 1388 }; 1389 1390 static struct soft_segment_descriptor ldt_segs[] = { 1391 /* Null Descriptor - overwritten by call gate */ 1392 { 0x0, /* segment base address */ 1393 0x0, /* length - all address space */ 1394 0, /* segment type */ 1395 0, /* segment descriptor priority level */ 1396 0, /* segment descriptor present */ 1397 0, 0, 1398 0, /* default 32 vs 16 bit size */ 1399 0 /* limit granularity (byte/page units)*/ }, 1400 /* Null Descriptor - overwritten by call gate */ 1401 { 0x0, /* segment base address */ 1402 0x0, /* length - all address space */ 1403 0, /* segment type */ 1404 0, /* segment descriptor priority level */ 1405 0, /* segment descriptor present */ 1406 0, 0, 1407 0, /* default 32 vs 16 bit size */ 1408 0 /* limit granularity (byte/page units)*/ }, 1409 /* Null Descriptor - overwritten by call gate */ 1410 { 0x0, /* segment base address */ 1411 0x0, /* length - all address space */ 1412 0, /* segment type */ 1413 0, /* segment descriptor priority level */ 1414 0, /* segment descriptor present */ 1415 0, 0, 1416 0, /* default 32 vs 16 bit size */ 1417 0 /* limit granularity (byte/page units)*/ }, 1418 /* Code Descriptor for user */ 1419 { 0x0, /* segment base address */ 1420 0xfffff, /* length - all address space */ 1421 SDT_MEMERA, /* segment type */ 1422 SEL_UPL, /* segment descriptor priority level */ 1423 1, /* segment descriptor present */ 1424 0, 0, 1425 1, /* default 32 vs 16 bit size */ 1426 1 /* limit granularity (byte/page units)*/ }, 1427 /* Null Descriptor - overwritten by call gate */ 1428 { 0x0, /* segment base address */ 1429 0x0, /* length - all address space */ 1430 0, /* segment type */ 1431 0, /* segment descriptor priority level */ 1432 0, /* segment descriptor present */ 1433 0, 0, 1434 0, /* default 32 vs 16 bit size */ 1435 0 /* limit granularity (byte/page units)*/ }, 1436 /* Data Descriptor for user */ 1437 { 0x0, /* segment base address */ 1438 0xfffff, /* length - all address space */ 1439 SDT_MEMRWA, /* segment type */ 1440 SEL_UPL, /* segment descriptor priority level */ 1441 1, /* segment descriptor present */ 1442 0, 0, 1443 1, /* default 32 vs 16 bit size */ 1444 1 /* limit granularity (byte/page units)*/ }, 1445 }; 1446 1447 void 1448 setidt(idx, func, typ, dpl, selec) 1449 int idx; 1450 inthand_t *func; 1451 int typ; 1452 int dpl; 1453 int selec; 1454 { 1455 struct gate_descriptor *ip; 1456 1457 ip = idt + idx; 1458 ip->gd_looffset = (int)func; 1459 ip->gd_selector = selec; 1460 ip->gd_stkcpy = 0; 1461 ip->gd_xx = 0; 1462 ip->gd_type = typ; 1463 ip->gd_dpl = dpl; 1464 ip->gd_p = 1; 1465 ip->gd_hioffset = ((int)func)>>16 ; 1466 } 1467 1468 #define IDTVEC(name) __CONCAT(X,name) 1469 1470 extern inthand_t 1471 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1472 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1473 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1474 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1475 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall); 1476 1477 #ifdef DDB 1478 /* 1479 * Display the index and function name of any IDT entries that don't use 1480 * the default 'rsvd' entry point. 1481 */ 1482 DB_SHOW_COMMAND(idt, db_show_idt) 1483 { 1484 struct gate_descriptor *ip; 1485 int idx, quit; 1486 uintptr_t func; 1487 1488 ip = idt; 1489 db_setup_paging(db_simple_pager, &quit, DB_LINES_PER_PAGE); 1490 for (idx = 0, quit = 0; idx < NIDT; idx++) { 1491 func = (ip->gd_hioffset << 16 | ip->gd_looffset); 1492 if (func != (uintptr_t)&IDTVEC(rsvd)) { 1493 db_printf("%3d\t", idx); 1494 db_printsym(func, DB_STGY_PROC); 1495 db_printf("\n"); 1496 } 1497 ip++; 1498 } 1499 } 1500 #endif 1501 1502 void 1503 sdtossd(sd, ssd) 1504 struct segment_descriptor *sd; 1505 struct soft_segment_descriptor *ssd; 1506 { 1507 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1508 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1509 ssd->ssd_type = sd->sd_type; 1510 ssd->ssd_dpl = sd->sd_dpl; 1511 ssd->ssd_p = sd->sd_p; 1512 ssd->ssd_def32 = sd->sd_def32; 1513 ssd->ssd_gran = sd->sd_gran; 1514 } 1515 1516 #define PHYSMAP_SIZE (2 * 8) 1517 1518 /* 1519 * Populate the (physmap) array with base/bound pairs describing the 1520 * available physical memory in the system, then test this memory and 1521 * build the phys_avail array describing the actually-available memory. 1522 * 1523 * If we cannot accurately determine the physical memory map, then use 1524 * value from the 0xE801 call, and failing that, the RTC. 1525 * 1526 * Total memory size may be set by the kernel environment variable 1527 * hw.physmem or the compile-time define MAXMEM. 1528 * 1529 * XXX first should be vm_paddr_t. 1530 */ 1531 static void 1532 getmemsize(int first) 1533 { 1534 int i, physmap_idx, pa_indx; 1535 int hasbrokenint12; 1536 u_int extmem; 1537 struct vm86frame vmf; 1538 struct vm86context vmc; 1539 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 1540 pt_entry_t *pte; 1541 char *cp; 1542 struct bios_smap *smap; 1543 1544 hasbrokenint12 = 0; 1545 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12); 1546 bzero(&vmf, sizeof(vmf)); 1547 bzero(physmap, sizeof(physmap)); 1548 basemem = 0; 1549 1550 /* 1551 * Some newer BIOSes has broken INT 12H implementation which cause 1552 * kernel panic immediately. In this case, we need to scan SMAP 1553 * with INT 15:E820 first, then determine base memory size. 1554 */ 1555 if (hasbrokenint12) { 1556 goto int15e820; 1557 } 1558 1559 /* 1560 * Perform "base memory" related probes & setup 1561 */ 1562 vm86_intcall(0x12, &vmf); 1563 basemem = vmf.vmf_ax; 1564 if (basemem > 640) { 1565 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1566 basemem); 1567 basemem = 640; 1568 } 1569 1570 /* 1571 * XXX if biosbasemem is now < 640, there is a `hole' 1572 * between the end of base memory and the start of 1573 * ISA memory. The hole may be empty or it may 1574 * contain BIOS code or data. Map it read/write so 1575 * that the BIOS can write to it. (Memory from 0 to 1576 * the physical end of the kernel is mapped read-only 1577 * to begin with and then parts of it are remapped. 1578 * The parts that aren't remapped form holes that 1579 * remain read-only and are unused by the kernel. 1580 * The base memory area is below the physical end of 1581 * the kernel and right now forms a read-only hole. 1582 * The part of it from PAGE_SIZE to 1583 * (trunc_page(biosbasemem * 1024) - 1) will be 1584 * remapped and used by the kernel later.) 1585 * 1586 * This code is similar to the code used in 1587 * pmap_mapdev, but since no memory needs to be 1588 * allocated we simply change the mapping. 1589 */ 1590 for (pa = trunc_page(basemem * 1024); 1591 pa < ISA_HOLE_START; pa += PAGE_SIZE) 1592 pmap_kenter(KERNBASE + pa, pa); 1593 1594 /* 1595 * Map pages between basemem and ISA_HOLE_START, if any, r/w into 1596 * the vm86 page table so that vm86 can scribble on them using 1597 * the vm86 map too. XXX: why 2 ways for this and only 1 way for 1598 * page 0, at least as initialized here? 1599 */ 1600 pte = (pt_entry_t *)vm86paddr; 1601 for (i = basemem / 4; i < 160; i++) 1602 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1603 1604 int15e820: 1605 /* 1606 * map page 1 R/W into the kernel page table so we can use it 1607 * as a buffer. The kernel will unmap this page later. 1608 */ 1609 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT); 1610 1611 /* 1612 * get memory map with INT 15:E820 1613 */ 1614 vmc.npages = 0; 1615 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT)); 1616 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di); 1617 1618 physmap_idx = 0; 1619 vmf.vmf_ebx = 0; 1620 do { 1621 vmf.vmf_eax = 0xE820; 1622 vmf.vmf_edx = SMAP_SIG; 1623 vmf.vmf_ecx = sizeof(struct bios_smap); 1624 i = vm86_datacall(0x15, &vmf, &vmc); 1625 if (i || vmf.vmf_eax != SMAP_SIG) 1626 break; 1627 if (boothowto & RB_VERBOSE) 1628 printf("SMAP type=%02x base=%016llx len=%016llx\n", 1629 smap->type, smap->base, smap->length); 1630 1631 if (smap->type != 0x01) 1632 goto next_run; 1633 1634 if (smap->length == 0) 1635 goto next_run; 1636 1637 #ifndef PAE 1638 if (smap->base >= 0xffffffff) { 1639 printf("%uK of memory above 4GB ignored\n", 1640 (u_int)(smap->length / 1024)); 1641 goto next_run; 1642 } 1643 #endif 1644 1645 for (i = 0; i <= physmap_idx; i += 2) { 1646 if (smap->base < physmap[i + 1]) { 1647 if (boothowto & RB_VERBOSE) 1648 printf( 1649 "Overlapping or non-montonic memory region, ignoring second region\n"); 1650 goto next_run; 1651 } 1652 } 1653 1654 if (smap->base == physmap[physmap_idx + 1]) { 1655 physmap[physmap_idx + 1] += smap->length; 1656 goto next_run; 1657 } 1658 1659 physmap_idx += 2; 1660 if (physmap_idx == PHYSMAP_SIZE) { 1661 printf( 1662 "Too many segments in the physical address map, giving up\n"); 1663 break; 1664 } 1665 physmap[physmap_idx] = smap->base; 1666 physmap[physmap_idx + 1] = smap->base + smap->length; 1667 next_run: ; 1668 } while (vmf.vmf_ebx != 0); 1669 1670 /* 1671 * Perform "base memory" related probes & setup based on SMAP 1672 */ 1673 if (basemem == 0) { 1674 for (i = 0; i <= physmap_idx; i += 2) { 1675 if (physmap[i] == 0x00000000) { 1676 basemem = physmap[i + 1] / 1024; 1677 break; 1678 } 1679 } 1680 1681 /* 1682 * XXX this function is horribly organized and has to the same 1683 * things that it does above here. 1684 */ 1685 if (basemem == 0) 1686 basemem = 640; 1687 if (basemem > 640) { 1688 printf( 1689 "Preposterous BIOS basemem of %uK, truncating to 640K\n", 1690 basemem); 1691 basemem = 640; 1692 } 1693 1694 /* 1695 * Let vm86 scribble on pages between basemem and 1696 * ISA_HOLE_START, as above. 1697 */ 1698 for (pa = trunc_page(basemem * 1024); 1699 pa < ISA_HOLE_START; pa += PAGE_SIZE) 1700 pmap_kenter(KERNBASE + pa, pa); 1701 pte = (pt_entry_t *)vm86paddr; 1702 for (i = basemem / 4; i < 160; i++) 1703 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1704 } 1705 1706 if (physmap[1] != 0) 1707 goto physmap_done; 1708 1709 /* 1710 * If we failed above, try memory map with INT 15:E801 1711 */ 1712 vmf.vmf_ax = 0xE801; 1713 if (vm86_intcall(0x15, &vmf) == 0) { 1714 extmem = vmf.vmf_cx + vmf.vmf_dx * 64; 1715 } else { 1716 #if 0 1717 vmf.vmf_ah = 0x88; 1718 vm86_intcall(0x15, &vmf); 1719 extmem = vmf.vmf_ax; 1720 #else 1721 /* 1722 * Prefer the RTC value for extended memory. 1723 */ 1724 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8); 1725 #endif 1726 } 1727 1728 /* 1729 * Special hack for chipsets that still remap the 384k hole when 1730 * there's 16MB of memory - this really confuses people that 1731 * are trying to use bus mastering ISA controllers with the 1732 * "16MB limit"; they only have 16MB, but the remapping puts 1733 * them beyond the limit. 1734 * 1735 * If extended memory is between 15-16MB (16-17MB phys address range), 1736 * chop it to 15MB. 1737 */ 1738 if ((extmem > 15 * 1024) && (extmem < 16 * 1024)) 1739 extmem = 15 * 1024; 1740 1741 physmap[0] = 0; 1742 physmap[1] = basemem * 1024; 1743 physmap_idx = 2; 1744 physmap[physmap_idx] = 0x100000; 1745 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 1746 1747 physmap_done: 1748 /* 1749 * Now, physmap contains a map of physical memory. 1750 */ 1751 1752 #ifdef SMP 1753 /* make hole for AP bootstrap code */ 1754 physmap[1] = mp_bootaddress(physmap[1]); 1755 #endif 1756 1757 /* 1758 * Maxmem isn't the "maximum memory", it's one larger than the 1759 * highest page of the physical address space. It should be 1760 * called something like "Maxphyspage". We may adjust this 1761 * based on ``hw.physmem'' and the results of the memory test. 1762 */ 1763 Maxmem = atop(physmap[physmap_idx + 1]); 1764 1765 #ifdef MAXMEM 1766 Maxmem = MAXMEM / 4; 1767 #endif 1768 1769 /* 1770 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes 1771 * for the appropriate modifiers. This overrides MAXMEM. 1772 */ 1773 if ((cp = getenv("hw.physmem")) != NULL) { 1774 u_int64_t AllowMem, sanity; 1775 char *ep; 1776 1777 sanity = AllowMem = strtouq(cp, &ep, 0); 1778 if ((ep != cp) && (*ep != 0)) { 1779 switch(*ep) { 1780 case 'g': 1781 case 'G': 1782 AllowMem <<= 10; 1783 case 'm': 1784 case 'M': 1785 AllowMem <<= 10; 1786 case 'k': 1787 case 'K': 1788 AllowMem <<= 10; 1789 break; 1790 default: 1791 AllowMem = sanity = 0; 1792 } 1793 if (AllowMem < sanity) 1794 AllowMem = 0; 1795 } 1796 if (AllowMem == 0) 1797 printf("Ignoring invalid memory size of '%s'\n", cp); 1798 else 1799 Maxmem = atop(AllowMem); 1800 freeenv(cp); 1801 } 1802 1803 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1804 (boothowto & RB_VERBOSE)) 1805 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1806 1807 /* 1808 * If Maxmem has been increased beyond what the system has detected, 1809 * extend the last memory segment to the new limit. 1810 */ 1811 if (atop(physmap[physmap_idx + 1]) < Maxmem) 1812 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 1813 1814 /* call pmap initialization to make new kernel address space */ 1815 pmap_bootstrap(first, 0); 1816 1817 /* 1818 * Size up each available chunk of physical memory. 1819 */ 1820 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1821 pa_indx = 0; 1822 phys_avail[pa_indx++] = physmap[0]; 1823 phys_avail[pa_indx] = physmap[0]; 1824 pte = CMAP1; 1825 1826 /* 1827 * physmap is in bytes, so when converting to page boundaries, 1828 * round up the start address and round down the end address. 1829 */ 1830 for (i = 0; i <= physmap_idx; i += 2) { 1831 vm_paddr_t end; 1832 1833 end = ptoa((vm_paddr_t)Maxmem); 1834 if (physmap[i + 1] < end) 1835 end = trunc_page(physmap[i + 1]); 1836 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1837 int tmp, page_bad; 1838 int *ptr = (int *)CADDR1; 1839 1840 /* 1841 * block out kernel memory as not available. 1842 */ 1843 if (pa >= KERNLOAD && pa < first) 1844 continue; 1845 1846 page_bad = FALSE; 1847 1848 /* 1849 * map page into kernel: valid, read/write,non-cacheable 1850 */ 1851 *pte = pa | PG_V | PG_RW | PG_N; 1852 invltlb(); 1853 1854 tmp = *(int *)ptr; 1855 /* 1856 * Test for alternating 1's and 0's 1857 */ 1858 *(volatile int *)ptr = 0xaaaaaaaa; 1859 if (*(volatile int *)ptr != 0xaaaaaaaa) { 1860 page_bad = TRUE; 1861 } 1862 /* 1863 * Test for alternating 0's and 1's 1864 */ 1865 *(volatile int *)ptr = 0x55555555; 1866 if (*(volatile int *)ptr != 0x55555555) { 1867 page_bad = TRUE; 1868 } 1869 /* 1870 * Test for all 1's 1871 */ 1872 *(volatile int *)ptr = 0xffffffff; 1873 if (*(volatile int *)ptr != 0xffffffff) { 1874 page_bad = TRUE; 1875 } 1876 /* 1877 * Test for all 0's 1878 */ 1879 *(volatile int *)ptr = 0x0; 1880 if (*(volatile int *)ptr != 0x0) { 1881 page_bad = TRUE; 1882 } 1883 /* 1884 * Restore original value. 1885 */ 1886 *(int *)ptr = tmp; 1887 1888 /* 1889 * Adjust array of valid/good pages. 1890 */ 1891 if (page_bad == TRUE) { 1892 continue; 1893 } 1894 /* 1895 * If this good page is a continuation of the 1896 * previous set of good pages, then just increase 1897 * the end pointer. Otherwise start a new chunk. 1898 * Note that "end" points one higher than end, 1899 * making the range >= start and < end. 1900 * If we're also doing a speculative memory 1901 * test and we at or past the end, bump up Maxmem 1902 * so that we keep going. The first bad page 1903 * will terminate the loop. 1904 */ 1905 if (phys_avail[pa_indx] == pa) { 1906 phys_avail[pa_indx] += PAGE_SIZE; 1907 } else { 1908 pa_indx++; 1909 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1910 printf( 1911 "Too many holes in the physical address space, giving up\n"); 1912 pa_indx--; 1913 break; 1914 } 1915 phys_avail[pa_indx++] = pa; /* start */ 1916 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1917 } 1918 physmem++; 1919 } 1920 } 1921 *pte = 0; 1922 invltlb(); 1923 1924 /* 1925 * XXX 1926 * The last chunk must contain at least one page plus the message 1927 * buffer to avoid complicating other code (message buffer address 1928 * calculation, etc.). 1929 */ 1930 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1931 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1932 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1933 phys_avail[pa_indx--] = 0; 1934 phys_avail[pa_indx--] = 0; 1935 } 1936 1937 Maxmem = atop(phys_avail[pa_indx]); 1938 1939 /* Trim off space for the message buffer. */ 1940 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1941 1942 avail_end = phys_avail[pa_indx]; 1943 } 1944 1945 void 1946 init386(first) 1947 int first; 1948 { 1949 struct gate_descriptor *gdp; 1950 int gsel_tss, metadata_missing, off, x; 1951 struct pcpu *pc; 1952 1953 proc0.p_uarea = proc0uarea; 1954 thread0.td_kstack = proc0kstack; 1955 thread0.td_pcb = (struct pcb *) 1956 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1957 atdevbase = ISA_HOLE_START + KERNBASE; 1958 1959 /* 1960 * This may be done better later if it gets more high level 1961 * components in it. If so just link td->td_proc here. 1962 */ 1963 proc_linkup(&proc0, &ksegrp0, &kse0, &thread0); 1964 1965 metadata_missing = 0; 1966 if (bootinfo.bi_modulep) { 1967 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 1968 preload_bootstrap_relocate(KERNBASE); 1969 } else { 1970 metadata_missing = 1; 1971 } 1972 if (envmode == 1) 1973 kern_envp = static_env; 1974 else if (bootinfo.bi_envp) 1975 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 1976 1977 /* Init basic tunables, hz etc */ 1978 init_param1(); 1979 1980 /* 1981 * make gdt memory segments, the code segment goes up to end of the 1982 * page with etext in it, the data segment goes to the end of 1983 * the address space 1984 */ 1985 /* 1986 * XXX text protection is temporarily (?) disabled. The limit was 1987 * i386_btop(round_page(etext)) - 1. 1988 */ 1989 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1); 1990 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1); 1991 #ifdef SMP 1992 pc = &SMP_prvspace[0].pcpu; 1993 gdt_segs[GPRIV_SEL].ssd_limit = 1994 atop(sizeof(struct privatespace) - 1); 1995 #else 1996 pc = &__pcpu; 1997 gdt_segs[GPRIV_SEL].ssd_limit = 1998 atop(sizeof(struct pcpu) - 1); 1999 #endif 2000 gdt_segs[GPRIV_SEL].ssd_base = (int) pc; 2001 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss; 2002 2003 for (x = 0; x < NGDT; x++) 2004 ssdtosd(&gdt_segs[x], &gdt[x].sd); 2005 2006 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 2007 r_gdt.rd_base = (int) gdt; 2008 lgdt(&r_gdt); 2009 2010 pcpu_init(pc, 0, sizeof(struct pcpu)); 2011 PCPU_SET(prvspace, pc); 2012 PCPU_SET(curthread, &thread0); 2013 2014 /* 2015 * Initialize mutexes. 2016 * 2017 * icu_lock: in order to allow an interrupt to occur in a critical 2018 * section, to set pcpu->ipending (etc...) properly, we 2019 * must be able to get the icu lock, so it can't be 2020 * under witness. 2021 */ 2022 mutex_init(); 2023 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN); 2024 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 2025 2026 /* make ldt memory segments */ 2027 /* 2028 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it 2029 * should be spelled ...MAX_USER... 2030 */ 2031 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1); 2032 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1); 2033 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 2034 ssdtosd(&ldt_segs[x], &ldt[x].sd); 2035 2036 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 2037 lldt(_default_ldt); 2038 PCPU_SET(currentldt, _default_ldt); 2039 2040 /* exceptions */ 2041 for (x = 0; x < NIDT; x++) 2042 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, 2043 GSEL(GCODE_SEL, SEL_KPL)); 2044 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, 2045 GSEL(GCODE_SEL, SEL_KPL)); 2046 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL, 2047 GSEL(GCODE_SEL, SEL_KPL)); 2048 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, 2049 GSEL(GCODE_SEL, SEL_KPL)); 2050 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL, 2051 GSEL(GCODE_SEL, SEL_KPL)); 2052 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, 2053 GSEL(GCODE_SEL, SEL_KPL)); 2054 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, 2055 GSEL(GCODE_SEL, SEL_KPL)); 2056 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2057 GSEL(GCODE_SEL, SEL_KPL)); 2058 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL 2059 , GSEL(GCODE_SEL, SEL_KPL)); 2060 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 2061 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, 2062 GSEL(GCODE_SEL, SEL_KPL)); 2063 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, 2064 GSEL(GCODE_SEL, SEL_KPL)); 2065 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, 2066 GSEL(GCODE_SEL, SEL_KPL)); 2067 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, 2068 GSEL(GCODE_SEL, SEL_KPL)); 2069 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2070 GSEL(GCODE_SEL, SEL_KPL)); 2071 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, 2072 GSEL(GCODE_SEL, SEL_KPL)); 2073 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, 2074 GSEL(GCODE_SEL, SEL_KPL)); 2075 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, 2076 GSEL(GCODE_SEL, SEL_KPL)); 2077 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, 2078 GSEL(GCODE_SEL, SEL_KPL)); 2079 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, 2080 GSEL(GCODE_SEL, SEL_KPL)); 2081 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL, 2082 GSEL(GCODE_SEL, SEL_KPL)); 2083 2084 r_idt.rd_limit = sizeof(idt0) - 1; 2085 r_idt.rd_base = (int) idt; 2086 lidt(&r_idt); 2087 2088 /* 2089 * Initialize the console before we print anything out. 2090 */ 2091 cninit(); 2092 2093 if (metadata_missing) 2094 printf("WARNING: loader(8) metadata is missing!\n"); 2095 2096 #ifdef DEV_ISA 2097 atpic_startup(); 2098 #endif 2099 2100 #ifdef DDB 2101 kdb_init(); 2102 if (boothowto & RB_KDB) 2103 Debugger("Boot flags requested debugger"); 2104 #endif 2105 2106 finishidentcpu(); /* Final stage of CPU initialization */ 2107 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2108 GSEL(GCODE_SEL, SEL_KPL)); 2109 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2110 GSEL(GCODE_SEL, SEL_KPL)); 2111 initializecpu(); /* Initialize CPU registers */ 2112 2113 /* make an initial tss so cpu can get interrupt stack on syscall! */ 2114 /* Note: -16 is so we can grow the trapframe if we came from vm86 */ 2115 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack + 2116 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16); 2117 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL)); 2118 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 2119 private_tss = 0; 2120 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd); 2121 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 2122 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16); 2123 ltr(gsel_tss); 2124 2125 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 2126 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)]; 2127 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 2128 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 2129 #ifdef PAE 2130 dblfault_tss.tss_cr3 = (int)IdlePDPT; 2131 #else 2132 dblfault_tss.tss_cr3 = (int)IdlePTD; 2133 #endif 2134 dblfault_tss.tss_eip = (int)dblfault_handler; 2135 dblfault_tss.tss_eflags = PSL_KERNEL; 2136 dblfault_tss.tss_ds = dblfault_tss.tss_es = 2137 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 2138 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL); 2139 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 2140 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 2141 2142 vm86_initialize(); 2143 getmemsize(first); 2144 init_param2(physmem); 2145 2146 /* now running on new page tables, configured,and u/iom is accessible */ 2147 2148 /* Map the message buffer. */ 2149 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 2150 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off); 2151 2152 msgbufinit(msgbufp, MSGBUF_SIZE); 2153 2154 /* make a call gate to reenter kernel with */ 2155 gdp = &ldt[LSYS5CALLS_SEL].gd; 2156 2157 x = (int) &IDTVEC(lcall_syscall); 2158 gdp->gd_looffset = x; 2159 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 2160 gdp->gd_stkcpy = 1; 2161 gdp->gd_type = SDT_SYS386CGT; 2162 gdp->gd_dpl = SEL_UPL; 2163 gdp->gd_p = 1; 2164 gdp->gd_hioffset = x >> 16; 2165 2166 /* XXX does this work? */ 2167 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2168 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2169 2170 /* transfer to user mode */ 2171 2172 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL); 2173 _udatasel = LSEL(LUDATA_SEL, SEL_UPL); 2174 2175 /* setup proc 0's pcb */ 2176 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 2177 #ifdef PAE 2178 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT; 2179 #else 2180 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; 2181 #endif 2182 thread0.td_pcb->pcb_ext = 0; 2183 thread0.td_frame = &proc0_tf; 2184 } 2185 2186 void 2187 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 2188 { 2189 2190 pcpu->pc_acpi_id = 0xffffffff; 2191 } 2192 2193 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 2194 static void f00f_hack(void *unused); 2195 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL) 2196 2197 static void 2198 f00f_hack(void *unused) 2199 { 2200 struct gate_descriptor *new_idt; 2201 vm_offset_t tmp; 2202 2203 if (!has_f00f_bug) 2204 return; 2205 2206 GIANT_REQUIRED; 2207 2208 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 2209 2210 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 2211 if (tmp == 0) 2212 panic("kmem_alloc returned 0"); 2213 2214 /* Put the problematic entry (#6) at the end of the lower page. */ 2215 new_idt = (struct gate_descriptor*) 2216 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor)); 2217 bcopy(idt, new_idt, sizeof(idt0)); 2218 r_idt.rd_base = (u_int)new_idt; 2219 lidt(&r_idt); 2220 idt = new_idt; 2221 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 2222 VM_PROT_READ, FALSE) != KERN_SUCCESS) 2223 panic("vm_map_protect failed"); 2224 } 2225 #endif /* defined(I586_CPU) && !NO_F00F_HACK */ 2226 2227 int 2228 ptrace_set_pc(struct thread *td, u_long addr) 2229 { 2230 2231 td->td_frame->tf_eip = addr; 2232 return (0); 2233 } 2234 2235 int 2236 ptrace_single_step(struct thread *td) 2237 { 2238 td->td_frame->tf_eflags |= PSL_T; 2239 return (0); 2240 } 2241 2242 int 2243 fill_regs(struct thread *td, struct reg *regs) 2244 { 2245 struct pcb *pcb; 2246 struct trapframe *tp; 2247 2248 tp = td->td_frame; 2249 regs->r_fs = tp->tf_fs; 2250 regs->r_es = tp->tf_es; 2251 regs->r_ds = tp->tf_ds; 2252 regs->r_edi = tp->tf_edi; 2253 regs->r_esi = tp->tf_esi; 2254 regs->r_ebp = tp->tf_ebp; 2255 regs->r_ebx = tp->tf_ebx; 2256 regs->r_edx = tp->tf_edx; 2257 regs->r_ecx = tp->tf_ecx; 2258 regs->r_eax = tp->tf_eax; 2259 regs->r_eip = tp->tf_eip; 2260 regs->r_cs = tp->tf_cs; 2261 regs->r_eflags = tp->tf_eflags; 2262 regs->r_esp = tp->tf_esp; 2263 regs->r_ss = tp->tf_ss; 2264 pcb = td->td_pcb; 2265 regs->r_gs = pcb->pcb_gs; 2266 return (0); 2267 } 2268 2269 int 2270 set_regs(struct thread *td, struct reg *regs) 2271 { 2272 struct pcb *pcb; 2273 struct trapframe *tp; 2274 2275 tp = td->td_frame; 2276 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) || 2277 !CS_SECURE(regs->r_cs)) 2278 return (EINVAL); 2279 tp->tf_fs = regs->r_fs; 2280 tp->tf_es = regs->r_es; 2281 tp->tf_ds = regs->r_ds; 2282 tp->tf_edi = regs->r_edi; 2283 tp->tf_esi = regs->r_esi; 2284 tp->tf_ebp = regs->r_ebp; 2285 tp->tf_ebx = regs->r_ebx; 2286 tp->tf_edx = regs->r_edx; 2287 tp->tf_ecx = regs->r_ecx; 2288 tp->tf_eax = regs->r_eax; 2289 tp->tf_eip = regs->r_eip; 2290 tp->tf_cs = regs->r_cs; 2291 tp->tf_eflags = regs->r_eflags; 2292 tp->tf_esp = regs->r_esp; 2293 tp->tf_ss = regs->r_ss; 2294 pcb = td->td_pcb; 2295 pcb->pcb_gs = regs->r_gs; 2296 return (0); 2297 } 2298 2299 #ifdef CPU_ENABLE_SSE 2300 static void 2301 fill_fpregs_xmm(sv_xmm, sv_87) 2302 struct savexmm *sv_xmm; 2303 struct save87 *sv_87; 2304 { 2305 register struct env87 *penv_87 = &sv_87->sv_env; 2306 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2307 int i; 2308 2309 bzero(sv_87, sizeof(*sv_87)); 2310 2311 /* FPU control/status */ 2312 penv_87->en_cw = penv_xmm->en_cw; 2313 penv_87->en_sw = penv_xmm->en_sw; 2314 penv_87->en_tw = penv_xmm->en_tw; 2315 penv_87->en_fip = penv_xmm->en_fip; 2316 penv_87->en_fcs = penv_xmm->en_fcs; 2317 penv_87->en_opcode = penv_xmm->en_opcode; 2318 penv_87->en_foo = penv_xmm->en_foo; 2319 penv_87->en_fos = penv_xmm->en_fos; 2320 2321 /* FPU registers */ 2322 for (i = 0; i < 8; ++i) 2323 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 2324 } 2325 2326 static void 2327 set_fpregs_xmm(sv_87, sv_xmm) 2328 struct save87 *sv_87; 2329 struct savexmm *sv_xmm; 2330 { 2331 register struct env87 *penv_87 = &sv_87->sv_env; 2332 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2333 int i; 2334 2335 /* FPU control/status */ 2336 penv_xmm->en_cw = penv_87->en_cw; 2337 penv_xmm->en_sw = penv_87->en_sw; 2338 penv_xmm->en_tw = penv_87->en_tw; 2339 penv_xmm->en_fip = penv_87->en_fip; 2340 penv_xmm->en_fcs = penv_87->en_fcs; 2341 penv_xmm->en_opcode = penv_87->en_opcode; 2342 penv_xmm->en_foo = penv_87->en_foo; 2343 penv_xmm->en_fos = penv_87->en_fos; 2344 2345 /* FPU registers */ 2346 for (i = 0; i < 8; ++i) 2347 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 2348 } 2349 #endif /* CPU_ENABLE_SSE */ 2350 2351 int 2352 fill_fpregs(struct thread *td, struct fpreg *fpregs) 2353 { 2354 #ifdef CPU_ENABLE_SSE 2355 if (cpu_fxsr) { 2356 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm, 2357 (struct save87 *)fpregs); 2358 return (0); 2359 } 2360 #endif /* CPU_ENABLE_SSE */ 2361 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 2362 return (0); 2363 } 2364 2365 int 2366 set_fpregs(struct thread *td, struct fpreg *fpregs) 2367 { 2368 #ifdef CPU_ENABLE_SSE 2369 if (cpu_fxsr) { 2370 set_fpregs_xmm((struct save87 *)fpregs, 2371 &td->td_pcb->pcb_save.sv_xmm); 2372 return (0); 2373 } 2374 #endif /* CPU_ENABLE_SSE */ 2375 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs); 2376 return (0); 2377 } 2378 2379 /* 2380 * Get machine context. 2381 */ 2382 int 2383 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 2384 { 2385 struct trapframe *tp; 2386 2387 tp = td->td_frame; 2388 2389 PROC_LOCK(curthread->td_proc); 2390 mcp->mc_onstack = sigonstack(tp->tf_esp); 2391 PROC_UNLOCK(curthread->td_proc); 2392 mcp->mc_gs = td->td_pcb->pcb_gs; 2393 mcp->mc_fs = tp->tf_fs; 2394 mcp->mc_es = tp->tf_es; 2395 mcp->mc_ds = tp->tf_ds; 2396 mcp->mc_edi = tp->tf_edi; 2397 mcp->mc_esi = tp->tf_esi; 2398 mcp->mc_ebp = tp->tf_ebp; 2399 mcp->mc_isp = tp->tf_isp; 2400 if (flags & GET_MC_CLEAR_RET) { 2401 mcp->mc_eax = 0; 2402 mcp->mc_edx = 0; 2403 } else { 2404 mcp->mc_eax = tp->tf_eax; 2405 mcp->mc_edx = tp->tf_edx; 2406 } 2407 mcp->mc_ebx = tp->tf_ebx; 2408 mcp->mc_ecx = tp->tf_ecx; 2409 mcp->mc_eip = tp->tf_eip; 2410 mcp->mc_cs = tp->tf_cs; 2411 mcp->mc_eflags = tp->tf_eflags; 2412 mcp->mc_esp = tp->tf_esp; 2413 mcp->mc_ss = tp->tf_ss; 2414 mcp->mc_len = sizeof(*mcp); 2415 get_fpcontext(td, mcp); 2416 return (0); 2417 } 2418 2419 /* 2420 * Set machine context. 2421 * 2422 * However, we don't set any but the user modifiable flags, and we won't 2423 * touch the cs selector. 2424 */ 2425 int 2426 set_mcontext(struct thread *td, const mcontext_t *mcp) 2427 { 2428 struct trapframe *tp; 2429 int eflags, ret; 2430 2431 tp = td->td_frame; 2432 if (mcp->mc_len != sizeof(*mcp)) 2433 return (EINVAL); 2434 eflags = (mcp->mc_eflags & PSL_USERCHANGE) | 2435 (tp->tf_eflags & ~PSL_USERCHANGE); 2436 if ((ret = set_fpcontext(td, mcp)) == 0) { 2437 tp->tf_fs = mcp->mc_fs; 2438 tp->tf_es = mcp->mc_es; 2439 tp->tf_ds = mcp->mc_ds; 2440 tp->tf_edi = mcp->mc_edi; 2441 tp->tf_esi = mcp->mc_esi; 2442 tp->tf_ebp = mcp->mc_ebp; 2443 tp->tf_ebx = mcp->mc_ebx; 2444 tp->tf_edx = mcp->mc_edx; 2445 tp->tf_ecx = mcp->mc_ecx; 2446 tp->tf_eax = mcp->mc_eax; 2447 tp->tf_eip = mcp->mc_eip; 2448 tp->tf_eflags = eflags; 2449 tp->tf_esp = mcp->mc_esp; 2450 tp->tf_ss = mcp->mc_ss; 2451 td->td_pcb->pcb_gs = mcp->mc_gs; 2452 ret = 0; 2453 } 2454 return (ret); 2455 } 2456 2457 static void 2458 get_fpcontext(struct thread *td, mcontext_t *mcp) 2459 { 2460 #ifndef DEV_NPX 2461 mcp->mc_fpformat = _MC_FPFMT_NODEV; 2462 mcp->mc_ownedfp = _MC_FPOWNED_NONE; 2463 #else 2464 union savefpu *addr; 2465 2466 /* 2467 * XXX mc_fpstate might be misaligned, since its declaration is not 2468 * unportabilized using __attribute__((aligned(16))) like the 2469 * declaration of struct savemm, and anyway, alignment doesn't work 2470 * for auto variables since we don't use gcc's pessimal stack 2471 * alignment. Work around this by abusing the spare fields after 2472 * mcp->mc_fpstate. 2473 * 2474 * XXX unpessimize most cases by only aligning when fxsave might be 2475 * called, although this requires knowing too much about 2476 * npxgetregs()'s internals. 2477 */ 2478 addr = (union savefpu *)&mcp->mc_fpstate; 2479 if (td == PCPU_GET(fpcurthread) && 2480 #ifdef CPU_ENABLE_SSE 2481 cpu_fxsr && 2482 #endif 2483 ((uintptr_t)(void *)addr & 0xF)) { 2484 do 2485 addr = (void *)((char *)addr + 4); 2486 while ((uintptr_t)(void *)addr & 0xF); 2487 } 2488 mcp->mc_ownedfp = npxgetregs(td, addr); 2489 if (addr != (union savefpu *)&mcp->mc_fpstate) { 2490 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate)); 2491 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2)); 2492 } 2493 mcp->mc_fpformat = npxformat(); 2494 #endif 2495 } 2496 2497 static int 2498 set_fpcontext(struct thread *td, const mcontext_t *mcp) 2499 { 2500 union savefpu *addr; 2501 2502 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2503 return (0); 2504 else if (mcp->mc_fpformat != _MC_FPFMT_387 && 2505 mcp->mc_fpformat != _MC_FPFMT_XMM) 2506 return (EINVAL); 2507 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 2508 /* We don't care what state is left in the FPU or PCB. */ 2509 fpstate_drop(td); 2510 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2511 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2512 /* XXX align as above. */ 2513 addr = (union savefpu *)&mcp->mc_fpstate; 2514 if (td == PCPU_GET(fpcurthread) && 2515 #ifdef CPU_ENABLE_SSE 2516 cpu_fxsr && 2517 #endif 2518 ((uintptr_t)(void *)addr & 0xF)) { 2519 do 2520 addr = (void *)((char *)addr + 4); 2521 while ((uintptr_t)(void *)addr & 0xF); 2522 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate)); 2523 } 2524 #ifdef DEV_NPX 2525 /* 2526 * XXX we violate the dubious requirement that npxsetregs() 2527 * be called with interrupts disabled. 2528 */ 2529 npxsetregs(td, addr); 2530 #endif 2531 /* 2532 * Don't bother putting things back where they were in the 2533 * misaligned case, since we know that the caller won't use 2534 * them again. 2535 */ 2536 } else 2537 return (EINVAL); 2538 return (0); 2539 } 2540 2541 static void 2542 fpstate_drop(struct thread *td) 2543 { 2544 register_t s; 2545 2546 s = intr_disable(); 2547 #ifdef DEV_NPX 2548 if (PCPU_GET(fpcurthread) == td) 2549 npxdrop(); 2550 #endif 2551 /* 2552 * XXX force a full drop of the npx. The above only drops it if we 2553 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case. 2554 * 2555 * XXX I don't much like npxgetregs()'s semantics of doing a full 2556 * drop. Dropping only to the pcb matches fnsave's behaviour. 2557 * We only need to drop to !PCB_INITDONE in sendsig(). But 2558 * sendsig() is the only caller of npxgetregs()... perhaps we just 2559 * have too many layers. 2560 */ 2561 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE; 2562 intr_restore(s); 2563 } 2564 2565 int 2566 fill_dbregs(struct thread *td, struct dbreg *dbregs) 2567 { 2568 struct pcb *pcb; 2569 2570 if (td == NULL) { 2571 dbregs->dr[0] = rdr0(); 2572 dbregs->dr[1] = rdr1(); 2573 dbregs->dr[2] = rdr2(); 2574 dbregs->dr[3] = rdr3(); 2575 dbregs->dr[4] = rdr4(); 2576 dbregs->dr[5] = rdr5(); 2577 dbregs->dr[6] = rdr6(); 2578 dbregs->dr[7] = rdr7(); 2579 } else { 2580 pcb = td->td_pcb; 2581 dbregs->dr[0] = pcb->pcb_dr0; 2582 dbregs->dr[1] = pcb->pcb_dr1; 2583 dbregs->dr[2] = pcb->pcb_dr2; 2584 dbregs->dr[3] = pcb->pcb_dr3; 2585 dbregs->dr[4] = 0; 2586 dbregs->dr[5] = 0; 2587 dbregs->dr[6] = pcb->pcb_dr6; 2588 dbregs->dr[7] = pcb->pcb_dr7; 2589 } 2590 return (0); 2591 } 2592 2593 int 2594 set_dbregs(struct thread *td, struct dbreg *dbregs) 2595 { 2596 struct pcb *pcb; 2597 int i; 2598 u_int32_t mask1, mask2; 2599 2600 if (td == NULL) { 2601 load_dr0(dbregs->dr[0]); 2602 load_dr1(dbregs->dr[1]); 2603 load_dr2(dbregs->dr[2]); 2604 load_dr3(dbregs->dr[3]); 2605 load_dr4(dbregs->dr[4]); 2606 load_dr5(dbregs->dr[5]); 2607 load_dr6(dbregs->dr[6]); 2608 load_dr7(dbregs->dr[7]); 2609 } else { 2610 /* 2611 * Don't let an illegal value for dr7 get set. Specifically, 2612 * check for undefined settings. Setting these bit patterns 2613 * result in undefined behaviour and can lead to an unexpected 2614 * TRCTRAP. 2615 */ 2616 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8; 2617 i++, mask1 <<= 2, mask2 <<= 2) 2618 if ((dbregs->dr[7] & mask1) == mask2) 2619 return (EINVAL); 2620 2621 pcb = td->td_pcb; 2622 2623 /* 2624 * Don't let a process set a breakpoint that is not within the 2625 * process's address space. If a process could do this, it 2626 * could halt the system by setting a breakpoint in the kernel 2627 * (if ddb was enabled). Thus, we need to check to make sure 2628 * that no breakpoints are being enabled for addresses outside 2629 * process's address space, unless, perhaps, we were called by 2630 * uid 0. 2631 * 2632 * XXX - what about when the watched area of the user's 2633 * address space is written into from within the kernel 2634 * ... wouldn't that still cause a breakpoint to be generated 2635 * from within kernel mode? 2636 */ 2637 2638 if (suser(td) != 0) { 2639 if (dbregs->dr[7] & 0x3) { 2640 /* dr0 is enabled */ 2641 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2642 return (EINVAL); 2643 } 2644 2645 if (dbregs->dr[7] & (0x3<<2)) { 2646 /* dr1 is enabled */ 2647 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2648 return (EINVAL); 2649 } 2650 2651 if (dbregs->dr[7] & (0x3<<4)) { 2652 /* dr2 is enabled */ 2653 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2654 return (EINVAL); 2655 } 2656 2657 if (dbregs->dr[7] & (0x3<<6)) { 2658 /* dr3 is enabled */ 2659 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2660 return (EINVAL); 2661 } 2662 } 2663 2664 pcb->pcb_dr0 = dbregs->dr[0]; 2665 pcb->pcb_dr1 = dbregs->dr[1]; 2666 pcb->pcb_dr2 = dbregs->dr[2]; 2667 pcb->pcb_dr3 = dbregs->dr[3]; 2668 pcb->pcb_dr6 = dbregs->dr[6]; 2669 pcb->pcb_dr7 = dbregs->dr[7]; 2670 2671 pcb->pcb_flags |= PCB_DBREGS; 2672 } 2673 2674 return (0); 2675 } 2676 2677 /* 2678 * Return > 0 if a hardware breakpoint has been hit, and the 2679 * breakpoint was in user space. Return 0, otherwise. 2680 */ 2681 int 2682 user_dbreg_trap(void) 2683 { 2684 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 2685 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 2686 int nbp; /* number of breakpoints that triggered */ 2687 caddr_t addr[4]; /* breakpoint addresses */ 2688 int i; 2689 2690 dr7 = rdr7(); 2691 if ((dr7 & 0x000000ff) == 0) { 2692 /* 2693 * all GE and LE bits in the dr7 register are zero, 2694 * thus the trap couldn't have been caused by the 2695 * hardware debug registers 2696 */ 2697 return 0; 2698 } 2699 2700 nbp = 0; 2701 dr6 = rdr6(); 2702 bp = dr6 & 0x0000000f; 2703 2704 if (!bp) { 2705 /* 2706 * None of the breakpoint bits are set meaning this 2707 * trap was not caused by any of the debug registers 2708 */ 2709 return 0; 2710 } 2711 2712 /* 2713 * at least one of the breakpoints were hit, check to see 2714 * which ones and if any of them are user space addresses 2715 */ 2716 2717 if (bp & 0x01) { 2718 addr[nbp++] = (caddr_t)rdr0(); 2719 } 2720 if (bp & 0x02) { 2721 addr[nbp++] = (caddr_t)rdr1(); 2722 } 2723 if (bp & 0x04) { 2724 addr[nbp++] = (caddr_t)rdr2(); 2725 } 2726 if (bp & 0x08) { 2727 addr[nbp++] = (caddr_t)rdr3(); 2728 } 2729 2730 for (i=0; i<nbp; i++) { 2731 if (addr[i] < 2732 (caddr_t)VM_MAXUSER_ADDRESS) { 2733 /* 2734 * addr[i] is in user space 2735 */ 2736 return nbp; 2737 } 2738 } 2739 2740 /* 2741 * None of the breakpoints are in user space. 2742 */ 2743 return 0; 2744 } 2745 2746 #ifndef DDB 2747 void 2748 Debugger(const char *msg) 2749 { 2750 printf("Debugger(\"%s\") called.\n", msg); 2751 } 2752 #endif /* no DDB */ 2753 2754 #ifndef DEV_APIC 2755 #include <machine/apicvar.h> 2756 2757 /* 2758 * Provide stub functions so that the MADT APIC enumerator in the acpi 2759 * kernel module will link against a kernel without 'device apic'. 2760 * 2761 * XXX - This is a gross hack. 2762 */ 2763 void 2764 apic_register_enumerator(struct apic_enumerator *enumerator) 2765 { 2766 } 2767 2768 void * 2769 ioapic_create(uintptr_t addr, int32_t id, int intbase) 2770 { 2771 return (NULL); 2772 } 2773 2774 int 2775 ioapic_disable_pin(void *cookie, u_int pin) 2776 { 2777 return (ENXIO); 2778 } 2779 2780 int 2781 ioapic_get_vector(void *cookie, u_int pin) 2782 { 2783 return (-1); 2784 } 2785 2786 void 2787 ioapic_register(void *cookie) 2788 { 2789 } 2790 2791 int 2792 ioapic_remap_vector(void *cookie, u_int pin, int vector) 2793 { 2794 return (ENXIO); 2795 } 2796 2797 int 2798 ioapic_set_extint(void *cookie, u_int pin) 2799 { 2800 return (ENXIO); 2801 } 2802 2803 int 2804 ioapic_set_nmi(void *cookie, u_int pin) 2805 { 2806 return (ENXIO); 2807 } 2808 2809 int 2810 ioapic_set_polarity(void *cookie, u_int pin, char activehi) 2811 { 2812 return (ENXIO); 2813 } 2814 2815 int 2816 ioapic_set_triggermode(void *cookie, u_int pin, char edgetrigger) 2817 { 2818 return (ENXIO); 2819 } 2820 2821 void 2822 lapic_create(u_int apic_id, int boot_cpu) 2823 { 2824 } 2825 2826 void 2827 lapic_init(uintptr_t addr) 2828 { 2829 } 2830 2831 int 2832 lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode) 2833 { 2834 return (ENXIO); 2835 } 2836 2837 int 2838 lapic_set_lvt_polarity(u_int apic_id, u_int lvt, u_char activehi) 2839 { 2840 return (ENXIO); 2841 } 2842 2843 int 2844 lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, u_char edgetrigger) 2845 { 2846 return (ENXIO); 2847 } 2848 #endif 2849 2850 #ifdef DDB 2851 2852 /* 2853 * Provide inb() and outb() as functions. They are normally only 2854 * available as macros calling inlined functions, thus cannot be 2855 * called inside DDB. 2856 * 2857 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 2858 */ 2859 2860 #undef inb 2861 #undef outb 2862 2863 /* silence compiler warnings */ 2864 u_char inb(u_int); 2865 void outb(u_int, u_char); 2866 2867 u_char 2868 inb(u_int port) 2869 { 2870 u_char data; 2871 /* 2872 * We use %%dx and not %1 here because i/o is done at %dx and not at 2873 * %edx, while gcc generates inferior code (movw instead of movl) 2874 * if we tell it to load (u_short) port. 2875 */ 2876 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 2877 return (data); 2878 } 2879 2880 void 2881 outb(u_int port, u_char data) 2882 { 2883 u_char al; 2884 /* 2885 * Use an unnecessary assignment to help gcc's register allocator. 2886 * This make a large difference for gcc-1.40 and a tiny difference 2887 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 2888 * best results. gcc-2.6.0 can't handle this. 2889 */ 2890 al = data; 2891 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 2892 } 2893 2894 #endif /* DDB */
Cache object: 426a80f93eb6dc51867b93565c2d98bc
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]