The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/machdep.c

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    1 /*-
    2  * Copyright (c) 1992 Terrence R. Lambert.
    3  * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
    4  * All rights reserved.
    5  *
    6  * This code is derived from software contributed to Berkeley by
    7  * William Jolitz.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 3. All advertising materials mentioning features or use of this software
   18  *    must display the following acknowledgement:
   19  *      This product includes software developed by the University of
   20  *      California, Berkeley and its contributors.
   21  * 4. Neither the name of the University nor the names of its contributors
   22  *    may be used to endorse or promote products derived from this software
   23  *    without specific prior written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   27  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   28  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   29  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   30  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   31  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   35  * SUCH DAMAGE.
   36  *
   37  *      from: @(#)machdep.c     7.4 (Berkeley) 6/3/91
   38  */
   39 
   40 #include <sys/cdefs.h>
   41 __FBSDID("$FreeBSD: releng/6.0/sys/i386/i386/machdep.c 148469 2005-07-28 03:30:53Z jkoshy $");
   42 
   43 #include "opt_apic.h"
   44 #include "opt_atalk.h"
   45 #include "opt_compat.h"
   46 #include "opt_cpu.h"
   47 #include "opt_ddb.h"
   48 #include "opt_inet.h"
   49 #include "opt_ipx.h"
   50 #include "opt_isa.h"
   51 #include "opt_kstack_pages.h"
   52 #include "opt_maxmem.h"
   53 #include "opt_msgbuf.h"
   54 #include "opt_npx.h"
   55 #include "opt_perfmon.h"
   56 
   57 #include <sys/param.h>
   58 #include <sys/proc.h>
   59 #include <sys/systm.h>
   60 #include <sys/bio.h>
   61 #include <sys/buf.h>
   62 #include <sys/bus.h>
   63 #include <sys/callout.h>
   64 #include <sys/cons.h>
   65 #include <sys/cpu.h>
   66 #include <sys/eventhandler.h>
   67 #include <sys/exec.h>
   68 #include <sys/imgact.h>
   69 #include <sys/kdb.h>
   70 #include <sys/kernel.h>
   71 #include <sys/ktr.h>
   72 #include <sys/linker.h>
   73 #include <sys/lock.h>
   74 #include <sys/malloc.h>
   75 #include <sys/memrange.h>
   76 #include <sys/msgbuf.h>
   77 #include <sys/mutex.h>
   78 #include <sys/pcpu.h>
   79 #include <sys/ptrace.h>
   80 #include <sys/reboot.h>
   81 #include <sys/sched.h>
   82 #include <sys/signalvar.h>
   83 #include <sys/sysctl.h>
   84 #include <sys/sysent.h>
   85 #include <sys/sysproto.h>
   86 #include <sys/ucontext.h>
   87 #include <sys/vmmeter.h>
   88 
   89 #include <vm/vm.h>
   90 #include <vm/vm_extern.h>
   91 #include <vm/vm_kern.h>
   92 #include <vm/vm_page.h>
   93 #include <vm/vm_map.h>
   94 #include <vm/vm_object.h>
   95 #include <vm/vm_pager.h>
   96 #include <vm/vm_param.h>
   97 
   98 #ifdef DDB
   99 #ifndef KDB
  100 #error KDB must be enabled in order for DDB to work!
  101 #endif
  102 #include <ddb/ddb.h>
  103 #include <ddb/db_sym.h>
  104 #endif
  105 
  106 #include <isa/rtc.h>
  107 
  108 #include <net/netisr.h>
  109 
  110 #include <machine/bootinfo.h>
  111 #include <machine/clock.h>
  112 #include <machine/cpu.h>
  113 #include <machine/cputypes.h>
  114 #include <machine/intr_machdep.h>
  115 #include <machine/md_var.h>
  116 #include <machine/pc/bios.h>
  117 #include <machine/pcb.h>
  118 #include <machine/pcb_ext.h>
  119 #include <machine/proc.h>
  120 #include <machine/reg.h>
  121 #include <machine/sigframe.h>
  122 #include <machine/specialreg.h>
  123 #include <machine/vm86.h>
  124 #ifdef PERFMON
  125 #include <machine/perfmon.h>
  126 #endif
  127 #ifdef SMP
  128 #include <machine/privatespace.h>
  129 #include <machine/smp.h>
  130 #endif
  131 
  132 #ifdef DEV_ISA
  133 #include <i386/isa/icu.h>
  134 #endif
  135 
  136 /* Sanity check for __curthread() */
  137 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
  138 
  139 extern void init386(int first);
  140 extern void dblfault_handler(void);
  141 
  142 extern void printcpuinfo(void); /* XXX header file */
  143 extern void finishidentcpu(void);
  144 extern void panicifcpuunsupported(void);
  145 extern void initializecpu(void);
  146 
  147 #define CS_SECURE(cs)           (ISPL(cs) == SEL_UPL)
  148 #define EFL_SECURE(ef, oef)     ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
  149 
  150 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
  151 #define CPU_ENABLE_SSE
  152 #endif
  153 
  154 static void cpu_startup(void *);
  155 static void fpstate_drop(struct thread *td);
  156 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
  157 static int  set_fpcontext(struct thread *td, const mcontext_t *mcp);
  158 #ifdef CPU_ENABLE_SSE
  159 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
  160 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
  161 #endif /* CPU_ENABLE_SSE */
  162 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
  163 
  164 #ifdef DDB
  165 extern vm_offset_t ksym_start, ksym_end;
  166 #endif
  167 
  168 int     _udatasel, _ucodesel;
  169 u_int   basemem;
  170 
  171 int cold = 1;
  172 
  173 #ifdef COMPAT_43
  174 static void osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code);
  175 #endif
  176 #ifdef COMPAT_FREEBSD4
  177 static void freebsd4_sendsig(sig_t catcher, int sig, sigset_t *mask,
  178     u_long code);
  179 #endif
  180 
  181 long Maxmem = 0;
  182 long realmem = 0;
  183 
  184 vm_paddr_t phys_avail[10];
  185 vm_paddr_t dump_avail[10];
  186 
  187 /* must be 2 less so 0 0 can signal end of chunks */
  188 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
  189 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
  190 
  191 struct kva_md_info kmi;
  192 
  193 static struct trapframe proc0_tf;
  194 #ifndef SMP
  195 static struct pcpu __pcpu;
  196 #endif
  197 
  198 struct mtx icu_lock;
  199 
  200 struct mem_range_softc mem_range_softc;
  201 
  202 static void
  203 cpu_startup(dummy)
  204         void *dummy;
  205 {
  206         /*
  207          * Good {morning,afternoon,evening,night}.
  208          */
  209         startrtclock();
  210         printcpuinfo();
  211         panicifcpuunsupported();
  212 #ifdef PERFMON
  213         perfmon_init();
  214 #endif
  215         printf("real memory  = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem),
  216             ptoa((uintmax_t)Maxmem) / 1048576);
  217         realmem = Maxmem;
  218         /*
  219          * Display any holes after the first chunk of extended memory.
  220          */
  221         if (bootverbose) {
  222                 int indx;
  223 
  224                 printf("Physical memory chunk(s):\n");
  225                 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
  226                         vm_paddr_t size;
  227 
  228                         size = phys_avail[indx + 1] - phys_avail[indx];
  229                         printf(
  230                             "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
  231                             (uintmax_t)phys_avail[indx],
  232                             (uintmax_t)phys_avail[indx + 1] - 1,
  233                             (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
  234                 }
  235         }
  236 
  237         vm_ksubmap_init(&kmi);
  238 
  239         printf("avail memory = %ju (%ju MB)\n",
  240             ptoa((uintmax_t)cnt.v_free_count),
  241             ptoa((uintmax_t)cnt.v_free_count) / 1048576);
  242 
  243         /*
  244          * Set up buffers, so they can be used to read disk labels.
  245          */
  246         bufinit();
  247         vm_pager_bufferinit();
  248 
  249         cpu_setregs();
  250 }
  251 
  252 /*
  253  * Send an interrupt to process.
  254  *
  255  * Stack is set up to allow sigcode stored
  256  * at top to call routine, followed by kcall
  257  * to sigreturn routine below.  After sigreturn
  258  * resets the signal mask, the stack, and the
  259  * frame pointer, it returns to the user
  260  * specified pc, psl.
  261  */
  262 #ifdef COMPAT_43
  263 static void
  264 osendsig(catcher, sig, mask, code)
  265         sig_t catcher;
  266         int sig;
  267         sigset_t *mask;
  268         u_long code;
  269 {
  270         struct osigframe sf, *fp;
  271         struct proc *p;
  272         struct thread *td;
  273         struct sigacts *psp;
  274         struct trapframe *regs;
  275         int oonstack;
  276 
  277         td = curthread;
  278         p = td->td_proc;
  279         PROC_LOCK_ASSERT(p, MA_OWNED);
  280         psp = p->p_sigacts;
  281         mtx_assert(&psp->ps_mtx, MA_OWNED);
  282         regs = td->td_frame;
  283         oonstack = sigonstack(regs->tf_esp);
  284 
  285         /* Allocate space for the signal handler context. */
  286         if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
  287             SIGISMEMBER(psp->ps_sigonstack, sig)) {
  288                 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
  289                     td->td_sigstk.ss_size - sizeof(struct osigframe));
  290 #if defined(COMPAT_43)
  291                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  292 #endif
  293         } else
  294                 fp = (struct osigframe *)regs->tf_esp - 1;
  295 
  296         /* Translate the signal if appropriate. */
  297         if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
  298                 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
  299 
  300         /* Build the argument list for the signal handler. */
  301         sf.sf_signum = sig;
  302         sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
  303         if (SIGISMEMBER(psp->ps_siginfo, sig)) {
  304                 /* Signal handler installed with SA_SIGINFO. */
  305                 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
  306                 sf.sf_siginfo.si_signo = sig;
  307                 sf.sf_siginfo.si_code = code;
  308                 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
  309         } else {
  310                 /* Old FreeBSD-style arguments. */
  311                 sf.sf_arg2 = code;
  312                 sf.sf_addr = regs->tf_err;
  313                 sf.sf_ahu.sf_handler = catcher;
  314         }
  315         mtx_unlock(&psp->ps_mtx);
  316         PROC_UNLOCK(p);
  317 
  318         /* Save most if not all of trap frame. */
  319         sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
  320         sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
  321         sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
  322         sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
  323         sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
  324         sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
  325         sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
  326         sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
  327         sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
  328         sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
  329         sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
  330         sf.sf_siginfo.si_sc.sc_gs = rgs();
  331         sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
  332 
  333         /* Build the signal context to be used by osigreturn(). */
  334         sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
  335         SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
  336         sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
  337         sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
  338         sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
  339         sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
  340         sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
  341         sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
  342 
  343         /*
  344          * If we're a vm86 process, we want to save the segment registers.
  345          * We also change eflags to be our emulated eflags, not the actual
  346          * eflags.
  347          */
  348         if (regs->tf_eflags & PSL_VM) {
  349                 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
  350                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  351                 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  352 
  353                 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
  354                 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
  355                 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
  356                 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
  357 
  358                 if (vm86->vm86_has_vme == 0)
  359                         sf.sf_siginfo.si_sc.sc_ps =
  360                             (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
  361                             (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
  362 
  363                 /* See sendsig() for comments. */
  364                 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
  365         }
  366 
  367         /*
  368          * Copy the sigframe out to the user's stack.
  369          */
  370         if (copyout(&sf, fp, sizeof(*fp)) != 0) {
  371 #ifdef DEBUG
  372                 printf("process %ld has trashed its stack\n", (long)p->p_pid);
  373 #endif
  374                 PROC_LOCK(p);
  375                 sigexit(td, SIGILL);
  376         }
  377 
  378         regs->tf_esp = (int)fp;
  379         regs->tf_eip = PS_STRINGS - szosigcode;
  380         regs->tf_eflags &= ~PSL_T;
  381         regs->tf_cs = _ucodesel;
  382         regs->tf_ds = _udatasel;
  383         regs->tf_es = _udatasel;
  384         regs->tf_fs = _udatasel;
  385         load_gs(_udatasel);
  386         regs->tf_ss = _udatasel;
  387         PROC_LOCK(p);
  388         mtx_lock(&psp->ps_mtx);
  389 }
  390 #endif /* COMPAT_43 */
  391 
  392 #ifdef COMPAT_FREEBSD4
  393 static void
  394 freebsd4_sendsig(catcher, sig, mask, code)
  395         sig_t catcher;
  396         int sig;
  397         sigset_t *mask;
  398         u_long code;
  399 {
  400         struct sigframe4 sf, *sfp;
  401         struct proc *p;
  402         struct thread *td;
  403         struct sigacts *psp;
  404         struct trapframe *regs;
  405         int oonstack;
  406 
  407         td = curthread;
  408         p = td->td_proc;
  409         PROC_LOCK_ASSERT(p, MA_OWNED);
  410         psp = p->p_sigacts;
  411         mtx_assert(&psp->ps_mtx, MA_OWNED);
  412         regs = td->td_frame;
  413         oonstack = sigonstack(regs->tf_esp);
  414 
  415         /* Save user context. */
  416         bzero(&sf, sizeof(sf));
  417         sf.sf_uc.uc_sigmask = *mask;
  418         sf.sf_uc.uc_stack = td->td_sigstk;
  419         sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
  420             ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
  421         sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
  422         sf.sf_uc.uc_mcontext.mc_gs = rgs();
  423         bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
  424 
  425         /* Allocate space for the signal handler context. */
  426         if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
  427             SIGISMEMBER(psp->ps_sigonstack, sig)) {
  428                 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
  429                     td->td_sigstk.ss_size - sizeof(struct sigframe4));
  430 #if defined(COMPAT_43)
  431                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  432 #endif
  433         } else
  434                 sfp = (struct sigframe4 *)regs->tf_esp - 1;
  435 
  436         /* Translate the signal if appropriate. */
  437         if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
  438                 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
  439 
  440         /* Build the argument list for the signal handler. */
  441         sf.sf_signum = sig;
  442         sf.sf_ucontext = (register_t)&sfp->sf_uc;
  443         if (SIGISMEMBER(psp->ps_siginfo, sig)) {
  444                 /* Signal handler installed with SA_SIGINFO. */
  445                 sf.sf_siginfo = (register_t)&sfp->sf_si;
  446                 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
  447 
  448                 /* Fill in POSIX parts */
  449                 sf.sf_si.si_signo = sig;
  450                 sf.sf_si.si_code = code;
  451                 sf.sf_si.si_addr = (void *)regs->tf_err;
  452         } else {
  453                 /* Old FreeBSD-style arguments. */
  454                 sf.sf_siginfo = code;
  455                 sf.sf_addr = regs->tf_err;
  456                 sf.sf_ahu.sf_handler = catcher;
  457         }
  458         mtx_unlock(&psp->ps_mtx);
  459         PROC_UNLOCK(p);
  460 
  461         /*
  462          * If we're a vm86 process, we want to save the segment registers.
  463          * We also change eflags to be our emulated eflags, not the actual
  464          * eflags.
  465          */
  466         if (regs->tf_eflags & PSL_VM) {
  467                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  468                 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  469 
  470                 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
  471                 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
  472                 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
  473                 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
  474 
  475                 if (vm86->vm86_has_vme == 0)
  476                         sf.sf_uc.uc_mcontext.mc_eflags =
  477                             (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
  478                             (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
  479 
  480                 /*
  481                  * Clear PSL_NT to inhibit T_TSSFLT faults on return from
  482                  * syscalls made by the signal handler.  This just avoids
  483                  * wasting time for our lazy fixup of such faults.  PSL_NT
  484                  * does nothing in vm86 mode, but vm86 programs can set it
  485                  * almost legitimately in probes for old cpu types.
  486                  */
  487                 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
  488         }
  489 
  490         /*
  491          * Copy the sigframe out to the user's stack.
  492          */
  493         if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
  494 #ifdef DEBUG
  495                 printf("process %ld has trashed its stack\n", (long)p->p_pid);
  496 #endif
  497                 PROC_LOCK(p);
  498                 sigexit(td, SIGILL);
  499         }
  500 
  501         regs->tf_esp = (int)sfp;
  502         regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
  503         regs->tf_eflags &= ~PSL_T;
  504         regs->tf_cs = _ucodesel;
  505         regs->tf_ds = _udatasel;
  506         regs->tf_es = _udatasel;
  507         regs->tf_fs = _udatasel;
  508         regs->tf_ss = _udatasel;
  509         PROC_LOCK(p);
  510         mtx_lock(&psp->ps_mtx);
  511 }
  512 #endif  /* COMPAT_FREEBSD4 */
  513 
  514 void
  515 sendsig(catcher, sig, mask, code)
  516         sig_t catcher;
  517         int sig;
  518         sigset_t *mask;
  519         u_long code;
  520 {
  521         struct sigframe sf, *sfp;
  522         struct proc *p;
  523         struct thread *td;
  524         struct sigacts *psp;
  525         char *sp;
  526         struct trapframe *regs;
  527         int oonstack;
  528 
  529         td = curthread;
  530         p = td->td_proc;
  531         PROC_LOCK_ASSERT(p, MA_OWNED);
  532         psp = p->p_sigacts;
  533         mtx_assert(&psp->ps_mtx, MA_OWNED);
  534 #ifdef COMPAT_FREEBSD4
  535         if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
  536                 freebsd4_sendsig(catcher, sig, mask, code);
  537                 return;
  538         }
  539 #endif
  540 #ifdef COMPAT_43
  541         if (SIGISMEMBER(psp->ps_osigset, sig)) {
  542                 osendsig(catcher, sig, mask, code);
  543                 return;
  544         }
  545 #endif
  546         regs = td->td_frame;
  547         oonstack = sigonstack(regs->tf_esp);
  548 
  549         /* Save user context. */
  550         bzero(&sf, sizeof(sf));
  551         sf.sf_uc.uc_sigmask = *mask;
  552         sf.sf_uc.uc_stack = td->td_sigstk;
  553         sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
  554             ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
  555         sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
  556         sf.sf_uc.uc_mcontext.mc_gs = rgs();
  557         bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
  558         sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
  559         get_fpcontext(td, &sf.sf_uc.uc_mcontext);
  560         fpstate_drop(td);
  561 
  562         /* Allocate space for the signal handler context. */
  563         if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
  564             SIGISMEMBER(psp->ps_sigonstack, sig)) {
  565                 sp = td->td_sigstk.ss_sp +
  566                     td->td_sigstk.ss_size - sizeof(struct sigframe);
  567 #if defined(COMPAT_43)
  568                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  569 #endif
  570         } else
  571                 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
  572         /* Align to 16 bytes. */
  573         sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
  574 
  575         /* Translate the signal if appropriate. */
  576         if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
  577                 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
  578 
  579         /* Build the argument list for the signal handler. */
  580         sf.sf_signum = sig;
  581         sf.sf_ucontext = (register_t)&sfp->sf_uc;
  582         if (SIGISMEMBER(psp->ps_siginfo, sig)) {
  583                 /* Signal handler installed with SA_SIGINFO. */
  584                 sf.sf_siginfo = (register_t)&sfp->sf_si;
  585                 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
  586 
  587                 /* Fill in POSIX parts */
  588                 sf.sf_si.si_signo = sig;
  589                 sf.sf_si.si_code = code;
  590                 sf.sf_si.si_addr = (void *)regs->tf_err;
  591         } else {
  592                 /* Old FreeBSD-style arguments. */
  593                 sf.sf_siginfo = code;
  594                 sf.sf_addr = regs->tf_err;
  595                 sf.sf_ahu.sf_handler = catcher;
  596         }
  597         mtx_unlock(&psp->ps_mtx);
  598         PROC_UNLOCK(p);
  599 
  600         /*
  601          * If we're a vm86 process, we want to save the segment registers.
  602          * We also change eflags to be our emulated eflags, not the actual
  603          * eflags.
  604          */
  605         if (regs->tf_eflags & PSL_VM) {
  606                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  607                 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  608 
  609                 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
  610                 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
  611                 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
  612                 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
  613 
  614                 if (vm86->vm86_has_vme == 0)
  615                         sf.sf_uc.uc_mcontext.mc_eflags =
  616                             (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
  617                             (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
  618 
  619                 /*
  620                  * Clear PSL_NT to inhibit T_TSSFLT faults on return from
  621                  * syscalls made by the signal handler.  This just avoids
  622                  * wasting time for our lazy fixup of such faults.  PSL_NT
  623                  * does nothing in vm86 mode, but vm86 programs can set it
  624                  * almost legitimately in probes for old cpu types.
  625                  */
  626                 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
  627         }
  628 
  629         /*
  630          * Copy the sigframe out to the user's stack.
  631          */
  632         if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
  633 #ifdef DEBUG
  634                 printf("process %ld has trashed its stack\n", (long)p->p_pid);
  635 #endif
  636                 PROC_LOCK(p);
  637                 sigexit(td, SIGILL);
  638         }
  639 
  640         regs->tf_esp = (int)sfp;
  641         regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
  642         regs->tf_eflags &= ~PSL_T;
  643         regs->tf_cs = _ucodesel;
  644         regs->tf_ds = _udatasel;
  645         regs->tf_es = _udatasel;
  646         regs->tf_fs = _udatasel;
  647         regs->tf_ss = _udatasel;
  648         PROC_LOCK(p);
  649         mtx_lock(&psp->ps_mtx);
  650 }
  651 
  652 /*
  653  * Build siginfo_t for SA thread
  654  */
  655 void
  656 cpu_thread_siginfo(int sig, u_long code, siginfo_t *si)
  657 {
  658         struct proc *p;
  659         struct thread *td;
  660 
  661         td = curthread;
  662         p = td->td_proc;
  663         PROC_LOCK_ASSERT(p, MA_OWNED);
  664 
  665         bzero(si, sizeof(*si));
  666         si->si_signo = sig;
  667         si->si_code = code;
  668         si->si_addr = (void *)td->td_frame->tf_err;
  669         /* XXXKSE fill other fields */
  670 }
  671 
  672 /*
  673  * System call to cleanup state after a signal
  674  * has been taken.  Reset signal mask and
  675  * stack state from context left by sendsig (above).
  676  * Return to previous pc and psl as specified by
  677  * context left by sendsig. Check carefully to
  678  * make sure that the user has not modified the
  679  * state to gain improper privileges.
  680  *
  681  * MPSAFE
  682  */
  683 #ifdef COMPAT_43
  684 int
  685 osigreturn(td, uap)
  686         struct thread *td;
  687         struct osigreturn_args /* {
  688                 struct osigcontext *sigcntxp;
  689         } */ *uap;
  690 {
  691         struct osigcontext sc;
  692         struct trapframe *regs;
  693         struct osigcontext *scp;
  694         struct proc *p = td->td_proc;
  695         int eflags, error;
  696 
  697         regs = td->td_frame;
  698         error = copyin(uap->sigcntxp, &sc, sizeof(sc));
  699         if (error != 0)
  700                 return (error);
  701         scp = &sc;
  702         eflags = scp->sc_ps;
  703         if (eflags & PSL_VM) {
  704                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  705                 struct vm86_kernel *vm86;
  706 
  707                 /*
  708                  * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
  709                  * set up the vm86 area, and we can't enter vm86 mode.
  710                  */
  711                 if (td->td_pcb->pcb_ext == 0)
  712                         return (EINVAL);
  713                 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  714                 if (vm86->vm86_inited == 0)
  715                         return (EINVAL);
  716 
  717                 /* Go back to user mode if both flags are set. */
  718                 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
  719                         trapsignal(td, SIGBUS, 0);
  720 
  721                 if (vm86->vm86_has_vme) {
  722                         eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
  723                             (eflags & VME_USERCHANGE) | PSL_VM;
  724                 } else {
  725                         vm86->vm86_eflags = eflags;     /* save VIF, VIP */
  726                         eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
  727                             (eflags & VM_USERCHANGE) | PSL_VM;
  728                 }
  729                 tf->tf_vm86_ds = scp->sc_ds;
  730                 tf->tf_vm86_es = scp->sc_es;
  731                 tf->tf_vm86_fs = scp->sc_fs;
  732                 tf->tf_vm86_gs = scp->sc_gs;
  733                 tf->tf_ds = _udatasel;
  734                 tf->tf_es = _udatasel;
  735                 tf->tf_fs = _udatasel;
  736         } else {
  737                 /*
  738                  * Don't allow users to change privileged or reserved flags.
  739                  */
  740                 /*
  741                  * XXX do allow users to change the privileged flag PSL_RF.
  742                  * The cpu sets PSL_RF in tf_eflags for faults.  Debuggers
  743                  * should sometimes set it there too.  tf_eflags is kept in
  744                  * the signal context during signal handling and there is no
  745                  * other place to remember it, so the PSL_RF bit may be
  746                  * corrupted by the signal handler without us knowing.
  747                  * Corruption of the PSL_RF bit at worst causes one more or
  748                  * one less debugger trap, so allowing it is fairly harmless.
  749                  */
  750                 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
  751                         return (EINVAL);
  752                 }
  753 
  754                 /*
  755                  * Don't allow users to load a valid privileged %cs.  Let the
  756                  * hardware check for invalid selectors, excess privilege in
  757                  * other selectors, invalid %eip's and invalid %esp's.
  758                  */
  759                 if (!CS_SECURE(scp->sc_cs)) {
  760                         trapsignal(td, SIGBUS, T_PROTFLT);
  761                         return (EINVAL);
  762                 }
  763                 regs->tf_ds = scp->sc_ds;
  764                 regs->tf_es = scp->sc_es;
  765                 regs->tf_fs = scp->sc_fs;
  766         }
  767 
  768         /* Restore remaining registers. */
  769         regs->tf_eax = scp->sc_eax;
  770         regs->tf_ebx = scp->sc_ebx;
  771         regs->tf_ecx = scp->sc_ecx;
  772         regs->tf_edx = scp->sc_edx;
  773         regs->tf_esi = scp->sc_esi;
  774         regs->tf_edi = scp->sc_edi;
  775         regs->tf_cs = scp->sc_cs;
  776         regs->tf_ss = scp->sc_ss;
  777         regs->tf_isp = scp->sc_isp;
  778         regs->tf_ebp = scp->sc_fp;
  779         regs->tf_esp = scp->sc_sp;
  780         regs->tf_eip = scp->sc_pc;
  781         regs->tf_eflags = eflags;
  782 
  783         PROC_LOCK(p);
  784 #if defined(COMPAT_43)
  785         if (scp->sc_onstack & 1)
  786                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  787         else
  788                 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
  789 #endif
  790         SIGSETOLD(td->td_sigmask, scp->sc_mask);
  791         SIG_CANTMASK(td->td_sigmask);
  792         signotify(td);
  793         PROC_UNLOCK(p);
  794         return (EJUSTRETURN);
  795 }
  796 #endif /* COMPAT_43 */
  797 
  798 #ifdef COMPAT_FREEBSD4
  799 /*
  800  * MPSAFE
  801  */
  802 int
  803 freebsd4_sigreturn(td, uap)
  804         struct thread *td;
  805         struct freebsd4_sigreturn_args /* {
  806                 const ucontext4 *sigcntxp;
  807         } */ *uap;
  808 {
  809         struct ucontext4 uc;
  810         struct proc *p = td->td_proc;
  811         struct trapframe *regs;
  812         const struct ucontext4 *ucp;
  813         int cs, eflags, error;
  814 
  815         error = copyin(uap->sigcntxp, &uc, sizeof(uc));
  816         if (error != 0)
  817                 return (error);
  818         ucp = &uc;
  819         regs = td->td_frame;
  820         eflags = ucp->uc_mcontext.mc_eflags;
  821         if (eflags & PSL_VM) {
  822                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  823                 struct vm86_kernel *vm86;
  824 
  825                 /*
  826                  * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
  827                  * set up the vm86 area, and we can't enter vm86 mode.
  828                  */
  829                 if (td->td_pcb->pcb_ext == 0)
  830                         return (EINVAL);
  831                 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  832                 if (vm86->vm86_inited == 0)
  833                         return (EINVAL);
  834 
  835                 /* Go back to user mode if both flags are set. */
  836                 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
  837                         trapsignal(td, SIGBUS, 0);
  838 
  839                 if (vm86->vm86_has_vme) {
  840                         eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
  841                             (eflags & VME_USERCHANGE) | PSL_VM;
  842                 } else {
  843                         vm86->vm86_eflags = eflags;     /* save VIF, VIP */
  844                         eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
  845                             (eflags & VM_USERCHANGE) | PSL_VM;
  846                 }
  847                 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
  848                 tf->tf_eflags = eflags;
  849                 tf->tf_vm86_ds = tf->tf_ds;
  850                 tf->tf_vm86_es = tf->tf_es;
  851                 tf->tf_vm86_fs = tf->tf_fs;
  852                 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
  853                 tf->tf_ds = _udatasel;
  854                 tf->tf_es = _udatasel;
  855                 tf->tf_fs = _udatasel;
  856         } else {
  857                 /*
  858                  * Don't allow users to change privileged or reserved flags.
  859                  */
  860                 /*
  861                  * XXX do allow users to change the privileged flag PSL_RF.
  862                  * The cpu sets PSL_RF in tf_eflags for faults.  Debuggers
  863                  * should sometimes set it there too.  tf_eflags is kept in
  864                  * the signal context during signal handling and there is no
  865                  * other place to remember it, so the PSL_RF bit may be
  866                  * corrupted by the signal handler without us knowing.
  867                  * Corruption of the PSL_RF bit at worst causes one more or
  868                  * one less debugger trap, so allowing it is fairly harmless.
  869                  */
  870                 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
  871                         printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags);
  872                         return (EINVAL);
  873                 }
  874 
  875                 /*
  876                  * Don't allow users to load a valid privileged %cs.  Let the
  877                  * hardware check for invalid selectors, excess privilege in
  878                  * other selectors, invalid %eip's and invalid %esp's.
  879                  */
  880                 cs = ucp->uc_mcontext.mc_cs;
  881                 if (!CS_SECURE(cs)) {
  882                         printf("freebsd4_sigreturn: cs = 0x%x\n", cs);
  883                         trapsignal(td, SIGBUS, T_PROTFLT);
  884                         return (EINVAL);
  885                 }
  886 
  887                 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
  888         }
  889 
  890         PROC_LOCK(p);
  891 #if defined(COMPAT_43)
  892         if (ucp->uc_mcontext.mc_onstack & 1)
  893                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  894         else
  895                 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
  896 #endif
  897 
  898         td->td_sigmask = ucp->uc_sigmask;
  899         SIG_CANTMASK(td->td_sigmask);
  900         signotify(td);
  901         PROC_UNLOCK(p);
  902         return (EJUSTRETURN);
  903 }
  904 #endif  /* COMPAT_FREEBSD4 */
  905 
  906 /*
  907  * MPSAFE
  908  */
  909 int
  910 sigreturn(td, uap)
  911         struct thread *td;
  912         struct sigreturn_args /* {
  913                 const __ucontext *sigcntxp;
  914         } */ *uap;
  915 {
  916         ucontext_t uc;
  917         struct proc *p = td->td_proc;
  918         struct trapframe *regs;
  919         const ucontext_t *ucp;
  920         int cs, eflags, error, ret;
  921 
  922         error = copyin(uap->sigcntxp, &uc, sizeof(uc));
  923         if (error != 0)
  924                 return (error);
  925         ucp = &uc;
  926         regs = td->td_frame;
  927         eflags = ucp->uc_mcontext.mc_eflags;
  928         if (eflags & PSL_VM) {
  929                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  930                 struct vm86_kernel *vm86;
  931 
  932                 /*
  933                  * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
  934                  * set up the vm86 area, and we can't enter vm86 mode.
  935                  */
  936                 if (td->td_pcb->pcb_ext == 0)
  937                         return (EINVAL);
  938                 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  939                 if (vm86->vm86_inited == 0)
  940                         return (EINVAL);
  941 
  942                 /* Go back to user mode if both flags are set. */
  943                 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
  944                         trapsignal(td, SIGBUS, 0);
  945 
  946                 if (vm86->vm86_has_vme) {
  947                         eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
  948                             (eflags & VME_USERCHANGE) | PSL_VM;
  949                 } else {
  950                         vm86->vm86_eflags = eflags;     /* save VIF, VIP */
  951                         eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
  952                             (eflags & VM_USERCHANGE) | PSL_VM;
  953                 }
  954                 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
  955                 tf->tf_eflags = eflags;
  956                 tf->tf_vm86_ds = tf->tf_ds;
  957                 tf->tf_vm86_es = tf->tf_es;
  958                 tf->tf_vm86_fs = tf->tf_fs;
  959                 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
  960                 tf->tf_ds = _udatasel;
  961                 tf->tf_es = _udatasel;
  962                 tf->tf_fs = _udatasel;
  963         } else {
  964                 /*
  965                  * Don't allow users to change privileged or reserved flags.
  966                  */
  967                 /*
  968                  * XXX do allow users to change the privileged flag PSL_RF.
  969                  * The cpu sets PSL_RF in tf_eflags for faults.  Debuggers
  970                  * should sometimes set it there too.  tf_eflags is kept in
  971                  * the signal context during signal handling and there is no
  972                  * other place to remember it, so the PSL_RF bit may be
  973                  * corrupted by the signal handler without us knowing.
  974                  * Corruption of the PSL_RF bit at worst causes one more or
  975                  * one less debugger trap, so allowing it is fairly harmless.
  976                  */
  977                 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
  978                         printf("sigreturn: eflags = 0x%x\n", eflags);
  979                         return (EINVAL);
  980                 }
  981 
  982                 /*
  983                  * Don't allow users to load a valid privileged %cs.  Let the
  984                  * hardware check for invalid selectors, excess privilege in
  985                  * other selectors, invalid %eip's and invalid %esp's.
  986                  */
  987                 cs = ucp->uc_mcontext.mc_cs;
  988                 if (!CS_SECURE(cs)) {
  989                         printf("sigreturn: cs = 0x%x\n", cs);
  990                         trapsignal(td, SIGBUS, T_PROTFLT);
  991                         return (EINVAL);
  992                 }
  993 
  994                 ret = set_fpcontext(td, &ucp->uc_mcontext);
  995                 if (ret != 0)
  996                         return (ret);
  997                 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
  998         }
  999 
 1000         PROC_LOCK(p);
 1001 #if defined(COMPAT_43)
 1002         if (ucp->uc_mcontext.mc_onstack & 1)
 1003                 td->td_sigstk.ss_flags |= SS_ONSTACK;
 1004         else
 1005                 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
 1006 #endif
 1007 
 1008         td->td_sigmask = ucp->uc_sigmask;
 1009         SIG_CANTMASK(td->td_sigmask);
 1010         signotify(td);
 1011         PROC_UNLOCK(p);
 1012         return (EJUSTRETURN);
 1013 }
 1014 
 1015 /*
 1016  * Machine dependent boot() routine
 1017  *
 1018  * I haven't seen anything to put here yet
 1019  * Possibly some stuff might be grafted back here from boot()
 1020  */
 1021 void
 1022 cpu_boot(int howto)
 1023 {
 1024 }
 1025 
 1026 /* Get current clock frequency for the given cpu id. */
 1027 int
 1028 cpu_est_clockrate(int cpu_id, uint64_t *rate)
 1029 {
 1030         register_t reg;
 1031         uint64_t tsc1, tsc2;
 1032 
 1033         if (pcpu_find(cpu_id) == NULL || rate == NULL)
 1034                 return (EINVAL);
 1035         if (!tsc_present)
 1036                 return (EOPNOTSUPP);
 1037 
 1038         /* If we're booting, trust the rate calibrated moments ago. */
 1039         if (cold) {
 1040                 *rate = tsc_freq;
 1041                 return (0);
 1042         }
 1043 
 1044 #ifdef SMP
 1045         /* Schedule ourselves on the indicated cpu. */
 1046         mtx_lock_spin(&sched_lock);
 1047         sched_bind(curthread, cpu_id);
 1048         mtx_unlock_spin(&sched_lock);
 1049 #endif
 1050 
 1051         /* Calibrate by measuring a short delay. */
 1052         reg = intr_disable();
 1053         tsc1 = rdtsc();
 1054         DELAY(1000);
 1055         tsc2 = rdtsc();
 1056         intr_restore(reg);
 1057 
 1058 #ifdef SMP
 1059         mtx_lock_spin(&sched_lock);
 1060         sched_unbind(curthread);
 1061         mtx_unlock_spin(&sched_lock);
 1062 #endif
 1063 
 1064         /*
 1065          * Calculate the difference in readings, convert to Mhz, and
 1066          * subtract 0.5% of the total.  Empirical testing has shown that
 1067          * overhead in DELAY() works out to approximately this value.
 1068          */
 1069         tsc2 -= tsc1;
 1070         *rate = tsc2 * 1000 - tsc2 * 5;
 1071         return (0);
 1072 }
 1073 
 1074 /*
 1075  * Shutdown the CPU as much as possible
 1076  */
 1077 void
 1078 cpu_halt(void)
 1079 {
 1080         for (;;)
 1081                 __asm__ ("hlt");
 1082 }
 1083 
 1084 /*
 1085  * Hook to idle the CPU when possible.  In the SMP case we default to
 1086  * off because a halted cpu will not currently pick up a new thread in the
 1087  * run queue until the next timer tick.  If turned on this will result in
 1088  * approximately a 4.2% loss in real time performance in buildworld tests
 1089  * (but improves user and sys times oddly enough), and saves approximately
 1090  * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3).
 1091  *
 1092  * XXX we need to have a cpu mask of idle cpus and generate an IPI or
 1093  * otherwise generate some sort of interrupt to wake up cpus sitting in HLT.
 1094  * Then we can have our cake and eat it too.
 1095  *
 1096  * XXX I'm turning it on for SMP as well by default for now.  It seems to
 1097  * help lock contention somewhat, and this is critical for HTT. -Peter
 1098  */
 1099 static int      cpu_idle_hlt = 1;
 1100 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
 1101     &cpu_idle_hlt, 0, "Idle loop HLT enable");
 1102 
 1103 static void
 1104 cpu_idle_default(void)
 1105 {
 1106         /*
 1107          * we must absolutely guarentee that hlt is the
 1108          * absolute next instruction after sti or we
 1109          * introduce a timing window.
 1110          */
 1111         __asm __volatile("sti; hlt");
 1112 }
 1113 
 1114 /*
 1115  * Note that we have to be careful here to avoid a race between checking
 1116  * sched_runnable() and actually halting.  If we don't do this, we may waste
 1117  * the time between calling hlt and the next interrupt even though there
 1118  * is a runnable process.
 1119  */
 1120 void
 1121 cpu_idle(void)
 1122 {
 1123 
 1124 #ifdef SMP
 1125         if (mp_grab_cpu_hlt())
 1126                 return;
 1127 #endif
 1128 
 1129         if (cpu_idle_hlt) {
 1130                 disable_intr();
 1131                 if (sched_runnable())
 1132                         enable_intr();
 1133                 else
 1134                         (*cpu_idle_hook)();
 1135         }
 1136 }
 1137 
 1138 /* Other subsystems (e.g., ACPI) can hook this later. */
 1139 void (*cpu_idle_hook)(void) = cpu_idle_default;
 1140 
 1141 /*
 1142  * Clear registers on exec
 1143  */
 1144 void
 1145 exec_setregs(td, entry, stack, ps_strings)
 1146         struct thread *td;
 1147         u_long entry;
 1148         u_long stack;
 1149         u_long ps_strings;
 1150 {
 1151         struct trapframe *regs = td->td_frame;
 1152         struct pcb *pcb = td->td_pcb;
 1153 
 1154         /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
 1155         pcb->pcb_gs = _udatasel;
 1156         load_gs(_udatasel);
 1157 
 1158         if (td->td_proc->p_md.md_ldt)
 1159                 user_ldt_free(td);
 1160   
 1161         bzero((char *)regs, sizeof(struct trapframe));
 1162         regs->tf_eip = entry;
 1163         regs->tf_esp = stack;
 1164         regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
 1165         regs->tf_ss = _udatasel;
 1166         regs->tf_ds = _udatasel;
 1167         regs->tf_es = _udatasel;
 1168         regs->tf_fs = _udatasel;
 1169         regs->tf_cs = _ucodesel;
 1170 
 1171         /* PS_STRINGS value for BSD/OS binaries.  It is 0 for non-BSD/OS. */
 1172         regs->tf_ebx = ps_strings;
 1173 
 1174         /*
 1175          * Reset the hardware debug registers if they were in use.
 1176          * They won't have any meaning for the newly exec'd process.  
 1177          */
 1178         if (pcb->pcb_flags & PCB_DBREGS) {
 1179                 pcb->pcb_dr0 = 0;
 1180                 pcb->pcb_dr1 = 0;
 1181                 pcb->pcb_dr2 = 0;
 1182                 pcb->pcb_dr3 = 0;
 1183                 pcb->pcb_dr6 = 0;
 1184                 pcb->pcb_dr7 = 0;
 1185                 if (pcb == PCPU_GET(curpcb)) {
 1186                         /*
 1187                          * Clear the debug registers on the running
 1188                          * CPU, otherwise they will end up affecting
 1189                          * the next process we switch to.
 1190                          */
 1191                         reset_dbregs();
 1192                 }
 1193                 pcb->pcb_flags &= ~PCB_DBREGS;
 1194         }
 1195 
 1196         /*
 1197          * Initialize the math emulator (if any) for the current process.
 1198          * Actually, just clear the bit that says that the emulator has
 1199          * been initialized.  Initialization is delayed until the process
 1200          * traps to the emulator (if it is done at all) mainly because
 1201          * emulators don't provide an entry point for initialization.
 1202          */
 1203         td->td_pcb->pcb_flags &= ~FP_SOFTFP;
 1204 
 1205         /*
 1206          * Drop the FP state if we hold it, so that the process gets a
 1207          * clean FP state if it uses the FPU again.
 1208          */
 1209         fpstate_drop(td);
 1210 
 1211         /*
 1212          * XXX - Linux emulator
 1213          * Make sure sure edx is 0x0 on entry. Linux binaries depend
 1214          * on it.
 1215          */
 1216         td->td_retval[1] = 0;
 1217 }
 1218 
 1219 void
 1220 cpu_setregs(void)
 1221 {
 1222         unsigned int cr0;
 1223 
 1224         cr0 = rcr0();
 1225         /*
 1226          * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
 1227          * BSP.  See the comments there about why we set them.
 1228          */
 1229         cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
 1230         load_cr0(cr0);
 1231         load_gs(_udatasel);
 1232 }
 1233 
 1234 static int
 1235 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
 1236 {
 1237         int error;
 1238         error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
 1239                 req);
 1240         if (!error && req->newptr)
 1241                 resettodr();
 1242         return (error);
 1243 }
 1244 
 1245 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
 1246         &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
 1247 
 1248 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
 1249         CTLFLAG_RW, &disable_rtc_set, 0, "");
 1250 
 1251 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 
 1252         CTLFLAG_RD, &bootinfo, bootinfo, "");
 1253 
 1254 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
 1255         CTLFLAG_RW, &wall_cmos_clock, 0, "");
 1256 
 1257 u_long bootdev;         /* not a struct cdev *- encoding is different */
 1258 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
 1259         CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
 1260 
 1261 /*
 1262  * Initialize 386 and configure to run kernel
 1263  */
 1264 
 1265 /*
 1266  * Initialize segments & interrupt table
 1267  */
 1268 
 1269 int _default_ldt;
 1270 union descriptor gdt[NGDT * MAXCPU];    /* global descriptor table */
 1271 static struct gate_descriptor idt0[NIDT];
 1272 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
 1273 union descriptor ldt[NLDT];             /* local descriptor table */
 1274 struct region_descriptor r_gdt, r_idt;  /* table descriptors */
 1275 
 1276 int private_tss;                        /* flag indicating private tss */
 1277 
 1278 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
 1279 extern int has_f00f_bug;
 1280 #endif
 1281 
 1282 static struct i386tss dblfault_tss;
 1283 static char dblfault_stack[PAGE_SIZE];
 1284 
 1285 extern  vm_offset_t     proc0kstack;
 1286 
 1287 
 1288 /*
 1289  * software prototypes -- in more palatable form.
 1290  *
 1291  * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
 1292  * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
 1293  */
 1294 struct soft_segment_descriptor gdt_segs[] = {
 1295 /* GNULL_SEL    0 Null Descriptor */
 1296 {       0x0,                    /* segment base address  */
 1297         0x0,                    /* length */
 1298         0,                      /* segment type */
 1299         0,                      /* segment descriptor priority level */
 1300         0,                      /* segment descriptor present */
 1301         0, 0,
 1302         0,                      /* default 32 vs 16 bit size */
 1303         0                       /* limit granularity (byte/page units)*/ },
 1304 /* GPRIV_SEL    1 SMP Per-Processor Private Data Descriptor */
 1305 {       0x0,                    /* segment base address  */
 1306         0xfffff,                /* length - all address space */
 1307         SDT_MEMRWA,             /* segment type */
 1308         0,                      /* segment descriptor priority level */
 1309         1,                      /* segment descriptor present */
 1310         0, 0,
 1311         1,                      /* default 32 vs 16 bit size */
 1312         1                       /* limit granularity (byte/page units)*/ },
 1313 /* GUFS_SEL     2 %fs Descriptor for user */
 1314 {       0x0,                    /* segment base address  */
 1315         0xfffff,                /* length - all address space */
 1316         SDT_MEMRWA,             /* segment type */
 1317         SEL_UPL,                /* segment descriptor priority level */
 1318         1,                      /* segment descriptor present */
 1319         0, 0,
 1320         1,                      /* default 32 vs 16 bit size */
 1321         1                       /* limit granularity (byte/page units)*/ },
 1322 /* GUGS_SEL     3 %gs Descriptor for user */
 1323 {       0x0,                    /* segment base address  */
 1324         0xfffff,                /* length - all address space */
 1325         SDT_MEMRWA,             /* segment type */
 1326         SEL_UPL,                /* segment descriptor priority level */
 1327         1,                      /* segment descriptor present */
 1328         0, 0,
 1329         1,                      /* default 32 vs 16 bit size */
 1330         1                       /* limit granularity (byte/page units)*/ },
 1331 /* GCODE_SEL    4 Code Descriptor for kernel */
 1332 {       0x0,                    /* segment base address  */
 1333         0xfffff,                /* length - all address space */
 1334         SDT_MEMERA,             /* segment type */
 1335         0,                      /* segment descriptor priority level */
 1336         1,                      /* segment descriptor present */
 1337         0, 0,
 1338         1,                      /* default 32 vs 16 bit size */
 1339         1                       /* limit granularity (byte/page units)*/ },
 1340 /* GDATA_SEL    5 Data Descriptor for kernel */
 1341 {       0x0,                    /* segment base address  */
 1342         0xfffff,                /* length - all address space */
 1343         SDT_MEMRWA,             /* segment type */
 1344         0,                      /* segment descriptor priority level */
 1345         1,                      /* segment descriptor present */
 1346         0, 0,
 1347         1,                      /* default 32 vs 16 bit size */
 1348         1                       /* limit granularity (byte/page units)*/ },
 1349 /* GUCODE_SEL   6 Code Descriptor for user */
 1350 {       0x0,                    /* segment base address  */
 1351         0xfffff,                /* length - all address space */
 1352         SDT_MEMERA,             /* segment type */
 1353         SEL_UPL,                /* segment descriptor priority level */
 1354         1,                      /* segment descriptor present */
 1355         0, 0,
 1356         1,                      /* default 32 vs 16 bit size */
 1357         1                       /* limit granularity (byte/page units)*/ },
 1358 /* GUDATA_SEL   7 Data Descriptor for user */
 1359 {       0x0,                    /* segment base address  */
 1360         0xfffff,                /* length - all address space */
 1361         SDT_MEMRWA,             /* segment type */
 1362         SEL_UPL,                /* segment descriptor priority level */
 1363         1,                      /* segment descriptor present */
 1364         0, 0,
 1365         1,                      /* default 32 vs 16 bit size */
 1366         1                       /* limit granularity (byte/page units)*/ },
 1367 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
 1368 {       0x400,                  /* segment base address */
 1369         0xfffff,                /* length */
 1370         SDT_MEMRWA,             /* segment type */
 1371         0,                      /* segment descriptor priority level */
 1372         1,                      /* segment descriptor present */
 1373         0, 0,
 1374         1,                      /* default 32 vs 16 bit size */
 1375         1                       /* limit granularity (byte/page units)*/ },
 1376 /* GPROC0_SEL   9 Proc 0 Tss Descriptor */
 1377 {
 1378         0x0,                    /* segment base address */
 1379         sizeof(struct i386tss)-1,/* length  */
 1380         SDT_SYS386TSS,          /* segment type */
 1381         0,                      /* segment descriptor priority level */
 1382         1,                      /* segment descriptor present */
 1383         0, 0,
 1384         0,                      /* unused - default 32 vs 16 bit size */
 1385         0                       /* limit granularity (byte/page units)*/ },
 1386 /* GLDT_SEL     10 LDT Descriptor */
 1387 {       (int) ldt,              /* segment base address  */
 1388         sizeof(ldt)-1,          /* length - all address space */
 1389         SDT_SYSLDT,             /* segment type */
 1390         SEL_UPL,                /* segment descriptor priority level */
 1391         1,                      /* segment descriptor present */
 1392         0, 0,
 1393         0,                      /* unused - default 32 vs 16 bit size */
 1394         0                       /* limit granularity (byte/page units)*/ },
 1395 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
 1396 {       (int) ldt,              /* segment base address  */
 1397         (512 * sizeof(union descriptor)-1),             /* length */
 1398         SDT_SYSLDT,             /* segment type */
 1399         0,                      /* segment descriptor priority level */
 1400         1,                      /* segment descriptor present */
 1401         0, 0,
 1402         0,                      /* unused - default 32 vs 16 bit size */
 1403         0                       /* limit granularity (byte/page units)*/ },
 1404 /* GPANIC_SEL   12 Panic Tss Descriptor */
 1405 {       (int) &dblfault_tss,    /* segment base address  */
 1406         sizeof(struct i386tss)-1,/* length - all address space */
 1407         SDT_SYS386TSS,          /* segment type */
 1408         0,                      /* segment descriptor priority level */
 1409         1,                      /* segment descriptor present */
 1410         0, 0,
 1411         0,                      /* unused - default 32 vs 16 bit size */
 1412         0                       /* limit granularity (byte/page units)*/ },
 1413 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
 1414 {       0,                      /* segment base address (overwritten)  */
 1415         0xfffff,                /* length */
 1416         SDT_MEMERA,             /* segment type */
 1417         0,                      /* segment descriptor priority level */
 1418         1,                      /* segment descriptor present */
 1419         0, 0,
 1420         0,                      /* default 32 vs 16 bit size */
 1421         1                       /* limit granularity (byte/page units)*/ },
 1422 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
 1423 {       0,                      /* segment base address (overwritten)  */
 1424         0xfffff,                /* length */
 1425         SDT_MEMERA,             /* segment type */
 1426         0,                      /* segment descriptor priority level */
 1427         1,                      /* segment descriptor present */
 1428         0, 0,
 1429         0,                      /* default 32 vs 16 bit size */
 1430         1                       /* limit granularity (byte/page units)*/ },
 1431 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
 1432 {       0,                      /* segment base address (overwritten) */
 1433         0xfffff,                /* length */
 1434         SDT_MEMRWA,             /* segment type */
 1435         0,                      /* segment descriptor priority level */
 1436         1,                      /* segment descriptor present */
 1437         0, 0,
 1438         1,                      /* default 32 vs 16 bit size */
 1439         1                       /* limit granularity (byte/page units)*/ },
 1440 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
 1441 {       0,                      /* segment base address (overwritten) */
 1442         0xfffff,                /* length */
 1443         SDT_MEMRWA,             /* segment type */
 1444         0,                      /* segment descriptor priority level */
 1445         1,                      /* segment descriptor present */
 1446         0, 0,
 1447         0,                      /* default 32 vs 16 bit size */
 1448         1                       /* limit granularity (byte/page units)*/ },
 1449 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
 1450 {       0,                      /* segment base address (overwritten) */
 1451         0xfffff,                /* length */
 1452         SDT_MEMRWA,             /* segment type */
 1453         0,                      /* segment descriptor priority level */
 1454         1,                      /* segment descriptor present */
 1455         0, 0,
 1456         0,                      /* default 32 vs 16 bit size */
 1457         1                       /* limit granularity (byte/page units)*/ },
 1458 /* GNDIS_SEL    18 NDIS Descriptor */
 1459 {       0x0,                    /* segment base address  */
 1460         0x0,                    /* length */
 1461         0,                      /* segment type */
 1462         0,                      /* segment descriptor priority level */
 1463         0,                      /* segment descriptor present */
 1464         0, 0,
 1465         0,                      /* default 32 vs 16 bit size */
 1466         0                       /* limit granularity (byte/page units)*/ },
 1467 };
 1468 
 1469 static struct soft_segment_descriptor ldt_segs[] = {
 1470         /* Null Descriptor - overwritten by call gate */
 1471 {       0x0,                    /* segment base address  */
 1472         0x0,                    /* length - all address space */
 1473         0,                      /* segment type */
 1474         0,                      /* segment descriptor priority level */
 1475         0,                      /* segment descriptor present */
 1476         0, 0,
 1477         0,                      /* default 32 vs 16 bit size */
 1478         0                       /* limit granularity (byte/page units)*/ },
 1479         /* Null Descriptor - overwritten by call gate */
 1480 {       0x0,                    /* segment base address  */
 1481         0x0,                    /* length - all address space */
 1482         0,                      /* segment type */
 1483         0,                      /* segment descriptor priority level */
 1484         0,                      /* segment descriptor present */
 1485         0, 0,
 1486         0,                      /* default 32 vs 16 bit size */
 1487         0                       /* limit granularity (byte/page units)*/ },
 1488         /* Null Descriptor - overwritten by call gate */
 1489 {       0x0,                    /* segment base address  */
 1490         0x0,                    /* length - all address space */
 1491         0,                      /* segment type */
 1492         0,                      /* segment descriptor priority level */
 1493         0,                      /* segment descriptor present */
 1494         0, 0,
 1495         0,                      /* default 32 vs 16 bit size */
 1496         0                       /* limit granularity (byte/page units)*/ },
 1497         /* Code Descriptor for user */
 1498 {       0x0,                    /* segment base address  */
 1499         0xfffff,                /* length - all address space */
 1500         SDT_MEMERA,             /* segment type */
 1501         SEL_UPL,                /* segment descriptor priority level */
 1502         1,                      /* segment descriptor present */
 1503         0, 0,
 1504         1,                      /* default 32 vs 16 bit size */
 1505         1                       /* limit granularity (byte/page units)*/ },
 1506         /* Null Descriptor - overwritten by call gate */
 1507 {       0x0,                    /* segment base address  */
 1508         0x0,                    /* length - all address space */
 1509         0,                      /* segment type */
 1510         0,                      /* segment descriptor priority level */
 1511         0,                      /* segment descriptor present */
 1512         0, 0,
 1513         0,                      /* default 32 vs 16 bit size */
 1514         0                       /* limit granularity (byte/page units)*/ },
 1515         /* Data Descriptor for user */
 1516 {       0x0,                    /* segment base address  */
 1517         0xfffff,                /* length - all address space */
 1518         SDT_MEMRWA,             /* segment type */
 1519         SEL_UPL,                /* segment descriptor priority level */
 1520         1,                      /* segment descriptor present */
 1521         0, 0,
 1522         1,                      /* default 32 vs 16 bit size */
 1523         1                       /* limit granularity (byte/page units)*/ },
 1524 };
 1525 
 1526 void
 1527 setidt(idx, func, typ, dpl, selec)
 1528         int idx;
 1529         inthand_t *func;
 1530         int typ;
 1531         int dpl;
 1532         int selec;
 1533 {
 1534         struct gate_descriptor *ip;
 1535 
 1536         ip = idt + idx;
 1537         ip->gd_looffset = (int)func;
 1538         ip->gd_selector = selec;
 1539         ip->gd_stkcpy = 0;
 1540         ip->gd_xx = 0;
 1541         ip->gd_type = typ;
 1542         ip->gd_dpl = dpl;
 1543         ip->gd_p = 1;
 1544         ip->gd_hioffset = ((int)func)>>16 ;
 1545 }
 1546 
 1547 #define IDTVEC(name)    __CONCAT(X,name)
 1548 
 1549 extern inthand_t
 1550         IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
 1551         IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
 1552         IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
 1553         IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
 1554         IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
 1555 
 1556 #ifdef DDB
 1557 /*
 1558  * Display the index and function name of any IDT entries that don't use
 1559  * the default 'rsvd' entry point.
 1560  */
 1561 DB_SHOW_COMMAND(idt, db_show_idt)
 1562 {
 1563         struct gate_descriptor *ip;
 1564         int idx, quit;
 1565         uintptr_t func;
 1566 
 1567         ip = idt;
 1568         db_setup_paging(db_simple_pager, &quit, db_lines_per_page);
 1569         for (idx = 0, quit = 0; idx < NIDT; idx++) {
 1570                 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
 1571                 if (func != (uintptr_t)&IDTVEC(rsvd)) {
 1572                         db_printf("%3d\t", idx);
 1573                         db_printsym(func, DB_STGY_PROC);
 1574                         db_printf("\n");
 1575                 }
 1576                 ip++;
 1577         }
 1578 }
 1579 #endif
 1580 
 1581 void
 1582 sdtossd(sd, ssd)
 1583         struct segment_descriptor *sd;
 1584         struct soft_segment_descriptor *ssd;
 1585 {
 1586         ssd->ssd_base  = (sd->sd_hibase << 24) | sd->sd_lobase;
 1587         ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
 1588         ssd->ssd_type  = sd->sd_type;
 1589         ssd->ssd_dpl   = sd->sd_dpl;
 1590         ssd->ssd_p     = sd->sd_p;
 1591         ssd->ssd_def32 = sd->sd_def32;
 1592         ssd->ssd_gran  = sd->sd_gran;
 1593 }
 1594 
 1595 #define PHYSMAP_SIZE    (2 * 8)
 1596 
 1597 /*
 1598  * Populate the (physmap) array with base/bound pairs describing the
 1599  * available physical memory in the system, then test this memory and
 1600  * build the phys_avail array describing the actually-available memory.
 1601  *
 1602  * If we cannot accurately determine the physical memory map, then use
 1603  * value from the 0xE801 call, and failing that, the RTC.
 1604  *
 1605  * Total memory size may be set by the kernel environment variable
 1606  * hw.physmem or the compile-time define MAXMEM.
 1607  *
 1608  * XXX first should be vm_paddr_t.
 1609  */
 1610 static void
 1611 getmemsize(int first)
 1612 {
 1613         int i, physmap_idx, pa_indx, da_indx;
 1614         int hasbrokenint12;
 1615         u_long physmem_tunable;
 1616         u_int extmem;
 1617         struct vm86frame vmf;
 1618         struct vm86context vmc;
 1619         vm_paddr_t pa, physmap[PHYSMAP_SIZE];
 1620         pt_entry_t *pte;
 1621         struct bios_smap *smap;
 1622         quad_t dcons_addr, dcons_size;
 1623 
 1624         hasbrokenint12 = 0;
 1625         TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
 1626         bzero(&vmf, sizeof(vmf));
 1627         bzero(physmap, sizeof(physmap));
 1628         basemem = 0;
 1629 
 1630         /*
 1631          * Some newer BIOSes has broken INT 12H implementation which cause
 1632          * kernel panic immediately. In this case, we need to scan SMAP
 1633          * with INT 15:E820 first, then determine base memory size.
 1634          */
 1635         if (hasbrokenint12) {
 1636                 goto int15e820;
 1637         }
 1638 
 1639         /*
 1640          * Perform "base memory" related probes & setup
 1641          */
 1642         vm86_intcall(0x12, &vmf);
 1643         basemem = vmf.vmf_ax;
 1644         if (basemem > 640) {
 1645                 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
 1646                         basemem);
 1647                 basemem = 640;
 1648         }
 1649 
 1650         /*
 1651          * XXX if biosbasemem is now < 640, there is a `hole'
 1652          * between the end of base memory and the start of
 1653          * ISA memory.  The hole may be empty or it may
 1654          * contain BIOS code or data.  Map it read/write so
 1655          * that the BIOS can write to it.  (Memory from 0 to
 1656          * the physical end of the kernel is mapped read-only
 1657          * to begin with and then parts of it are remapped.
 1658          * The parts that aren't remapped form holes that
 1659          * remain read-only and are unused by the kernel.
 1660          * The base memory area is below the physical end of
 1661          * the kernel and right now forms a read-only hole.
 1662          * The part of it from PAGE_SIZE to
 1663          * (trunc_page(biosbasemem * 1024) - 1) will be
 1664          * remapped and used by the kernel later.)
 1665          *
 1666          * This code is similar to the code used in
 1667          * pmap_mapdev, but since no memory needs to be
 1668          * allocated we simply change the mapping.
 1669          */
 1670         for (pa = trunc_page(basemem * 1024);
 1671              pa < ISA_HOLE_START; pa += PAGE_SIZE)
 1672                 pmap_kenter(KERNBASE + pa, pa);
 1673 
 1674         /*
 1675          * Map pages between basemem and ISA_HOLE_START, if any, r/w into
 1676          * the vm86 page table so that vm86 can scribble on them using
 1677          * the vm86 map too.  XXX: why 2 ways for this and only 1 way for
 1678          * page 0, at least as initialized here?
 1679          */
 1680         pte = (pt_entry_t *)vm86paddr;
 1681         for (i = basemem / 4; i < 160; i++)
 1682                 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
 1683 
 1684 int15e820:
 1685         /*
 1686          * map page 1 R/W into the kernel page table so we can use it
 1687          * as a buffer.  The kernel will unmap this page later.
 1688          */
 1689         pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
 1690 
 1691         /*
 1692          * get memory map with INT 15:E820
 1693          */
 1694         vmc.npages = 0;
 1695         smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
 1696         vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
 1697 
 1698         physmap_idx = 0;
 1699         vmf.vmf_ebx = 0;
 1700         do {
 1701                 vmf.vmf_eax = 0xE820;
 1702                 vmf.vmf_edx = SMAP_SIG;
 1703                 vmf.vmf_ecx = sizeof(struct bios_smap);
 1704                 i = vm86_datacall(0x15, &vmf, &vmc);
 1705                 if (i || vmf.vmf_eax != SMAP_SIG)
 1706                         break;
 1707                 if (boothowto & RB_VERBOSE)
 1708                         printf("SMAP type=%02x base=%016llx len=%016llx\n",
 1709                             smap->type, smap->base, smap->length);
 1710 
 1711                 if (smap->type != 0x01)
 1712                         continue;
 1713 
 1714                 if (smap->length == 0)
 1715                         continue;
 1716 
 1717 #ifndef PAE
 1718                 if (smap->base >= 0xffffffff) {
 1719                         printf("%uK of memory above 4GB ignored\n",
 1720                             (u_int)(smap->length / 1024));
 1721                         continue;
 1722                 }
 1723 #endif
 1724 
 1725                 for (i = 0; i <= physmap_idx; i += 2) {
 1726                         if (smap->base < physmap[i + 1]) {
 1727                                 if (boothowto & RB_VERBOSE)
 1728                                         printf(
 1729         "Overlapping or non-montonic memory region, ignoring second region\n");
 1730                                 continue;
 1731                         }
 1732                 }
 1733 
 1734                 if (smap->base == physmap[physmap_idx + 1]) {
 1735                         physmap[physmap_idx + 1] += smap->length;
 1736                         continue;
 1737                 }
 1738 
 1739                 physmap_idx += 2;
 1740                 if (physmap_idx == PHYSMAP_SIZE) {
 1741                         printf(
 1742                 "Too many segments in the physical address map, giving up\n");
 1743                         break;
 1744                 }
 1745                 physmap[physmap_idx] = smap->base;
 1746                 physmap[physmap_idx + 1] = smap->base + smap->length;
 1747         } while (vmf.vmf_ebx != 0);
 1748 
 1749         /*
 1750          * Perform "base memory" related probes & setup based on SMAP
 1751          */
 1752         if (basemem == 0) {
 1753                 for (i = 0; i <= physmap_idx; i += 2) {
 1754                         if (physmap[i] == 0x00000000) {
 1755                                 basemem = physmap[i + 1] / 1024;
 1756                                 break;
 1757                         }
 1758                 }
 1759 
 1760                 /*
 1761                  * XXX this function is horribly organized and has to the same
 1762                  * things that it does above here.
 1763                  */
 1764                 if (basemem == 0)
 1765                         basemem = 640;
 1766                 if (basemem > 640) {
 1767                         printf(
 1768                     "Preposterous BIOS basemem of %uK, truncating to 640K\n",
 1769                             basemem);
 1770                         basemem = 640;
 1771                 }
 1772 
 1773                 /*
 1774                  * Let vm86 scribble on pages between basemem and
 1775                  * ISA_HOLE_START, as above.
 1776                  */
 1777                 for (pa = trunc_page(basemem * 1024);
 1778                      pa < ISA_HOLE_START; pa += PAGE_SIZE)
 1779                         pmap_kenter(KERNBASE + pa, pa);
 1780                 pte = (pt_entry_t *)vm86paddr;
 1781                 for (i = basemem / 4; i < 160; i++)
 1782                         pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
 1783         }
 1784 
 1785         if (physmap[1] != 0)
 1786                 goto physmap_done;
 1787 
 1788         /*
 1789          * If we failed above, try memory map with INT 15:E801
 1790          */
 1791         vmf.vmf_ax = 0xE801;
 1792         if (vm86_intcall(0x15, &vmf) == 0) {
 1793                 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
 1794         } else {
 1795 #if 0
 1796                 vmf.vmf_ah = 0x88;
 1797                 vm86_intcall(0x15, &vmf);
 1798                 extmem = vmf.vmf_ax;
 1799 #else
 1800                 /*
 1801                  * Prefer the RTC value for extended memory.
 1802                  */
 1803                 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
 1804 #endif
 1805         }
 1806 
 1807         /*
 1808          * Special hack for chipsets that still remap the 384k hole when
 1809          * there's 16MB of memory - this really confuses people that
 1810          * are trying to use bus mastering ISA controllers with the
 1811          * "16MB limit"; they only have 16MB, but the remapping puts
 1812          * them beyond the limit.
 1813          *
 1814          * If extended memory is between 15-16MB (16-17MB phys address range),
 1815          *      chop it to 15MB.
 1816          */
 1817         if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
 1818                 extmem = 15 * 1024;
 1819 
 1820         physmap[0] = 0;
 1821         physmap[1] = basemem * 1024;
 1822         physmap_idx = 2;
 1823         physmap[physmap_idx] = 0x100000;
 1824         physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
 1825 
 1826 physmap_done:
 1827         /*
 1828          * Now, physmap contains a map of physical memory.
 1829          */
 1830 
 1831 #ifdef SMP
 1832         /* make hole for AP bootstrap code */
 1833         physmap[1] = mp_bootaddress(physmap[1]);
 1834 #endif
 1835 
 1836         /*
 1837          * Maxmem isn't the "maximum memory", it's one larger than the
 1838          * highest page of the physical address space.  It should be
 1839          * called something like "Maxphyspage".  We may adjust this 
 1840          * based on ``hw.physmem'' and the results of the memory test.
 1841          */
 1842         Maxmem = atop(physmap[physmap_idx + 1]);
 1843 
 1844 #ifdef MAXMEM
 1845         Maxmem = MAXMEM / 4;
 1846 #endif
 1847 
 1848         if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
 1849                 Maxmem = atop(physmem_tunable);
 1850 
 1851         if (atop(physmap[physmap_idx + 1]) != Maxmem &&
 1852             (boothowto & RB_VERBOSE))
 1853                 printf("Physical memory use set to %ldK\n", Maxmem * 4);
 1854 
 1855         /*
 1856          * If Maxmem has been increased beyond what the system has detected,
 1857          * extend the last memory segment to the new limit.
 1858          */ 
 1859         if (atop(physmap[physmap_idx + 1]) < Maxmem)
 1860                 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
 1861 
 1862         /* call pmap initialization to make new kernel address space */
 1863         pmap_bootstrap(first, 0);
 1864 
 1865         /*
 1866          * Size up each available chunk of physical memory.
 1867          */
 1868         physmap[0] = PAGE_SIZE;         /* mask off page 0 */
 1869         pa_indx = 0;
 1870         da_indx = 1;
 1871         phys_avail[pa_indx++] = physmap[0];
 1872         phys_avail[pa_indx] = physmap[0];
 1873         dump_avail[da_indx] = physmap[0];
 1874         pte = CMAP1;
 1875 
 1876         /*
 1877          * Get dcons buffer address
 1878          */
 1879         if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
 1880             getenv_quad("dcons.size", &dcons_size) == 0)
 1881                 dcons_addr = 0;
 1882 
 1883         /*
 1884          * physmap is in bytes, so when converting to page boundaries,
 1885          * round up the start address and round down the end address.
 1886          */
 1887         for (i = 0; i <= physmap_idx; i += 2) {
 1888                 vm_paddr_t end;
 1889 
 1890                 end = ptoa((vm_paddr_t)Maxmem);
 1891                 if (physmap[i + 1] < end)
 1892                         end = trunc_page(physmap[i + 1]);
 1893                 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
 1894                         int tmp, page_bad, full;
 1895                         int *ptr = (int *)CADDR1;
 1896 
 1897                         full = FALSE;
 1898                         /*
 1899                          * block out kernel memory as not available.
 1900                          */
 1901                         if (pa >= KERNLOAD && pa < first)
 1902                                 goto do_dump_avail;
 1903 
 1904                         /*
 1905                          * block out dcons buffer
 1906                          */
 1907                         if (dcons_addr > 0
 1908                             && pa >= trunc_page(dcons_addr)
 1909                             && pa < dcons_addr + dcons_size)
 1910                                 goto do_dump_avail;
 1911 
 1912                         page_bad = FALSE;
 1913 
 1914                         /*
 1915                          * map page into kernel: valid, read/write,non-cacheable
 1916                          */
 1917                         *pte = pa | PG_V | PG_RW | PG_N;
 1918                         invltlb();
 1919 
 1920                         tmp = *(int *)ptr;
 1921                         /*
 1922                          * Test for alternating 1's and 0's
 1923                          */
 1924                         *(volatile int *)ptr = 0xaaaaaaaa;
 1925                         if (*(volatile int *)ptr != 0xaaaaaaaa)
 1926                                 page_bad = TRUE;
 1927                         /*
 1928                          * Test for alternating 0's and 1's
 1929                          */
 1930                         *(volatile int *)ptr = 0x55555555;
 1931                         if (*(volatile int *)ptr != 0x55555555)
 1932                                 page_bad = TRUE;
 1933                         /*
 1934                          * Test for all 1's
 1935                          */
 1936                         *(volatile int *)ptr = 0xffffffff;
 1937                         if (*(volatile int *)ptr != 0xffffffff)
 1938                                 page_bad = TRUE;
 1939                         /*
 1940                          * Test for all 0's
 1941                          */
 1942                         *(volatile int *)ptr = 0x0;
 1943                         if (*(volatile int *)ptr != 0x0)
 1944                                 page_bad = TRUE;
 1945                         /*
 1946                          * Restore original value.
 1947                          */
 1948                         *(int *)ptr = tmp;
 1949 
 1950                         /*
 1951                          * Adjust array of valid/good pages.
 1952                          */
 1953                         if (page_bad == TRUE)
 1954                                 continue;
 1955                         /*
 1956                          * If this good page is a continuation of the
 1957                          * previous set of good pages, then just increase
 1958                          * the end pointer. Otherwise start a new chunk.
 1959                          * Note that "end" points one higher than end,
 1960                          * making the range >= start and < end.
 1961                          * If we're also doing a speculative memory
 1962                          * test and we at or past the end, bump up Maxmem
 1963                          * so that we keep going. The first bad page
 1964                          * will terminate the loop.
 1965                          */
 1966                         if (phys_avail[pa_indx] == pa) {
 1967                                 phys_avail[pa_indx] += PAGE_SIZE;
 1968                         } else {
 1969                                 pa_indx++;
 1970                                 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
 1971                                         printf(
 1972                 "Too many holes in the physical address space, giving up\n");
 1973                                         pa_indx--;
 1974                                         full = TRUE;
 1975                                         goto do_dump_avail;
 1976                                 }
 1977                                 phys_avail[pa_indx++] = pa;     /* start */
 1978                                 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
 1979                         }
 1980                         physmem++;
 1981 do_dump_avail:
 1982                         if (dump_avail[da_indx] == pa) {
 1983                                 dump_avail[da_indx] += PAGE_SIZE;
 1984                         } else {
 1985                                 da_indx++;
 1986                                 if (da_indx == DUMP_AVAIL_ARRAY_END) {
 1987                                         da_indx--;
 1988                                         goto do_next;
 1989                                 }
 1990                                 dump_avail[da_indx++] = pa;     /* start */
 1991                                 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
 1992                         }
 1993 do_next:
 1994                         if (full)
 1995                                 break;
 1996                 }
 1997         }
 1998         *pte = 0;
 1999         invltlb();
 2000 
 2001         /*
 2002          * XXX
 2003          * The last chunk must contain at least one page plus the message
 2004          * buffer to avoid complicating other code (message buffer address
 2005          * calculation, etc.).
 2006          */
 2007         while (phys_avail[pa_indx - 1] + PAGE_SIZE +
 2008             round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
 2009                 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
 2010                 phys_avail[pa_indx--] = 0;
 2011                 phys_avail[pa_indx--] = 0;
 2012         }
 2013 
 2014         Maxmem = atop(phys_avail[pa_indx]);
 2015 
 2016         /* Trim off space for the message buffer. */
 2017         phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
 2018 
 2019         avail_end = phys_avail[pa_indx];
 2020 }
 2021 
 2022 void
 2023 init386(first)
 2024         int first;
 2025 {
 2026         struct gate_descriptor *gdp;
 2027         int gsel_tss, metadata_missing, off, x;
 2028         struct pcpu *pc;
 2029 
 2030         thread0.td_kstack = proc0kstack;
 2031         thread0.td_pcb = (struct pcb *)
 2032            (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
 2033 
 2034         /*
 2035          * This may be done better later if it gets more high level
 2036          * components in it. If so just link td->td_proc here.
 2037          */
 2038         proc_linkup(&proc0, &ksegrp0, &thread0);
 2039 
 2040         metadata_missing = 0;
 2041         if (bootinfo.bi_modulep) {
 2042                 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
 2043                 preload_bootstrap_relocate(KERNBASE);
 2044         } else {
 2045                 metadata_missing = 1;
 2046         }
 2047         if (envmode == 1)
 2048                 kern_envp = static_env;
 2049         else if (bootinfo.bi_envp)
 2050                 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
 2051 
 2052         /* Init basic tunables, hz etc */
 2053         init_param1();
 2054 
 2055         /*
 2056          * Make gdt memory segments.  All segments cover the full 4GB
 2057          * of address space and permissions are enforced at page level.
 2058          */
 2059         gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
 2060         gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
 2061         gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
 2062         gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
 2063         gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
 2064         gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
 2065 
 2066 #ifdef SMP
 2067         pc = &SMP_prvspace[0].pcpu;
 2068 #else
 2069         pc = &__pcpu;
 2070 #endif
 2071         gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
 2072         gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
 2073         gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
 2074 
 2075         for (x = 0; x < NGDT; x++)
 2076                 ssdtosd(&gdt_segs[x], &gdt[x].sd);
 2077 
 2078         r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
 2079         r_gdt.rd_base =  (int) gdt;
 2080         lgdt(&r_gdt);
 2081 
 2082         pcpu_init(pc, 0, sizeof(struct pcpu));
 2083         PCPU_SET(prvspace, pc);
 2084         PCPU_SET(curthread, &thread0);
 2085         PCPU_SET(curpcb, thread0.td_pcb);
 2086 
 2087         /*
 2088          * Initialize mutexes.
 2089          *
 2090          * icu_lock: in order to allow an interrupt to occur in a critical
 2091          *           section, to set pcpu->ipending (etc...) properly, we
 2092          *           must be able to get the icu lock, so it can't be
 2093          *           under witness.
 2094          */
 2095         mutex_init();
 2096         mtx_init(&clock_lock, "clk", NULL, MTX_SPIN);
 2097         mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
 2098 
 2099         /* make ldt memory segments */
 2100         ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
 2101         ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
 2102         for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
 2103                 ssdtosd(&ldt_segs[x], &ldt[x].sd);
 2104 
 2105         _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
 2106         lldt(_default_ldt);
 2107         PCPU_SET(currentldt, _default_ldt);
 2108 
 2109         /* exceptions */
 2110         for (x = 0; x < NIDT; x++)
 2111                 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
 2112                     GSEL(GCODE_SEL, SEL_KPL));
 2113         setidt(IDT_DE, &IDTVEC(div),  SDT_SYS386TGT, SEL_KPL,
 2114             GSEL(GCODE_SEL, SEL_KPL));
 2115         setidt(IDT_DB, &IDTVEC(dbg),  SDT_SYS386IGT, SEL_KPL,
 2116             GSEL(GCODE_SEL, SEL_KPL));
 2117         setidt(IDT_NMI, &IDTVEC(nmi),  SDT_SYS386IGT, SEL_KPL,
 2118             GSEL(GCODE_SEL, SEL_KPL));
 2119         setidt(IDT_BP, &IDTVEC(bpt),  SDT_SYS386IGT, SEL_UPL,
 2120             GSEL(GCODE_SEL, SEL_KPL));
 2121         setidt(IDT_OF, &IDTVEC(ofl),  SDT_SYS386TGT, SEL_UPL,
 2122             GSEL(GCODE_SEL, SEL_KPL));
 2123         setidt(IDT_BR, &IDTVEC(bnd),  SDT_SYS386TGT, SEL_KPL,
 2124             GSEL(GCODE_SEL, SEL_KPL));
 2125         setidt(IDT_UD, &IDTVEC(ill),  SDT_SYS386TGT, SEL_KPL,
 2126             GSEL(GCODE_SEL, SEL_KPL));
 2127         setidt(IDT_NM, &IDTVEC(dna),  SDT_SYS386TGT, SEL_KPL
 2128             , GSEL(GCODE_SEL, SEL_KPL));
 2129         setidt(IDT_DF, 0,  SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
 2130         setidt(IDT_FPUGP, &IDTVEC(fpusegm),  SDT_SYS386TGT, SEL_KPL,
 2131             GSEL(GCODE_SEL, SEL_KPL));
 2132         setidt(IDT_TS, &IDTVEC(tss),  SDT_SYS386TGT, SEL_KPL,
 2133             GSEL(GCODE_SEL, SEL_KPL));
 2134         setidt(IDT_NP, &IDTVEC(missing),  SDT_SYS386TGT, SEL_KPL,
 2135             GSEL(GCODE_SEL, SEL_KPL));
 2136         setidt(IDT_SS, &IDTVEC(stk),  SDT_SYS386TGT, SEL_KPL,
 2137             GSEL(GCODE_SEL, SEL_KPL));
 2138         setidt(IDT_GP, &IDTVEC(prot),  SDT_SYS386TGT, SEL_KPL,
 2139             GSEL(GCODE_SEL, SEL_KPL));
 2140         setidt(IDT_PF, &IDTVEC(page),  SDT_SYS386IGT, SEL_KPL,
 2141             GSEL(GCODE_SEL, SEL_KPL));
 2142         setidt(IDT_MF, &IDTVEC(fpu),  SDT_SYS386TGT, SEL_KPL,
 2143             GSEL(GCODE_SEL, SEL_KPL));
 2144         setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
 2145             GSEL(GCODE_SEL, SEL_KPL));
 2146         setidt(IDT_MC, &IDTVEC(mchk),  SDT_SYS386TGT, SEL_KPL,
 2147             GSEL(GCODE_SEL, SEL_KPL));
 2148         setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
 2149             GSEL(GCODE_SEL, SEL_KPL));
 2150         setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
 2151             GSEL(GCODE_SEL, SEL_KPL));
 2152 
 2153         r_idt.rd_limit = sizeof(idt0) - 1;
 2154         r_idt.rd_base = (int) idt;
 2155         lidt(&r_idt);
 2156 
 2157         /*
 2158          * Initialize the console before we print anything out.
 2159          */
 2160         cninit();
 2161 
 2162         if (metadata_missing)
 2163                 printf("WARNING: loader(8) metadata is missing!\n");
 2164 
 2165 #ifdef DEV_ISA
 2166         elcr_probe();
 2167         atpic_startup();
 2168 #endif
 2169 
 2170 #ifdef DDB
 2171         ksym_start = bootinfo.bi_symtab;
 2172         ksym_end = bootinfo.bi_esymtab;
 2173 #endif
 2174 
 2175         kdb_init();
 2176 
 2177 #ifdef KDB
 2178         if (boothowto & RB_KDB)
 2179                 kdb_enter("Boot flags requested debugger");
 2180 #endif
 2181 
 2182         finishidentcpu();       /* Final stage of CPU initialization */
 2183         setidt(IDT_UD, &IDTVEC(ill),  SDT_SYS386TGT, SEL_KPL,
 2184             GSEL(GCODE_SEL, SEL_KPL));
 2185         setidt(IDT_GP, &IDTVEC(prot),  SDT_SYS386TGT, SEL_KPL,
 2186             GSEL(GCODE_SEL, SEL_KPL));
 2187         initializecpu();        /* Initialize CPU registers */
 2188 
 2189         /* make an initial tss so cpu can get interrupt stack on syscall! */
 2190         /* Note: -16 is so we can grow the trapframe if we came from vm86 */
 2191         PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
 2192             KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
 2193         PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
 2194         gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
 2195         private_tss = 0;
 2196         PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
 2197         PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
 2198         PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
 2199         ltr(gsel_tss);
 2200 
 2201         /* pointer to selector slot for %fs/%gs */
 2202         PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
 2203 
 2204         dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
 2205             dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
 2206         dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
 2207             dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
 2208 #ifdef PAE
 2209         dblfault_tss.tss_cr3 = (int)IdlePDPT;
 2210 #else
 2211         dblfault_tss.tss_cr3 = (int)IdlePTD;
 2212 #endif
 2213         dblfault_tss.tss_eip = (int)dblfault_handler;
 2214         dblfault_tss.tss_eflags = PSL_KERNEL;
 2215         dblfault_tss.tss_ds = dblfault_tss.tss_es =
 2216             dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
 2217         dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
 2218         dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
 2219         dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
 2220 
 2221         vm86_initialize();
 2222         getmemsize(first);
 2223         init_param2(physmem);
 2224 
 2225         /* now running on new page tables, configured,and u/iom is accessible */
 2226 
 2227         /* Map the message buffer. */
 2228         for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
 2229                 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
 2230 
 2231         msgbufinit(msgbufp, MSGBUF_SIZE);
 2232 
 2233         /* make a call gate to reenter kernel with */
 2234         gdp = &ldt[LSYS5CALLS_SEL].gd;
 2235 
 2236         x = (int) &IDTVEC(lcall_syscall);
 2237         gdp->gd_looffset = x;
 2238         gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
 2239         gdp->gd_stkcpy = 1;
 2240         gdp->gd_type = SDT_SYS386CGT;
 2241         gdp->gd_dpl = SEL_UPL;
 2242         gdp->gd_p = 1;
 2243         gdp->gd_hioffset = x >> 16;
 2244 
 2245         /* XXX does this work? */
 2246         /* XXX yes! */
 2247         ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
 2248         ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
 2249 
 2250         /* transfer to user mode */
 2251 
 2252         _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
 2253         _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
 2254 
 2255         /* setup proc 0's pcb */
 2256         thread0.td_pcb->pcb_flags = 0; /* XXXKSE */
 2257 #ifdef PAE
 2258         thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
 2259 #else
 2260         thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
 2261 #endif
 2262         thread0.td_pcb->pcb_ext = 0;
 2263         thread0.td_frame = &proc0_tf;
 2264 }
 2265 
 2266 void
 2267 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
 2268 {
 2269 
 2270         pcpu->pc_acpi_id = 0xffffffff;
 2271 }
 2272 
 2273 void
 2274 spinlock_enter(void)
 2275 {
 2276         struct thread *td;
 2277 
 2278         td = curthread;
 2279         if (td->td_md.md_spinlock_count == 0)
 2280                 td->td_md.md_saved_flags = intr_disable();
 2281         td->td_md.md_spinlock_count++;
 2282         critical_enter();
 2283 }
 2284 
 2285 void
 2286 spinlock_exit(void)
 2287 {
 2288         struct thread *td;
 2289 
 2290         td = curthread;
 2291         critical_exit();
 2292         td->td_md.md_spinlock_count--;
 2293         if (td->td_md.md_spinlock_count == 0)
 2294                 intr_restore(td->td_md.md_saved_flags);
 2295 }
 2296 
 2297 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
 2298 static void f00f_hack(void *unused);
 2299 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL)
 2300 
 2301 static void
 2302 f00f_hack(void *unused)
 2303 {
 2304         struct gate_descriptor *new_idt;
 2305         vm_offset_t tmp;
 2306 
 2307         if (!has_f00f_bug)
 2308                 return;
 2309 
 2310         GIANT_REQUIRED;
 2311 
 2312         printf("Intel Pentium detected, installing workaround for F00F bug\n");
 2313 
 2314         tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
 2315         if (tmp == 0)
 2316                 panic("kmem_alloc returned 0");
 2317 
 2318         /* Put the problematic entry (#6) at the end of the lower page. */
 2319         new_idt = (struct gate_descriptor*)
 2320             (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
 2321         bcopy(idt, new_idt, sizeof(idt0));
 2322         r_idt.rd_base = (u_int)new_idt;
 2323         lidt(&r_idt);
 2324         idt = new_idt;
 2325         if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
 2326                            VM_PROT_READ, FALSE) != KERN_SUCCESS)
 2327                 panic("vm_map_protect failed");
 2328 }
 2329 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
 2330 
 2331 /*
 2332  * Construct a PCB from a trapframe. This is called from kdb_trap() where
 2333  * we want to start a backtrace from the function that caused us to enter
 2334  * the debugger. We have the context in the trapframe, but base the trace
 2335  * on the PCB. The PCB doesn't have to be perfect, as long as it contains
 2336  * enough for a backtrace.
 2337  */
 2338 void
 2339 makectx(struct trapframe *tf, struct pcb *pcb)
 2340 {
 2341 
 2342         pcb->pcb_edi = tf->tf_edi;
 2343         pcb->pcb_esi = tf->tf_esi;
 2344         pcb->pcb_ebp = tf->tf_ebp;
 2345         pcb->pcb_ebx = tf->tf_ebx;
 2346         pcb->pcb_eip = tf->tf_eip;
 2347         pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
 2348 }
 2349 
 2350 int
 2351 ptrace_set_pc(struct thread *td, u_long addr)
 2352 {
 2353 
 2354         td->td_frame->tf_eip = addr;
 2355         return (0);
 2356 }
 2357 
 2358 int
 2359 ptrace_single_step(struct thread *td)
 2360 {
 2361         td->td_frame->tf_eflags |= PSL_T;
 2362         return (0);
 2363 }
 2364 
 2365 int
 2366 ptrace_clear_single_step(struct thread *td)
 2367 {
 2368         td->td_frame->tf_eflags &= ~PSL_T;
 2369         return (0);
 2370 }
 2371 
 2372 int
 2373 fill_regs(struct thread *td, struct reg *regs)
 2374 {
 2375         struct pcb *pcb;
 2376         struct trapframe *tp;
 2377 
 2378         tp = td->td_frame;
 2379         pcb = td->td_pcb;
 2380         regs->r_fs = tp->tf_fs;
 2381         regs->r_es = tp->tf_es;
 2382         regs->r_ds = tp->tf_ds;
 2383         regs->r_edi = tp->tf_edi;
 2384         regs->r_esi = tp->tf_esi;
 2385         regs->r_ebp = tp->tf_ebp;
 2386         regs->r_ebx = tp->tf_ebx;
 2387         regs->r_edx = tp->tf_edx;
 2388         regs->r_ecx = tp->tf_ecx;
 2389         regs->r_eax = tp->tf_eax;
 2390         regs->r_eip = tp->tf_eip;
 2391         regs->r_cs = tp->tf_cs;
 2392         regs->r_eflags = tp->tf_eflags;
 2393         regs->r_esp = tp->tf_esp;
 2394         regs->r_ss = tp->tf_ss;
 2395         regs->r_gs = pcb->pcb_gs;
 2396         return (0);
 2397 }
 2398 
 2399 int
 2400 set_regs(struct thread *td, struct reg *regs)
 2401 {
 2402         struct pcb *pcb;
 2403         struct trapframe *tp;
 2404 
 2405         tp = td->td_frame;
 2406         if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
 2407             !CS_SECURE(regs->r_cs))
 2408                 return (EINVAL);
 2409         pcb = td->td_pcb;
 2410         tp->tf_fs = regs->r_fs;
 2411         tp->tf_es = regs->r_es;
 2412         tp->tf_ds = regs->r_ds;
 2413         tp->tf_edi = regs->r_edi;
 2414         tp->tf_esi = regs->r_esi;
 2415         tp->tf_ebp = regs->r_ebp;
 2416         tp->tf_ebx = regs->r_ebx;
 2417         tp->tf_edx = regs->r_edx;
 2418         tp->tf_ecx = regs->r_ecx;
 2419         tp->tf_eax = regs->r_eax;
 2420         tp->tf_eip = regs->r_eip;
 2421         tp->tf_cs = regs->r_cs;
 2422         tp->tf_eflags = regs->r_eflags;
 2423         tp->tf_esp = regs->r_esp;
 2424         tp->tf_ss = regs->r_ss;
 2425         pcb->pcb_gs = regs->r_gs;
 2426         return (0);
 2427 }
 2428 
 2429 #ifdef CPU_ENABLE_SSE
 2430 static void
 2431 fill_fpregs_xmm(sv_xmm, sv_87)
 2432         struct savexmm *sv_xmm;
 2433         struct save87 *sv_87;
 2434 {
 2435         register struct env87 *penv_87 = &sv_87->sv_env;
 2436         register struct envxmm *penv_xmm = &sv_xmm->sv_env;
 2437         int i;
 2438 
 2439         bzero(sv_87, sizeof(*sv_87));
 2440 
 2441         /* FPU control/status */
 2442         penv_87->en_cw = penv_xmm->en_cw;
 2443         penv_87->en_sw = penv_xmm->en_sw;
 2444         penv_87->en_tw = penv_xmm->en_tw;
 2445         penv_87->en_fip = penv_xmm->en_fip;
 2446         penv_87->en_fcs = penv_xmm->en_fcs;
 2447         penv_87->en_opcode = penv_xmm->en_opcode;
 2448         penv_87->en_foo = penv_xmm->en_foo;
 2449         penv_87->en_fos = penv_xmm->en_fos;
 2450 
 2451         /* FPU registers */
 2452         for (i = 0; i < 8; ++i)
 2453                 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
 2454 }
 2455 
 2456 static void
 2457 set_fpregs_xmm(sv_87, sv_xmm)
 2458         struct save87 *sv_87;
 2459         struct savexmm *sv_xmm;
 2460 {
 2461         register struct env87 *penv_87 = &sv_87->sv_env;
 2462         register struct envxmm *penv_xmm = &sv_xmm->sv_env;
 2463         int i;
 2464 
 2465         /* FPU control/status */
 2466         penv_xmm->en_cw = penv_87->en_cw;
 2467         penv_xmm->en_sw = penv_87->en_sw;
 2468         penv_xmm->en_tw = penv_87->en_tw;
 2469         penv_xmm->en_fip = penv_87->en_fip;
 2470         penv_xmm->en_fcs = penv_87->en_fcs;
 2471         penv_xmm->en_opcode = penv_87->en_opcode;
 2472         penv_xmm->en_foo = penv_87->en_foo;
 2473         penv_xmm->en_fos = penv_87->en_fos;
 2474 
 2475         /* FPU registers */
 2476         for (i = 0; i < 8; ++i)
 2477                 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
 2478 }
 2479 #endif /* CPU_ENABLE_SSE */
 2480 
 2481 int
 2482 fill_fpregs(struct thread *td, struct fpreg *fpregs)
 2483 {
 2484 #ifdef CPU_ENABLE_SSE
 2485         if (cpu_fxsr) {
 2486                 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm,
 2487                                                 (struct save87 *)fpregs);
 2488                 return (0);
 2489         }
 2490 #endif /* CPU_ENABLE_SSE */
 2491         bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
 2492         return (0);
 2493 }
 2494 
 2495 int
 2496 set_fpregs(struct thread *td, struct fpreg *fpregs)
 2497 {
 2498 #ifdef CPU_ENABLE_SSE
 2499         if (cpu_fxsr) {
 2500                 set_fpregs_xmm((struct save87 *)fpregs,
 2501                                            &td->td_pcb->pcb_save.sv_xmm);
 2502                 return (0);
 2503         }
 2504 #endif /* CPU_ENABLE_SSE */
 2505         bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs);
 2506         return (0);
 2507 }
 2508 
 2509 /*
 2510  * Get machine context.
 2511  */
 2512 int
 2513 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
 2514 {
 2515         struct trapframe *tp;
 2516 
 2517         tp = td->td_frame;
 2518 
 2519         PROC_LOCK(curthread->td_proc);
 2520         mcp->mc_onstack = sigonstack(tp->tf_esp);
 2521         PROC_UNLOCK(curthread->td_proc);
 2522         mcp->mc_gs = td->td_pcb->pcb_gs;
 2523         mcp->mc_fs = tp->tf_fs;
 2524         mcp->mc_es = tp->tf_es;
 2525         mcp->mc_ds = tp->tf_ds;
 2526         mcp->mc_edi = tp->tf_edi;
 2527         mcp->mc_esi = tp->tf_esi;
 2528         mcp->mc_ebp = tp->tf_ebp;
 2529         mcp->mc_isp = tp->tf_isp;
 2530         if (flags & GET_MC_CLEAR_RET) {
 2531                 mcp->mc_eax = 0;
 2532                 mcp->mc_edx = 0;
 2533         } else {
 2534                 mcp->mc_eax = tp->tf_eax;
 2535                 mcp->mc_edx = tp->tf_edx;
 2536         }
 2537         mcp->mc_ebx = tp->tf_ebx;
 2538         mcp->mc_ecx = tp->tf_ecx;
 2539         mcp->mc_eip = tp->tf_eip;
 2540         mcp->mc_cs = tp->tf_cs;
 2541         mcp->mc_eflags = tp->tf_eflags;
 2542         mcp->mc_esp = tp->tf_esp;
 2543         mcp->mc_ss = tp->tf_ss;
 2544         mcp->mc_len = sizeof(*mcp);
 2545         get_fpcontext(td, mcp);
 2546         return (0);
 2547 }
 2548 
 2549 /*
 2550  * Set machine context.
 2551  *
 2552  * However, we don't set any but the user modifiable flags, and we won't
 2553  * touch the cs selector.
 2554  */
 2555 int
 2556 set_mcontext(struct thread *td, const mcontext_t *mcp)
 2557 {
 2558         struct trapframe *tp;
 2559         int eflags, ret;
 2560 
 2561         tp = td->td_frame;
 2562         if (mcp->mc_len != sizeof(*mcp))
 2563                 return (EINVAL);
 2564         eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
 2565             (tp->tf_eflags & ~PSL_USERCHANGE);
 2566         if ((ret = set_fpcontext(td, mcp)) == 0) {
 2567                 tp->tf_fs = mcp->mc_fs;
 2568                 tp->tf_es = mcp->mc_es;
 2569                 tp->tf_ds = mcp->mc_ds;
 2570                 tp->tf_edi = mcp->mc_edi;
 2571                 tp->tf_esi = mcp->mc_esi;
 2572                 tp->tf_ebp = mcp->mc_ebp;
 2573                 tp->tf_ebx = mcp->mc_ebx;
 2574                 tp->tf_edx = mcp->mc_edx;
 2575                 tp->tf_ecx = mcp->mc_ecx;
 2576                 tp->tf_eax = mcp->mc_eax;
 2577                 tp->tf_eip = mcp->mc_eip;
 2578                 tp->tf_eflags = eflags;
 2579                 tp->tf_esp = mcp->mc_esp;
 2580                 tp->tf_ss = mcp->mc_ss;
 2581                 td->td_pcb->pcb_gs = mcp->mc_gs;
 2582                 ret = 0;
 2583         }
 2584         return (ret);
 2585 }
 2586 
 2587 static void
 2588 get_fpcontext(struct thread *td, mcontext_t *mcp)
 2589 {
 2590 #ifndef DEV_NPX
 2591         mcp->mc_fpformat = _MC_FPFMT_NODEV;
 2592         mcp->mc_ownedfp = _MC_FPOWNED_NONE;
 2593 #else
 2594         union savefpu *addr;
 2595 
 2596         /*
 2597          * XXX mc_fpstate might be misaligned, since its declaration is not
 2598          * unportabilized using __attribute__((aligned(16))) like the
 2599          * declaration of struct savemm, and anyway, alignment doesn't work
 2600          * for auto variables since we don't use gcc's pessimal stack
 2601          * alignment.  Work around this by abusing the spare fields after
 2602          * mcp->mc_fpstate.
 2603          *
 2604          * XXX unpessimize most cases by only aligning when fxsave might be
 2605          * called, although this requires knowing too much about
 2606          * npxgetregs()'s internals.
 2607          */
 2608         addr = (union savefpu *)&mcp->mc_fpstate;
 2609         if (td == PCPU_GET(fpcurthread) &&
 2610 #ifdef CPU_ENABLE_SSE
 2611             cpu_fxsr &&
 2612 #endif
 2613             ((uintptr_t)(void *)addr & 0xF)) {
 2614                 do
 2615                         addr = (void *)((char *)addr + 4);
 2616                 while ((uintptr_t)(void *)addr & 0xF);
 2617         }
 2618         mcp->mc_ownedfp = npxgetregs(td, addr);
 2619         if (addr != (union savefpu *)&mcp->mc_fpstate) {
 2620                 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
 2621                 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2));
 2622         }
 2623         mcp->mc_fpformat = npxformat();
 2624 #endif
 2625 }
 2626 
 2627 static int
 2628 set_fpcontext(struct thread *td, const mcontext_t *mcp)
 2629 {
 2630         union savefpu *addr;
 2631 
 2632         if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
 2633                 return (0);
 2634         else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
 2635             mcp->mc_fpformat != _MC_FPFMT_XMM)
 2636                 return (EINVAL);
 2637         else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
 2638                 /* We don't care what state is left in the FPU or PCB. */
 2639                 fpstate_drop(td);
 2640         else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
 2641             mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
 2642                 /* XXX align as above. */
 2643                 addr = (union savefpu *)&mcp->mc_fpstate;
 2644                 if (td == PCPU_GET(fpcurthread) &&
 2645 #ifdef CPU_ENABLE_SSE
 2646                     cpu_fxsr &&
 2647 #endif
 2648                     ((uintptr_t)(void *)addr & 0xF)) {
 2649                         do
 2650                                 addr = (void *)((char *)addr + 4);
 2651                         while ((uintptr_t)(void *)addr & 0xF);
 2652                         bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate));
 2653                 }
 2654 #ifdef DEV_NPX
 2655                 /*
 2656                  * XXX we violate the dubious requirement that npxsetregs()
 2657                  * be called with interrupts disabled.
 2658                  */
 2659                 npxsetregs(td, addr);
 2660 #endif
 2661                 /*
 2662                  * Don't bother putting things back where they were in the
 2663                  * misaligned case, since we know that the caller won't use
 2664                  * them again.
 2665                  */
 2666         } else
 2667                 return (EINVAL);
 2668         return (0);
 2669 }
 2670 
 2671 static void
 2672 fpstate_drop(struct thread *td)
 2673 {
 2674         register_t s;
 2675 
 2676         s = intr_disable();
 2677 #ifdef DEV_NPX
 2678         if (PCPU_GET(fpcurthread) == td)
 2679                 npxdrop();
 2680 #endif
 2681         /*
 2682          * XXX force a full drop of the npx.  The above only drops it if we
 2683          * owned it.  npxgetregs() has the same bug in the !cpu_fxsr case.
 2684          *
 2685          * XXX I don't much like npxgetregs()'s semantics of doing a full
 2686          * drop.  Dropping only to the pcb matches fnsave's behaviour.
 2687          * We only need to drop to !PCB_INITDONE in sendsig().  But
 2688          * sendsig() is the only caller of npxgetregs()... perhaps we just
 2689          * have too many layers.
 2690          */
 2691         curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE;
 2692         intr_restore(s);
 2693 }
 2694 
 2695 int
 2696 fill_dbregs(struct thread *td, struct dbreg *dbregs)
 2697 {
 2698         struct pcb *pcb;
 2699 
 2700         if (td == NULL) {
 2701                 dbregs->dr[0] = rdr0();
 2702                 dbregs->dr[1] = rdr1();
 2703                 dbregs->dr[2] = rdr2();
 2704                 dbregs->dr[3] = rdr3();
 2705                 dbregs->dr[4] = rdr4();
 2706                 dbregs->dr[5] = rdr5();
 2707                 dbregs->dr[6] = rdr6();
 2708                 dbregs->dr[7] = rdr7();
 2709         } else {
 2710                 pcb = td->td_pcb;
 2711                 dbregs->dr[0] = pcb->pcb_dr0;
 2712                 dbregs->dr[1] = pcb->pcb_dr1;
 2713                 dbregs->dr[2] = pcb->pcb_dr2;
 2714                 dbregs->dr[3] = pcb->pcb_dr3;
 2715                 dbregs->dr[4] = 0;
 2716                 dbregs->dr[5] = 0;
 2717                 dbregs->dr[6] = pcb->pcb_dr6;
 2718                 dbregs->dr[7] = pcb->pcb_dr7;
 2719         }
 2720         return (0);
 2721 }
 2722 
 2723 int
 2724 set_dbregs(struct thread *td, struct dbreg *dbregs)
 2725 {
 2726         struct pcb *pcb;
 2727         int i;
 2728         u_int32_t mask1, mask2;
 2729 
 2730         if (td == NULL) {
 2731                 load_dr0(dbregs->dr[0]);
 2732                 load_dr1(dbregs->dr[1]);
 2733                 load_dr2(dbregs->dr[2]);
 2734                 load_dr3(dbregs->dr[3]);
 2735                 load_dr4(dbregs->dr[4]);
 2736                 load_dr5(dbregs->dr[5]);
 2737                 load_dr6(dbregs->dr[6]);
 2738                 load_dr7(dbregs->dr[7]);
 2739         } else {
 2740                 /*
 2741                  * Don't let an illegal value for dr7 get set.  Specifically,
 2742                  * check for undefined settings.  Setting these bit patterns
 2743                  * result in undefined behaviour and can lead to an unexpected
 2744                  * TRCTRAP.
 2745                  */
 2746                 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8; 
 2747                      i++, mask1 <<= 2, mask2 <<= 2)
 2748                         if ((dbregs->dr[7] & mask1) == mask2)
 2749                                 return (EINVAL);
 2750                 
 2751                 pcb = td->td_pcb;
 2752                 
 2753                 /*
 2754                  * Don't let a process set a breakpoint that is not within the
 2755                  * process's address space.  If a process could do this, it
 2756                  * could halt the system by setting a breakpoint in the kernel
 2757                  * (if ddb was enabled).  Thus, we need to check to make sure
 2758                  * that no breakpoints are being enabled for addresses outside
 2759                  * process's address space, unless, perhaps, we were called by
 2760                  * uid 0.
 2761                  *
 2762                  * XXX - what about when the watched area of the user's
 2763                  * address space is written into from within the kernel
 2764                  * ... wouldn't that still cause a breakpoint to be generated
 2765                  * from within kernel mode?
 2766                  */
 2767 
 2768                 if (suser(td) != 0) {
 2769                         if (dbregs->dr[7] & 0x3) {
 2770                                 /* dr0 is enabled */
 2771                                 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
 2772                                         return (EINVAL);
 2773                         }
 2774                         
 2775                         if (dbregs->dr[7] & (0x3<<2)) {
 2776                                 /* dr1 is enabled */
 2777                                 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
 2778                                         return (EINVAL);
 2779                         }
 2780                         
 2781                         if (dbregs->dr[7] & (0x3<<4)) {
 2782                                 /* dr2 is enabled */
 2783                                 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
 2784                                         return (EINVAL);
 2785                         }
 2786                         
 2787                         if (dbregs->dr[7] & (0x3<<6)) {
 2788                                 /* dr3 is enabled */
 2789                                 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
 2790                                         return (EINVAL);
 2791                         }
 2792                 }
 2793 
 2794                 pcb->pcb_dr0 = dbregs->dr[0];
 2795                 pcb->pcb_dr1 = dbregs->dr[1];
 2796                 pcb->pcb_dr2 = dbregs->dr[2];
 2797                 pcb->pcb_dr3 = dbregs->dr[3];
 2798                 pcb->pcb_dr6 = dbregs->dr[6];
 2799                 pcb->pcb_dr7 = dbregs->dr[7];
 2800 
 2801                 pcb->pcb_flags |= PCB_DBREGS;
 2802         }
 2803 
 2804         return (0);
 2805 }
 2806 
 2807 /*
 2808  * Return > 0 if a hardware breakpoint has been hit, and the
 2809  * breakpoint was in user space.  Return 0, otherwise.
 2810  */
 2811 int
 2812 user_dbreg_trap(void)
 2813 {
 2814         u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
 2815         u_int32_t bp;       /* breakpoint bits extracted from dr6 */
 2816         int nbp;            /* number of breakpoints that triggered */
 2817         caddr_t addr[4];    /* breakpoint addresses */
 2818         int i;
 2819         
 2820         dr7 = rdr7();
 2821         if ((dr7 & 0x000000ff) == 0) {
 2822                 /*
 2823                  * all GE and LE bits in the dr7 register are zero,
 2824                  * thus the trap couldn't have been caused by the
 2825                  * hardware debug registers
 2826                  */
 2827                 return 0;
 2828         }
 2829 
 2830         nbp = 0;
 2831         dr6 = rdr6();
 2832         bp = dr6 & 0x0000000f;
 2833 
 2834         if (!bp) {
 2835                 /*
 2836                  * None of the breakpoint bits are set meaning this
 2837                  * trap was not caused by any of the debug registers
 2838                  */
 2839                 return 0;
 2840         }
 2841 
 2842         /*
 2843          * at least one of the breakpoints were hit, check to see
 2844          * which ones and if any of them are user space addresses
 2845          */
 2846 
 2847         if (bp & 0x01) {
 2848                 addr[nbp++] = (caddr_t)rdr0();
 2849         }
 2850         if (bp & 0x02) {
 2851                 addr[nbp++] = (caddr_t)rdr1();
 2852         }
 2853         if (bp & 0x04) {
 2854                 addr[nbp++] = (caddr_t)rdr2();
 2855         }
 2856         if (bp & 0x08) {
 2857                 addr[nbp++] = (caddr_t)rdr3();
 2858         }
 2859 
 2860         for (i=0; i<nbp; i++) {
 2861                 if (addr[i] <
 2862                     (caddr_t)VM_MAXUSER_ADDRESS) {
 2863                         /*
 2864                          * addr[i] is in user space
 2865                          */
 2866                         return nbp;
 2867                 }
 2868         }
 2869 
 2870         /*
 2871          * None of the breakpoints are in user space.
 2872          */
 2873         return 0;
 2874 }
 2875 
 2876 #ifndef DEV_APIC
 2877 #include <machine/apicvar.h>
 2878 
 2879 /*
 2880  * Provide stub functions so that the MADT APIC enumerator in the acpi
 2881  * kernel module will link against a kernel without 'device apic'.
 2882  *
 2883  * XXX - This is a gross hack.
 2884  */
 2885 void
 2886 apic_register_enumerator(struct apic_enumerator *enumerator)
 2887 {
 2888 }
 2889 
 2890 void *
 2891 ioapic_create(uintptr_t addr, int32_t id, int intbase)
 2892 {
 2893         return (NULL);
 2894 }
 2895 
 2896 int
 2897 ioapic_disable_pin(void *cookie, u_int pin)
 2898 {
 2899         return (ENXIO);
 2900 }
 2901 
 2902 int
 2903 ioapic_get_vector(void *cookie, u_int pin)
 2904 {
 2905         return (-1);
 2906 }
 2907 
 2908 void
 2909 ioapic_register(void *cookie)
 2910 {
 2911 }
 2912 
 2913 int
 2914 ioapic_remap_vector(void *cookie, u_int pin, int vector)
 2915 {
 2916         return (ENXIO);
 2917 }
 2918 
 2919 int
 2920 ioapic_set_extint(void *cookie, u_int pin)
 2921 {
 2922         return (ENXIO);
 2923 }
 2924 
 2925 int
 2926 ioapic_set_nmi(void *cookie, u_int pin)
 2927 {
 2928         return (ENXIO);
 2929 }
 2930 
 2931 int
 2932 ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol)
 2933 {
 2934         return (ENXIO);
 2935 }
 2936 
 2937 int
 2938 ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger)
 2939 {
 2940         return (ENXIO);
 2941 }
 2942 
 2943 void
 2944 lapic_create(u_int apic_id, int boot_cpu)
 2945 {
 2946 }
 2947 
 2948 void
 2949 lapic_init(uintptr_t addr)
 2950 {
 2951 }
 2952 
 2953 int
 2954 lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode)
 2955 {
 2956         return (ENXIO);
 2957 }
 2958 
 2959 int
 2960 lapic_set_lvt_polarity(u_int apic_id, u_int lvt, enum intr_polarity pol)
 2961 {
 2962         return (ENXIO);
 2963 }
 2964 
 2965 int
 2966 lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, enum intr_trigger trigger)
 2967 {
 2968         return (ENXIO);
 2969 }
 2970 #endif
 2971 
 2972 #ifdef KDB
 2973 
 2974 /*
 2975  * Provide inb() and outb() as functions.  They are normally only
 2976  * available as macros calling inlined functions, thus cannot be
 2977  * called from the debugger.
 2978  *
 2979  * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
 2980  */
 2981 
 2982 #undef inb
 2983 #undef outb
 2984 
 2985 /* silence compiler warnings */
 2986 u_char inb(u_int);
 2987 void outb(u_int, u_char);
 2988 
 2989 u_char
 2990 inb(u_int port)
 2991 {
 2992         u_char  data;
 2993         /*
 2994          * We use %%dx and not %1 here because i/o is done at %dx and not at
 2995          * %edx, while gcc generates inferior code (movw instead of movl)
 2996          * if we tell it to load (u_short) port.
 2997          */
 2998         __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
 2999         return (data);
 3000 }
 3001 
 3002 void
 3003 outb(u_int port, u_char data)
 3004 {
 3005         u_char  al;
 3006         /*
 3007          * Use an unnecessary assignment to help gcc's register allocator.
 3008          * This make a large difference for gcc-1.40 and a tiny difference
 3009          * for gcc-2.6.0.  For gcc-1.40, al had to be ``asm("ax")'' for
 3010          * best results.  gcc-2.6.0 can't handle this.
 3011          */
 3012         al = data;
 3013         __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
 3014 }
 3015 
 3016 #endif /* KDB */

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