The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/machdep.c

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    1 /*-
    2  * Copyright (c) 1992 Terrence R. Lambert.
    3  * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
    4  * All rights reserved.
    5  *
    6  * This code is derived from software contributed to Berkeley by
    7  * William Jolitz.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 3. All advertising materials mentioning features or use of this software
   18  *    must display the following acknowledgement:
   19  *      This product includes software developed by the University of
   20  *      California, Berkeley and its contributors.
   21  * 4. Neither the name of the University nor the names of its contributors
   22  *    may be used to endorse or promote products derived from this software
   23  *    without specific prior written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   27  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   28  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   29  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   30  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   31  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   35  * SUCH DAMAGE.
   36  *
   37  *      from: @(#)machdep.c     7.4 (Berkeley) 6/3/91
   38  */
   39 
   40 #include <sys/cdefs.h>
   41 __FBSDID("$FreeBSD: releng/6.2/sys/i386/i386/machdep.c 162223 2006-09-11 18:41:31Z jhb $");
   42 
   43 #include "opt_apic.h"
   44 #include "opt_atalk.h"
   45 #include "opt_compat.h"
   46 #include "opt_cpu.h"
   47 #include "opt_ddb.h"
   48 #include "opt_inet.h"
   49 #include "opt_ipx.h"
   50 #include "opt_isa.h"
   51 #include "opt_kstack_pages.h"
   52 #include "opt_maxmem.h"
   53 #include "opt_msgbuf.h"
   54 #include "opt_npx.h"
   55 #include "opt_perfmon.h"
   56 #include "opt_xbox.h"
   57 
   58 #include <sys/param.h>
   59 #include <sys/proc.h>
   60 #include <sys/systm.h>
   61 #include <sys/bio.h>
   62 #include <sys/buf.h>
   63 #include <sys/bus.h>
   64 #include <sys/callout.h>
   65 #include <sys/cons.h>
   66 #include <sys/cpu.h>
   67 #include <sys/eventhandler.h>
   68 #include <sys/exec.h>
   69 #include <sys/imgact.h>
   70 #include <sys/kdb.h>
   71 #include <sys/kernel.h>
   72 #include <sys/ktr.h>
   73 #include <sys/linker.h>
   74 #include <sys/lock.h>
   75 #include <sys/malloc.h>
   76 #include <sys/memrange.h>
   77 #include <sys/msgbuf.h>
   78 #include <sys/mutex.h>
   79 #include <sys/pcpu.h>
   80 #include <sys/ptrace.h>
   81 #include <sys/reboot.h>
   82 #include <sys/sched.h>
   83 #include <sys/signalvar.h>
   84 #include <sys/sysctl.h>
   85 #include <sys/sysent.h>
   86 #include <sys/sysproto.h>
   87 #include <sys/ucontext.h>
   88 #include <sys/vmmeter.h>
   89 
   90 #include <vm/vm.h>
   91 #include <vm/vm_extern.h>
   92 #include <vm/vm_kern.h>
   93 #include <vm/vm_page.h>
   94 #include <vm/vm_map.h>
   95 #include <vm/vm_object.h>
   96 #include <vm/vm_pager.h>
   97 #include <vm/vm_param.h>
   98 
   99 #ifdef DDB
  100 #ifndef KDB
  101 #error KDB must be enabled in order for DDB to work!
  102 #endif
  103 #include <ddb/ddb.h>
  104 #include <ddb/db_sym.h>
  105 #endif
  106 
  107 #include <isa/rtc.h>
  108 
  109 #include <net/netisr.h>
  110 
  111 #include <machine/bootinfo.h>
  112 #include <machine/clock.h>
  113 #include <machine/cpu.h>
  114 #include <machine/cputypes.h>
  115 #include <machine/intr_machdep.h>
  116 #include <machine/md_var.h>
  117 #include <machine/pc/bios.h>
  118 #include <machine/pcb.h>
  119 #include <machine/pcb_ext.h>
  120 #include <machine/proc.h>
  121 #include <machine/reg.h>
  122 #include <machine/sigframe.h>
  123 #include <machine/specialreg.h>
  124 #include <machine/vm86.h>
  125 #ifdef PERFMON
  126 #include <machine/perfmon.h>
  127 #endif
  128 #ifdef SMP
  129 #include <machine/privatespace.h>
  130 #include <machine/smp.h>
  131 #endif
  132 
  133 #ifdef DEV_ISA
  134 #include <i386/isa/icu.h>
  135 #endif
  136 
  137 #ifdef XBOX
  138 #include <machine/xbox.h>
  139 
  140 int arch_i386_is_xbox = 0;
  141 uint32_t arch_i386_xbox_memsize = 0;
  142 #endif
  143 
  144 /* Sanity check for __curthread() */
  145 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
  146 
  147 extern void init386(int first);
  148 extern void dblfault_handler(void);
  149 
  150 extern void printcpuinfo(void); /* XXX header file */
  151 extern void finishidentcpu(void);
  152 extern void panicifcpuunsupported(void);
  153 extern void initializecpu(void);
  154 
  155 #define CS_SECURE(cs)           (ISPL(cs) == SEL_UPL)
  156 #define EFL_SECURE(ef, oef)     ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
  157 
  158 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
  159 #define CPU_ENABLE_SSE
  160 #endif
  161 
  162 static void cpu_startup(void *);
  163 static void fpstate_drop(struct thread *td);
  164 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
  165 static int  set_fpcontext(struct thread *td, const mcontext_t *mcp);
  166 #ifdef CPU_ENABLE_SSE
  167 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
  168 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
  169 #endif /* CPU_ENABLE_SSE */
  170 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
  171 
  172 #ifdef DDB
  173 extern vm_offset_t ksym_start, ksym_end;
  174 #endif
  175 
  176 int     _udatasel, _ucodesel;
  177 u_int   basemem;
  178 
  179 int cold = 1;
  180 
  181 #ifdef COMPAT_43
  182 static void osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code);
  183 #endif
  184 #ifdef COMPAT_FREEBSD4
  185 static void freebsd4_sendsig(sig_t catcher, int sig, sigset_t *mask,
  186     u_long code);
  187 #endif
  188 
  189 long Maxmem = 0;
  190 long realmem = 0;
  191 
  192 #define PHYSMAP_SIZE    (2 * 16)
  193 
  194 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
  195 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
  196 
  197 /* must be 2 less so 0 0 can signal end of chunks */
  198 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
  199 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
  200 
  201 struct kva_md_info kmi;
  202 
  203 static struct trapframe proc0_tf;
  204 #ifndef SMP
  205 static struct pcpu __pcpu;
  206 #endif
  207 
  208 struct mtx icu_lock;
  209 
  210 struct mem_range_softc mem_range_softc;
  211 
  212 static void
  213 cpu_startup(dummy)
  214         void *dummy;
  215 {
  216         /*
  217          * Good {morning,afternoon,evening,night}.
  218          */
  219         startrtclock();
  220         printcpuinfo();
  221         panicifcpuunsupported();
  222 #ifdef PERFMON
  223         perfmon_init();
  224 #endif
  225         printf("real memory  = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem),
  226             ptoa((uintmax_t)Maxmem) / 1048576);
  227         realmem = Maxmem;
  228         /*
  229          * Display any holes after the first chunk of extended memory.
  230          */
  231         if (bootverbose) {
  232                 int indx;
  233 
  234                 printf("Physical memory chunk(s):\n");
  235                 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
  236                         vm_paddr_t size;
  237 
  238                         size = phys_avail[indx + 1] - phys_avail[indx];
  239                         printf(
  240                             "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
  241                             (uintmax_t)phys_avail[indx],
  242                             (uintmax_t)phys_avail[indx + 1] - 1,
  243                             (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
  244                 }
  245         }
  246 
  247         vm_ksubmap_init(&kmi);
  248 
  249         printf("avail memory = %ju (%ju MB)\n",
  250             ptoa((uintmax_t)cnt.v_free_count),
  251             ptoa((uintmax_t)cnt.v_free_count) / 1048576);
  252 
  253         /*
  254          * Set up buffers, so they can be used to read disk labels.
  255          */
  256         bufinit();
  257         vm_pager_bufferinit();
  258 
  259         cpu_setregs();
  260 }
  261 
  262 /*
  263  * Send an interrupt to process.
  264  *
  265  * Stack is set up to allow sigcode stored
  266  * at top to call routine, followed by kcall
  267  * to sigreturn routine below.  After sigreturn
  268  * resets the signal mask, the stack, and the
  269  * frame pointer, it returns to the user
  270  * specified pc, psl.
  271  */
  272 #ifdef COMPAT_43
  273 static void
  274 osendsig(catcher, sig, mask, code)
  275         sig_t catcher;
  276         int sig;
  277         sigset_t *mask;
  278         u_long code;
  279 {
  280         struct osigframe sf, *fp;
  281         struct proc *p;
  282         struct thread *td;
  283         struct sigacts *psp;
  284         struct trapframe *regs;
  285         int oonstack;
  286 
  287         td = curthread;
  288         p = td->td_proc;
  289         PROC_LOCK_ASSERT(p, MA_OWNED);
  290         psp = p->p_sigacts;
  291         mtx_assert(&psp->ps_mtx, MA_OWNED);
  292         regs = td->td_frame;
  293         oonstack = sigonstack(regs->tf_esp);
  294 
  295         /* Allocate space for the signal handler context. */
  296         if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
  297             SIGISMEMBER(psp->ps_sigonstack, sig)) {
  298                 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
  299                     td->td_sigstk.ss_size - sizeof(struct osigframe));
  300 #if defined(COMPAT_43)
  301                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  302 #endif
  303         } else
  304                 fp = (struct osigframe *)regs->tf_esp - 1;
  305 
  306         /* Translate the signal if appropriate. */
  307         if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
  308                 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
  309 
  310         /* Build the argument list for the signal handler. */
  311         sf.sf_signum = sig;
  312         sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
  313         if (SIGISMEMBER(psp->ps_siginfo, sig)) {
  314                 /* Signal handler installed with SA_SIGINFO. */
  315                 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
  316                 sf.sf_siginfo.si_signo = sig;
  317                 sf.sf_siginfo.si_code = code;
  318                 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
  319         } else {
  320                 /* Old FreeBSD-style arguments. */
  321                 sf.sf_arg2 = code;
  322                 sf.sf_addr = regs->tf_err;
  323                 sf.sf_ahu.sf_handler = catcher;
  324         }
  325         mtx_unlock(&psp->ps_mtx);
  326         PROC_UNLOCK(p);
  327 
  328         /* Save most if not all of trap frame. */
  329         sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
  330         sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
  331         sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
  332         sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
  333         sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
  334         sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
  335         sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
  336         sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
  337         sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
  338         sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
  339         sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
  340         sf.sf_siginfo.si_sc.sc_gs = rgs();
  341         sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
  342 
  343         /* Build the signal context to be used by osigreturn(). */
  344         sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
  345         SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
  346         sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
  347         sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
  348         sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
  349         sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
  350         sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
  351         sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
  352 
  353         /*
  354          * If we're a vm86 process, we want to save the segment registers.
  355          * We also change eflags to be our emulated eflags, not the actual
  356          * eflags.
  357          */
  358         if (regs->tf_eflags & PSL_VM) {
  359                 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
  360                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  361                 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  362 
  363                 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
  364                 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
  365                 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
  366                 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
  367 
  368                 if (vm86->vm86_has_vme == 0)
  369                         sf.sf_siginfo.si_sc.sc_ps =
  370                             (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
  371                             (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
  372 
  373                 /* See sendsig() for comments. */
  374                 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
  375         }
  376 
  377         /*
  378          * Copy the sigframe out to the user's stack.
  379          */
  380         if (copyout(&sf, fp, sizeof(*fp)) != 0) {
  381 #ifdef DEBUG
  382                 printf("process %ld has trashed its stack\n", (long)p->p_pid);
  383 #endif
  384                 PROC_LOCK(p);
  385                 sigexit(td, SIGILL);
  386         }
  387 
  388         regs->tf_esp = (int)fp;
  389         regs->tf_eip = PS_STRINGS - szosigcode;
  390         regs->tf_eflags &= ~PSL_T;
  391         regs->tf_cs = _ucodesel;
  392         regs->tf_ds = _udatasel;
  393         regs->tf_es = _udatasel;
  394         regs->tf_fs = _udatasel;
  395         load_gs(_udatasel);
  396         regs->tf_ss = _udatasel;
  397         PROC_LOCK(p);
  398         mtx_lock(&psp->ps_mtx);
  399 }
  400 #endif /* COMPAT_43 */
  401 
  402 #ifdef COMPAT_FREEBSD4
  403 static void
  404 freebsd4_sendsig(catcher, sig, mask, code)
  405         sig_t catcher;
  406         int sig;
  407         sigset_t *mask;
  408         u_long code;
  409 {
  410         struct sigframe4 sf, *sfp;
  411         struct proc *p;
  412         struct thread *td;
  413         struct sigacts *psp;
  414         struct trapframe *regs;
  415         int oonstack;
  416 
  417         td = curthread;
  418         p = td->td_proc;
  419         PROC_LOCK_ASSERT(p, MA_OWNED);
  420         psp = p->p_sigacts;
  421         mtx_assert(&psp->ps_mtx, MA_OWNED);
  422         regs = td->td_frame;
  423         oonstack = sigonstack(regs->tf_esp);
  424 
  425         /* Save user context. */
  426         bzero(&sf, sizeof(sf));
  427         sf.sf_uc.uc_sigmask = *mask;
  428         sf.sf_uc.uc_stack = td->td_sigstk;
  429         sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
  430             ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
  431         sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
  432         sf.sf_uc.uc_mcontext.mc_gs = rgs();
  433         bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
  434 
  435         /* Allocate space for the signal handler context. */
  436         if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
  437             SIGISMEMBER(psp->ps_sigonstack, sig)) {
  438                 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
  439                     td->td_sigstk.ss_size - sizeof(struct sigframe4));
  440 #if defined(COMPAT_43)
  441                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  442 #endif
  443         } else
  444                 sfp = (struct sigframe4 *)regs->tf_esp - 1;
  445 
  446         /* Translate the signal if appropriate. */
  447         if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
  448                 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
  449 
  450         /* Build the argument list for the signal handler. */
  451         sf.sf_signum = sig;
  452         sf.sf_ucontext = (register_t)&sfp->sf_uc;
  453         if (SIGISMEMBER(psp->ps_siginfo, sig)) {
  454                 /* Signal handler installed with SA_SIGINFO. */
  455                 sf.sf_siginfo = (register_t)&sfp->sf_si;
  456                 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
  457 
  458                 /* Fill in POSIX parts */
  459                 sf.sf_si.si_signo = sig;
  460                 sf.sf_si.si_code = code;
  461                 sf.sf_si.si_addr = (void *)regs->tf_err;
  462         } else {
  463                 /* Old FreeBSD-style arguments. */
  464                 sf.sf_siginfo = code;
  465                 sf.sf_addr = regs->tf_err;
  466                 sf.sf_ahu.sf_handler = catcher;
  467         }
  468         mtx_unlock(&psp->ps_mtx);
  469         PROC_UNLOCK(p);
  470 
  471         /*
  472          * If we're a vm86 process, we want to save the segment registers.
  473          * We also change eflags to be our emulated eflags, not the actual
  474          * eflags.
  475          */
  476         if (regs->tf_eflags & PSL_VM) {
  477                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  478                 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  479 
  480                 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
  481                 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
  482                 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
  483                 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
  484 
  485                 if (vm86->vm86_has_vme == 0)
  486                         sf.sf_uc.uc_mcontext.mc_eflags =
  487                             (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
  488                             (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
  489 
  490                 /*
  491                  * Clear PSL_NT to inhibit T_TSSFLT faults on return from
  492                  * syscalls made by the signal handler.  This just avoids
  493                  * wasting time for our lazy fixup of such faults.  PSL_NT
  494                  * does nothing in vm86 mode, but vm86 programs can set it
  495                  * almost legitimately in probes for old cpu types.
  496                  */
  497                 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
  498         }
  499 
  500         /*
  501          * Copy the sigframe out to the user's stack.
  502          */
  503         if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
  504 #ifdef DEBUG
  505                 printf("process %ld has trashed its stack\n", (long)p->p_pid);
  506 #endif
  507                 PROC_LOCK(p);
  508                 sigexit(td, SIGILL);
  509         }
  510 
  511         regs->tf_esp = (int)sfp;
  512         regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
  513         regs->tf_eflags &= ~PSL_T;
  514         regs->tf_cs = _ucodesel;
  515         regs->tf_ds = _udatasel;
  516         regs->tf_es = _udatasel;
  517         regs->tf_fs = _udatasel;
  518         regs->tf_ss = _udatasel;
  519         PROC_LOCK(p);
  520         mtx_lock(&psp->ps_mtx);
  521 }
  522 #endif  /* COMPAT_FREEBSD4 */
  523 
  524 void
  525 sendsig(catcher, sig, mask, code)
  526         sig_t catcher;
  527         int sig;
  528         sigset_t *mask;
  529         u_long code;
  530 {
  531         struct sigframe sf, *sfp;
  532         struct proc *p;
  533         struct thread *td;
  534         struct sigacts *psp;
  535         char *sp;
  536         struct trapframe *regs;
  537         int oonstack;
  538 
  539         td = curthread;
  540         p = td->td_proc;
  541         PROC_LOCK_ASSERT(p, MA_OWNED);
  542         psp = p->p_sigacts;
  543         mtx_assert(&psp->ps_mtx, MA_OWNED);
  544 #ifdef COMPAT_FREEBSD4
  545         if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
  546                 freebsd4_sendsig(catcher, sig, mask, code);
  547                 return;
  548         }
  549 #endif
  550 #ifdef COMPAT_43
  551         if (SIGISMEMBER(psp->ps_osigset, sig)) {
  552                 osendsig(catcher, sig, mask, code);
  553                 return;
  554         }
  555 #endif
  556         regs = td->td_frame;
  557         oonstack = sigonstack(regs->tf_esp);
  558 
  559         /* Save user context. */
  560         bzero(&sf, sizeof(sf));
  561         sf.sf_uc.uc_sigmask = *mask;
  562         sf.sf_uc.uc_stack = td->td_sigstk;
  563         sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
  564             ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
  565         sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
  566         sf.sf_uc.uc_mcontext.mc_gs = rgs();
  567         bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
  568         sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
  569         get_fpcontext(td, &sf.sf_uc.uc_mcontext);
  570         fpstate_drop(td);
  571 
  572         /* Allocate space for the signal handler context. */
  573         if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
  574             SIGISMEMBER(psp->ps_sigonstack, sig)) {
  575                 sp = td->td_sigstk.ss_sp +
  576                     td->td_sigstk.ss_size - sizeof(struct sigframe);
  577 #if defined(COMPAT_43)
  578                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  579 #endif
  580         } else
  581                 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
  582         /* Align to 16 bytes. */
  583         sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
  584 
  585         /* Translate the signal if appropriate. */
  586         if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
  587                 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
  588 
  589         /* Build the argument list for the signal handler. */
  590         sf.sf_signum = sig;
  591         sf.sf_ucontext = (register_t)&sfp->sf_uc;
  592         if (SIGISMEMBER(psp->ps_siginfo, sig)) {
  593                 /* Signal handler installed with SA_SIGINFO. */
  594                 sf.sf_siginfo = (register_t)&sfp->sf_si;
  595                 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
  596 
  597                 /* Fill in POSIX parts */
  598                 sf.sf_si.si_signo = sig;
  599                 sf.sf_si.si_code = code;
  600                 sf.sf_si.si_addr = (void *)regs->tf_err;
  601         } else {
  602                 /* Old FreeBSD-style arguments. */
  603                 sf.sf_siginfo = code;
  604                 sf.sf_addr = regs->tf_err;
  605                 sf.sf_ahu.sf_handler = catcher;
  606         }
  607         mtx_unlock(&psp->ps_mtx);
  608         PROC_UNLOCK(p);
  609 
  610         /*
  611          * If we're a vm86 process, we want to save the segment registers.
  612          * We also change eflags to be our emulated eflags, not the actual
  613          * eflags.
  614          */
  615         if (regs->tf_eflags & PSL_VM) {
  616                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  617                 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  618 
  619                 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
  620                 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
  621                 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
  622                 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
  623 
  624                 if (vm86->vm86_has_vme == 0)
  625                         sf.sf_uc.uc_mcontext.mc_eflags =
  626                             (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
  627                             (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
  628 
  629                 /*
  630                  * Clear PSL_NT to inhibit T_TSSFLT faults on return from
  631                  * syscalls made by the signal handler.  This just avoids
  632                  * wasting time for our lazy fixup of such faults.  PSL_NT
  633                  * does nothing in vm86 mode, but vm86 programs can set it
  634                  * almost legitimately in probes for old cpu types.
  635                  */
  636                 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
  637         }
  638 
  639         /*
  640          * Copy the sigframe out to the user's stack.
  641          */
  642         if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
  643 #ifdef DEBUG
  644                 printf("process %ld has trashed its stack\n", (long)p->p_pid);
  645 #endif
  646                 PROC_LOCK(p);
  647                 sigexit(td, SIGILL);
  648         }
  649 
  650         regs->tf_esp = (int)sfp;
  651         regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
  652         regs->tf_eflags &= ~PSL_T;
  653         regs->tf_cs = _ucodesel;
  654         regs->tf_ds = _udatasel;
  655         regs->tf_es = _udatasel;
  656         regs->tf_fs = _udatasel;
  657         regs->tf_ss = _udatasel;
  658         PROC_LOCK(p);
  659         mtx_lock(&psp->ps_mtx);
  660 }
  661 
  662 /*
  663  * Build siginfo_t for SA thread
  664  */
  665 void
  666 cpu_thread_siginfo(int sig, u_long code, siginfo_t *si)
  667 {
  668         struct proc *p;
  669         struct thread *td;
  670 
  671         td = curthread;
  672         p = td->td_proc;
  673         PROC_LOCK_ASSERT(p, MA_OWNED);
  674 
  675         bzero(si, sizeof(*si));
  676         si->si_signo = sig;
  677         si->si_code = code;
  678         si->si_addr = (void *)td->td_frame->tf_err;
  679         /* XXXKSE fill other fields */
  680 }
  681 
  682 /*
  683  * System call to cleanup state after a signal
  684  * has been taken.  Reset signal mask and
  685  * stack state from context left by sendsig (above).
  686  * Return to previous pc and psl as specified by
  687  * context left by sendsig. Check carefully to
  688  * make sure that the user has not modified the
  689  * state to gain improper privileges.
  690  *
  691  * MPSAFE
  692  */
  693 #ifdef COMPAT_43
  694 int
  695 osigreturn(td, uap)
  696         struct thread *td;
  697         struct osigreturn_args /* {
  698                 struct osigcontext *sigcntxp;
  699         } */ *uap;
  700 {
  701         struct osigcontext sc;
  702         struct trapframe *regs;
  703         struct osigcontext *scp;
  704         struct proc *p = td->td_proc;
  705         int eflags, error;
  706 
  707         regs = td->td_frame;
  708         error = copyin(uap->sigcntxp, &sc, sizeof(sc));
  709         if (error != 0)
  710                 return (error);
  711         scp = &sc;
  712         eflags = scp->sc_ps;
  713         if (eflags & PSL_VM) {
  714                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  715                 struct vm86_kernel *vm86;
  716 
  717                 /*
  718                  * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
  719                  * set up the vm86 area, and we can't enter vm86 mode.
  720                  */
  721                 if (td->td_pcb->pcb_ext == 0)
  722                         return (EINVAL);
  723                 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  724                 if (vm86->vm86_inited == 0)
  725                         return (EINVAL);
  726 
  727                 /* Go back to user mode if both flags are set. */
  728                 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
  729                         trapsignal(td, SIGBUS, 0);
  730 
  731                 if (vm86->vm86_has_vme) {
  732                         eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
  733                             (eflags & VME_USERCHANGE) | PSL_VM;
  734                 } else {
  735                         vm86->vm86_eflags = eflags;     /* save VIF, VIP */
  736                         eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
  737                             (eflags & VM_USERCHANGE) | PSL_VM;
  738                 }
  739                 tf->tf_vm86_ds = scp->sc_ds;
  740                 tf->tf_vm86_es = scp->sc_es;
  741                 tf->tf_vm86_fs = scp->sc_fs;
  742                 tf->tf_vm86_gs = scp->sc_gs;
  743                 tf->tf_ds = _udatasel;
  744                 tf->tf_es = _udatasel;
  745                 tf->tf_fs = _udatasel;
  746         } else {
  747                 /*
  748                  * Don't allow users to change privileged or reserved flags.
  749                  */
  750                 /*
  751                  * XXX do allow users to change the privileged flag PSL_RF.
  752                  * The cpu sets PSL_RF in tf_eflags for faults.  Debuggers
  753                  * should sometimes set it there too.  tf_eflags is kept in
  754                  * the signal context during signal handling and there is no
  755                  * other place to remember it, so the PSL_RF bit may be
  756                  * corrupted by the signal handler without us knowing.
  757                  * Corruption of the PSL_RF bit at worst causes one more or
  758                  * one less debugger trap, so allowing it is fairly harmless.
  759                  */
  760                 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
  761                         return (EINVAL);
  762                 }
  763 
  764                 /*
  765                  * Don't allow users to load a valid privileged %cs.  Let the
  766                  * hardware check for invalid selectors, excess privilege in
  767                  * other selectors, invalid %eip's and invalid %esp's.
  768                  */
  769                 if (!CS_SECURE(scp->sc_cs)) {
  770                         trapsignal(td, SIGBUS, T_PROTFLT);
  771                         return (EINVAL);
  772                 }
  773                 regs->tf_ds = scp->sc_ds;
  774                 regs->tf_es = scp->sc_es;
  775                 regs->tf_fs = scp->sc_fs;
  776         }
  777 
  778         /* Restore remaining registers. */
  779         regs->tf_eax = scp->sc_eax;
  780         regs->tf_ebx = scp->sc_ebx;
  781         regs->tf_ecx = scp->sc_ecx;
  782         regs->tf_edx = scp->sc_edx;
  783         regs->tf_esi = scp->sc_esi;
  784         regs->tf_edi = scp->sc_edi;
  785         regs->tf_cs = scp->sc_cs;
  786         regs->tf_ss = scp->sc_ss;
  787         regs->tf_isp = scp->sc_isp;
  788         regs->tf_ebp = scp->sc_fp;
  789         regs->tf_esp = scp->sc_sp;
  790         regs->tf_eip = scp->sc_pc;
  791         regs->tf_eflags = eflags;
  792 
  793         PROC_LOCK(p);
  794 #if defined(COMPAT_43)
  795         if (scp->sc_onstack & 1)
  796                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  797         else
  798                 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
  799 #endif
  800         SIGSETOLD(td->td_sigmask, scp->sc_mask);
  801         SIG_CANTMASK(td->td_sigmask);
  802         signotify(td);
  803         PROC_UNLOCK(p);
  804         return (EJUSTRETURN);
  805 }
  806 #endif /* COMPAT_43 */
  807 
  808 #ifdef COMPAT_FREEBSD4
  809 /*
  810  * MPSAFE
  811  */
  812 int
  813 freebsd4_sigreturn(td, uap)
  814         struct thread *td;
  815         struct freebsd4_sigreturn_args /* {
  816                 const ucontext4 *sigcntxp;
  817         } */ *uap;
  818 {
  819         struct ucontext4 uc;
  820         struct proc *p = td->td_proc;
  821         struct trapframe *regs;
  822         const struct ucontext4 *ucp;
  823         int cs, eflags, error;
  824 
  825         error = copyin(uap->sigcntxp, &uc, sizeof(uc));
  826         if (error != 0)
  827                 return (error);
  828         ucp = &uc;
  829         regs = td->td_frame;
  830         eflags = ucp->uc_mcontext.mc_eflags;
  831         if (eflags & PSL_VM) {
  832                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  833                 struct vm86_kernel *vm86;
  834 
  835                 /*
  836                  * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
  837                  * set up the vm86 area, and we can't enter vm86 mode.
  838                  */
  839                 if (td->td_pcb->pcb_ext == 0)
  840                         return (EINVAL);
  841                 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  842                 if (vm86->vm86_inited == 0)
  843                         return (EINVAL);
  844 
  845                 /* Go back to user mode if both flags are set. */
  846                 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
  847                         trapsignal(td, SIGBUS, 0);
  848 
  849                 if (vm86->vm86_has_vme) {
  850                         eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
  851                             (eflags & VME_USERCHANGE) | PSL_VM;
  852                 } else {
  853                         vm86->vm86_eflags = eflags;     /* save VIF, VIP */
  854                         eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
  855                             (eflags & VM_USERCHANGE) | PSL_VM;
  856                 }
  857                 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
  858                 tf->tf_eflags = eflags;
  859                 tf->tf_vm86_ds = tf->tf_ds;
  860                 tf->tf_vm86_es = tf->tf_es;
  861                 tf->tf_vm86_fs = tf->tf_fs;
  862                 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
  863                 tf->tf_ds = _udatasel;
  864                 tf->tf_es = _udatasel;
  865                 tf->tf_fs = _udatasel;
  866         } else {
  867                 /*
  868                  * Don't allow users to change privileged or reserved flags.
  869                  */
  870                 /*
  871                  * XXX do allow users to change the privileged flag PSL_RF.
  872                  * The cpu sets PSL_RF in tf_eflags for faults.  Debuggers
  873                  * should sometimes set it there too.  tf_eflags is kept in
  874                  * the signal context during signal handling and there is no
  875                  * other place to remember it, so the PSL_RF bit may be
  876                  * corrupted by the signal handler without us knowing.
  877                  * Corruption of the PSL_RF bit at worst causes one more or
  878                  * one less debugger trap, so allowing it is fairly harmless.
  879                  */
  880                 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
  881                         printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags);
  882                         return (EINVAL);
  883                 }
  884 
  885                 /*
  886                  * Don't allow users to load a valid privileged %cs.  Let the
  887                  * hardware check for invalid selectors, excess privilege in
  888                  * other selectors, invalid %eip's and invalid %esp's.
  889                  */
  890                 cs = ucp->uc_mcontext.mc_cs;
  891                 if (!CS_SECURE(cs)) {
  892                         printf("freebsd4_sigreturn: cs = 0x%x\n", cs);
  893                         trapsignal(td, SIGBUS, T_PROTFLT);
  894                         return (EINVAL);
  895                 }
  896 
  897                 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
  898         }
  899 
  900         PROC_LOCK(p);
  901 #if defined(COMPAT_43)
  902         if (ucp->uc_mcontext.mc_onstack & 1)
  903                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  904         else
  905                 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
  906 #endif
  907 
  908         td->td_sigmask = ucp->uc_sigmask;
  909         SIG_CANTMASK(td->td_sigmask);
  910         signotify(td);
  911         PROC_UNLOCK(p);
  912         return (EJUSTRETURN);
  913 }
  914 #endif  /* COMPAT_FREEBSD4 */
  915 
  916 /*
  917  * MPSAFE
  918  */
  919 int
  920 sigreturn(td, uap)
  921         struct thread *td;
  922         struct sigreturn_args /* {
  923                 const __ucontext *sigcntxp;
  924         } */ *uap;
  925 {
  926         ucontext_t uc;
  927         struct proc *p = td->td_proc;
  928         struct trapframe *regs;
  929         const ucontext_t *ucp;
  930         int cs, eflags, error, ret;
  931 
  932         error = copyin(uap->sigcntxp, &uc, sizeof(uc));
  933         if (error != 0)
  934                 return (error);
  935         ucp = &uc;
  936         regs = td->td_frame;
  937         eflags = ucp->uc_mcontext.mc_eflags;
  938         if (eflags & PSL_VM) {
  939                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  940                 struct vm86_kernel *vm86;
  941 
  942                 /*
  943                  * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
  944                  * set up the vm86 area, and we can't enter vm86 mode.
  945                  */
  946                 if (td->td_pcb->pcb_ext == 0)
  947                         return (EINVAL);
  948                 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  949                 if (vm86->vm86_inited == 0)
  950                         return (EINVAL);
  951 
  952                 /* Go back to user mode if both flags are set. */
  953                 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
  954                         trapsignal(td, SIGBUS, 0);
  955 
  956                 if (vm86->vm86_has_vme) {
  957                         eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
  958                             (eflags & VME_USERCHANGE) | PSL_VM;
  959                 } else {
  960                         vm86->vm86_eflags = eflags;     /* save VIF, VIP */
  961                         eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
  962                             (eflags & VM_USERCHANGE) | PSL_VM;
  963                 }
  964                 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
  965                 tf->tf_eflags = eflags;
  966                 tf->tf_vm86_ds = tf->tf_ds;
  967                 tf->tf_vm86_es = tf->tf_es;
  968                 tf->tf_vm86_fs = tf->tf_fs;
  969                 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
  970                 tf->tf_ds = _udatasel;
  971                 tf->tf_es = _udatasel;
  972                 tf->tf_fs = _udatasel;
  973         } else {
  974                 /*
  975                  * Don't allow users to change privileged or reserved flags.
  976                  */
  977                 /*
  978                  * XXX do allow users to change the privileged flag PSL_RF.
  979                  * The cpu sets PSL_RF in tf_eflags for faults.  Debuggers
  980                  * should sometimes set it there too.  tf_eflags is kept in
  981                  * the signal context during signal handling and there is no
  982                  * other place to remember it, so the PSL_RF bit may be
  983                  * corrupted by the signal handler without us knowing.
  984                  * Corruption of the PSL_RF bit at worst causes one more or
  985                  * one less debugger trap, so allowing it is fairly harmless.
  986                  */
  987                 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
  988                         printf("sigreturn: eflags = 0x%x\n", eflags);
  989                         return (EINVAL);
  990                 }
  991 
  992                 /*
  993                  * Don't allow users to load a valid privileged %cs.  Let the
  994                  * hardware check for invalid selectors, excess privilege in
  995                  * other selectors, invalid %eip's and invalid %esp's.
  996                  */
  997                 cs = ucp->uc_mcontext.mc_cs;
  998                 if (!CS_SECURE(cs)) {
  999                         printf("sigreturn: cs = 0x%x\n", cs);
 1000                         trapsignal(td, SIGBUS, T_PROTFLT);
 1001                         return (EINVAL);
 1002                 }
 1003 
 1004                 ret = set_fpcontext(td, &ucp->uc_mcontext);
 1005                 if (ret != 0)
 1006                         return (ret);
 1007                 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
 1008         }
 1009 
 1010         PROC_LOCK(p);
 1011 #if defined(COMPAT_43)
 1012         if (ucp->uc_mcontext.mc_onstack & 1)
 1013                 td->td_sigstk.ss_flags |= SS_ONSTACK;
 1014         else
 1015                 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
 1016 #endif
 1017 
 1018         td->td_sigmask = ucp->uc_sigmask;
 1019         SIG_CANTMASK(td->td_sigmask);
 1020         signotify(td);
 1021         PROC_UNLOCK(p);
 1022         return (EJUSTRETURN);
 1023 }
 1024 
 1025 /*
 1026  * Machine dependent boot() routine
 1027  *
 1028  * I haven't seen anything to put here yet
 1029  * Possibly some stuff might be grafted back here from boot()
 1030  */
 1031 void
 1032 cpu_boot(int howto)
 1033 {
 1034 }
 1035 
 1036 /* Get current clock frequency for the given cpu id. */
 1037 int
 1038 cpu_est_clockrate(int cpu_id, uint64_t *rate)
 1039 {
 1040         register_t reg;
 1041         uint64_t tsc1, tsc2;
 1042 
 1043         if (pcpu_find(cpu_id) == NULL || rate == NULL)
 1044                 return (EINVAL);
 1045         if (!tsc_present)
 1046                 return (EOPNOTSUPP);
 1047 
 1048         /* If we're booting, trust the rate calibrated moments ago. */
 1049         if (cold) {
 1050                 *rate = tsc_freq;
 1051                 return (0);
 1052         }
 1053 
 1054 #ifdef SMP
 1055         /* Schedule ourselves on the indicated cpu. */
 1056         mtx_lock_spin(&sched_lock);
 1057         sched_bind(curthread, cpu_id);
 1058         mtx_unlock_spin(&sched_lock);
 1059 #endif
 1060 
 1061         /* Calibrate by measuring a short delay. */
 1062         reg = intr_disable();
 1063         tsc1 = rdtsc();
 1064         DELAY(1000);
 1065         tsc2 = rdtsc();
 1066         intr_restore(reg);
 1067 
 1068 #ifdef SMP
 1069         mtx_lock_spin(&sched_lock);
 1070         sched_unbind(curthread);
 1071         mtx_unlock_spin(&sched_lock);
 1072 #endif
 1073 
 1074         /*
 1075          * Calculate the difference in readings, convert to Mhz, and
 1076          * subtract 0.5% of the total.  Empirical testing has shown that
 1077          * overhead in DELAY() works out to approximately this value.
 1078          */
 1079         tsc2 -= tsc1;
 1080         *rate = tsc2 * 1000 - tsc2 * 5;
 1081         return (0);
 1082 }
 1083 
 1084 /*
 1085  * Shutdown the CPU as much as possible
 1086  */
 1087 void
 1088 cpu_halt(void)
 1089 {
 1090         for (;;)
 1091                 __asm__ ("hlt");
 1092 }
 1093 
 1094 /*
 1095  * Hook to idle the CPU when possible.  In the SMP case we default to
 1096  * off because a halted cpu will not currently pick up a new thread in the
 1097  * run queue until the next timer tick.  If turned on this will result in
 1098  * approximately a 4.2% loss in real time performance in buildworld tests
 1099  * (but improves user and sys times oddly enough), and saves approximately
 1100  * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3).
 1101  *
 1102  * XXX we need to have a cpu mask of idle cpus and generate an IPI or
 1103  * otherwise generate some sort of interrupt to wake up cpus sitting in HLT.
 1104  * Then we can have our cake and eat it too.
 1105  *
 1106  * XXX I'm turning it on for SMP as well by default for now.  It seems to
 1107  * help lock contention somewhat, and this is critical for HTT. -Peter
 1108  */
 1109 static int      cpu_idle_hlt = 1;
 1110 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
 1111     &cpu_idle_hlt, 0, "Idle loop HLT enable");
 1112 
 1113 static void
 1114 cpu_idle_default(void)
 1115 {
 1116         /*
 1117          * we must absolutely guarentee that hlt is the
 1118          * absolute next instruction after sti or we
 1119          * introduce a timing window.
 1120          */
 1121         __asm __volatile("sti; hlt");
 1122 }
 1123 
 1124 /*
 1125  * Note that we have to be careful here to avoid a race between checking
 1126  * sched_runnable() and actually halting.  If we don't do this, we may waste
 1127  * the time between calling hlt and the next interrupt even though there
 1128  * is a runnable process.
 1129  */
 1130 void
 1131 cpu_idle(void)
 1132 {
 1133 
 1134 #ifdef SMP
 1135         if (mp_grab_cpu_hlt())
 1136                 return;
 1137 #endif
 1138 
 1139         if (cpu_idle_hlt) {
 1140                 disable_intr();
 1141                 if (sched_runnable())
 1142                         enable_intr();
 1143                 else
 1144                         (*cpu_idle_hook)();
 1145         }
 1146 }
 1147 
 1148 /* Other subsystems (e.g., ACPI) can hook this later. */
 1149 void (*cpu_idle_hook)(void) = cpu_idle_default;
 1150 
 1151 /*
 1152  * Clear registers on exec
 1153  */
 1154 void
 1155 exec_setregs(td, entry, stack, ps_strings)
 1156         struct thread *td;
 1157         u_long entry;
 1158         u_long stack;
 1159         u_long ps_strings;
 1160 {
 1161         struct trapframe *regs = td->td_frame;
 1162         struct pcb *pcb = td->td_pcb;
 1163 
 1164         /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
 1165         pcb->pcb_gs = _udatasel;
 1166         load_gs(_udatasel);
 1167 
 1168         if (td->td_proc->p_md.md_ldt)
 1169                 user_ldt_free(td);
 1170   
 1171         bzero((char *)regs, sizeof(struct trapframe));
 1172         regs->tf_eip = entry;
 1173         regs->tf_esp = stack;
 1174         regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
 1175         regs->tf_ss = _udatasel;
 1176         regs->tf_ds = _udatasel;
 1177         regs->tf_es = _udatasel;
 1178         regs->tf_fs = _udatasel;
 1179         regs->tf_cs = _ucodesel;
 1180 
 1181         /* PS_STRINGS value for BSD/OS binaries.  It is 0 for non-BSD/OS. */
 1182         regs->tf_ebx = ps_strings;
 1183 
 1184         /*
 1185          * Reset the hardware debug registers if they were in use.
 1186          * They won't have any meaning for the newly exec'd process.  
 1187          */
 1188         if (pcb->pcb_flags & PCB_DBREGS) {
 1189                 pcb->pcb_dr0 = 0;
 1190                 pcb->pcb_dr1 = 0;
 1191                 pcb->pcb_dr2 = 0;
 1192                 pcb->pcb_dr3 = 0;
 1193                 pcb->pcb_dr6 = 0;
 1194                 pcb->pcb_dr7 = 0;
 1195                 if (pcb == PCPU_GET(curpcb)) {
 1196                         /*
 1197                          * Clear the debug registers on the running
 1198                          * CPU, otherwise they will end up affecting
 1199                          * the next process we switch to.
 1200                          */
 1201                         reset_dbregs();
 1202                 }
 1203                 pcb->pcb_flags &= ~PCB_DBREGS;
 1204         }
 1205 
 1206         /*
 1207          * Initialize the math emulator (if any) for the current process.
 1208          * Actually, just clear the bit that says that the emulator has
 1209          * been initialized.  Initialization is delayed until the process
 1210          * traps to the emulator (if it is done at all) mainly because
 1211          * emulators don't provide an entry point for initialization.
 1212          */
 1213         td->td_pcb->pcb_flags &= ~FP_SOFTFP;
 1214 
 1215         /*
 1216          * Drop the FP state if we hold it, so that the process gets a
 1217          * clean FP state if it uses the FPU again.
 1218          */
 1219         fpstate_drop(td);
 1220 
 1221         /*
 1222          * XXX - Linux emulator
 1223          * Make sure sure edx is 0x0 on entry. Linux binaries depend
 1224          * on it.
 1225          */
 1226         td->td_retval[1] = 0;
 1227 }
 1228 
 1229 void
 1230 cpu_setregs(void)
 1231 {
 1232         unsigned int cr0;
 1233 
 1234         cr0 = rcr0();
 1235 
 1236         /*
 1237          * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
 1238          *
 1239          * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
 1240          * instructions.  We must set the CR0_MP bit and use the CR0_TS
 1241          * bit to control the trap, because setting the CR0_EM bit does
 1242          * not cause WAIT instructions to trap.  It's important to trap
 1243          * WAIT instructions - otherwise the "wait" variants of no-wait
 1244          * control instructions would degenerate to the "no-wait" variants
 1245          * after FP context switches but work correctly otherwise.  It's
 1246          * particularly important to trap WAITs when there is no NPX -
 1247          * otherwise the "wait" variants would always degenerate.
 1248          *
 1249          * Try setting CR0_NE to get correct error reporting on 486DX's.
 1250          * Setting it should fail or do nothing on lesser processors.
 1251          */
 1252         cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
 1253         load_cr0(cr0);
 1254         load_gs(_udatasel);
 1255 }
 1256 
 1257 static int
 1258 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
 1259 {
 1260         int error;
 1261         error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
 1262                 req);
 1263         if (!error && req->newptr)
 1264                 resettodr();
 1265         return (error);
 1266 }
 1267 
 1268 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
 1269         &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
 1270 
 1271 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
 1272         CTLFLAG_RW, &disable_rtc_set, 0, "");
 1273 
 1274 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 
 1275         CTLFLAG_RD, &bootinfo, bootinfo, "");
 1276 
 1277 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
 1278         CTLFLAG_RW, &wall_cmos_clock, 0, "");
 1279 
 1280 u_long bootdev;         /* not a struct cdev *- encoding is different */
 1281 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
 1282         CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
 1283 
 1284 /*
 1285  * Initialize 386 and configure to run kernel
 1286  */
 1287 
 1288 /*
 1289  * Initialize segments & interrupt table
 1290  */
 1291 
 1292 int _default_ldt;
 1293 union descriptor gdt[NGDT * MAXCPU];    /* global descriptor table */
 1294 static struct gate_descriptor idt0[NIDT];
 1295 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
 1296 union descriptor ldt[NLDT];             /* local descriptor table */
 1297 struct region_descriptor r_gdt, r_idt;  /* table descriptors */
 1298 
 1299 int private_tss;                        /* flag indicating private tss */
 1300 
 1301 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
 1302 extern int has_f00f_bug;
 1303 #endif
 1304 
 1305 static struct i386tss dblfault_tss;
 1306 static char dblfault_stack[PAGE_SIZE];
 1307 
 1308 extern  vm_offset_t     proc0kstack;
 1309 
 1310 
 1311 /*
 1312  * software prototypes -- in more palatable form.
 1313  *
 1314  * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
 1315  * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
 1316  */
 1317 struct soft_segment_descriptor gdt_segs[] = {
 1318 /* GNULL_SEL    0 Null Descriptor */
 1319 {       0x0,                    /* segment base address  */
 1320         0x0,                    /* length */
 1321         0,                      /* segment type */
 1322         0,                      /* segment descriptor priority level */
 1323         0,                      /* segment descriptor present */
 1324         0, 0,
 1325         0,                      /* default 32 vs 16 bit size */
 1326         0                       /* limit granularity (byte/page units)*/ },
 1327 /* GPRIV_SEL    1 SMP Per-Processor Private Data Descriptor */
 1328 {       0x0,                    /* segment base address  */
 1329         0xfffff,                /* length - all address space */
 1330         SDT_MEMRWA,             /* segment type */
 1331         0,                      /* segment descriptor priority level */
 1332         1,                      /* segment descriptor present */
 1333         0, 0,
 1334         1,                      /* default 32 vs 16 bit size */
 1335         1                       /* limit granularity (byte/page units)*/ },
 1336 /* GUFS_SEL     2 %fs Descriptor for user */
 1337 {       0x0,                    /* segment base address  */
 1338         0xfffff,                /* length - all address space */
 1339         SDT_MEMRWA,             /* segment type */
 1340         SEL_UPL,                /* segment descriptor priority level */
 1341         1,                      /* segment descriptor present */
 1342         0, 0,
 1343         1,                      /* default 32 vs 16 bit size */
 1344         1                       /* limit granularity (byte/page units)*/ },
 1345 /* GUGS_SEL     3 %gs Descriptor for user */
 1346 {       0x0,                    /* segment base address  */
 1347         0xfffff,                /* length - all address space */
 1348         SDT_MEMRWA,             /* segment type */
 1349         SEL_UPL,                /* segment descriptor priority level */
 1350         1,                      /* segment descriptor present */
 1351         0, 0,
 1352         1,                      /* default 32 vs 16 bit size */
 1353         1                       /* limit granularity (byte/page units)*/ },
 1354 /* GCODE_SEL    4 Code Descriptor for kernel */
 1355 {       0x0,                    /* segment base address  */
 1356         0xfffff,                /* length - all address space */
 1357         SDT_MEMERA,             /* segment type */
 1358         0,                      /* segment descriptor priority level */
 1359         1,                      /* segment descriptor present */
 1360         0, 0,
 1361         1,                      /* default 32 vs 16 bit size */
 1362         1                       /* limit granularity (byte/page units)*/ },
 1363 /* GDATA_SEL    5 Data Descriptor for kernel */
 1364 {       0x0,                    /* segment base address  */
 1365         0xfffff,                /* length - all address space */
 1366         SDT_MEMRWA,             /* segment type */
 1367         0,                      /* segment descriptor priority level */
 1368         1,                      /* segment descriptor present */
 1369         0, 0,
 1370         1,                      /* default 32 vs 16 bit size */
 1371         1                       /* limit granularity (byte/page units)*/ },
 1372 /* GUCODE_SEL   6 Code Descriptor for user */
 1373 {       0x0,                    /* segment base address  */
 1374         0xfffff,                /* length - all address space */
 1375         SDT_MEMERA,             /* segment type */
 1376         SEL_UPL,                /* segment descriptor priority level */
 1377         1,                      /* segment descriptor present */
 1378         0, 0,
 1379         1,                      /* default 32 vs 16 bit size */
 1380         1                       /* limit granularity (byte/page units)*/ },
 1381 /* GUDATA_SEL   7 Data Descriptor for user */
 1382 {       0x0,                    /* segment base address  */
 1383         0xfffff,                /* length - all address space */
 1384         SDT_MEMRWA,             /* segment type */
 1385         SEL_UPL,                /* segment descriptor priority level */
 1386         1,                      /* segment descriptor present */
 1387         0, 0,
 1388         1,                      /* default 32 vs 16 bit size */
 1389         1                       /* limit granularity (byte/page units)*/ },
 1390 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
 1391 {       0x400,                  /* segment base address */
 1392         0xfffff,                /* length */
 1393         SDT_MEMRWA,             /* segment type */
 1394         0,                      /* segment descriptor priority level */
 1395         1,                      /* segment descriptor present */
 1396         0, 0,
 1397         1,                      /* default 32 vs 16 bit size */
 1398         1                       /* limit granularity (byte/page units)*/ },
 1399 /* GPROC0_SEL   9 Proc 0 Tss Descriptor */
 1400 {
 1401         0x0,                    /* segment base address */
 1402         sizeof(struct i386tss)-1,/* length  */
 1403         SDT_SYS386TSS,          /* segment type */
 1404         0,                      /* segment descriptor priority level */
 1405         1,                      /* segment descriptor present */
 1406         0, 0,
 1407         0,                      /* unused - default 32 vs 16 bit size */
 1408         0                       /* limit granularity (byte/page units)*/ },
 1409 /* GLDT_SEL     10 LDT Descriptor */
 1410 {       (int) ldt,              /* segment base address  */
 1411         sizeof(ldt)-1,          /* length - all address space */
 1412         SDT_SYSLDT,             /* segment type */
 1413         SEL_UPL,                /* segment descriptor priority level */
 1414         1,                      /* segment descriptor present */
 1415         0, 0,
 1416         0,                      /* unused - default 32 vs 16 bit size */
 1417         0                       /* limit granularity (byte/page units)*/ },
 1418 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
 1419 {       (int) ldt,              /* segment base address  */
 1420         (512 * sizeof(union descriptor)-1),             /* length */
 1421         SDT_SYSLDT,             /* segment type */
 1422         0,                      /* segment descriptor priority level */
 1423         1,                      /* segment descriptor present */
 1424         0, 0,
 1425         0,                      /* unused - default 32 vs 16 bit size */
 1426         0                       /* limit granularity (byte/page units)*/ },
 1427 /* GPANIC_SEL   12 Panic Tss Descriptor */
 1428 {       (int) &dblfault_tss,    /* segment base address  */
 1429         sizeof(struct i386tss)-1,/* length - all address space */
 1430         SDT_SYS386TSS,          /* segment type */
 1431         0,                      /* segment descriptor priority level */
 1432         1,                      /* segment descriptor present */
 1433         0, 0,
 1434         0,                      /* unused - default 32 vs 16 bit size */
 1435         0                       /* limit granularity (byte/page units)*/ },
 1436 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
 1437 {       0,                      /* segment base address (overwritten)  */
 1438         0xfffff,                /* length */
 1439         SDT_MEMERA,             /* segment type */
 1440         0,                      /* segment descriptor priority level */
 1441         1,                      /* segment descriptor present */
 1442         0, 0,
 1443         0,                      /* default 32 vs 16 bit size */
 1444         1                       /* limit granularity (byte/page units)*/ },
 1445 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
 1446 {       0,                      /* segment base address (overwritten)  */
 1447         0xfffff,                /* length */
 1448         SDT_MEMERA,             /* segment type */
 1449         0,                      /* segment descriptor priority level */
 1450         1,                      /* segment descriptor present */
 1451         0, 0,
 1452         0,                      /* default 32 vs 16 bit size */
 1453         1                       /* limit granularity (byte/page units)*/ },
 1454 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
 1455 {       0,                      /* segment base address (overwritten) */
 1456         0xfffff,                /* length */
 1457         SDT_MEMRWA,             /* segment type */
 1458         0,                      /* segment descriptor priority level */
 1459         1,                      /* segment descriptor present */
 1460         0, 0,
 1461         1,                      /* default 32 vs 16 bit size */
 1462         1                       /* limit granularity (byte/page units)*/ },
 1463 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
 1464 {       0,                      /* segment base address (overwritten) */
 1465         0xfffff,                /* length */
 1466         SDT_MEMRWA,             /* segment type */
 1467         0,                      /* segment descriptor priority level */
 1468         1,                      /* segment descriptor present */
 1469         0, 0,
 1470         0,                      /* default 32 vs 16 bit size */
 1471         1                       /* limit granularity (byte/page units)*/ },
 1472 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
 1473 {       0,                      /* segment base address (overwritten) */
 1474         0xfffff,                /* length */
 1475         SDT_MEMRWA,             /* segment type */
 1476         0,                      /* segment descriptor priority level */
 1477         1,                      /* segment descriptor present */
 1478         0, 0,
 1479         0,                      /* default 32 vs 16 bit size */
 1480         1                       /* limit granularity (byte/page units)*/ },
 1481 /* GNDIS_SEL    18 NDIS Descriptor */
 1482 {       0x0,                    /* segment base address  */
 1483         0x0,                    /* length */
 1484         0,                      /* segment type */
 1485         0,                      /* segment descriptor priority level */
 1486         0,                      /* segment descriptor present */
 1487         0, 0,
 1488         0,                      /* default 32 vs 16 bit size */
 1489         0                       /* limit granularity (byte/page units)*/ },
 1490 };
 1491 
 1492 static struct soft_segment_descriptor ldt_segs[] = {
 1493         /* Null Descriptor - overwritten by call gate */
 1494 {       0x0,                    /* segment base address  */
 1495         0x0,                    /* length - all address space */
 1496         0,                      /* segment type */
 1497         0,                      /* segment descriptor priority level */
 1498         0,                      /* segment descriptor present */
 1499         0, 0,
 1500         0,                      /* default 32 vs 16 bit size */
 1501         0                       /* limit granularity (byte/page units)*/ },
 1502         /* Null Descriptor - overwritten by call gate */
 1503 {       0x0,                    /* segment base address  */
 1504         0x0,                    /* length - all address space */
 1505         0,                      /* segment type */
 1506         0,                      /* segment descriptor priority level */
 1507         0,                      /* segment descriptor present */
 1508         0, 0,
 1509         0,                      /* default 32 vs 16 bit size */
 1510         0                       /* limit granularity (byte/page units)*/ },
 1511         /* Null Descriptor - overwritten by call gate */
 1512 {       0x0,                    /* segment base address  */
 1513         0x0,                    /* length - all address space */
 1514         0,                      /* segment type */
 1515         0,                      /* segment descriptor priority level */
 1516         0,                      /* segment descriptor present */
 1517         0, 0,
 1518         0,                      /* default 32 vs 16 bit size */
 1519         0                       /* limit granularity (byte/page units)*/ },
 1520         /* Code Descriptor for user */
 1521 {       0x0,                    /* segment base address  */
 1522         0xfffff,                /* length - all address space */
 1523         SDT_MEMERA,             /* segment type */
 1524         SEL_UPL,                /* segment descriptor priority level */
 1525         1,                      /* segment descriptor present */
 1526         0, 0,
 1527         1,                      /* default 32 vs 16 bit size */
 1528         1                       /* limit granularity (byte/page units)*/ },
 1529         /* Null Descriptor - overwritten by call gate */
 1530 {       0x0,                    /* segment base address  */
 1531         0x0,                    /* length - all address space */
 1532         0,                      /* segment type */
 1533         0,                      /* segment descriptor priority level */
 1534         0,                      /* segment descriptor present */
 1535         0, 0,
 1536         0,                      /* default 32 vs 16 bit size */
 1537         0                       /* limit granularity (byte/page units)*/ },
 1538         /* Data Descriptor for user */
 1539 {       0x0,                    /* segment base address  */
 1540         0xfffff,                /* length - all address space */
 1541         SDT_MEMRWA,             /* segment type */
 1542         SEL_UPL,                /* segment descriptor priority level */
 1543         1,                      /* segment descriptor present */
 1544         0, 0,
 1545         1,                      /* default 32 vs 16 bit size */
 1546         1                       /* limit granularity (byte/page units)*/ },
 1547 };
 1548 
 1549 void
 1550 setidt(idx, func, typ, dpl, selec)
 1551         int idx;
 1552         inthand_t *func;
 1553         int typ;
 1554         int dpl;
 1555         int selec;
 1556 {
 1557         struct gate_descriptor *ip;
 1558 
 1559         ip = idt + idx;
 1560         ip->gd_looffset = (int)func;
 1561         ip->gd_selector = selec;
 1562         ip->gd_stkcpy = 0;
 1563         ip->gd_xx = 0;
 1564         ip->gd_type = typ;
 1565         ip->gd_dpl = dpl;
 1566         ip->gd_p = 1;
 1567         ip->gd_hioffset = ((int)func)>>16 ;
 1568 }
 1569 
 1570 #define IDTVEC(name)    __CONCAT(X,name)
 1571 
 1572 extern inthand_t
 1573         IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
 1574         IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
 1575         IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
 1576         IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
 1577         IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
 1578 
 1579 #ifdef DDB
 1580 /*
 1581  * Display the index and function name of any IDT entries that don't use
 1582  * the default 'rsvd' entry point.
 1583  */
 1584 DB_SHOW_COMMAND(idt, db_show_idt)
 1585 {
 1586         struct gate_descriptor *ip;
 1587         int idx, quit;
 1588         uintptr_t func;
 1589 
 1590         ip = idt;
 1591         db_setup_paging(db_simple_pager, &quit, db_lines_per_page);
 1592         for (idx = 0, quit = 0; idx < NIDT; idx++) {
 1593                 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
 1594                 if (func != (uintptr_t)&IDTVEC(rsvd)) {
 1595                         db_printf("%3d\t", idx);
 1596                         db_printsym(func, DB_STGY_PROC);
 1597                         db_printf("\n");
 1598                 }
 1599                 ip++;
 1600         }
 1601 }
 1602 #endif
 1603 
 1604 void
 1605 sdtossd(sd, ssd)
 1606         struct segment_descriptor *sd;
 1607         struct soft_segment_descriptor *ssd;
 1608 {
 1609         ssd->ssd_base  = (sd->sd_hibase << 24) | sd->sd_lobase;
 1610         ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
 1611         ssd->ssd_type  = sd->sd_type;
 1612         ssd->ssd_dpl   = sd->sd_dpl;
 1613         ssd->ssd_p     = sd->sd_p;
 1614         ssd->ssd_def32 = sd->sd_def32;
 1615         ssd->ssd_gran  = sd->sd_gran;
 1616 }
 1617 
 1618 /*
 1619  * Populate the (physmap) array with base/bound pairs describing the
 1620  * available physical memory in the system, then test this memory and
 1621  * build the phys_avail array describing the actually-available memory.
 1622  *
 1623  * If we cannot accurately determine the physical memory map, then use
 1624  * value from the 0xE801 call, and failing that, the RTC.
 1625  *
 1626  * Total memory size may be set by the kernel environment variable
 1627  * hw.physmem or the compile-time define MAXMEM.
 1628  *
 1629  * XXX first should be vm_paddr_t.
 1630  */
 1631 static void
 1632 getmemsize(int first)
 1633 {
 1634         int i, physmap_idx, pa_indx, da_indx;
 1635         int hasbrokenint12, has_smap;
 1636         u_long physmem_tunable;
 1637         u_int extmem;
 1638         struct vm86frame vmf;
 1639         struct vm86context vmc;
 1640         vm_paddr_t pa, physmap[PHYSMAP_SIZE];
 1641         pt_entry_t *pte;
 1642         struct bios_smap *smap;
 1643         quad_t dcons_addr, dcons_size;
 1644 
 1645 #ifdef XBOX
 1646         if (arch_i386_is_xbox) {
 1647                 /*
 1648                  * We queried the memory size before, so chop off 4MB for
 1649                  * the framebuffer and inform the OS of this.
 1650                  */
 1651                 physmap[0] = 0;
 1652                 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE;
 1653                 physmap_idx = 0;
 1654                 has_smap = 0;
 1655                 goto physmap_done;
 1656         }
 1657 #endif
 1658 
 1659         hasbrokenint12 = 0;
 1660         TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
 1661         bzero(&vmf, sizeof(vmf));
 1662         bzero(physmap, sizeof(physmap));
 1663         basemem = 0;
 1664         has_smap = 0;
 1665 
 1666         /*
 1667          * Some newer BIOSes has broken INT 12H implementation which cause
 1668          * kernel panic immediately. In this case, we need to scan SMAP
 1669          * with INT 15:E820 first, then determine base memory size.
 1670          */
 1671         if (hasbrokenint12) {
 1672                 goto int15e820;
 1673         }
 1674 
 1675         /*
 1676          * Perform "base memory" related probes & setup
 1677          */
 1678         vm86_intcall(0x12, &vmf);
 1679         basemem = vmf.vmf_ax;
 1680         if (basemem > 640) {
 1681                 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
 1682                         basemem);
 1683                 basemem = 640;
 1684         }
 1685 
 1686         /*
 1687          * XXX if biosbasemem is now < 640, there is a `hole'
 1688          * between the end of base memory and the start of
 1689          * ISA memory.  The hole may be empty or it may
 1690          * contain BIOS code or data.  Map it read/write so
 1691          * that the BIOS can write to it.  (Memory from 0 to
 1692          * the physical end of the kernel is mapped read-only
 1693          * to begin with and then parts of it are remapped.
 1694          * The parts that aren't remapped form holes that
 1695          * remain read-only and are unused by the kernel.
 1696          * The base memory area is below the physical end of
 1697          * the kernel and right now forms a read-only hole.
 1698          * The part of it from PAGE_SIZE to
 1699          * (trunc_page(biosbasemem * 1024) - 1) will be
 1700          * remapped and used by the kernel later.)
 1701          *
 1702          * This code is similar to the code used in
 1703          * pmap_mapdev, but since no memory needs to be
 1704          * allocated we simply change the mapping.
 1705          */
 1706         for (pa = trunc_page(basemem * 1024);
 1707              pa < ISA_HOLE_START; pa += PAGE_SIZE)
 1708                 pmap_kenter(KERNBASE + pa, pa);
 1709 
 1710         /*
 1711          * Map pages between basemem and ISA_HOLE_START, if any, r/w into
 1712          * the vm86 page table so that vm86 can scribble on them using
 1713          * the vm86 map too.  XXX: why 2 ways for this and only 1 way for
 1714          * page 0, at least as initialized here?
 1715          */
 1716         pte = (pt_entry_t *)vm86paddr;
 1717         for (i = basemem / 4; i < 160; i++)
 1718                 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
 1719 
 1720 int15e820:
 1721         /*
 1722          * map page 1 R/W into the kernel page table so we can use it
 1723          * as a buffer.  The kernel will unmap this page later.
 1724          */
 1725         pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
 1726 
 1727         /*
 1728          * get memory map with INT 15:E820
 1729          */
 1730         vmc.npages = 0;
 1731         smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
 1732         vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
 1733 
 1734         physmap_idx = 0;
 1735         vmf.vmf_ebx = 0;
 1736         do {
 1737                 vmf.vmf_eax = 0xE820;
 1738                 vmf.vmf_edx = SMAP_SIG;
 1739                 vmf.vmf_ecx = sizeof(struct bios_smap);
 1740                 i = vm86_datacall(0x15, &vmf, &vmc);
 1741                 if (i || vmf.vmf_eax != SMAP_SIG)
 1742                         break;
 1743                 if (boothowto & RB_VERBOSE)
 1744                         printf("SMAP type=%02x base=%016llx len=%016llx\n",
 1745                             smap->type, smap->base, smap->length);
 1746                 has_smap = 1;
 1747 
 1748                 if (smap->type != 0x01)
 1749                         continue;
 1750 
 1751                 if (smap->length == 0)
 1752                         continue;
 1753 
 1754 #ifndef PAE
 1755                 if (smap->base >= 0xffffffff) {
 1756                         printf("%uK of memory above 4GB ignored\n",
 1757                             (u_int)(smap->length / 1024));
 1758                         continue;
 1759                 }
 1760 #endif
 1761 
 1762                 for (i = 0; i <= physmap_idx; i += 2) {
 1763                         if (smap->base < physmap[i + 1]) {
 1764                                 if (boothowto & RB_VERBOSE)
 1765                                         printf(
 1766         "Overlapping or non-montonic memory region, ignoring second region\n");
 1767                                 continue;
 1768                         }
 1769                 }
 1770 
 1771                 if (smap->base == physmap[physmap_idx + 1]) {
 1772                         physmap[physmap_idx + 1] += smap->length;
 1773                         continue;
 1774                 }
 1775 
 1776                 physmap_idx += 2;
 1777                 if (physmap_idx == PHYSMAP_SIZE) {
 1778                         printf(
 1779                 "Too many segments in the physical address map, giving up\n");
 1780                         break;
 1781                 }
 1782                 physmap[physmap_idx] = smap->base;
 1783                 physmap[physmap_idx + 1] = smap->base + smap->length;
 1784         } while (vmf.vmf_ebx != 0);
 1785 
 1786         /*
 1787          * Perform "base memory" related probes & setup based on SMAP
 1788          */
 1789         if (basemem == 0) {
 1790                 for (i = 0; i <= physmap_idx; i += 2) {
 1791                         if (physmap[i] == 0x00000000) {
 1792                                 basemem = physmap[i + 1] / 1024;
 1793                                 break;
 1794                         }
 1795                 }
 1796 
 1797                 /*
 1798                  * XXX this function is horribly organized and has to the same
 1799                  * things that it does above here.
 1800                  */
 1801                 if (basemem == 0)
 1802                         basemem = 640;
 1803                 if (basemem > 640) {
 1804                         printf(
 1805                     "Preposterous BIOS basemem of %uK, truncating to 640K\n",
 1806                             basemem);
 1807                         basemem = 640;
 1808                 }
 1809 
 1810                 /*
 1811                  * Let vm86 scribble on pages between basemem and
 1812                  * ISA_HOLE_START, as above.
 1813                  */
 1814                 for (pa = trunc_page(basemem * 1024);
 1815                      pa < ISA_HOLE_START; pa += PAGE_SIZE)
 1816                         pmap_kenter(KERNBASE + pa, pa);
 1817                 pte = (pt_entry_t *)vm86paddr;
 1818                 for (i = basemem / 4; i < 160; i++)
 1819                         pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
 1820         }
 1821 
 1822         if (physmap[1] != 0)
 1823                 goto physmap_done;
 1824 
 1825         /*
 1826          * If we failed above, try memory map with INT 15:E801
 1827          */
 1828         vmf.vmf_ax = 0xE801;
 1829         if (vm86_intcall(0x15, &vmf) == 0) {
 1830                 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
 1831         } else {
 1832 #if 0
 1833                 vmf.vmf_ah = 0x88;
 1834                 vm86_intcall(0x15, &vmf);
 1835                 extmem = vmf.vmf_ax;
 1836 #else
 1837                 /*
 1838                  * Prefer the RTC value for extended memory.
 1839                  */
 1840                 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
 1841 #endif
 1842         }
 1843 
 1844         /*
 1845          * Special hack for chipsets that still remap the 384k hole when
 1846          * there's 16MB of memory - this really confuses people that
 1847          * are trying to use bus mastering ISA controllers with the
 1848          * "16MB limit"; they only have 16MB, but the remapping puts
 1849          * them beyond the limit.
 1850          *
 1851          * If extended memory is between 15-16MB (16-17MB phys address range),
 1852          *      chop it to 15MB.
 1853          */
 1854         if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
 1855                 extmem = 15 * 1024;
 1856 
 1857         physmap[0] = 0;
 1858         physmap[1] = basemem * 1024;
 1859         physmap_idx = 2;
 1860         physmap[physmap_idx] = 0x100000;
 1861         physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
 1862 
 1863 physmap_done:
 1864         /*
 1865          * Now, physmap contains a map of physical memory.
 1866          */
 1867 
 1868 #ifdef SMP
 1869         /* make hole for AP bootstrap code */
 1870         physmap[1] = mp_bootaddress(physmap[1]);
 1871 #endif
 1872 
 1873         /*
 1874          * Maxmem isn't the "maximum memory", it's one larger than the
 1875          * highest page of the physical address space.  It should be
 1876          * called something like "Maxphyspage".  We may adjust this 
 1877          * based on ``hw.physmem'' and the results of the memory test.
 1878          */
 1879         Maxmem = atop(physmap[physmap_idx + 1]);
 1880 
 1881 #ifdef MAXMEM
 1882         Maxmem = MAXMEM / 4;
 1883 #endif
 1884 
 1885         if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
 1886                 Maxmem = atop(physmem_tunable);
 1887 
 1888         /*
 1889          * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
 1890          * the amount of memory in the system.
 1891          */
 1892         if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
 1893                 Maxmem = atop(physmap[physmap_idx + 1]);
 1894 
 1895         if (atop(physmap[physmap_idx + 1]) != Maxmem &&
 1896             (boothowto & RB_VERBOSE))
 1897                 printf("Physical memory use set to %ldK\n", Maxmem * 4);
 1898 
 1899         /*
 1900          * If Maxmem has been increased beyond what the system has detected,
 1901          * extend the last memory segment to the new limit.
 1902          */ 
 1903         if (atop(physmap[physmap_idx + 1]) < Maxmem)
 1904                 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
 1905 
 1906         /* call pmap initialization to make new kernel address space */
 1907         pmap_bootstrap(first, 0);
 1908 
 1909         /*
 1910          * Size up each available chunk of physical memory.
 1911          */
 1912         physmap[0] = PAGE_SIZE;         /* mask off page 0 */
 1913         pa_indx = 0;
 1914         da_indx = 1;
 1915         phys_avail[pa_indx++] = physmap[0];
 1916         phys_avail[pa_indx] = physmap[0];
 1917         dump_avail[da_indx] = physmap[0];
 1918         pte = CMAP1;
 1919 
 1920         /*
 1921          * Get dcons buffer address
 1922          */
 1923         if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
 1924             getenv_quad("dcons.size", &dcons_size) == 0)
 1925                 dcons_addr = 0;
 1926 
 1927         /*
 1928          * physmap is in bytes, so when converting to page boundaries,
 1929          * round up the start address and round down the end address.
 1930          */
 1931         for (i = 0; i <= physmap_idx; i += 2) {
 1932                 vm_paddr_t end;
 1933 
 1934                 end = ptoa((vm_paddr_t)Maxmem);
 1935                 if (physmap[i + 1] < end)
 1936                         end = trunc_page(physmap[i + 1]);
 1937                 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
 1938                         int tmp, page_bad, full;
 1939                         int *ptr = (int *)CADDR1;
 1940 
 1941                         full = FALSE;
 1942                         /*
 1943                          * block out kernel memory as not available.
 1944                          */
 1945                         if (pa >= KERNLOAD && pa < first)
 1946                                 goto do_dump_avail;
 1947 
 1948                         /*
 1949                          * block out dcons buffer
 1950                          */
 1951                         if (dcons_addr > 0
 1952                             && pa >= trunc_page(dcons_addr)
 1953                             && pa < dcons_addr + dcons_size)
 1954                                 goto do_dump_avail;
 1955 
 1956                         page_bad = FALSE;
 1957 
 1958                         /*
 1959                          * map page into kernel: valid, read/write,non-cacheable
 1960                          */
 1961                         *pte = pa | PG_V | PG_RW | PG_N;
 1962                         invltlb();
 1963 
 1964                         tmp = *(int *)ptr;
 1965                         /*
 1966                          * Test for alternating 1's and 0's
 1967                          */
 1968                         *(volatile int *)ptr = 0xaaaaaaaa;
 1969                         if (*(volatile int *)ptr != 0xaaaaaaaa)
 1970                                 page_bad = TRUE;
 1971                         /*
 1972                          * Test for alternating 0's and 1's
 1973                          */
 1974                         *(volatile int *)ptr = 0x55555555;
 1975                         if (*(volatile int *)ptr != 0x55555555)
 1976                                 page_bad = TRUE;
 1977                         /*
 1978                          * Test for all 1's
 1979                          */
 1980                         *(volatile int *)ptr = 0xffffffff;
 1981                         if (*(volatile int *)ptr != 0xffffffff)
 1982                                 page_bad = TRUE;
 1983                         /*
 1984                          * Test for all 0's
 1985                          */
 1986                         *(volatile int *)ptr = 0x0;
 1987                         if (*(volatile int *)ptr != 0x0)
 1988                                 page_bad = TRUE;
 1989                         /*
 1990                          * Restore original value.
 1991                          */
 1992                         *(int *)ptr = tmp;
 1993 
 1994                         /*
 1995                          * Adjust array of valid/good pages.
 1996                          */
 1997                         if (page_bad == TRUE)
 1998                                 continue;
 1999                         /*
 2000                          * If this good page is a continuation of the
 2001                          * previous set of good pages, then just increase
 2002                          * the end pointer. Otherwise start a new chunk.
 2003                          * Note that "end" points one higher than end,
 2004                          * making the range >= start and < end.
 2005                          * If we're also doing a speculative memory
 2006                          * test and we at or past the end, bump up Maxmem
 2007                          * so that we keep going. The first bad page
 2008                          * will terminate the loop.
 2009                          */
 2010                         if (phys_avail[pa_indx] == pa) {
 2011                                 phys_avail[pa_indx] += PAGE_SIZE;
 2012                         } else {
 2013                                 pa_indx++;
 2014                                 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
 2015                                         printf(
 2016                 "Too many holes in the physical address space, giving up\n");
 2017                                         pa_indx--;
 2018                                         full = TRUE;
 2019                                         goto do_dump_avail;
 2020                                 }
 2021                                 phys_avail[pa_indx++] = pa;     /* start */
 2022                                 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
 2023                         }
 2024                         physmem++;
 2025 do_dump_avail:
 2026                         if (dump_avail[da_indx] == pa) {
 2027                                 dump_avail[da_indx] += PAGE_SIZE;
 2028                         } else {
 2029                                 da_indx++;
 2030                                 if (da_indx == DUMP_AVAIL_ARRAY_END) {
 2031                                         da_indx--;
 2032                                         goto do_next;
 2033                                 }
 2034                                 dump_avail[da_indx++] = pa;     /* start */
 2035                                 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
 2036                         }
 2037 do_next:
 2038                         if (full)
 2039                                 break;
 2040                 }
 2041         }
 2042         *pte = 0;
 2043         invltlb();
 2044 
 2045         /*
 2046          * XXX
 2047          * The last chunk must contain at least one page plus the message
 2048          * buffer to avoid complicating other code (message buffer address
 2049          * calculation, etc.).
 2050          */
 2051         while (phys_avail[pa_indx - 1] + PAGE_SIZE +
 2052             round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
 2053                 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
 2054                 phys_avail[pa_indx--] = 0;
 2055                 phys_avail[pa_indx--] = 0;
 2056         }
 2057 
 2058         Maxmem = atop(phys_avail[pa_indx]);
 2059 
 2060         /* Trim off space for the message buffer. */
 2061         phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
 2062 
 2063         avail_end = phys_avail[pa_indx];
 2064 }
 2065 
 2066 void
 2067 init386(first)
 2068         int first;
 2069 {
 2070         struct gate_descriptor *gdp;
 2071         int gsel_tss, metadata_missing, off, x;
 2072         struct pcpu *pc;
 2073 
 2074         thread0.td_kstack = proc0kstack;
 2075         thread0.td_pcb = (struct pcb *)
 2076            (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
 2077 
 2078         /*
 2079          * This may be done better later if it gets more high level
 2080          * components in it. If so just link td->td_proc here.
 2081          */
 2082         proc_linkup(&proc0, &ksegrp0, &thread0);
 2083 
 2084         metadata_missing = 0;
 2085         if (bootinfo.bi_modulep) {
 2086                 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
 2087                 preload_bootstrap_relocate(KERNBASE);
 2088         } else {
 2089                 metadata_missing = 1;
 2090         }
 2091         if (envmode == 1)
 2092                 kern_envp = static_env;
 2093         else if (bootinfo.bi_envp)
 2094                 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
 2095 
 2096         /* Init basic tunables, hz etc */
 2097         init_param1();
 2098 
 2099         /*
 2100          * Make gdt memory segments.  All segments cover the full 4GB
 2101          * of address space and permissions are enforced at page level.
 2102          */
 2103         gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
 2104         gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
 2105         gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
 2106         gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
 2107         gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
 2108         gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
 2109 
 2110 #ifdef SMP
 2111         pc = &SMP_prvspace[0].pcpu;
 2112 #else
 2113         pc = &__pcpu;
 2114 #endif
 2115         gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
 2116         gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
 2117         gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
 2118 
 2119         for (x = 0; x < NGDT; x++)
 2120                 ssdtosd(&gdt_segs[x], &gdt[x].sd);
 2121 
 2122         r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
 2123         r_gdt.rd_base =  (int) gdt;
 2124         lgdt(&r_gdt);
 2125 
 2126         pcpu_init(pc, 0, sizeof(struct pcpu));
 2127         PCPU_SET(prvspace, pc);
 2128         PCPU_SET(curthread, &thread0);
 2129         PCPU_SET(curpcb, thread0.td_pcb);
 2130 
 2131         /*
 2132          * Initialize mutexes.
 2133          *
 2134          * icu_lock: in order to allow an interrupt to occur in a critical
 2135          *           section, to set pcpu->ipending (etc...) properly, we
 2136          *           must be able to get the icu lock, so it can't be
 2137          *           under witness.
 2138          */
 2139         mutex_init();
 2140         mtx_init(&clock_lock, "clk", NULL, MTX_SPIN);
 2141         mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
 2142 
 2143         /* make ldt memory segments */
 2144         ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
 2145         ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
 2146         for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
 2147                 ssdtosd(&ldt_segs[x], &ldt[x].sd);
 2148 
 2149         _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
 2150         lldt(_default_ldt);
 2151         PCPU_SET(currentldt, _default_ldt);
 2152 
 2153         /* exceptions */
 2154         for (x = 0; x < NIDT; x++)
 2155                 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
 2156                     GSEL(GCODE_SEL, SEL_KPL));
 2157         setidt(IDT_DE, &IDTVEC(div),  SDT_SYS386TGT, SEL_KPL,
 2158             GSEL(GCODE_SEL, SEL_KPL));
 2159         setidt(IDT_DB, &IDTVEC(dbg),  SDT_SYS386IGT, SEL_KPL,
 2160             GSEL(GCODE_SEL, SEL_KPL));
 2161         setidt(IDT_NMI, &IDTVEC(nmi),  SDT_SYS386IGT, SEL_KPL,
 2162             GSEL(GCODE_SEL, SEL_KPL));
 2163         setidt(IDT_BP, &IDTVEC(bpt),  SDT_SYS386IGT, SEL_UPL,
 2164             GSEL(GCODE_SEL, SEL_KPL));
 2165         setidt(IDT_OF, &IDTVEC(ofl),  SDT_SYS386TGT, SEL_UPL,
 2166             GSEL(GCODE_SEL, SEL_KPL));
 2167         setidt(IDT_BR, &IDTVEC(bnd),  SDT_SYS386TGT, SEL_KPL,
 2168             GSEL(GCODE_SEL, SEL_KPL));
 2169         setidt(IDT_UD, &IDTVEC(ill),  SDT_SYS386TGT, SEL_KPL,
 2170             GSEL(GCODE_SEL, SEL_KPL));
 2171         setidt(IDT_NM, &IDTVEC(dna),  SDT_SYS386TGT, SEL_KPL
 2172             , GSEL(GCODE_SEL, SEL_KPL));
 2173         setidt(IDT_DF, 0,  SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
 2174         setidt(IDT_FPUGP, &IDTVEC(fpusegm),  SDT_SYS386TGT, SEL_KPL,
 2175             GSEL(GCODE_SEL, SEL_KPL));
 2176         setidt(IDT_TS, &IDTVEC(tss),  SDT_SYS386TGT, SEL_KPL,
 2177             GSEL(GCODE_SEL, SEL_KPL));
 2178         setidt(IDT_NP, &IDTVEC(missing),  SDT_SYS386TGT, SEL_KPL,
 2179             GSEL(GCODE_SEL, SEL_KPL));
 2180         setidt(IDT_SS, &IDTVEC(stk),  SDT_SYS386TGT, SEL_KPL,
 2181             GSEL(GCODE_SEL, SEL_KPL));
 2182         setidt(IDT_GP, &IDTVEC(prot),  SDT_SYS386TGT, SEL_KPL,
 2183             GSEL(GCODE_SEL, SEL_KPL));
 2184         setidt(IDT_PF, &IDTVEC(page),  SDT_SYS386IGT, SEL_KPL,
 2185             GSEL(GCODE_SEL, SEL_KPL));
 2186         setidt(IDT_MF, &IDTVEC(fpu),  SDT_SYS386TGT, SEL_KPL,
 2187             GSEL(GCODE_SEL, SEL_KPL));
 2188         setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
 2189             GSEL(GCODE_SEL, SEL_KPL));
 2190         setidt(IDT_MC, &IDTVEC(mchk),  SDT_SYS386TGT, SEL_KPL,
 2191             GSEL(GCODE_SEL, SEL_KPL));
 2192         setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
 2193             GSEL(GCODE_SEL, SEL_KPL));
 2194         setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
 2195             GSEL(GCODE_SEL, SEL_KPL));
 2196 
 2197         r_idt.rd_limit = sizeof(idt0) - 1;
 2198         r_idt.rd_base = (int) idt;
 2199         lidt(&r_idt);
 2200 
 2201 #ifdef XBOX
 2202         /*
 2203          * The following code queries the PCI ID of 0:0:0. For the XBOX,
 2204          * This should be 0x10de / 0x02a5.
 2205          *
 2206          * This is exactly what Linux does.
 2207          */
 2208         outl(0xcf8, 0x80000000);
 2209         if (inl(0xcfc) == 0x02a510de) {
 2210                 arch_i386_is_xbox = 1;
 2211                 pic16l_setled(XBOX_LED_GREEN);
 2212 
 2213                 /*
 2214                  * We are an XBOX, but we may have either 64MB or 128MB of
 2215                  * memory. The PCI host bridge should be programmed for this,
 2216                  * so we just query it. 
 2217                  */
 2218                 outl (0xcf8, 0x80000084);
 2219                 arch_i386_xbox_memsize = (inl (0xcfc) == 0x7FFFFFF) ? 128 : 64;
 2220         }
 2221 #endif /* XBOX */
 2222 
 2223         /*
 2224          * Initialize the console before we print anything out.
 2225          */
 2226         cninit();
 2227 
 2228         if (metadata_missing)
 2229                 printf("WARNING: loader(8) metadata is missing!\n");
 2230 
 2231 #ifdef DEV_ISA
 2232         elcr_probe();
 2233         atpic_startup();
 2234 #endif
 2235 
 2236 #ifdef DDB
 2237         ksym_start = bootinfo.bi_symtab;
 2238         ksym_end = bootinfo.bi_esymtab;
 2239 #endif
 2240 
 2241         kdb_init();
 2242 
 2243 #ifdef KDB
 2244         if (boothowto & RB_KDB)
 2245                 kdb_enter("Boot flags requested debugger");
 2246 #endif
 2247 
 2248         finishidentcpu();       /* Final stage of CPU initialization */
 2249         setidt(IDT_UD, &IDTVEC(ill),  SDT_SYS386TGT, SEL_KPL,
 2250             GSEL(GCODE_SEL, SEL_KPL));
 2251         setidt(IDT_GP, &IDTVEC(prot),  SDT_SYS386TGT, SEL_KPL,
 2252             GSEL(GCODE_SEL, SEL_KPL));
 2253         initializecpu();        /* Initialize CPU registers */
 2254 
 2255         /* make an initial tss so cpu can get interrupt stack on syscall! */
 2256         /* Note: -16 is so we can grow the trapframe if we came from vm86 */
 2257         PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
 2258             KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
 2259         PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
 2260         gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
 2261         private_tss = 0;
 2262         PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
 2263         PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
 2264         PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
 2265         ltr(gsel_tss);
 2266 
 2267         /* pointer to selector slot for %fs/%gs */
 2268         PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
 2269 
 2270         dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
 2271             dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
 2272         dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
 2273             dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
 2274 #ifdef PAE
 2275         dblfault_tss.tss_cr3 = (int)IdlePDPT;
 2276 #else
 2277         dblfault_tss.tss_cr3 = (int)IdlePTD;
 2278 #endif
 2279         dblfault_tss.tss_eip = (int)dblfault_handler;
 2280         dblfault_tss.tss_eflags = PSL_KERNEL;
 2281         dblfault_tss.tss_ds = dblfault_tss.tss_es =
 2282             dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
 2283         dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
 2284         dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
 2285         dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
 2286 
 2287         vm86_initialize();
 2288         getmemsize(first);
 2289         init_param2(physmem);
 2290 
 2291         /* now running on new page tables, configured,and u/iom is accessible */
 2292 
 2293         /* Map the message buffer. */
 2294         for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
 2295                 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
 2296 
 2297         msgbufinit(msgbufp, MSGBUF_SIZE);
 2298 
 2299         /* make a call gate to reenter kernel with */
 2300         gdp = &ldt[LSYS5CALLS_SEL].gd;
 2301 
 2302         x = (int) &IDTVEC(lcall_syscall);
 2303         gdp->gd_looffset = x;
 2304         gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
 2305         gdp->gd_stkcpy = 1;
 2306         gdp->gd_type = SDT_SYS386CGT;
 2307         gdp->gd_dpl = SEL_UPL;
 2308         gdp->gd_p = 1;
 2309         gdp->gd_hioffset = x >> 16;
 2310 
 2311         /* XXX does this work? */
 2312         /* XXX yes! */
 2313         ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
 2314         ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
 2315 
 2316         /* transfer to user mode */
 2317 
 2318         _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
 2319         _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
 2320 
 2321         /* setup proc 0's pcb */
 2322         thread0.td_pcb->pcb_flags = 0; /* XXXKSE */
 2323 #ifdef PAE
 2324         thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
 2325 #else
 2326         thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
 2327 #endif
 2328         thread0.td_pcb->pcb_ext = 0;
 2329         thread0.td_frame = &proc0_tf;
 2330 }
 2331 
 2332 void
 2333 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
 2334 {
 2335 
 2336         pcpu->pc_acpi_id = 0xffffffff;
 2337 }
 2338 
 2339 void
 2340 spinlock_enter(void)
 2341 {
 2342         struct thread *td;
 2343 
 2344         td = curthread;
 2345         if (td->td_md.md_spinlock_count == 0)
 2346                 td->td_md.md_saved_flags = intr_disable();
 2347         td->td_md.md_spinlock_count++;
 2348         critical_enter();
 2349 }
 2350 
 2351 void
 2352 spinlock_exit(void)
 2353 {
 2354         struct thread *td;
 2355 
 2356         td = curthread;
 2357         critical_exit();
 2358         td->td_md.md_spinlock_count--;
 2359         if (td->td_md.md_spinlock_count == 0)
 2360                 intr_restore(td->td_md.md_saved_flags);
 2361 }
 2362 
 2363 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
 2364 static void f00f_hack(void *unused);
 2365 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL)
 2366 
 2367 static void
 2368 f00f_hack(void *unused)
 2369 {
 2370         struct gate_descriptor *new_idt;
 2371         vm_offset_t tmp;
 2372 
 2373         if (!has_f00f_bug)
 2374                 return;
 2375 
 2376         GIANT_REQUIRED;
 2377 
 2378         printf("Intel Pentium detected, installing workaround for F00F bug\n");
 2379 
 2380         tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
 2381         if (tmp == 0)
 2382                 panic("kmem_alloc returned 0");
 2383 
 2384         /* Put the problematic entry (#6) at the end of the lower page. */
 2385         new_idt = (struct gate_descriptor*)
 2386             (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
 2387         bcopy(idt, new_idt, sizeof(idt0));
 2388         r_idt.rd_base = (u_int)new_idt;
 2389         lidt(&r_idt);
 2390         idt = new_idt;
 2391         if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
 2392                            VM_PROT_READ, FALSE) != KERN_SUCCESS)
 2393                 panic("vm_map_protect failed");
 2394 }
 2395 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
 2396 
 2397 /*
 2398  * Construct a PCB from a trapframe. This is called from kdb_trap() where
 2399  * we want to start a backtrace from the function that caused us to enter
 2400  * the debugger. We have the context in the trapframe, but base the trace
 2401  * on the PCB. The PCB doesn't have to be perfect, as long as it contains
 2402  * enough for a backtrace.
 2403  */
 2404 void
 2405 makectx(struct trapframe *tf, struct pcb *pcb)
 2406 {
 2407 
 2408         pcb->pcb_edi = tf->tf_edi;
 2409         pcb->pcb_esi = tf->tf_esi;
 2410         pcb->pcb_ebp = tf->tf_ebp;
 2411         pcb->pcb_ebx = tf->tf_ebx;
 2412         pcb->pcb_eip = tf->tf_eip;
 2413         pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
 2414 }
 2415 
 2416 int
 2417 ptrace_set_pc(struct thread *td, u_long addr)
 2418 {
 2419 
 2420         td->td_frame->tf_eip = addr;
 2421         return (0);
 2422 }
 2423 
 2424 int
 2425 ptrace_single_step(struct thread *td)
 2426 {
 2427         td->td_frame->tf_eflags |= PSL_T;
 2428         return (0);
 2429 }
 2430 
 2431 int
 2432 ptrace_clear_single_step(struct thread *td)
 2433 {
 2434         td->td_frame->tf_eflags &= ~PSL_T;
 2435         return (0);
 2436 }
 2437 
 2438 int
 2439 fill_regs(struct thread *td, struct reg *regs)
 2440 {
 2441         struct pcb *pcb;
 2442         struct trapframe *tp;
 2443 
 2444         tp = td->td_frame;
 2445         pcb = td->td_pcb;
 2446         regs->r_fs = tp->tf_fs;
 2447         regs->r_es = tp->tf_es;
 2448         regs->r_ds = tp->tf_ds;
 2449         regs->r_edi = tp->tf_edi;
 2450         regs->r_esi = tp->tf_esi;
 2451         regs->r_ebp = tp->tf_ebp;
 2452         regs->r_ebx = tp->tf_ebx;
 2453         regs->r_edx = tp->tf_edx;
 2454         regs->r_ecx = tp->tf_ecx;
 2455         regs->r_eax = tp->tf_eax;
 2456         regs->r_eip = tp->tf_eip;
 2457         regs->r_cs = tp->tf_cs;
 2458         regs->r_eflags = tp->tf_eflags;
 2459         regs->r_esp = tp->tf_esp;
 2460         regs->r_ss = tp->tf_ss;
 2461         regs->r_gs = pcb->pcb_gs;
 2462         return (0);
 2463 }
 2464 
 2465 int
 2466 set_regs(struct thread *td, struct reg *regs)
 2467 {
 2468         struct pcb *pcb;
 2469         struct trapframe *tp;
 2470 
 2471         tp = td->td_frame;
 2472         if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
 2473             !CS_SECURE(regs->r_cs))
 2474                 return (EINVAL);
 2475         pcb = td->td_pcb;
 2476         tp->tf_fs = regs->r_fs;
 2477         tp->tf_es = regs->r_es;
 2478         tp->tf_ds = regs->r_ds;
 2479         tp->tf_edi = regs->r_edi;
 2480         tp->tf_esi = regs->r_esi;
 2481         tp->tf_ebp = regs->r_ebp;
 2482         tp->tf_ebx = regs->r_ebx;
 2483         tp->tf_edx = regs->r_edx;
 2484         tp->tf_ecx = regs->r_ecx;
 2485         tp->tf_eax = regs->r_eax;
 2486         tp->tf_eip = regs->r_eip;
 2487         tp->tf_cs = regs->r_cs;
 2488         tp->tf_eflags = regs->r_eflags;
 2489         tp->tf_esp = regs->r_esp;
 2490         tp->tf_ss = regs->r_ss;
 2491         pcb->pcb_gs = regs->r_gs;
 2492         return (0);
 2493 }
 2494 
 2495 #ifdef CPU_ENABLE_SSE
 2496 static void
 2497 fill_fpregs_xmm(sv_xmm, sv_87)
 2498         struct savexmm *sv_xmm;
 2499         struct save87 *sv_87;
 2500 {
 2501         register struct env87 *penv_87 = &sv_87->sv_env;
 2502         register struct envxmm *penv_xmm = &sv_xmm->sv_env;
 2503         int i;
 2504 
 2505         bzero(sv_87, sizeof(*sv_87));
 2506 
 2507         /* FPU control/status */
 2508         penv_87->en_cw = penv_xmm->en_cw;
 2509         penv_87->en_sw = penv_xmm->en_sw;
 2510         penv_87->en_tw = penv_xmm->en_tw;
 2511         penv_87->en_fip = penv_xmm->en_fip;
 2512         penv_87->en_fcs = penv_xmm->en_fcs;
 2513         penv_87->en_opcode = penv_xmm->en_opcode;
 2514         penv_87->en_foo = penv_xmm->en_foo;
 2515         penv_87->en_fos = penv_xmm->en_fos;
 2516 
 2517         /* FPU registers */
 2518         for (i = 0; i < 8; ++i)
 2519                 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
 2520 }
 2521 
 2522 static void
 2523 set_fpregs_xmm(sv_87, sv_xmm)
 2524         struct save87 *sv_87;
 2525         struct savexmm *sv_xmm;
 2526 {
 2527         register struct env87 *penv_87 = &sv_87->sv_env;
 2528         register struct envxmm *penv_xmm = &sv_xmm->sv_env;
 2529         int i;
 2530 
 2531         /* FPU control/status */
 2532         penv_xmm->en_cw = penv_87->en_cw;
 2533         penv_xmm->en_sw = penv_87->en_sw;
 2534         penv_xmm->en_tw = penv_87->en_tw;
 2535         penv_xmm->en_fip = penv_87->en_fip;
 2536         penv_xmm->en_fcs = penv_87->en_fcs;
 2537         penv_xmm->en_opcode = penv_87->en_opcode;
 2538         penv_xmm->en_foo = penv_87->en_foo;
 2539         penv_xmm->en_fos = penv_87->en_fos;
 2540 
 2541         /* FPU registers */
 2542         for (i = 0; i < 8; ++i)
 2543                 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
 2544 }
 2545 #endif /* CPU_ENABLE_SSE */
 2546 
 2547 int
 2548 fill_fpregs(struct thread *td, struct fpreg *fpregs)
 2549 {
 2550 #ifdef CPU_ENABLE_SSE
 2551         if (cpu_fxsr) {
 2552                 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm,
 2553                                                 (struct save87 *)fpregs);
 2554                 return (0);
 2555         }
 2556 #endif /* CPU_ENABLE_SSE */
 2557         bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
 2558         return (0);
 2559 }
 2560 
 2561 int
 2562 set_fpregs(struct thread *td, struct fpreg *fpregs)
 2563 {
 2564 #ifdef CPU_ENABLE_SSE
 2565         if (cpu_fxsr) {
 2566                 set_fpregs_xmm((struct save87 *)fpregs,
 2567                                            &td->td_pcb->pcb_save.sv_xmm);
 2568                 return (0);
 2569         }
 2570 #endif /* CPU_ENABLE_SSE */
 2571         bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs);
 2572         return (0);
 2573 }
 2574 
 2575 /*
 2576  * Get machine context.
 2577  */
 2578 int
 2579 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
 2580 {
 2581         struct trapframe *tp;
 2582 
 2583         tp = td->td_frame;
 2584 
 2585         PROC_LOCK(curthread->td_proc);
 2586         mcp->mc_onstack = sigonstack(tp->tf_esp);
 2587         PROC_UNLOCK(curthread->td_proc);
 2588         mcp->mc_gs = td->td_pcb->pcb_gs;
 2589         mcp->mc_fs = tp->tf_fs;
 2590         mcp->mc_es = tp->tf_es;
 2591         mcp->mc_ds = tp->tf_ds;
 2592         mcp->mc_edi = tp->tf_edi;
 2593         mcp->mc_esi = tp->tf_esi;
 2594         mcp->mc_ebp = tp->tf_ebp;
 2595         mcp->mc_isp = tp->tf_isp;
 2596         mcp->mc_eflags = tp->tf_eflags;
 2597         if (flags & GET_MC_CLEAR_RET) {
 2598                 mcp->mc_eax = 0;
 2599                 mcp->mc_edx = 0;
 2600                 mcp->mc_eflags &= ~PSL_C;
 2601         } else {
 2602                 mcp->mc_eax = tp->tf_eax;
 2603                 mcp->mc_edx = tp->tf_edx;
 2604         }
 2605         mcp->mc_ebx = tp->tf_ebx;
 2606         mcp->mc_ecx = tp->tf_ecx;
 2607         mcp->mc_eip = tp->tf_eip;
 2608         mcp->mc_cs = tp->tf_cs;
 2609         mcp->mc_esp = tp->tf_esp;
 2610         mcp->mc_ss = tp->tf_ss;
 2611         mcp->mc_len = sizeof(*mcp);
 2612         get_fpcontext(td, mcp);
 2613         return (0);
 2614 }
 2615 
 2616 /*
 2617  * Set machine context.
 2618  *
 2619  * However, we don't set any but the user modifiable flags, and we won't
 2620  * touch the cs selector.
 2621  */
 2622 int
 2623 set_mcontext(struct thread *td, const mcontext_t *mcp)
 2624 {
 2625         struct trapframe *tp;
 2626         int eflags, ret;
 2627 
 2628         tp = td->td_frame;
 2629         if (mcp->mc_len != sizeof(*mcp))
 2630                 return (EINVAL);
 2631         eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
 2632             (tp->tf_eflags & ~PSL_USERCHANGE);
 2633         if ((ret = set_fpcontext(td, mcp)) == 0) {
 2634                 tp->tf_fs = mcp->mc_fs;
 2635                 tp->tf_es = mcp->mc_es;
 2636                 tp->tf_ds = mcp->mc_ds;
 2637                 tp->tf_edi = mcp->mc_edi;
 2638                 tp->tf_esi = mcp->mc_esi;
 2639                 tp->tf_ebp = mcp->mc_ebp;
 2640                 tp->tf_ebx = mcp->mc_ebx;
 2641                 tp->tf_edx = mcp->mc_edx;
 2642                 tp->tf_ecx = mcp->mc_ecx;
 2643                 tp->tf_eax = mcp->mc_eax;
 2644                 tp->tf_eip = mcp->mc_eip;
 2645                 tp->tf_eflags = eflags;
 2646                 tp->tf_esp = mcp->mc_esp;
 2647                 tp->tf_ss = mcp->mc_ss;
 2648                 td->td_pcb->pcb_gs = mcp->mc_gs;
 2649                 ret = 0;
 2650         }
 2651         return (ret);
 2652 }
 2653 
 2654 static void
 2655 get_fpcontext(struct thread *td, mcontext_t *mcp)
 2656 {
 2657 #ifndef DEV_NPX
 2658         mcp->mc_fpformat = _MC_FPFMT_NODEV;
 2659         mcp->mc_ownedfp = _MC_FPOWNED_NONE;
 2660 #else
 2661         union savefpu *addr;
 2662 
 2663         /*
 2664          * XXX mc_fpstate might be misaligned, since its declaration is not
 2665          * unportabilized using __attribute__((aligned(16))) like the
 2666          * declaration of struct savemm, and anyway, alignment doesn't work
 2667          * for auto variables since we don't use gcc's pessimal stack
 2668          * alignment.  Work around this by abusing the spare fields after
 2669          * mcp->mc_fpstate.
 2670          *
 2671          * XXX unpessimize most cases by only aligning when fxsave might be
 2672          * called, although this requires knowing too much about
 2673          * npxgetregs()'s internals.
 2674          */
 2675         addr = (union savefpu *)&mcp->mc_fpstate;
 2676         if (td == PCPU_GET(fpcurthread) &&
 2677 #ifdef CPU_ENABLE_SSE
 2678             cpu_fxsr &&
 2679 #endif
 2680             ((uintptr_t)(void *)addr & 0xF)) {
 2681                 do
 2682                         addr = (void *)((char *)addr + 4);
 2683                 while ((uintptr_t)(void *)addr & 0xF);
 2684         }
 2685         mcp->mc_ownedfp = npxgetregs(td, addr);
 2686         if (addr != (union savefpu *)&mcp->mc_fpstate) {
 2687                 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
 2688                 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2));
 2689         }
 2690         mcp->mc_fpformat = npxformat();
 2691 #endif
 2692 }
 2693 
 2694 static int
 2695 set_fpcontext(struct thread *td, const mcontext_t *mcp)
 2696 {
 2697         union savefpu *addr;
 2698 
 2699         if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
 2700                 return (0);
 2701         else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
 2702             mcp->mc_fpformat != _MC_FPFMT_XMM)
 2703                 return (EINVAL);
 2704         else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
 2705                 /* We don't care what state is left in the FPU or PCB. */
 2706                 fpstate_drop(td);
 2707         else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
 2708             mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
 2709                 /* XXX align as above. */
 2710                 addr = (union savefpu *)&mcp->mc_fpstate;
 2711                 if (td == PCPU_GET(fpcurthread) &&
 2712 #ifdef CPU_ENABLE_SSE
 2713                     cpu_fxsr &&
 2714 #endif
 2715                     ((uintptr_t)(void *)addr & 0xF)) {
 2716                         do
 2717                                 addr = (void *)((char *)addr + 4);
 2718                         while ((uintptr_t)(void *)addr & 0xF);
 2719                         bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate));
 2720                 }
 2721 #ifdef DEV_NPX
 2722 #ifdef CPU_ENABLE_SSE
 2723                 if (cpu_fxsr)
 2724                         addr->sv_xmm.sv_env.en_mxcsr &= cpu_mxcsr_mask;
 2725 #endif
 2726                 /*
 2727                  * XXX we violate the dubious requirement that npxsetregs()
 2728                  * be called with interrupts disabled.
 2729                  */
 2730                 npxsetregs(td, addr);
 2731 #endif
 2732                 /*
 2733                  * Don't bother putting things back where they were in the
 2734                  * misaligned case, since we know that the caller won't use
 2735                  * them again.
 2736                  */
 2737         } else
 2738                 return (EINVAL);
 2739         return (0);
 2740 }
 2741 
 2742 static void
 2743 fpstate_drop(struct thread *td)
 2744 {
 2745         register_t s;
 2746 
 2747         s = intr_disable();
 2748 #ifdef DEV_NPX
 2749         if (PCPU_GET(fpcurthread) == td)
 2750                 npxdrop();
 2751 #endif
 2752         /*
 2753          * XXX force a full drop of the npx.  The above only drops it if we
 2754          * owned it.  npxgetregs() has the same bug in the !cpu_fxsr case.
 2755          *
 2756          * XXX I don't much like npxgetregs()'s semantics of doing a full
 2757          * drop.  Dropping only to the pcb matches fnsave's behaviour.
 2758          * We only need to drop to !PCB_INITDONE in sendsig().  But
 2759          * sendsig() is the only caller of npxgetregs()... perhaps we just
 2760          * have too many layers.
 2761          */
 2762         curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE;
 2763         intr_restore(s);
 2764 }
 2765 
 2766 int
 2767 fill_dbregs(struct thread *td, struct dbreg *dbregs)
 2768 {
 2769         struct pcb *pcb;
 2770 
 2771         if (td == NULL) {
 2772                 dbregs->dr[0] = rdr0();
 2773                 dbregs->dr[1] = rdr1();
 2774                 dbregs->dr[2] = rdr2();
 2775                 dbregs->dr[3] = rdr3();
 2776                 dbregs->dr[4] = rdr4();
 2777                 dbregs->dr[5] = rdr5();
 2778                 dbregs->dr[6] = rdr6();
 2779                 dbregs->dr[7] = rdr7();
 2780         } else {
 2781                 pcb = td->td_pcb;
 2782                 dbregs->dr[0] = pcb->pcb_dr0;
 2783                 dbregs->dr[1] = pcb->pcb_dr1;
 2784                 dbregs->dr[2] = pcb->pcb_dr2;
 2785                 dbregs->dr[3] = pcb->pcb_dr3;
 2786                 dbregs->dr[4] = 0;
 2787                 dbregs->dr[5] = 0;
 2788                 dbregs->dr[6] = pcb->pcb_dr6;
 2789                 dbregs->dr[7] = pcb->pcb_dr7;
 2790         }
 2791         return (0);
 2792 }
 2793 
 2794 int
 2795 set_dbregs(struct thread *td, struct dbreg *dbregs)
 2796 {
 2797         struct pcb *pcb;
 2798         int i;
 2799         u_int32_t mask1, mask2;
 2800 
 2801         if (td == NULL) {
 2802                 load_dr0(dbregs->dr[0]);
 2803                 load_dr1(dbregs->dr[1]);
 2804                 load_dr2(dbregs->dr[2]);
 2805                 load_dr3(dbregs->dr[3]);
 2806                 load_dr4(dbregs->dr[4]);
 2807                 load_dr5(dbregs->dr[5]);
 2808                 load_dr6(dbregs->dr[6]);
 2809                 load_dr7(dbregs->dr[7]);
 2810         } else {
 2811                 /*
 2812                  * Don't let an illegal value for dr7 get set.  Specifically,
 2813                  * check for undefined settings.  Setting these bit patterns
 2814                  * result in undefined behaviour and can lead to an unexpected
 2815                  * TRCTRAP.
 2816                  */
 2817                 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8; 
 2818                      i++, mask1 <<= 2, mask2 <<= 2)
 2819                         if ((dbregs->dr[7] & mask1) == mask2)
 2820                                 return (EINVAL);
 2821                 
 2822                 pcb = td->td_pcb;
 2823                 
 2824                 /*
 2825                  * Don't let a process set a breakpoint that is not within the
 2826                  * process's address space.  If a process could do this, it
 2827                  * could halt the system by setting a breakpoint in the kernel
 2828                  * (if ddb was enabled).  Thus, we need to check to make sure
 2829                  * that no breakpoints are being enabled for addresses outside
 2830                  * process's address space.
 2831                  *
 2832                  * XXX - what about when the watched area of the user's
 2833                  * address space is written into from within the kernel
 2834                  * ... wouldn't that still cause a breakpoint to be generated
 2835                  * from within kernel mode?
 2836                  */
 2837 
 2838                 if (dbregs->dr[7] & 0x3) {
 2839                         /* dr0 is enabled */
 2840                         if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
 2841                                 return (EINVAL);
 2842                 }
 2843                         
 2844                 if (dbregs->dr[7] & (0x3<<2)) {
 2845                         /* dr1 is enabled */
 2846                         if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
 2847                                 return (EINVAL);
 2848                 }
 2849                         
 2850                 if (dbregs->dr[7] & (0x3<<4)) {
 2851                         /* dr2 is enabled */
 2852                         if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
 2853                                 return (EINVAL);
 2854                 }
 2855                         
 2856                 if (dbregs->dr[7] & (0x3<<6)) {
 2857                         /* dr3 is enabled */
 2858                         if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
 2859                                 return (EINVAL);
 2860                 }
 2861 
 2862                 pcb->pcb_dr0 = dbregs->dr[0];
 2863                 pcb->pcb_dr1 = dbregs->dr[1];
 2864                 pcb->pcb_dr2 = dbregs->dr[2];
 2865                 pcb->pcb_dr3 = dbregs->dr[3];
 2866                 pcb->pcb_dr6 = dbregs->dr[6];
 2867                 pcb->pcb_dr7 = dbregs->dr[7];
 2868 
 2869                 pcb->pcb_flags |= PCB_DBREGS;
 2870         }
 2871 
 2872         return (0);
 2873 }
 2874 
 2875 /*
 2876  * Return > 0 if a hardware breakpoint has been hit, and the
 2877  * breakpoint was in user space.  Return 0, otherwise.
 2878  */
 2879 int
 2880 user_dbreg_trap(void)
 2881 {
 2882         u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
 2883         u_int32_t bp;       /* breakpoint bits extracted from dr6 */
 2884         int nbp;            /* number of breakpoints that triggered */
 2885         caddr_t addr[4];    /* breakpoint addresses */
 2886         int i;
 2887         
 2888         dr7 = rdr7();
 2889         if ((dr7 & 0x000000ff) == 0) {
 2890                 /*
 2891                  * all GE and LE bits in the dr7 register are zero,
 2892                  * thus the trap couldn't have been caused by the
 2893                  * hardware debug registers
 2894                  */
 2895                 return 0;
 2896         }
 2897 
 2898         nbp = 0;
 2899         dr6 = rdr6();
 2900         bp = dr6 & 0x0000000f;
 2901 
 2902         if (!bp) {
 2903                 /*
 2904                  * None of the breakpoint bits are set meaning this
 2905                  * trap was not caused by any of the debug registers
 2906                  */
 2907                 return 0;
 2908         }
 2909 
 2910         /*
 2911          * at least one of the breakpoints were hit, check to see
 2912          * which ones and if any of them are user space addresses
 2913          */
 2914 
 2915         if (bp & 0x01) {
 2916                 addr[nbp++] = (caddr_t)rdr0();
 2917         }
 2918         if (bp & 0x02) {
 2919                 addr[nbp++] = (caddr_t)rdr1();
 2920         }
 2921         if (bp & 0x04) {
 2922                 addr[nbp++] = (caddr_t)rdr2();
 2923         }
 2924         if (bp & 0x08) {
 2925                 addr[nbp++] = (caddr_t)rdr3();
 2926         }
 2927 
 2928         for (i=0; i<nbp; i++) {
 2929                 if (addr[i] <
 2930                     (caddr_t)VM_MAXUSER_ADDRESS) {
 2931                         /*
 2932                          * addr[i] is in user space
 2933                          */
 2934                         return nbp;
 2935                 }
 2936         }
 2937 
 2938         /*
 2939          * None of the breakpoints are in user space.
 2940          */
 2941         return 0;
 2942 }
 2943 
 2944 #ifndef DEV_APIC
 2945 #include <machine/apicvar.h>
 2946 
 2947 /*
 2948  * Provide stub functions so that the MADT APIC enumerator in the acpi
 2949  * kernel module will link against a kernel without 'device apic'.
 2950  *
 2951  * XXX - This is a gross hack.
 2952  */
 2953 void
 2954 apic_register_enumerator(struct apic_enumerator *enumerator)
 2955 {
 2956 }
 2957 
 2958 void *
 2959 ioapic_create(uintptr_t addr, int32_t id, int intbase)
 2960 {
 2961         return (NULL);
 2962 }
 2963 
 2964 int
 2965 ioapic_disable_pin(void *cookie, u_int pin)
 2966 {
 2967         return (ENXIO);
 2968 }
 2969 
 2970 int
 2971 ioapic_get_vector(void *cookie, u_int pin)
 2972 {
 2973         return (-1);
 2974 }
 2975 
 2976 void
 2977 ioapic_register(void *cookie)
 2978 {
 2979 }
 2980 
 2981 int
 2982 ioapic_remap_vector(void *cookie, u_int pin, int vector)
 2983 {
 2984         return (ENXIO);
 2985 }
 2986 
 2987 int
 2988 ioapic_set_extint(void *cookie, u_int pin)
 2989 {
 2990         return (ENXIO);
 2991 }
 2992 
 2993 int
 2994 ioapic_set_nmi(void *cookie, u_int pin)
 2995 {
 2996         return (ENXIO);
 2997 }
 2998 
 2999 int
 3000 ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol)
 3001 {
 3002         return (ENXIO);
 3003 }
 3004 
 3005 int
 3006 ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger)
 3007 {
 3008         return (ENXIO);
 3009 }
 3010 
 3011 void
 3012 lapic_create(u_int apic_id, int boot_cpu)
 3013 {
 3014 }
 3015 
 3016 void
 3017 lapic_init(uintptr_t addr)
 3018 {
 3019 }
 3020 
 3021 int
 3022 lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode)
 3023 {
 3024         return (ENXIO);
 3025 }
 3026 
 3027 int
 3028 lapic_set_lvt_polarity(u_int apic_id, u_int lvt, enum intr_polarity pol)
 3029 {
 3030         return (ENXIO);
 3031 }
 3032 
 3033 int
 3034 lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, enum intr_trigger trigger)
 3035 {
 3036         return (ENXIO);
 3037 }
 3038 #endif
 3039 
 3040 #ifdef KDB
 3041 
 3042 /*
 3043  * Provide inb() and outb() as functions.  They are normally only
 3044  * available as macros calling inlined functions, thus cannot be
 3045  * called from the debugger.
 3046  *
 3047  * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
 3048  */
 3049 
 3050 #undef inb
 3051 #undef outb
 3052 
 3053 /* silence compiler warnings */
 3054 u_char inb(u_int);
 3055 void outb(u_int, u_char);
 3056 
 3057 u_char
 3058 inb(u_int port)
 3059 {
 3060         u_char  data;
 3061         /*
 3062          * We use %%dx and not %1 here because i/o is done at %dx and not at
 3063          * %edx, while gcc generates inferior code (movw instead of movl)
 3064          * if we tell it to load (u_short) port.
 3065          */
 3066         __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
 3067         return (data);
 3068 }
 3069 
 3070 void
 3071 outb(u_int port, u_char data)
 3072 {
 3073         u_char  al;
 3074         /*
 3075          * Use an unnecessary assignment to help gcc's register allocator.
 3076          * This make a large difference for gcc-1.40 and a tiny difference
 3077          * for gcc-2.6.0.  For gcc-1.40, al had to be ``asm("ax")'' for
 3078          * best results.  gcc-2.6.0 can't handle this.
 3079          */
 3080         al = data;
 3081         __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
 3082 }
 3083 
 3084 #endif /* KDB */

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