1 /*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 */
39
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD: releng/6.4/sys/i386/i386/machdep.c 181131 2008-08-01 20:31:07Z jhb $");
42
43 #include "opt_apic.h"
44 #include "opt_atalk.h"
45 #include "opt_compat.h"
46 #include "opt_cpu.h"
47 #include "opt_ddb.h"
48 #include "opt_inet.h"
49 #include "opt_ipx.h"
50 #include "opt_isa.h"
51 #include "opt_kstack_pages.h"
52 #include "opt_maxmem.h"
53 #include "opt_msgbuf.h"
54 #include "opt_npx.h"
55 #include "opt_perfmon.h"
56 #include "opt_xbox.h"
57
58 #include <sys/param.h>
59 #include <sys/proc.h>
60 #include <sys/systm.h>
61 #include <sys/bio.h>
62 #include <sys/buf.h>
63 #include <sys/bus.h>
64 #include <sys/callout.h>
65 #include <sys/cons.h>
66 #include <sys/cpu.h>
67 #include <sys/eventhandler.h>
68 #include <sys/exec.h>
69 #include <sys/imgact.h>
70 #include <sys/kdb.h>
71 #include <sys/kernel.h>
72 #include <sys/ktr.h>
73 #include <sys/linker.h>
74 #include <sys/lock.h>
75 #include <sys/malloc.h>
76 #include <sys/memrange.h>
77 #include <sys/msgbuf.h>
78 #include <sys/mutex.h>
79 #include <sys/pcpu.h>
80 #include <sys/ptrace.h>
81 #include <sys/reboot.h>
82 #include <sys/sched.h>
83 #include <sys/signalvar.h>
84 #include <sys/sysctl.h>
85 #include <sys/sysent.h>
86 #include <sys/sysproto.h>
87 #include <sys/ucontext.h>
88 #include <sys/vmmeter.h>
89
90 #include <vm/vm.h>
91 #include <vm/vm_extern.h>
92 #include <vm/vm_kern.h>
93 #include <vm/vm_page.h>
94 #include <vm/vm_map.h>
95 #include <vm/vm_object.h>
96 #include <vm/vm_pager.h>
97 #include <vm/vm_param.h>
98
99 #ifdef DDB
100 #ifndef KDB
101 #error KDB must be enabled in order for DDB to work!
102 #endif
103 #include <ddb/ddb.h>
104 #include <ddb/db_sym.h>
105 #endif
106
107 #include <isa/rtc.h>
108
109 #include <net/netisr.h>
110
111 #include <machine/bootinfo.h>
112 #include <machine/clock.h>
113 #include <machine/cpu.h>
114 #include <machine/cputypes.h>
115 #include <machine/intr_machdep.h>
116 #include <machine/md_var.h>
117 #include <machine/metadata.h>
118 #include <machine/pc/bios.h>
119 #include <machine/pcb.h>
120 #include <machine/pcb_ext.h>
121 #include <machine/proc.h>
122 #include <machine/reg.h>
123 #include <machine/sigframe.h>
124 #include <machine/specialreg.h>
125 #include <machine/vm86.h>
126 #ifdef PERFMON
127 #include <machine/perfmon.h>
128 #endif
129 #ifdef SMP
130 #include <machine/smp.h>
131 #endif
132
133 #ifdef DEV_ISA
134 #include <i386/isa/icu.h>
135 #endif
136
137 #ifdef XBOX
138 #include <machine/xbox.h>
139
140 int arch_i386_is_xbox = 0;
141 uint32_t arch_i386_xbox_memsize = 0;
142 #endif
143
144 /* Sanity check for __curthread() */
145 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
146
147 extern void init386(int first);
148 extern void dblfault_handler(void);
149
150 extern void printcpuinfo(void); /* XXX header file */
151 extern void finishidentcpu(void);
152 extern void panicifcpuunsupported(void);
153 extern void initializecpu(void);
154
155 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
156 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
157
158 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
159 #define CPU_ENABLE_SSE
160 #endif
161
162 static void cpu_startup(void *);
163 static void fpstate_drop(struct thread *td);
164 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
165 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
166 #ifdef CPU_ENABLE_SSE
167 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
168 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
169 #endif /* CPU_ENABLE_SSE */
170 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
171
172 #ifdef DDB
173 extern vm_offset_t ksym_start, ksym_end;
174 #endif
175
176 /* Intel ICH registers */
177 #define ICH_PMBASE 0x400
178 #define ICH_SMI_EN ICH_PMBASE + 0x30
179
180 int _udatasel, _ucodesel;
181 u_int basemem;
182
183 int cold = 1;
184
185 #ifdef COMPAT_43
186 static void osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code);
187 #endif
188 #ifdef COMPAT_FREEBSD4
189 static void freebsd4_sendsig(sig_t catcher, int sig, sigset_t *mask,
190 u_long code);
191 #endif
192
193 long Maxmem = 0;
194 long realmem = 0;
195
196 #ifdef PAE
197 FEATURE(pae, "Physical Address Extensions");
198 #endif
199
200 #define PHYSMAP_SIZE (2 * 16)
201
202 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
203 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
204
205 /* must be 2 less so 0 0 can signal end of chunks */
206 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
207 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
208
209 struct kva_md_info kmi;
210
211 static struct trapframe proc0_tf;
212 struct pcpu __pcpu[MAXCPU];
213
214 struct mtx icu_lock;
215
216 struct mem_range_softc mem_range_softc;
217
218 static void
219 cpu_startup(dummy)
220 void *dummy;
221 {
222 char *sysenv;
223
224 /*
225 * On MacBooks, we need to disallow the legacy USB circuit to
226 * generate an SMI# because this can cause several problems,
227 * namely: incorrect CPU frequency detection and failure to
228 * start the APs.
229 * We do this by disabling a bit in the SMI_EN (SMI Control and
230 * Enable register) of the Intel ICH LPC Interface Bridge.
231 */
232 sysenv = getenv("smbios.system.product");
233 if (sysenv != NULL) {
234 if (strncmp(sysenv, "MacBook", 7) == 0) {
235 if (bootverbose)
236 printf("Disabling LEGACY_USB_EN bit on "
237 "Intel ICH.\n");
238 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
239 }
240 freeenv(sysenv);
241 }
242
243 /*
244 * Good {morning,afternoon,evening,night}.
245 */
246 startrtclock();
247 printcpuinfo();
248 panicifcpuunsupported();
249 #ifdef PERFMON
250 perfmon_init();
251 #endif
252 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem),
253 ptoa((uintmax_t)Maxmem) / 1048576);
254 realmem = Maxmem;
255 /*
256 * Display any holes after the first chunk of extended memory.
257 */
258 if (bootverbose) {
259 int indx;
260
261 printf("Physical memory chunk(s):\n");
262 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
263 vm_paddr_t size;
264
265 size = phys_avail[indx + 1] - phys_avail[indx];
266 printf(
267 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
268 (uintmax_t)phys_avail[indx],
269 (uintmax_t)phys_avail[indx + 1] - 1,
270 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
271 }
272 }
273
274 vm_ksubmap_init(&kmi);
275
276 printf("avail memory = %ju (%ju MB)\n",
277 ptoa((uintmax_t)cnt.v_free_count),
278 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
279
280 /*
281 * Set up buffers, so they can be used to read disk labels.
282 */
283 bufinit();
284 vm_pager_bufferinit();
285
286 cpu_setregs();
287 }
288
289 /*
290 * Send an interrupt to process.
291 *
292 * Stack is set up to allow sigcode stored
293 * at top to call routine, followed by kcall
294 * to sigreturn routine below. After sigreturn
295 * resets the signal mask, the stack, and the
296 * frame pointer, it returns to the user
297 * specified pc, psl.
298 */
299 #ifdef COMPAT_43
300 static void
301 osendsig(catcher, sig, mask, code)
302 sig_t catcher;
303 int sig;
304 sigset_t *mask;
305 u_long code;
306 {
307 struct osigframe sf, *fp;
308 struct proc *p;
309 struct thread *td;
310 struct sigacts *psp;
311 struct trapframe *regs;
312 int oonstack;
313
314 td = curthread;
315 p = td->td_proc;
316 PROC_LOCK_ASSERT(p, MA_OWNED);
317 psp = p->p_sigacts;
318 mtx_assert(&psp->ps_mtx, MA_OWNED);
319 regs = td->td_frame;
320 oonstack = sigonstack(regs->tf_esp);
321
322 /* Allocate space for the signal handler context. */
323 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
324 SIGISMEMBER(psp->ps_sigonstack, sig)) {
325 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
326 td->td_sigstk.ss_size - sizeof(struct osigframe));
327 #if defined(COMPAT_43)
328 td->td_sigstk.ss_flags |= SS_ONSTACK;
329 #endif
330 } else
331 fp = (struct osigframe *)regs->tf_esp - 1;
332
333 /* Translate the signal if appropriate. */
334 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
335 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
336
337 /* Build the argument list for the signal handler. */
338 sf.sf_signum = sig;
339 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
340 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
341 /* Signal handler installed with SA_SIGINFO. */
342 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
343 sf.sf_siginfo.si_signo = sig;
344 sf.sf_siginfo.si_code = code;
345 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
346 } else {
347 /* Old FreeBSD-style arguments. */
348 sf.sf_arg2 = code;
349 sf.sf_addr = td->td_md.md_fault_addr;
350 sf.sf_ahu.sf_handler = catcher;
351 }
352 mtx_unlock(&psp->ps_mtx);
353 PROC_UNLOCK(p);
354
355 /* Save most if not all of trap frame. */
356 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
357 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
358 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
359 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
360 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
361 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
362 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
363 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
364 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
365 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
366 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
367 sf.sf_siginfo.si_sc.sc_gs = rgs();
368 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
369
370 /* Build the signal context to be used by osigreturn(). */
371 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
372 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
373 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
374 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
375 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
376 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
377 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
378 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
379
380 /*
381 * If we're a vm86 process, we want to save the segment registers.
382 * We also change eflags to be our emulated eflags, not the actual
383 * eflags.
384 */
385 if (regs->tf_eflags & PSL_VM) {
386 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
387 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
388 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
389
390 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
391 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
392 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
393 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
394
395 if (vm86->vm86_has_vme == 0)
396 sf.sf_siginfo.si_sc.sc_ps =
397 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
398 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
399
400 /* See sendsig() for comments. */
401 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
402 }
403
404 /*
405 * Copy the sigframe out to the user's stack.
406 */
407 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
408 #ifdef DEBUG
409 printf("process %ld has trashed its stack\n", (long)p->p_pid);
410 #endif
411 PROC_LOCK(p);
412 sigexit(td, SIGILL);
413 }
414
415 regs->tf_esp = (int)fp;
416 regs->tf_eip = PS_STRINGS - szosigcode;
417 regs->tf_eflags &= ~(PSL_T | PSL_D);
418 regs->tf_cs = _ucodesel;
419 regs->tf_ds = _udatasel;
420 regs->tf_es = _udatasel;
421 regs->tf_fs = _udatasel;
422 load_gs(_udatasel);
423 regs->tf_ss = _udatasel;
424 PROC_LOCK(p);
425 mtx_lock(&psp->ps_mtx);
426 }
427 #endif /* COMPAT_43 */
428
429 #ifdef COMPAT_FREEBSD4
430 static void
431 freebsd4_sendsig(catcher, sig, mask, code)
432 sig_t catcher;
433 int sig;
434 sigset_t *mask;
435 u_long code;
436 {
437 struct sigframe4 sf, *sfp;
438 struct proc *p;
439 struct thread *td;
440 struct sigacts *psp;
441 struct trapframe *regs;
442 int oonstack;
443
444 td = curthread;
445 p = td->td_proc;
446 PROC_LOCK_ASSERT(p, MA_OWNED);
447 psp = p->p_sigacts;
448 mtx_assert(&psp->ps_mtx, MA_OWNED);
449 regs = td->td_frame;
450 oonstack = sigonstack(regs->tf_esp);
451
452 /* Save user context. */
453 bzero(&sf, sizeof(sf));
454 sf.sf_uc.uc_sigmask = *mask;
455 sf.sf_uc.uc_stack = td->td_sigstk;
456 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
457 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
458 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
459 sf.sf_uc.uc_mcontext.mc_gs = rgs();
460 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
461
462 /* Allocate space for the signal handler context. */
463 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
464 SIGISMEMBER(psp->ps_sigonstack, sig)) {
465 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
466 td->td_sigstk.ss_size - sizeof(struct sigframe4));
467 #if defined(COMPAT_43)
468 td->td_sigstk.ss_flags |= SS_ONSTACK;
469 #endif
470 } else
471 sfp = (struct sigframe4 *)regs->tf_esp - 1;
472
473 /* Translate the signal if appropriate. */
474 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
475 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
476
477 /* Build the argument list for the signal handler. */
478 sf.sf_signum = sig;
479 sf.sf_ucontext = (register_t)&sfp->sf_uc;
480 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
481 /* Signal handler installed with SA_SIGINFO. */
482 sf.sf_siginfo = (register_t)&sfp->sf_si;
483 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
484
485 /* Fill in POSIX parts */
486 sf.sf_si.si_signo = sig;
487 sf.sf_si.si_code = code;
488 sf.sf_si.si_addr = (void *)td->td_md.md_fault_addr;
489 } else {
490 /* Old FreeBSD-style arguments. */
491 sf.sf_siginfo = code;
492 sf.sf_addr = td->td_md.md_fault_addr;
493 sf.sf_ahu.sf_handler = catcher;
494 }
495 mtx_unlock(&psp->ps_mtx);
496 PROC_UNLOCK(p);
497
498 /*
499 * If we're a vm86 process, we want to save the segment registers.
500 * We also change eflags to be our emulated eflags, not the actual
501 * eflags.
502 */
503 if (regs->tf_eflags & PSL_VM) {
504 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
505 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
506
507 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
508 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
509 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
510 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
511
512 if (vm86->vm86_has_vme == 0)
513 sf.sf_uc.uc_mcontext.mc_eflags =
514 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
515 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
516
517 /*
518 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
519 * syscalls made by the signal handler. This just avoids
520 * wasting time for our lazy fixup of such faults. PSL_NT
521 * does nothing in vm86 mode, but vm86 programs can set it
522 * almost legitimately in probes for old cpu types.
523 */
524 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
525 }
526
527 /*
528 * Copy the sigframe out to the user's stack.
529 */
530 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
531 #ifdef DEBUG
532 printf("process %ld has trashed its stack\n", (long)p->p_pid);
533 #endif
534 PROC_LOCK(p);
535 sigexit(td, SIGILL);
536 }
537
538 regs->tf_esp = (int)sfp;
539 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
540 regs->tf_eflags &= ~(PSL_T | PSL_D);
541 regs->tf_cs = _ucodesel;
542 regs->tf_ds = _udatasel;
543 regs->tf_es = _udatasel;
544 regs->tf_fs = _udatasel;
545 regs->tf_ss = _udatasel;
546 PROC_LOCK(p);
547 mtx_lock(&psp->ps_mtx);
548 }
549 #endif /* COMPAT_FREEBSD4 */
550
551 void
552 sendsig(catcher, sig, mask, code)
553 sig_t catcher;
554 int sig;
555 sigset_t *mask;
556 u_long code;
557 {
558 struct sigframe sf, *sfp;
559 struct proc *p;
560 struct thread *td;
561 struct sigacts *psp;
562 char *sp;
563 struct trapframe *regs;
564 int oonstack;
565
566 td = curthread;
567 p = td->td_proc;
568 PROC_LOCK_ASSERT(p, MA_OWNED);
569 psp = p->p_sigacts;
570 mtx_assert(&psp->ps_mtx, MA_OWNED);
571 #ifdef COMPAT_FREEBSD4
572 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
573 freebsd4_sendsig(catcher, sig, mask, code);
574 return;
575 }
576 #endif
577 #ifdef COMPAT_43
578 if (SIGISMEMBER(psp->ps_osigset, sig)) {
579 osendsig(catcher, sig, mask, code);
580 return;
581 }
582 #endif
583 regs = td->td_frame;
584 oonstack = sigonstack(regs->tf_esp);
585
586 /* Save user context. */
587 bzero(&sf, sizeof(sf));
588 sf.sf_uc.uc_sigmask = *mask;
589 sf.sf_uc.uc_stack = td->td_sigstk;
590 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
591 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
592 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
593 sf.sf_uc.uc_mcontext.mc_gs = rgs();
594 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
595 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
596 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
597 fpstate_drop(td);
598
599 /* Allocate space for the signal handler context. */
600 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
601 SIGISMEMBER(psp->ps_sigonstack, sig)) {
602 sp = td->td_sigstk.ss_sp +
603 td->td_sigstk.ss_size - sizeof(struct sigframe);
604 #if defined(COMPAT_43)
605 td->td_sigstk.ss_flags |= SS_ONSTACK;
606 #endif
607 } else
608 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
609 /* Align to 16 bytes. */
610 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
611
612 /* Translate the signal if appropriate. */
613 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
614 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
615
616 /* Build the argument list for the signal handler. */
617 sf.sf_signum = sig;
618 sf.sf_ucontext = (register_t)&sfp->sf_uc;
619 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
620 /* Signal handler installed with SA_SIGINFO. */
621 sf.sf_siginfo = (register_t)&sfp->sf_si;
622 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
623
624 /* Fill in POSIX parts */
625 sf.sf_si.si_signo = sig;
626 sf.sf_si.si_code = code;
627 sf.sf_si.si_addr = (void *)td->td_md.md_fault_addr;
628 } else {
629 /* Old FreeBSD-style arguments. */
630 sf.sf_siginfo = code;
631 sf.sf_addr = td->td_md.md_fault_addr;
632 sf.sf_ahu.sf_handler = catcher;
633 }
634 mtx_unlock(&psp->ps_mtx);
635 PROC_UNLOCK(p);
636
637 /*
638 * If we're a vm86 process, we want to save the segment registers.
639 * We also change eflags to be our emulated eflags, not the actual
640 * eflags.
641 */
642 if (regs->tf_eflags & PSL_VM) {
643 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
644 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
645
646 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
647 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
648 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
649 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
650
651 if (vm86->vm86_has_vme == 0)
652 sf.sf_uc.uc_mcontext.mc_eflags =
653 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
654 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
655
656 /*
657 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
658 * syscalls made by the signal handler. This just avoids
659 * wasting time for our lazy fixup of such faults. PSL_NT
660 * does nothing in vm86 mode, but vm86 programs can set it
661 * almost legitimately in probes for old cpu types.
662 */
663 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
664 }
665
666 /*
667 * Copy the sigframe out to the user's stack.
668 */
669 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
670 #ifdef DEBUG
671 printf("process %ld has trashed its stack\n", (long)p->p_pid);
672 #endif
673 PROC_LOCK(p);
674 sigexit(td, SIGILL);
675 }
676
677 regs->tf_esp = (int)sfp;
678 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
679 regs->tf_eflags &= ~(PSL_T | PSL_D);
680 regs->tf_cs = _ucodesel;
681 regs->tf_ds = _udatasel;
682 regs->tf_es = _udatasel;
683 regs->tf_fs = _udatasel;
684 regs->tf_ss = _udatasel;
685 PROC_LOCK(p);
686 mtx_lock(&psp->ps_mtx);
687 }
688
689 /*
690 * Build siginfo_t for SA thread
691 */
692 void
693 cpu_thread_siginfo(int sig, u_long code, siginfo_t *si)
694 {
695 struct proc *p;
696 struct thread *td;
697
698 td = curthread;
699 p = td->td_proc;
700 PROC_LOCK_ASSERT(p, MA_OWNED);
701
702 bzero(si, sizeof(*si));
703 si->si_signo = sig;
704 si->si_code = code;
705 si->si_addr = (void *)td->td_md.md_fault_addr;
706 /* XXXKSE fill other fields */
707 }
708
709 /*
710 * System call to cleanup state after a signal
711 * has been taken. Reset signal mask and
712 * stack state from context left by sendsig (above).
713 * Return to previous pc and psl as specified by
714 * context left by sendsig. Check carefully to
715 * make sure that the user has not modified the
716 * state to gain improper privileges.
717 *
718 * MPSAFE
719 */
720 #ifdef COMPAT_43
721 int
722 osigreturn(td, uap)
723 struct thread *td;
724 struct osigreturn_args /* {
725 struct osigcontext *sigcntxp;
726 } */ *uap;
727 {
728 struct osigcontext sc;
729 struct trapframe *regs;
730 struct osigcontext *scp;
731 struct proc *p = td->td_proc;
732 int eflags, error;
733
734 regs = td->td_frame;
735 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
736 if (error != 0)
737 return (error);
738 scp = ≻
739 eflags = scp->sc_ps;
740 if (eflags & PSL_VM) {
741 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
742 struct vm86_kernel *vm86;
743
744 /*
745 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
746 * set up the vm86 area, and we can't enter vm86 mode.
747 */
748 if (td->td_pcb->pcb_ext == 0)
749 return (EINVAL);
750 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
751 if (vm86->vm86_inited == 0)
752 return (EINVAL);
753
754 /* Go back to user mode if both flags are set. */
755 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
756 trapsignal(td, SIGBUS, 0);
757
758 if (vm86->vm86_has_vme) {
759 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
760 (eflags & VME_USERCHANGE) | PSL_VM;
761 } else {
762 vm86->vm86_eflags = eflags; /* save VIF, VIP */
763 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
764 (eflags & VM_USERCHANGE) | PSL_VM;
765 }
766 tf->tf_vm86_ds = scp->sc_ds;
767 tf->tf_vm86_es = scp->sc_es;
768 tf->tf_vm86_fs = scp->sc_fs;
769 tf->tf_vm86_gs = scp->sc_gs;
770 tf->tf_ds = _udatasel;
771 tf->tf_es = _udatasel;
772 tf->tf_fs = _udatasel;
773 } else {
774 /*
775 * Don't allow users to change privileged or reserved flags.
776 */
777 /*
778 * XXX do allow users to change the privileged flag PSL_RF.
779 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
780 * should sometimes set it there too. tf_eflags is kept in
781 * the signal context during signal handling and there is no
782 * other place to remember it, so the PSL_RF bit may be
783 * corrupted by the signal handler without us knowing.
784 * Corruption of the PSL_RF bit at worst causes one more or
785 * one less debugger trap, so allowing it is fairly harmless.
786 */
787 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
788 return (EINVAL);
789 }
790
791 /*
792 * Don't allow users to load a valid privileged %cs. Let the
793 * hardware check for invalid selectors, excess privilege in
794 * other selectors, invalid %eip's and invalid %esp's.
795 */
796 if (!CS_SECURE(scp->sc_cs)) {
797 trapsignal(td, SIGBUS, T_PROTFLT);
798 return (EINVAL);
799 }
800 regs->tf_ds = scp->sc_ds;
801 regs->tf_es = scp->sc_es;
802 regs->tf_fs = scp->sc_fs;
803 }
804
805 /* Restore remaining registers. */
806 regs->tf_eax = scp->sc_eax;
807 regs->tf_ebx = scp->sc_ebx;
808 regs->tf_ecx = scp->sc_ecx;
809 regs->tf_edx = scp->sc_edx;
810 regs->tf_esi = scp->sc_esi;
811 regs->tf_edi = scp->sc_edi;
812 regs->tf_cs = scp->sc_cs;
813 regs->tf_ss = scp->sc_ss;
814 regs->tf_isp = scp->sc_isp;
815 regs->tf_ebp = scp->sc_fp;
816 regs->tf_esp = scp->sc_sp;
817 regs->tf_eip = scp->sc_pc;
818 regs->tf_eflags = eflags;
819
820 PROC_LOCK(p);
821 #if defined(COMPAT_43)
822 if (scp->sc_onstack & 1)
823 td->td_sigstk.ss_flags |= SS_ONSTACK;
824 else
825 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
826 #endif
827 SIGSETOLD(td->td_sigmask, scp->sc_mask);
828 SIG_CANTMASK(td->td_sigmask);
829 signotify(td);
830 PROC_UNLOCK(p);
831 return (EJUSTRETURN);
832 }
833 #endif /* COMPAT_43 */
834
835 #ifdef COMPAT_FREEBSD4
836 /*
837 * MPSAFE
838 */
839 int
840 freebsd4_sigreturn(td, uap)
841 struct thread *td;
842 struct freebsd4_sigreturn_args /* {
843 const ucontext4 *sigcntxp;
844 } */ *uap;
845 {
846 struct ucontext4 uc;
847 struct proc *p = td->td_proc;
848 struct trapframe *regs;
849 const struct ucontext4 *ucp;
850 int cs, eflags, error;
851
852 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
853 if (error != 0)
854 return (error);
855 ucp = &uc;
856 regs = td->td_frame;
857 eflags = ucp->uc_mcontext.mc_eflags;
858 if (eflags & PSL_VM) {
859 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
860 struct vm86_kernel *vm86;
861
862 /*
863 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
864 * set up the vm86 area, and we can't enter vm86 mode.
865 */
866 if (td->td_pcb->pcb_ext == 0)
867 return (EINVAL);
868 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
869 if (vm86->vm86_inited == 0)
870 return (EINVAL);
871
872 /* Go back to user mode if both flags are set. */
873 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
874 trapsignal(td, SIGBUS, 0);
875
876 if (vm86->vm86_has_vme) {
877 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
878 (eflags & VME_USERCHANGE) | PSL_VM;
879 } else {
880 vm86->vm86_eflags = eflags; /* save VIF, VIP */
881 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
882 (eflags & VM_USERCHANGE) | PSL_VM;
883 }
884 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
885 tf->tf_eflags = eflags;
886 tf->tf_vm86_ds = tf->tf_ds;
887 tf->tf_vm86_es = tf->tf_es;
888 tf->tf_vm86_fs = tf->tf_fs;
889 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
890 tf->tf_ds = _udatasel;
891 tf->tf_es = _udatasel;
892 tf->tf_fs = _udatasel;
893 } else {
894 /*
895 * Don't allow users to change privileged or reserved flags.
896 */
897 /*
898 * XXX do allow users to change the privileged flag PSL_RF.
899 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
900 * should sometimes set it there too. tf_eflags is kept in
901 * the signal context during signal handling and there is no
902 * other place to remember it, so the PSL_RF bit may be
903 * corrupted by the signal handler without us knowing.
904 * Corruption of the PSL_RF bit at worst causes one more or
905 * one less debugger trap, so allowing it is fairly harmless.
906 */
907 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
908 printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags);
909 return (EINVAL);
910 }
911
912 /*
913 * Don't allow users to load a valid privileged %cs. Let the
914 * hardware check for invalid selectors, excess privilege in
915 * other selectors, invalid %eip's and invalid %esp's.
916 */
917 cs = ucp->uc_mcontext.mc_cs;
918 if (!CS_SECURE(cs)) {
919 printf("freebsd4_sigreturn: cs = 0x%x\n", cs);
920 trapsignal(td, SIGBUS, T_PROTFLT);
921 return (EINVAL);
922 }
923
924 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
925 }
926
927 PROC_LOCK(p);
928 #if defined(COMPAT_43)
929 if (ucp->uc_mcontext.mc_onstack & 1)
930 td->td_sigstk.ss_flags |= SS_ONSTACK;
931 else
932 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
933 #endif
934
935 td->td_sigmask = ucp->uc_sigmask;
936 SIG_CANTMASK(td->td_sigmask);
937 signotify(td);
938 PROC_UNLOCK(p);
939 return (EJUSTRETURN);
940 }
941 #endif /* COMPAT_FREEBSD4 */
942
943 /*
944 * MPSAFE
945 */
946 int
947 sigreturn(td, uap)
948 struct thread *td;
949 struct sigreturn_args /* {
950 const __ucontext *sigcntxp;
951 } */ *uap;
952 {
953 ucontext_t uc;
954 struct proc *p = td->td_proc;
955 struct trapframe *regs;
956 const ucontext_t *ucp;
957 int cs, eflags, error, ret;
958
959 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
960 if (error != 0)
961 return (error);
962 ucp = &uc;
963 regs = td->td_frame;
964 eflags = ucp->uc_mcontext.mc_eflags;
965 if (eflags & PSL_VM) {
966 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
967 struct vm86_kernel *vm86;
968
969 /*
970 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
971 * set up the vm86 area, and we can't enter vm86 mode.
972 */
973 if (td->td_pcb->pcb_ext == 0)
974 return (EINVAL);
975 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
976 if (vm86->vm86_inited == 0)
977 return (EINVAL);
978
979 /* Go back to user mode if both flags are set. */
980 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
981 trapsignal(td, SIGBUS, 0);
982
983 if (vm86->vm86_has_vme) {
984 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
985 (eflags & VME_USERCHANGE) | PSL_VM;
986 } else {
987 vm86->vm86_eflags = eflags; /* save VIF, VIP */
988 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
989 (eflags & VM_USERCHANGE) | PSL_VM;
990 }
991 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
992 tf->tf_eflags = eflags;
993 tf->tf_vm86_ds = tf->tf_ds;
994 tf->tf_vm86_es = tf->tf_es;
995 tf->tf_vm86_fs = tf->tf_fs;
996 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
997 tf->tf_ds = _udatasel;
998 tf->tf_es = _udatasel;
999 tf->tf_fs = _udatasel;
1000 } else {
1001 /*
1002 * Don't allow users to change privileged or reserved flags.
1003 */
1004 /*
1005 * XXX do allow users to change the privileged flag PSL_RF.
1006 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
1007 * should sometimes set it there too. tf_eflags is kept in
1008 * the signal context during signal handling and there is no
1009 * other place to remember it, so the PSL_RF bit may be
1010 * corrupted by the signal handler without us knowing.
1011 * Corruption of the PSL_RF bit at worst causes one more or
1012 * one less debugger trap, so allowing it is fairly harmless.
1013 */
1014 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
1015 printf("sigreturn: eflags = 0x%x\n", eflags);
1016 return (EINVAL);
1017 }
1018
1019 /*
1020 * Don't allow users to load a valid privileged %cs. Let the
1021 * hardware check for invalid selectors, excess privilege in
1022 * other selectors, invalid %eip's and invalid %esp's.
1023 */
1024 cs = ucp->uc_mcontext.mc_cs;
1025 if (!CS_SECURE(cs)) {
1026 printf("sigreturn: cs = 0x%x\n", cs);
1027 trapsignal(td, SIGBUS, T_PROTFLT);
1028 return (EINVAL);
1029 }
1030
1031 ret = set_fpcontext(td, &ucp->uc_mcontext);
1032 if (ret != 0)
1033 return (ret);
1034 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1035 }
1036
1037 PROC_LOCK(p);
1038 #if defined(COMPAT_43)
1039 if (ucp->uc_mcontext.mc_onstack & 1)
1040 td->td_sigstk.ss_flags |= SS_ONSTACK;
1041 else
1042 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1043 #endif
1044
1045 td->td_sigmask = ucp->uc_sigmask;
1046 SIG_CANTMASK(td->td_sigmask);
1047 signotify(td);
1048 PROC_UNLOCK(p);
1049 return (EJUSTRETURN);
1050 }
1051
1052 /*
1053 * Machine dependent boot() routine
1054 *
1055 * I haven't seen anything to put here yet
1056 * Possibly some stuff might be grafted back here from boot()
1057 */
1058 void
1059 cpu_boot(int howto)
1060 {
1061 }
1062
1063 /* Get current clock frequency for the given cpu id. */
1064 int
1065 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1066 {
1067 register_t reg;
1068 uint64_t tsc1, tsc2;
1069
1070 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1071 return (EINVAL);
1072 if (!tsc_present)
1073 return (EOPNOTSUPP);
1074
1075 /* If we're booting, trust the rate calibrated moments ago. */
1076 if (cold) {
1077 *rate = tsc_freq;
1078 return (0);
1079 }
1080
1081 #ifdef SMP
1082 /* Schedule ourselves on the indicated cpu. */
1083 mtx_lock_spin(&sched_lock);
1084 sched_bind(curthread, cpu_id);
1085 mtx_unlock_spin(&sched_lock);
1086 #endif
1087
1088 /* Calibrate by measuring a short delay. */
1089 reg = intr_disable();
1090 tsc1 = rdtsc();
1091 DELAY(1000);
1092 tsc2 = rdtsc();
1093 intr_restore(reg);
1094
1095 #ifdef SMP
1096 mtx_lock_spin(&sched_lock);
1097 sched_unbind(curthread);
1098 mtx_unlock_spin(&sched_lock);
1099 #endif
1100
1101 /*
1102 * Calculate the difference in readings, convert to Mhz, and
1103 * subtract 0.5% of the total. Empirical testing has shown that
1104 * overhead in DELAY() works out to approximately this value.
1105 */
1106 tsc2 -= tsc1;
1107 *rate = tsc2 * 1000 - tsc2 * 5;
1108 return (0);
1109 }
1110
1111 /*
1112 * Shutdown the CPU as much as possible
1113 */
1114 void
1115 cpu_halt(void)
1116 {
1117 for (;;)
1118 __asm__ ("hlt");
1119 }
1120
1121 /*
1122 * Hook to idle the CPU when possible. In the SMP case we default to
1123 * off because a halted cpu will not currently pick up a new thread in the
1124 * run queue until the next timer tick. If turned on this will result in
1125 * approximately a 4.2% loss in real time performance in buildworld tests
1126 * (but improves user and sys times oddly enough), and saves approximately
1127 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3).
1128 *
1129 * XXX we need to have a cpu mask of idle cpus and generate an IPI or
1130 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT.
1131 * Then we can have our cake and eat it too.
1132 *
1133 * XXX I'm turning it on for SMP as well by default for now. It seems to
1134 * help lock contention somewhat, and this is critical for HTT. -Peter
1135 */
1136 static int cpu_idle_hlt = 1;
1137 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
1138 &cpu_idle_hlt, 0, "Idle loop HLT enable");
1139
1140 static void
1141 cpu_idle_default(void)
1142 {
1143 /*
1144 * we must absolutely guarentee that hlt is the
1145 * absolute next instruction after sti or we
1146 * introduce a timing window.
1147 */
1148 __asm __volatile("sti; hlt");
1149 }
1150
1151 /*
1152 * Note that we have to be careful here to avoid a race between checking
1153 * sched_runnable() and actually halting. If we don't do this, we may waste
1154 * the time between calling hlt and the next interrupt even though there
1155 * is a runnable process.
1156 */
1157 void
1158 cpu_idle(void)
1159 {
1160
1161 #ifdef SMP
1162 if (mp_grab_cpu_hlt())
1163 return;
1164 #endif
1165
1166 if (cpu_idle_hlt) {
1167 disable_intr();
1168 if (sched_runnable())
1169 enable_intr();
1170 else
1171 (*cpu_idle_hook)();
1172 }
1173 }
1174
1175 /* Other subsystems (e.g., ACPI) can hook this later. */
1176 void (*cpu_idle_hook)(void) = cpu_idle_default;
1177
1178 /*
1179 * Clear registers on exec
1180 */
1181 void
1182 exec_setregs(td, entry, stack, ps_strings)
1183 struct thread *td;
1184 u_long entry;
1185 u_long stack;
1186 u_long ps_strings;
1187 {
1188 struct trapframe *regs = td->td_frame;
1189 struct pcb *pcb = td->td_pcb;
1190
1191 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1192 pcb->pcb_gs = _udatasel;
1193 load_gs(_udatasel);
1194
1195 if (td->td_proc->p_md.md_ldt)
1196 user_ldt_free(td);
1197
1198 bzero((char *)regs, sizeof(struct trapframe));
1199 regs->tf_eip = entry;
1200 regs->tf_esp = stack;
1201 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1202 regs->tf_ss = _udatasel;
1203 regs->tf_ds = _udatasel;
1204 regs->tf_es = _udatasel;
1205 regs->tf_fs = _udatasel;
1206 regs->tf_cs = _ucodesel;
1207
1208 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1209 regs->tf_ebx = ps_strings;
1210
1211 /*
1212 * Reset the hardware debug registers if they were in use.
1213 * They won't have any meaning for the newly exec'd process.
1214 */
1215 if (pcb->pcb_flags & PCB_DBREGS) {
1216 pcb->pcb_dr0 = 0;
1217 pcb->pcb_dr1 = 0;
1218 pcb->pcb_dr2 = 0;
1219 pcb->pcb_dr3 = 0;
1220 pcb->pcb_dr6 = 0;
1221 pcb->pcb_dr7 = 0;
1222 if (pcb == PCPU_GET(curpcb)) {
1223 /*
1224 * Clear the debug registers on the running
1225 * CPU, otherwise they will end up affecting
1226 * the next process we switch to.
1227 */
1228 reset_dbregs();
1229 }
1230 pcb->pcb_flags &= ~PCB_DBREGS;
1231 }
1232
1233 /*
1234 * Initialize the math emulator (if any) for the current process.
1235 * Actually, just clear the bit that says that the emulator has
1236 * been initialized. Initialization is delayed until the process
1237 * traps to the emulator (if it is done at all) mainly because
1238 * emulators don't provide an entry point for initialization.
1239 */
1240 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1241
1242 /*
1243 * Drop the FP state if we hold it, so that the process gets a
1244 * clean FP state if it uses the FPU again.
1245 */
1246 fpstate_drop(td);
1247
1248 /*
1249 * XXX - Linux emulator
1250 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1251 * on it.
1252 */
1253 td->td_retval[1] = 0;
1254 }
1255
1256 void
1257 cpu_setregs(void)
1258 {
1259 unsigned int cr0;
1260
1261 cr0 = rcr0();
1262
1263 /*
1264 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1265 *
1266 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1267 * instructions. We must set the CR0_MP bit and use the CR0_TS
1268 * bit to control the trap, because setting the CR0_EM bit does
1269 * not cause WAIT instructions to trap. It's important to trap
1270 * WAIT instructions - otherwise the "wait" variants of no-wait
1271 * control instructions would degenerate to the "no-wait" variants
1272 * after FP context switches but work correctly otherwise. It's
1273 * particularly important to trap WAITs when there is no NPX -
1274 * otherwise the "wait" variants would always degenerate.
1275 *
1276 * Try setting CR0_NE to get correct error reporting on 486DX's.
1277 * Setting it should fail or do nothing on lesser processors.
1278 */
1279 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1280 load_cr0(cr0);
1281 load_gs(_udatasel);
1282 }
1283
1284 static int
1285 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1286 {
1287 int error;
1288 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1289 req);
1290 if (!error && req->newptr)
1291 resettodr();
1292 return (error);
1293 }
1294
1295 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1296 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1297
1298 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1299 CTLFLAG_RW, &disable_rtc_set, 0, "");
1300
1301 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1302 CTLFLAG_RD, &bootinfo, bootinfo, "");
1303
1304 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1305 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1306
1307 u_long bootdev; /* not a struct cdev *- encoding is different */
1308 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1309 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1310
1311 /*
1312 * Initialize 386 and configure to run kernel
1313 */
1314
1315 /*
1316 * Initialize segments & interrupt table
1317 */
1318
1319 int _default_ldt;
1320 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1321 static struct gate_descriptor idt0[NIDT];
1322 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1323 union descriptor ldt[NLDT]; /* local descriptor table */
1324 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1325
1326 int private_tss; /* flag indicating private tss */
1327
1328 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1329 extern int has_f00f_bug;
1330 #endif
1331
1332 static struct i386tss dblfault_tss;
1333 static char dblfault_stack[PAGE_SIZE];
1334
1335 extern vm_offset_t proc0kstack;
1336
1337
1338 /*
1339 * software prototypes -- in more palatable form.
1340 *
1341 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1342 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1343 */
1344 struct soft_segment_descriptor gdt_segs[] = {
1345 /* GNULL_SEL 0 Null Descriptor */
1346 { 0x0, /* segment base address */
1347 0x0, /* length */
1348 0, /* segment type */
1349 0, /* segment descriptor priority level */
1350 0, /* segment descriptor present */
1351 0, 0,
1352 0, /* default 32 vs 16 bit size */
1353 0 /* limit granularity (byte/page units)*/ },
1354 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1355 { 0x0, /* segment base address */
1356 0xfffff, /* length - all address space */
1357 SDT_MEMRWA, /* segment type */
1358 0, /* segment descriptor priority level */
1359 1, /* segment descriptor present */
1360 0, 0,
1361 1, /* default 32 vs 16 bit size */
1362 1 /* limit granularity (byte/page units)*/ },
1363 /* GUFS_SEL 2 %fs Descriptor for user */
1364 { 0x0, /* segment base address */
1365 0xfffff, /* length - all address space */
1366 SDT_MEMRWA, /* segment type */
1367 SEL_UPL, /* segment descriptor priority level */
1368 1, /* segment descriptor present */
1369 0, 0,
1370 1, /* default 32 vs 16 bit size */
1371 1 /* limit granularity (byte/page units)*/ },
1372 /* GUGS_SEL 3 %gs Descriptor for user */
1373 { 0x0, /* segment base address */
1374 0xfffff, /* length - all address space */
1375 SDT_MEMRWA, /* segment type */
1376 SEL_UPL, /* segment descriptor priority level */
1377 1, /* segment descriptor present */
1378 0, 0,
1379 1, /* default 32 vs 16 bit size */
1380 1 /* limit granularity (byte/page units)*/ },
1381 /* GCODE_SEL 4 Code Descriptor for kernel */
1382 { 0x0, /* segment base address */
1383 0xfffff, /* length - all address space */
1384 SDT_MEMERA, /* segment type */
1385 0, /* segment descriptor priority level */
1386 1, /* segment descriptor present */
1387 0, 0,
1388 1, /* default 32 vs 16 bit size */
1389 1 /* limit granularity (byte/page units)*/ },
1390 /* GDATA_SEL 5 Data Descriptor for kernel */
1391 { 0x0, /* segment base address */
1392 0xfffff, /* length - all address space */
1393 SDT_MEMRWA, /* segment type */
1394 0, /* segment descriptor priority level */
1395 1, /* segment descriptor present */
1396 0, 0,
1397 1, /* default 32 vs 16 bit size */
1398 1 /* limit granularity (byte/page units)*/ },
1399 /* GUCODE_SEL 6 Code Descriptor for user */
1400 { 0x0, /* segment base address */
1401 0xfffff, /* length - all address space */
1402 SDT_MEMERA, /* segment type */
1403 SEL_UPL, /* segment descriptor priority level */
1404 1, /* segment descriptor present */
1405 0, 0,
1406 1, /* default 32 vs 16 bit size */
1407 1 /* limit granularity (byte/page units)*/ },
1408 /* GUDATA_SEL 7 Data Descriptor for user */
1409 { 0x0, /* segment base address */
1410 0xfffff, /* length - all address space */
1411 SDT_MEMRWA, /* segment type */
1412 SEL_UPL, /* segment descriptor priority level */
1413 1, /* segment descriptor present */
1414 0, 0,
1415 1, /* default 32 vs 16 bit size */
1416 1 /* limit granularity (byte/page units)*/ },
1417 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1418 { 0x400, /* segment base address */
1419 0xfffff, /* length */
1420 SDT_MEMRWA, /* segment type */
1421 0, /* segment descriptor priority level */
1422 1, /* segment descriptor present */
1423 0, 0,
1424 1, /* default 32 vs 16 bit size */
1425 1 /* limit granularity (byte/page units)*/ },
1426 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1427 {
1428 0x0, /* segment base address */
1429 sizeof(struct i386tss)-1,/* length */
1430 SDT_SYS386TSS, /* segment type */
1431 0, /* segment descriptor priority level */
1432 1, /* segment descriptor present */
1433 0, 0,
1434 0, /* unused - default 32 vs 16 bit size */
1435 0 /* limit granularity (byte/page units)*/ },
1436 /* GLDT_SEL 10 LDT Descriptor */
1437 { (int) ldt, /* segment base address */
1438 sizeof(ldt)-1, /* length - all address space */
1439 SDT_SYSLDT, /* segment type */
1440 SEL_UPL, /* segment descriptor priority level */
1441 1, /* segment descriptor present */
1442 0, 0,
1443 0, /* unused - default 32 vs 16 bit size */
1444 0 /* limit granularity (byte/page units)*/ },
1445 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1446 { (int) ldt, /* segment base address */
1447 (512 * sizeof(union descriptor)-1), /* length */
1448 SDT_SYSLDT, /* segment type */
1449 0, /* segment descriptor priority level */
1450 1, /* segment descriptor present */
1451 0, 0,
1452 0, /* unused - default 32 vs 16 bit size */
1453 0 /* limit granularity (byte/page units)*/ },
1454 /* GPANIC_SEL 12 Panic Tss Descriptor */
1455 { (int) &dblfault_tss, /* segment base address */
1456 sizeof(struct i386tss)-1,/* length - all address space */
1457 SDT_SYS386TSS, /* segment type */
1458 0, /* segment descriptor priority level */
1459 1, /* segment descriptor present */
1460 0, 0,
1461 0, /* unused - default 32 vs 16 bit size */
1462 0 /* limit granularity (byte/page units)*/ },
1463 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1464 { 0, /* segment base address (overwritten) */
1465 0xfffff, /* length */
1466 SDT_MEMERA, /* segment type */
1467 0, /* segment descriptor priority level */
1468 1, /* segment descriptor present */
1469 0, 0,
1470 0, /* default 32 vs 16 bit size */
1471 1 /* limit granularity (byte/page units)*/ },
1472 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1473 { 0, /* segment base address (overwritten) */
1474 0xfffff, /* length */
1475 SDT_MEMERA, /* segment type */
1476 0, /* segment descriptor priority level */
1477 1, /* segment descriptor present */
1478 0, 0,
1479 0, /* default 32 vs 16 bit size */
1480 1 /* limit granularity (byte/page units)*/ },
1481 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1482 { 0, /* segment base address (overwritten) */
1483 0xfffff, /* length */
1484 SDT_MEMRWA, /* segment type */
1485 0, /* segment descriptor priority level */
1486 1, /* segment descriptor present */
1487 0, 0,
1488 1, /* default 32 vs 16 bit size */
1489 1 /* limit granularity (byte/page units)*/ },
1490 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1491 { 0, /* segment base address (overwritten) */
1492 0xfffff, /* length */
1493 SDT_MEMRWA, /* segment type */
1494 0, /* segment descriptor priority level */
1495 1, /* segment descriptor present */
1496 0, 0,
1497 0, /* default 32 vs 16 bit size */
1498 1 /* limit granularity (byte/page units)*/ },
1499 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1500 { 0, /* segment base address (overwritten) */
1501 0xfffff, /* length */
1502 SDT_MEMRWA, /* segment type */
1503 0, /* segment descriptor priority level */
1504 1, /* segment descriptor present */
1505 0, 0,
1506 0, /* default 32 vs 16 bit size */
1507 1 /* limit granularity (byte/page units)*/ },
1508 /* GNDIS_SEL 18 NDIS Descriptor */
1509 { 0x0, /* segment base address */
1510 0x0, /* length */
1511 0, /* segment type */
1512 0, /* segment descriptor priority level */
1513 0, /* segment descriptor present */
1514 0, 0,
1515 0, /* default 32 vs 16 bit size */
1516 0 /* limit granularity (byte/page units)*/ },
1517 };
1518
1519 static struct soft_segment_descriptor ldt_segs[] = {
1520 /* Null Descriptor - overwritten by call gate */
1521 { 0x0, /* segment base address */
1522 0x0, /* length - all address space */
1523 0, /* segment type */
1524 0, /* segment descriptor priority level */
1525 0, /* segment descriptor present */
1526 0, 0,
1527 0, /* default 32 vs 16 bit size */
1528 0 /* limit granularity (byte/page units)*/ },
1529 /* Null Descriptor - overwritten by call gate */
1530 { 0x0, /* segment base address */
1531 0x0, /* length - all address space */
1532 0, /* segment type */
1533 0, /* segment descriptor priority level */
1534 0, /* segment descriptor present */
1535 0, 0,
1536 0, /* default 32 vs 16 bit size */
1537 0 /* limit granularity (byte/page units)*/ },
1538 /* Null Descriptor - overwritten by call gate */
1539 { 0x0, /* segment base address */
1540 0x0, /* length - all address space */
1541 0, /* segment type */
1542 0, /* segment descriptor priority level */
1543 0, /* segment descriptor present */
1544 0, 0,
1545 0, /* default 32 vs 16 bit size */
1546 0 /* limit granularity (byte/page units)*/ },
1547 /* Code Descriptor for user */
1548 { 0x0, /* segment base address */
1549 0xfffff, /* length - all address space */
1550 SDT_MEMERA, /* segment type */
1551 SEL_UPL, /* segment descriptor priority level */
1552 1, /* segment descriptor present */
1553 0, 0,
1554 1, /* default 32 vs 16 bit size */
1555 1 /* limit granularity (byte/page units)*/ },
1556 /* Null Descriptor - overwritten by call gate */
1557 { 0x0, /* segment base address */
1558 0x0, /* length - all address space */
1559 0, /* segment type */
1560 0, /* segment descriptor priority level */
1561 0, /* segment descriptor present */
1562 0, 0,
1563 0, /* default 32 vs 16 bit size */
1564 0 /* limit granularity (byte/page units)*/ },
1565 /* Data Descriptor for user */
1566 { 0x0, /* segment base address */
1567 0xfffff, /* length - all address space */
1568 SDT_MEMRWA, /* segment type */
1569 SEL_UPL, /* segment descriptor priority level */
1570 1, /* segment descriptor present */
1571 0, 0,
1572 1, /* default 32 vs 16 bit size */
1573 1 /* limit granularity (byte/page units)*/ },
1574 };
1575
1576 void
1577 setidt(idx, func, typ, dpl, selec)
1578 int idx;
1579 inthand_t *func;
1580 int typ;
1581 int dpl;
1582 int selec;
1583 {
1584 struct gate_descriptor *ip;
1585
1586 ip = idt + idx;
1587 ip->gd_looffset = (int)func;
1588 ip->gd_selector = selec;
1589 ip->gd_stkcpy = 0;
1590 ip->gd_xx = 0;
1591 ip->gd_type = typ;
1592 ip->gd_dpl = dpl;
1593 ip->gd_p = 1;
1594 ip->gd_hioffset = ((int)func)>>16 ;
1595 }
1596
1597 #define IDTVEC(name) __CONCAT(X,name)
1598
1599 extern inthand_t
1600 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1601 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1602 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1603 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1604 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1605
1606 #ifdef DDB
1607 /*
1608 * Display the index and function name of any IDT entries that don't use
1609 * the default 'rsvd' entry point.
1610 */
1611 DB_SHOW_COMMAND(idt, db_show_idt)
1612 {
1613 struct gate_descriptor *ip;
1614 int idx, quit;
1615 uintptr_t func;
1616
1617 ip = idt;
1618 db_setup_paging(db_simple_pager, &quit, db_lines_per_page);
1619 for (idx = 0, quit = 0; idx < NIDT; idx++) {
1620 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1621 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1622 db_printf("%3d\t", idx);
1623 db_printsym(func, DB_STGY_PROC);
1624 db_printf("\n");
1625 }
1626 ip++;
1627 }
1628 }
1629 #endif
1630
1631 void
1632 sdtossd(sd, ssd)
1633 struct segment_descriptor *sd;
1634 struct soft_segment_descriptor *ssd;
1635 {
1636 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1637 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1638 ssd->ssd_type = sd->sd_type;
1639 ssd->ssd_dpl = sd->sd_dpl;
1640 ssd->ssd_p = sd->sd_p;
1641 ssd->ssd_def32 = sd->sd_def32;
1642 ssd->ssd_gran = sd->sd_gran;
1643 }
1644
1645 static int
1646 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
1647 {
1648 int i, physmap_idx;
1649
1650 physmap_idx = *physmap_idxp;
1651
1652 if (boothowto & RB_VERBOSE)
1653 printf("SMAP type=%02x base=%016llx len=%016llx\n",
1654 smap->type, smap->base, smap->length);
1655
1656 if (smap->type != SMAP_TYPE_MEMORY)
1657 return (1);
1658
1659 if (smap->length == 0)
1660 return (1);
1661
1662 #ifndef PAE
1663 if (smap->base >= 0xffffffff) {
1664 printf("%uK of memory above 4GB ignored\n",
1665 (u_int)(smap->length / 1024));
1666 return (1);
1667 }
1668 #endif
1669
1670 for (i = 0; i <= physmap_idx; i += 2) {
1671 if (smap->base < physmap[i + 1]) {
1672 if (boothowto & RB_VERBOSE)
1673 printf(
1674 "Overlapping or non-monotonic memory region, ignoring second region\n");
1675 return (1);
1676 }
1677 }
1678
1679 if (smap->base == physmap[physmap_idx + 1]) {
1680 physmap[physmap_idx + 1] += smap->length;
1681 return (1);
1682 }
1683
1684 physmap_idx += 2;
1685 *physmap_idxp = physmap_idx;
1686 if (physmap_idx == PHYSMAP_SIZE) {
1687 printf(
1688 "Too many segments in the physical address map, giving up\n");
1689 return (0);
1690 }
1691 physmap[physmap_idx] = smap->base;
1692 physmap[physmap_idx + 1] = smap->base + smap->length;
1693 return (1);
1694 }
1695
1696 /*
1697 * Populate the (physmap) array with base/bound pairs describing the
1698 * available physical memory in the system, then test this memory and
1699 * build the phys_avail array describing the actually-available memory.
1700 *
1701 * If we cannot accurately determine the physical memory map, then use
1702 * value from the 0xE801 call, and failing that, the RTC.
1703 *
1704 * Total memory size may be set by the kernel environment variable
1705 * hw.physmem or the compile-time define MAXMEM.
1706 *
1707 * XXX first should be vm_paddr_t.
1708 */
1709 static void
1710 getmemsize(int first)
1711 {
1712 int i, physmap_idx, pa_indx, da_indx;
1713 int hasbrokenint12, has_smap;
1714 u_long physmem_tunable;
1715 u_int extmem;
1716 struct vm86frame vmf;
1717 struct vm86context vmc;
1718 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1719 pt_entry_t *pte;
1720 struct bios_smap *smap, *smapbase, *smapend;
1721 u_int32_t smapsize;
1722 quad_t dcons_addr, dcons_size;
1723 caddr_t kmdp;
1724
1725 #ifdef XBOX
1726 if (arch_i386_is_xbox) {
1727 /*
1728 * We queried the memory size before, so chop off 4MB for
1729 * the framebuffer and inform the OS of this.
1730 */
1731 physmap[0] = 0;
1732 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE;
1733 physmap_idx = 0;
1734 has_smap = 0;
1735 goto physmap_done;
1736 }
1737 #endif
1738
1739 hasbrokenint12 = 0;
1740 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1741 bzero(&vmf, sizeof(vmf));
1742 bzero(physmap, sizeof(physmap));
1743 basemem = 0;
1744 has_smap = 0;
1745
1746 /*
1747 * Some newer BIOSes has broken INT 12H implementation which cause
1748 * kernel panic immediately. In this case, we need to scan SMAP
1749 * with INT 15:E820 first, then determine base memory size.
1750 */
1751 if (hasbrokenint12) {
1752 goto int15e820;
1753 }
1754
1755 /*
1756 * Perform "base memory" related probes & setup
1757 */
1758 vm86_intcall(0x12, &vmf);
1759 basemem = vmf.vmf_ax;
1760 if (basemem > 640) {
1761 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1762 basemem);
1763 basemem = 640;
1764 }
1765
1766 /*
1767 * XXX if biosbasemem is now < 640, there is a `hole'
1768 * between the end of base memory and the start of
1769 * ISA memory. The hole may be empty or it may
1770 * contain BIOS code or data. Map it read/write so
1771 * that the BIOS can write to it. (Memory from 0 to
1772 * the physical end of the kernel is mapped read-only
1773 * to begin with and then parts of it are remapped.
1774 * The parts that aren't remapped form holes that
1775 * remain read-only and are unused by the kernel.
1776 * The base memory area is below the physical end of
1777 * the kernel and right now forms a read-only hole.
1778 * The part of it from PAGE_SIZE to
1779 * (trunc_page(biosbasemem * 1024) - 1) will be
1780 * remapped and used by the kernel later.)
1781 *
1782 * This code is similar to the code used in
1783 * pmap_mapdev, but since no memory needs to be
1784 * allocated we simply change the mapping.
1785 */
1786 for (pa = trunc_page(basemem * 1024);
1787 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1788 pmap_kenter(KERNBASE + pa, pa);
1789
1790 /*
1791 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
1792 * the vm86 page table so that vm86 can scribble on them using
1793 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
1794 * page 0, at least as initialized here?
1795 */
1796 pte = (pt_entry_t *)vm86paddr;
1797 for (i = basemem / 4; i < 160; i++)
1798 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1799
1800 int15e820:
1801 /*
1802 * Fetch the memory map with INT 15:E820. First, check to see
1803 * if the loader supplied it and use that if so. Otherwise,
1804 * use vm86 to invoke the BIOS call directly.
1805 */
1806 physmap_idx = 0;
1807 smapbase = NULL;
1808 kmdp = preload_search_by_type("elf kernel");
1809 if (kmdp == NULL)
1810 kmdp = preload_search_by_type("elf32 kernel");
1811 if (kmdp != NULL)
1812 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1813 MODINFO_METADATA | MODINFOMD_SMAP);
1814 if (smapbase != NULL) {
1815 /* subr_module.c says:
1816 * "Consumer may safely assume that size value precedes data."
1817 * ie: an int32_t immediately precedes smap.
1818 */
1819 smapsize = *((u_int32_t *)smapbase - 1);
1820 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1821 has_smap = 1;
1822
1823 for (smap = smapbase; smap < smapend; smap++)
1824 if (!add_smap_entry(smap, physmap, &physmap_idx))
1825 break;
1826 } else {
1827 /*
1828 * map page 1 R/W into the kernel page table so we can use it
1829 * as a buffer. The kernel will unmap this page later.
1830 */
1831 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
1832 vmc.npages = 0;
1833 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE +
1834 (1 << PAGE_SHIFT));
1835 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1836
1837 vmf.vmf_ebx = 0;
1838 do {
1839 vmf.vmf_eax = 0xE820;
1840 vmf.vmf_edx = SMAP_SIG;
1841 vmf.vmf_ecx = sizeof(struct bios_smap);
1842 i = vm86_datacall(0x15, &vmf, &vmc);
1843 if (i || vmf.vmf_eax != SMAP_SIG)
1844 break;
1845 has_smap = 1;
1846 if (!add_smap_entry(smap, physmap, &physmap_idx))
1847 break;
1848 } while (vmf.vmf_ebx != 0);
1849 }
1850
1851 /*
1852 * Perform "base memory" related probes & setup based on SMAP
1853 */
1854 if (basemem == 0) {
1855 for (i = 0; i <= physmap_idx; i += 2) {
1856 if (physmap[i] == 0x00000000) {
1857 basemem = physmap[i + 1] / 1024;
1858 break;
1859 }
1860 }
1861
1862 /*
1863 * XXX this function is horribly organized and has to the same
1864 * things that it does above here.
1865 */
1866 if (basemem == 0)
1867 basemem = 640;
1868 if (basemem > 640) {
1869 printf(
1870 "Preposterous BIOS basemem of %uK, truncating to 640K\n",
1871 basemem);
1872 basemem = 640;
1873 }
1874
1875 /*
1876 * Let vm86 scribble on pages between basemem and
1877 * ISA_HOLE_START, as above.
1878 */
1879 for (pa = trunc_page(basemem * 1024);
1880 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1881 pmap_kenter(KERNBASE + pa, pa);
1882 pte = (pt_entry_t *)vm86paddr;
1883 for (i = basemem / 4; i < 160; i++)
1884 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1885 }
1886
1887 if (physmap[1] != 0)
1888 goto physmap_done;
1889
1890 /*
1891 * If we failed above, try memory map with INT 15:E801
1892 */
1893 vmf.vmf_ax = 0xE801;
1894 if (vm86_intcall(0x15, &vmf) == 0) {
1895 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1896 } else {
1897 #if 0
1898 vmf.vmf_ah = 0x88;
1899 vm86_intcall(0x15, &vmf);
1900 extmem = vmf.vmf_ax;
1901 #else
1902 /*
1903 * Prefer the RTC value for extended memory.
1904 */
1905 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1906 #endif
1907 }
1908
1909 /*
1910 * Special hack for chipsets that still remap the 384k hole when
1911 * there's 16MB of memory - this really confuses people that
1912 * are trying to use bus mastering ISA controllers with the
1913 * "16MB limit"; they only have 16MB, but the remapping puts
1914 * them beyond the limit.
1915 *
1916 * If extended memory is between 15-16MB (16-17MB phys address range),
1917 * chop it to 15MB.
1918 */
1919 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1920 extmem = 15 * 1024;
1921
1922 physmap[0] = 0;
1923 physmap[1] = basemem * 1024;
1924 physmap_idx = 2;
1925 physmap[physmap_idx] = 0x100000;
1926 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1927
1928 physmap_done:
1929 /*
1930 * Now, physmap contains a map of physical memory.
1931 */
1932
1933 #ifdef SMP
1934 /* make hole for AP bootstrap code */
1935 physmap[1] = mp_bootaddress(physmap[1]);
1936 #endif
1937
1938 /*
1939 * Maxmem isn't the "maximum memory", it's one larger than the
1940 * highest page of the physical address space. It should be
1941 * called something like "Maxphyspage". We may adjust this
1942 * based on ``hw.physmem'' and the results of the memory test.
1943 */
1944 Maxmem = atop(physmap[physmap_idx + 1]);
1945
1946 #ifdef MAXMEM
1947 Maxmem = MAXMEM / 4;
1948 #endif
1949
1950 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1951 Maxmem = atop(physmem_tunable);
1952
1953 /*
1954 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
1955 * the amount of memory in the system.
1956 */
1957 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
1958 Maxmem = atop(physmap[physmap_idx + 1]);
1959
1960 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1961 (boothowto & RB_VERBOSE))
1962 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1963
1964 /*
1965 * If Maxmem has been increased beyond what the system has detected,
1966 * extend the last memory segment to the new limit.
1967 */
1968 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1969 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
1970
1971 /* call pmap initialization to make new kernel address space */
1972 pmap_bootstrap(first, 0);
1973
1974 /*
1975 * Size up each available chunk of physical memory.
1976 */
1977 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1978 pa_indx = 0;
1979 da_indx = 1;
1980 phys_avail[pa_indx++] = physmap[0];
1981 phys_avail[pa_indx] = physmap[0];
1982 dump_avail[da_indx] = physmap[0];
1983 pte = CMAP1;
1984
1985 /*
1986 * Get dcons buffer address
1987 */
1988 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1989 getenv_quad("dcons.size", &dcons_size) == 0)
1990 dcons_addr = 0;
1991
1992 /*
1993 * physmap is in bytes, so when converting to page boundaries,
1994 * round up the start address and round down the end address.
1995 */
1996 for (i = 0; i <= physmap_idx; i += 2) {
1997 vm_paddr_t end;
1998
1999 end = ptoa((vm_paddr_t)Maxmem);
2000 if (physmap[i + 1] < end)
2001 end = trunc_page(physmap[i + 1]);
2002 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
2003 int tmp, page_bad, full;
2004 int *ptr = (int *)CADDR1;
2005
2006 full = FALSE;
2007 /*
2008 * block out kernel memory as not available.
2009 */
2010 if (pa >= KERNLOAD && pa < first)
2011 goto do_dump_avail;
2012
2013 /*
2014 * block out dcons buffer
2015 */
2016 if (dcons_addr > 0
2017 && pa >= trunc_page(dcons_addr)
2018 && pa < dcons_addr + dcons_size)
2019 goto do_dump_avail;
2020
2021 page_bad = FALSE;
2022
2023 /*
2024 * map page into kernel: valid, read/write,non-cacheable
2025 */
2026 *pte = pa | PG_V | PG_RW | PG_N;
2027 invltlb();
2028
2029 tmp = *(int *)ptr;
2030 /*
2031 * Test for alternating 1's and 0's
2032 */
2033 *(volatile int *)ptr = 0xaaaaaaaa;
2034 if (*(volatile int *)ptr != 0xaaaaaaaa)
2035 page_bad = TRUE;
2036 /*
2037 * Test for alternating 0's and 1's
2038 */
2039 *(volatile int *)ptr = 0x55555555;
2040 if (*(volatile int *)ptr != 0x55555555)
2041 page_bad = TRUE;
2042 /*
2043 * Test for all 1's
2044 */
2045 *(volatile int *)ptr = 0xffffffff;
2046 if (*(volatile int *)ptr != 0xffffffff)
2047 page_bad = TRUE;
2048 /*
2049 * Test for all 0's
2050 */
2051 *(volatile int *)ptr = 0x0;
2052 if (*(volatile int *)ptr != 0x0)
2053 page_bad = TRUE;
2054 /*
2055 * Restore original value.
2056 */
2057 *(int *)ptr = tmp;
2058
2059 /*
2060 * Adjust array of valid/good pages.
2061 */
2062 if (page_bad == TRUE)
2063 continue;
2064 /*
2065 * If this good page is a continuation of the
2066 * previous set of good pages, then just increase
2067 * the end pointer. Otherwise start a new chunk.
2068 * Note that "end" points one higher than end,
2069 * making the range >= start and < end.
2070 * If we're also doing a speculative memory
2071 * test and we at or past the end, bump up Maxmem
2072 * so that we keep going. The first bad page
2073 * will terminate the loop.
2074 */
2075 if (phys_avail[pa_indx] == pa) {
2076 phys_avail[pa_indx] += PAGE_SIZE;
2077 } else {
2078 pa_indx++;
2079 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2080 printf(
2081 "Too many holes in the physical address space, giving up\n");
2082 pa_indx--;
2083 full = TRUE;
2084 goto do_dump_avail;
2085 }
2086 phys_avail[pa_indx++] = pa; /* start */
2087 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2088 }
2089 physmem++;
2090 do_dump_avail:
2091 if (dump_avail[da_indx] == pa) {
2092 dump_avail[da_indx] += PAGE_SIZE;
2093 } else {
2094 da_indx++;
2095 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2096 da_indx--;
2097 goto do_next;
2098 }
2099 dump_avail[da_indx++] = pa; /* start */
2100 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2101 }
2102 do_next:
2103 if (full)
2104 break;
2105 }
2106 }
2107 *pte = 0;
2108 invltlb();
2109
2110 /*
2111 * XXX
2112 * The last chunk must contain at least one page plus the message
2113 * buffer to avoid complicating other code (message buffer address
2114 * calculation, etc.).
2115 */
2116 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2117 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
2118 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2119 phys_avail[pa_indx--] = 0;
2120 phys_avail[pa_indx--] = 0;
2121 }
2122
2123 Maxmem = atop(phys_avail[pa_indx]);
2124
2125 /* Trim off space for the message buffer. */
2126 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
2127
2128 avail_end = phys_avail[pa_indx];
2129 }
2130
2131 void
2132 init386(first)
2133 int first;
2134 {
2135 struct gate_descriptor *gdp;
2136 int gsel_tss, metadata_missing, off, x;
2137 struct pcpu *pc;
2138
2139 thread0.td_kstack = proc0kstack;
2140 thread0.td_pcb = (struct pcb *)
2141 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
2142
2143 /*
2144 * This may be done better later if it gets more high level
2145 * components in it. If so just link td->td_proc here.
2146 */
2147 proc_linkup(&proc0, &ksegrp0, &thread0);
2148
2149 metadata_missing = 0;
2150 if (bootinfo.bi_modulep) {
2151 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2152 preload_bootstrap_relocate(KERNBASE);
2153 } else {
2154 metadata_missing = 1;
2155 }
2156 if (envmode == 1)
2157 kern_envp = static_env;
2158 else if (bootinfo.bi_envp)
2159 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2160
2161 /* Init basic tunables, hz etc */
2162 init_param1();
2163
2164 /*
2165 * Make gdt memory segments. All segments cover the full 4GB
2166 * of address space and permissions are enforced at page level.
2167 */
2168 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2169 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2170 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2171 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2172 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2173 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2174
2175 pc = &__pcpu[0];
2176 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2177 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2178 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2179
2180 for (x = 0; x < NGDT; x++)
2181 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2182
2183 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2184 r_gdt.rd_base = (int) gdt;
2185 lgdt(&r_gdt);
2186
2187 pcpu_init(pc, 0, sizeof(struct pcpu));
2188 PCPU_SET(prvspace, pc);
2189 PCPU_SET(curthread, &thread0);
2190 PCPU_SET(curpcb, thread0.td_pcb);
2191
2192 /*
2193 * Initialize mutexes.
2194 *
2195 * icu_lock: in order to allow an interrupt to occur in a critical
2196 * section, to set pcpu->ipending (etc...) properly, we
2197 * must be able to get the icu lock, so it can't be
2198 * under witness.
2199 */
2200 mutex_init();
2201 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN);
2202 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
2203
2204 /* make ldt memory segments */
2205 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2206 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2207 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2208 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2209
2210 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2211 lldt(_default_ldt);
2212 PCPU_SET(currentldt, _default_ldt);
2213
2214 /* exceptions */
2215 for (x = 0; x < NIDT; x++)
2216 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2217 GSEL(GCODE_SEL, SEL_KPL));
2218 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2219 GSEL(GCODE_SEL, SEL_KPL));
2220 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2221 GSEL(GCODE_SEL, SEL_KPL));
2222 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2223 GSEL(GCODE_SEL, SEL_KPL));
2224 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2225 GSEL(GCODE_SEL, SEL_KPL));
2226 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2227 GSEL(GCODE_SEL, SEL_KPL));
2228 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2229 GSEL(GCODE_SEL, SEL_KPL));
2230 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2231 GSEL(GCODE_SEL, SEL_KPL));
2232 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2233 , GSEL(GCODE_SEL, SEL_KPL));
2234 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2235 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2236 GSEL(GCODE_SEL, SEL_KPL));
2237 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2238 GSEL(GCODE_SEL, SEL_KPL));
2239 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2240 GSEL(GCODE_SEL, SEL_KPL));
2241 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2242 GSEL(GCODE_SEL, SEL_KPL));
2243 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2244 GSEL(GCODE_SEL, SEL_KPL));
2245 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2246 GSEL(GCODE_SEL, SEL_KPL));
2247 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2248 GSEL(GCODE_SEL, SEL_KPL));
2249 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2250 GSEL(GCODE_SEL, SEL_KPL));
2251 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2252 GSEL(GCODE_SEL, SEL_KPL));
2253 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2254 GSEL(GCODE_SEL, SEL_KPL));
2255 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2256 GSEL(GCODE_SEL, SEL_KPL));
2257
2258 r_idt.rd_limit = sizeof(idt0) - 1;
2259 r_idt.rd_base = (int) idt;
2260 lidt(&r_idt);
2261
2262 #ifdef XBOX
2263 /*
2264 * The following code queries the PCI ID of 0:0:0. For the XBOX,
2265 * This should be 0x10de / 0x02a5.
2266 *
2267 * This is exactly what Linux does.
2268 */
2269 outl(0xcf8, 0x80000000);
2270 if (inl(0xcfc) == 0x02a510de) {
2271 arch_i386_is_xbox = 1;
2272 pic16l_setled(XBOX_LED_GREEN);
2273
2274 /*
2275 * We are an XBOX, but we may have either 64MB or 128MB of
2276 * memory. The PCI host bridge should be programmed for this,
2277 * so we just query it.
2278 */
2279 outl (0xcf8, 0x80000084);
2280 arch_i386_xbox_memsize = (inl (0xcfc) == 0x7FFFFFF) ? 128 : 64;
2281 }
2282 #endif /* XBOX */
2283
2284 /*
2285 * Initialize the console before we print anything out.
2286 */
2287 cninit();
2288
2289 if (metadata_missing)
2290 printf("WARNING: loader(8) metadata is missing!\n");
2291
2292 #ifdef DEV_ISA
2293 elcr_probe();
2294 atpic_startup();
2295 #endif
2296
2297 #ifdef DDB
2298 ksym_start = bootinfo.bi_symtab;
2299 ksym_end = bootinfo.bi_esymtab;
2300 #endif
2301
2302 kdb_init();
2303
2304 #ifdef KDB
2305 if (boothowto & RB_KDB)
2306 kdb_enter("Boot flags requested debugger");
2307 #endif
2308
2309 finishidentcpu(); /* Final stage of CPU initialization */
2310 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2311 GSEL(GCODE_SEL, SEL_KPL));
2312 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2313 GSEL(GCODE_SEL, SEL_KPL));
2314 initializecpu(); /* Initialize CPU registers */
2315
2316 /* make an initial tss so cpu can get interrupt stack on syscall! */
2317 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2318 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2319 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
2320 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2321 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2322 private_tss = 0;
2323 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2324 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2325 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2326 ltr(gsel_tss);
2327
2328 /* pointer to selector slot for %fs/%gs */
2329 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2330
2331 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2332 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2333 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2334 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2335 #ifdef PAE
2336 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2337 #else
2338 dblfault_tss.tss_cr3 = (int)IdlePTD;
2339 #endif
2340 dblfault_tss.tss_eip = (int)dblfault_handler;
2341 dblfault_tss.tss_eflags = PSL_KERNEL;
2342 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2343 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2344 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2345 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2346 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2347
2348 vm86_initialize();
2349 getmemsize(first);
2350 init_param2(physmem);
2351
2352 /* now running on new page tables, configured,and u/iom is accessible */
2353
2354 /* Map the message buffer. */
2355 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2356 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2357
2358 msgbufinit(msgbufp, MSGBUF_SIZE);
2359
2360 /* make a call gate to reenter kernel with */
2361 gdp = &ldt[LSYS5CALLS_SEL].gd;
2362
2363 x = (int) &IDTVEC(lcall_syscall);
2364 gdp->gd_looffset = x;
2365 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2366 gdp->gd_stkcpy = 1;
2367 gdp->gd_type = SDT_SYS386CGT;
2368 gdp->gd_dpl = SEL_UPL;
2369 gdp->gd_p = 1;
2370 gdp->gd_hioffset = x >> 16;
2371
2372 /* XXX does this work? */
2373 /* XXX yes! */
2374 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2375 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2376
2377 /* transfer to user mode */
2378
2379 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2380 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2381
2382 /* setup proc 0's pcb */
2383 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */
2384 #ifdef PAE
2385 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2386 #else
2387 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2388 #endif
2389 thread0.td_pcb->pcb_ext = 0;
2390 thread0.td_frame = &proc0_tf;
2391 }
2392
2393 void
2394 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2395 {
2396
2397 pcpu->pc_acpi_id = 0xffffffff;
2398 }
2399
2400 void
2401 spinlock_enter(void)
2402 {
2403 struct thread *td;
2404
2405 td = curthread;
2406 if (td->td_md.md_spinlock_count == 0)
2407 td->td_md.md_saved_flags = intr_disable();
2408 td->td_md.md_spinlock_count++;
2409 critical_enter();
2410 }
2411
2412 void
2413 spinlock_exit(void)
2414 {
2415 struct thread *td;
2416
2417 td = curthread;
2418 critical_exit();
2419 td->td_md.md_spinlock_count--;
2420 if (td->td_md.md_spinlock_count == 0)
2421 intr_restore(td->td_md.md_saved_flags);
2422 }
2423
2424 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2425 static void f00f_hack(void *unused);
2426 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL)
2427
2428 static void
2429 f00f_hack(void *unused)
2430 {
2431 struct gate_descriptor *new_idt;
2432 vm_offset_t tmp;
2433
2434 if (!has_f00f_bug)
2435 return;
2436
2437 GIANT_REQUIRED;
2438
2439 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2440
2441 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2442 if (tmp == 0)
2443 panic("kmem_alloc returned 0");
2444
2445 /* Put the problematic entry (#6) at the end of the lower page. */
2446 new_idt = (struct gate_descriptor*)
2447 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
2448 bcopy(idt, new_idt, sizeof(idt0));
2449 r_idt.rd_base = (u_int)new_idt;
2450 lidt(&r_idt);
2451 idt = new_idt;
2452 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2453 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2454 panic("vm_map_protect failed");
2455 }
2456 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2457
2458 /*
2459 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2460 * we want to start a backtrace from the function that caused us to enter
2461 * the debugger. We have the context in the trapframe, but base the trace
2462 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2463 * enough for a backtrace.
2464 */
2465 void
2466 makectx(struct trapframe *tf, struct pcb *pcb)
2467 {
2468
2469 pcb->pcb_edi = tf->tf_edi;
2470 pcb->pcb_esi = tf->tf_esi;
2471 pcb->pcb_ebp = tf->tf_ebp;
2472 pcb->pcb_ebx = tf->tf_ebx;
2473 pcb->pcb_eip = tf->tf_eip;
2474 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
2475 }
2476
2477 int
2478 ptrace_set_pc(struct thread *td, u_long addr)
2479 {
2480
2481 td->td_frame->tf_eip = addr;
2482 return (0);
2483 }
2484
2485 int
2486 ptrace_single_step(struct thread *td)
2487 {
2488 td->td_frame->tf_eflags |= PSL_T;
2489 return (0);
2490 }
2491
2492 int
2493 ptrace_clear_single_step(struct thread *td)
2494 {
2495 td->td_frame->tf_eflags &= ~PSL_T;
2496 return (0);
2497 }
2498
2499 int
2500 fill_regs(struct thread *td, struct reg *regs)
2501 {
2502 struct pcb *pcb;
2503 struct trapframe *tp;
2504
2505 tp = td->td_frame;
2506 pcb = td->td_pcb;
2507 regs->r_fs = tp->tf_fs;
2508 regs->r_es = tp->tf_es;
2509 regs->r_ds = tp->tf_ds;
2510 regs->r_edi = tp->tf_edi;
2511 regs->r_esi = tp->tf_esi;
2512 regs->r_ebp = tp->tf_ebp;
2513 regs->r_ebx = tp->tf_ebx;
2514 regs->r_edx = tp->tf_edx;
2515 regs->r_ecx = tp->tf_ecx;
2516 regs->r_eax = tp->tf_eax;
2517 regs->r_eip = tp->tf_eip;
2518 regs->r_cs = tp->tf_cs;
2519 regs->r_eflags = tp->tf_eflags;
2520 regs->r_esp = tp->tf_esp;
2521 regs->r_ss = tp->tf_ss;
2522 regs->r_gs = pcb->pcb_gs;
2523 return (0);
2524 }
2525
2526 int
2527 set_regs(struct thread *td, struct reg *regs)
2528 {
2529 struct pcb *pcb;
2530 struct trapframe *tp;
2531
2532 tp = td->td_frame;
2533 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2534 !CS_SECURE(regs->r_cs))
2535 return (EINVAL);
2536 pcb = td->td_pcb;
2537 tp->tf_fs = regs->r_fs;
2538 tp->tf_es = regs->r_es;
2539 tp->tf_ds = regs->r_ds;
2540 tp->tf_edi = regs->r_edi;
2541 tp->tf_esi = regs->r_esi;
2542 tp->tf_ebp = regs->r_ebp;
2543 tp->tf_ebx = regs->r_ebx;
2544 tp->tf_edx = regs->r_edx;
2545 tp->tf_ecx = regs->r_ecx;
2546 tp->tf_eax = regs->r_eax;
2547 tp->tf_eip = regs->r_eip;
2548 tp->tf_cs = regs->r_cs;
2549 tp->tf_eflags = regs->r_eflags;
2550 tp->tf_esp = regs->r_esp;
2551 tp->tf_ss = regs->r_ss;
2552 pcb->pcb_gs = regs->r_gs;
2553 return (0);
2554 }
2555
2556 #ifdef CPU_ENABLE_SSE
2557 static void
2558 fill_fpregs_xmm(sv_xmm, sv_87)
2559 struct savexmm *sv_xmm;
2560 struct save87 *sv_87;
2561 {
2562 register struct env87 *penv_87 = &sv_87->sv_env;
2563 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2564 int i;
2565
2566 bzero(sv_87, sizeof(*sv_87));
2567
2568 /* FPU control/status */
2569 penv_87->en_cw = penv_xmm->en_cw;
2570 penv_87->en_sw = penv_xmm->en_sw;
2571 penv_87->en_tw = penv_xmm->en_tw;
2572 penv_87->en_fip = penv_xmm->en_fip;
2573 penv_87->en_fcs = penv_xmm->en_fcs;
2574 penv_87->en_opcode = penv_xmm->en_opcode;
2575 penv_87->en_foo = penv_xmm->en_foo;
2576 penv_87->en_fos = penv_xmm->en_fos;
2577
2578 /* FPU registers */
2579 for (i = 0; i < 8; ++i)
2580 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2581 }
2582
2583 static void
2584 set_fpregs_xmm(sv_87, sv_xmm)
2585 struct save87 *sv_87;
2586 struct savexmm *sv_xmm;
2587 {
2588 register struct env87 *penv_87 = &sv_87->sv_env;
2589 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2590 int i;
2591
2592 /* FPU control/status */
2593 penv_xmm->en_cw = penv_87->en_cw;
2594 penv_xmm->en_sw = penv_87->en_sw;
2595 penv_xmm->en_tw = penv_87->en_tw;
2596 penv_xmm->en_fip = penv_87->en_fip;
2597 penv_xmm->en_fcs = penv_87->en_fcs;
2598 penv_xmm->en_opcode = penv_87->en_opcode;
2599 penv_xmm->en_foo = penv_87->en_foo;
2600 penv_xmm->en_fos = penv_87->en_fos;
2601
2602 /* FPU registers */
2603 for (i = 0; i < 8; ++i)
2604 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2605 }
2606 #endif /* CPU_ENABLE_SSE */
2607
2608 int
2609 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2610 {
2611 #ifdef CPU_ENABLE_SSE
2612 if (cpu_fxsr) {
2613 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm,
2614 (struct save87 *)fpregs);
2615 return (0);
2616 }
2617 #endif /* CPU_ENABLE_SSE */
2618 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2619 return (0);
2620 }
2621
2622 int
2623 set_fpregs(struct thread *td, struct fpreg *fpregs)
2624 {
2625 #ifdef CPU_ENABLE_SSE
2626 if (cpu_fxsr) {
2627 set_fpregs_xmm((struct save87 *)fpregs,
2628 &td->td_pcb->pcb_save.sv_xmm);
2629 return (0);
2630 }
2631 #endif /* CPU_ENABLE_SSE */
2632 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2633 return (0);
2634 }
2635
2636 /*
2637 * Get machine context.
2638 */
2639 int
2640 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2641 {
2642 struct trapframe *tp;
2643
2644 tp = td->td_frame;
2645
2646 PROC_LOCK(curthread->td_proc);
2647 mcp->mc_onstack = sigonstack(tp->tf_esp);
2648 PROC_UNLOCK(curthread->td_proc);
2649 mcp->mc_gs = td->td_pcb->pcb_gs;
2650 mcp->mc_fs = tp->tf_fs;
2651 mcp->mc_es = tp->tf_es;
2652 mcp->mc_ds = tp->tf_ds;
2653 mcp->mc_edi = tp->tf_edi;
2654 mcp->mc_esi = tp->tf_esi;
2655 mcp->mc_ebp = tp->tf_ebp;
2656 mcp->mc_isp = tp->tf_isp;
2657 mcp->mc_eflags = tp->tf_eflags;
2658 if (flags & GET_MC_CLEAR_RET) {
2659 mcp->mc_eax = 0;
2660 mcp->mc_edx = 0;
2661 mcp->mc_eflags &= ~PSL_C;
2662 } else {
2663 mcp->mc_eax = tp->tf_eax;
2664 mcp->mc_edx = tp->tf_edx;
2665 }
2666 mcp->mc_ebx = tp->tf_ebx;
2667 mcp->mc_ecx = tp->tf_ecx;
2668 mcp->mc_eip = tp->tf_eip;
2669 mcp->mc_cs = tp->tf_cs;
2670 mcp->mc_esp = tp->tf_esp;
2671 mcp->mc_ss = tp->tf_ss;
2672 mcp->mc_len = sizeof(*mcp);
2673 get_fpcontext(td, mcp);
2674 return (0);
2675 }
2676
2677 /*
2678 * Set machine context.
2679 *
2680 * However, we don't set any but the user modifiable flags, and we won't
2681 * touch the cs selector.
2682 */
2683 int
2684 set_mcontext(struct thread *td, const mcontext_t *mcp)
2685 {
2686 struct trapframe *tp;
2687 int eflags, ret;
2688
2689 tp = td->td_frame;
2690 if (mcp->mc_len != sizeof(*mcp))
2691 return (EINVAL);
2692 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
2693 (tp->tf_eflags & ~PSL_USERCHANGE);
2694 if ((ret = set_fpcontext(td, mcp)) == 0) {
2695 tp->tf_fs = mcp->mc_fs;
2696 tp->tf_es = mcp->mc_es;
2697 tp->tf_ds = mcp->mc_ds;
2698 tp->tf_edi = mcp->mc_edi;
2699 tp->tf_esi = mcp->mc_esi;
2700 tp->tf_ebp = mcp->mc_ebp;
2701 tp->tf_ebx = mcp->mc_ebx;
2702 tp->tf_edx = mcp->mc_edx;
2703 tp->tf_ecx = mcp->mc_ecx;
2704 tp->tf_eax = mcp->mc_eax;
2705 tp->tf_eip = mcp->mc_eip;
2706 tp->tf_eflags = eflags;
2707 tp->tf_esp = mcp->mc_esp;
2708 tp->tf_ss = mcp->mc_ss;
2709 td->td_pcb->pcb_gs = mcp->mc_gs;
2710 ret = 0;
2711 }
2712 return (ret);
2713 }
2714
2715 static void
2716 get_fpcontext(struct thread *td, mcontext_t *mcp)
2717 {
2718 #ifndef DEV_NPX
2719 mcp->mc_fpformat = _MC_FPFMT_NODEV;
2720 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
2721 #else
2722 union savefpu *addr;
2723
2724 /*
2725 * XXX mc_fpstate might be misaligned, since its declaration is not
2726 * unportabilized using __attribute__((aligned(16))) like the
2727 * declaration of struct savemm, and anyway, alignment doesn't work
2728 * for auto variables since we don't use gcc's pessimal stack
2729 * alignment. Work around this by abusing the spare fields after
2730 * mcp->mc_fpstate.
2731 *
2732 * XXX unpessimize most cases by only aligning when fxsave might be
2733 * called, although this requires knowing too much about
2734 * npxgetregs()'s internals.
2735 */
2736 addr = (union savefpu *)&mcp->mc_fpstate;
2737 if (td == PCPU_GET(fpcurthread) &&
2738 #ifdef CPU_ENABLE_SSE
2739 cpu_fxsr &&
2740 #endif
2741 ((uintptr_t)(void *)addr & 0xF)) {
2742 do
2743 addr = (void *)((char *)addr + 4);
2744 while ((uintptr_t)(void *)addr & 0xF);
2745 }
2746 mcp->mc_ownedfp = npxgetregs(td, addr);
2747 if (addr != (union savefpu *)&mcp->mc_fpstate) {
2748 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
2749 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2));
2750 }
2751 mcp->mc_fpformat = npxformat();
2752 #endif
2753 }
2754
2755 static int
2756 set_fpcontext(struct thread *td, const mcontext_t *mcp)
2757 {
2758 union savefpu *addr;
2759
2760 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2761 return (0);
2762 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
2763 mcp->mc_fpformat != _MC_FPFMT_XMM)
2764 return (EINVAL);
2765 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
2766 /* We don't care what state is left in the FPU or PCB. */
2767 fpstate_drop(td);
2768 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2769 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2770 /* XXX align as above. */
2771 addr = (union savefpu *)&mcp->mc_fpstate;
2772 if (td == PCPU_GET(fpcurthread) &&
2773 #ifdef CPU_ENABLE_SSE
2774 cpu_fxsr &&
2775 #endif
2776 ((uintptr_t)(void *)addr & 0xF)) {
2777 do
2778 addr = (void *)((char *)addr + 4);
2779 while ((uintptr_t)(void *)addr & 0xF);
2780 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate));
2781 }
2782 #ifdef DEV_NPX
2783 #ifdef CPU_ENABLE_SSE
2784 if (cpu_fxsr)
2785 addr->sv_xmm.sv_env.en_mxcsr &= cpu_mxcsr_mask;
2786 #endif
2787 /*
2788 * XXX we violate the dubious requirement that npxsetregs()
2789 * be called with interrupts disabled.
2790 */
2791 npxsetregs(td, addr);
2792 #endif
2793 /*
2794 * Don't bother putting things back where they were in the
2795 * misaligned case, since we know that the caller won't use
2796 * them again.
2797 */
2798 } else
2799 return (EINVAL);
2800 return (0);
2801 }
2802
2803 static void
2804 fpstate_drop(struct thread *td)
2805 {
2806 register_t s;
2807
2808 s = intr_disable();
2809 #ifdef DEV_NPX
2810 if (PCPU_GET(fpcurthread) == td)
2811 npxdrop();
2812 #endif
2813 /*
2814 * XXX force a full drop of the npx. The above only drops it if we
2815 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
2816 *
2817 * XXX I don't much like npxgetregs()'s semantics of doing a full
2818 * drop. Dropping only to the pcb matches fnsave's behaviour.
2819 * We only need to drop to !PCB_INITDONE in sendsig(). But
2820 * sendsig() is the only caller of npxgetregs()... perhaps we just
2821 * have too many layers.
2822 */
2823 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE;
2824 intr_restore(s);
2825 }
2826
2827 int
2828 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2829 {
2830 struct pcb *pcb;
2831
2832 if (td == NULL) {
2833 dbregs->dr[0] = rdr0();
2834 dbregs->dr[1] = rdr1();
2835 dbregs->dr[2] = rdr2();
2836 dbregs->dr[3] = rdr3();
2837 dbregs->dr[4] = rdr4();
2838 dbregs->dr[5] = rdr5();
2839 dbregs->dr[6] = rdr6();
2840 dbregs->dr[7] = rdr7();
2841 } else {
2842 pcb = td->td_pcb;
2843 dbregs->dr[0] = pcb->pcb_dr0;
2844 dbregs->dr[1] = pcb->pcb_dr1;
2845 dbregs->dr[2] = pcb->pcb_dr2;
2846 dbregs->dr[3] = pcb->pcb_dr3;
2847 dbregs->dr[4] = 0;
2848 dbregs->dr[5] = 0;
2849 dbregs->dr[6] = pcb->pcb_dr6;
2850 dbregs->dr[7] = pcb->pcb_dr7;
2851 }
2852 return (0);
2853 }
2854
2855 int
2856 set_dbregs(struct thread *td, struct dbreg *dbregs)
2857 {
2858 struct pcb *pcb;
2859 int i;
2860 u_int32_t mask1, mask2;
2861
2862 if (td == NULL) {
2863 load_dr0(dbregs->dr[0]);
2864 load_dr1(dbregs->dr[1]);
2865 load_dr2(dbregs->dr[2]);
2866 load_dr3(dbregs->dr[3]);
2867 load_dr4(dbregs->dr[4]);
2868 load_dr5(dbregs->dr[5]);
2869 load_dr6(dbregs->dr[6]);
2870 load_dr7(dbregs->dr[7]);
2871 } else {
2872 /*
2873 * Don't let an illegal value for dr7 get set. Specifically,
2874 * check for undefined settings. Setting these bit patterns
2875 * result in undefined behaviour and can lead to an unexpected
2876 * TRCTRAP.
2877 */
2878 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2879 i++, mask1 <<= 2, mask2 <<= 2)
2880 if ((dbregs->dr[7] & mask1) == mask2)
2881 return (EINVAL);
2882
2883 pcb = td->td_pcb;
2884
2885 /*
2886 * Don't let a process set a breakpoint that is not within the
2887 * process's address space. If a process could do this, it
2888 * could halt the system by setting a breakpoint in the kernel
2889 * (if ddb was enabled). Thus, we need to check to make sure
2890 * that no breakpoints are being enabled for addresses outside
2891 * process's address space.
2892 *
2893 * XXX - what about when the watched area of the user's
2894 * address space is written into from within the kernel
2895 * ... wouldn't that still cause a breakpoint to be generated
2896 * from within kernel mode?
2897 */
2898
2899 if (dbregs->dr[7] & 0x3) {
2900 /* dr0 is enabled */
2901 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2902 return (EINVAL);
2903 }
2904
2905 if (dbregs->dr[7] & (0x3<<2)) {
2906 /* dr1 is enabled */
2907 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2908 return (EINVAL);
2909 }
2910
2911 if (dbregs->dr[7] & (0x3<<4)) {
2912 /* dr2 is enabled */
2913 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2914 return (EINVAL);
2915 }
2916
2917 if (dbregs->dr[7] & (0x3<<6)) {
2918 /* dr3 is enabled */
2919 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2920 return (EINVAL);
2921 }
2922
2923 pcb->pcb_dr0 = dbregs->dr[0];
2924 pcb->pcb_dr1 = dbregs->dr[1];
2925 pcb->pcb_dr2 = dbregs->dr[2];
2926 pcb->pcb_dr3 = dbregs->dr[3];
2927 pcb->pcb_dr6 = dbregs->dr[6];
2928 pcb->pcb_dr7 = dbregs->dr[7];
2929
2930 pcb->pcb_flags |= PCB_DBREGS;
2931 }
2932
2933 return (0);
2934 }
2935
2936 /*
2937 * Return > 0 if a hardware breakpoint has been hit, and the
2938 * breakpoint was in user space. Return 0, otherwise.
2939 */
2940 int
2941 user_dbreg_trap(void)
2942 {
2943 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2944 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2945 int nbp; /* number of breakpoints that triggered */
2946 caddr_t addr[4]; /* breakpoint addresses */
2947 int i;
2948
2949 dr7 = rdr7();
2950 if ((dr7 & 0x000000ff) == 0) {
2951 /*
2952 * all GE and LE bits in the dr7 register are zero,
2953 * thus the trap couldn't have been caused by the
2954 * hardware debug registers
2955 */
2956 return 0;
2957 }
2958
2959 nbp = 0;
2960 dr6 = rdr6();
2961 bp = dr6 & 0x0000000f;
2962
2963 if (!bp) {
2964 /*
2965 * None of the breakpoint bits are set meaning this
2966 * trap was not caused by any of the debug registers
2967 */
2968 return 0;
2969 }
2970
2971 /*
2972 * at least one of the breakpoints were hit, check to see
2973 * which ones and if any of them are user space addresses
2974 */
2975
2976 if (bp & 0x01) {
2977 addr[nbp++] = (caddr_t)rdr0();
2978 }
2979 if (bp & 0x02) {
2980 addr[nbp++] = (caddr_t)rdr1();
2981 }
2982 if (bp & 0x04) {
2983 addr[nbp++] = (caddr_t)rdr2();
2984 }
2985 if (bp & 0x08) {
2986 addr[nbp++] = (caddr_t)rdr3();
2987 }
2988
2989 for (i=0; i<nbp; i++) {
2990 if (addr[i] <
2991 (caddr_t)VM_MAXUSER_ADDRESS) {
2992 /*
2993 * addr[i] is in user space
2994 */
2995 return nbp;
2996 }
2997 }
2998
2999 /*
3000 * None of the breakpoints are in user space.
3001 */
3002 return 0;
3003 }
3004
3005 #ifndef DEV_APIC
3006 #include <machine/apicvar.h>
3007
3008 /*
3009 * Provide stub functions so that the MADT APIC enumerator in the acpi
3010 * kernel module will link against a kernel without 'device apic'.
3011 *
3012 * XXX - This is a gross hack.
3013 */
3014 void
3015 apic_register_enumerator(struct apic_enumerator *enumerator)
3016 {
3017 }
3018
3019 void *
3020 ioapic_create(uintptr_t addr, int32_t id, int intbase)
3021 {
3022 return (NULL);
3023 }
3024
3025 int
3026 ioapic_disable_pin(void *cookie, u_int pin)
3027 {
3028 return (ENXIO);
3029 }
3030
3031 int
3032 ioapic_get_vector(void *cookie, u_int pin)
3033 {
3034 return (-1);
3035 }
3036
3037 void
3038 ioapic_register(void *cookie)
3039 {
3040 }
3041
3042 int
3043 ioapic_remap_vector(void *cookie, u_int pin, int vector)
3044 {
3045 return (ENXIO);
3046 }
3047
3048 int
3049 ioapic_set_extint(void *cookie, u_int pin)
3050 {
3051 return (ENXIO);
3052 }
3053
3054 int
3055 ioapic_set_nmi(void *cookie, u_int pin)
3056 {
3057 return (ENXIO);
3058 }
3059
3060 int
3061 ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol)
3062 {
3063 return (ENXIO);
3064 }
3065
3066 int
3067 ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger)
3068 {
3069 return (ENXIO);
3070 }
3071
3072 void
3073 lapic_create(u_int apic_id, int boot_cpu)
3074 {
3075 }
3076
3077 void
3078 lapic_init(uintptr_t addr)
3079 {
3080 }
3081
3082 int
3083 lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode)
3084 {
3085 return (ENXIO);
3086 }
3087
3088 int
3089 lapic_set_lvt_polarity(u_int apic_id, u_int lvt, enum intr_polarity pol)
3090 {
3091 return (ENXIO);
3092 }
3093
3094 int
3095 lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, enum intr_trigger trigger)
3096 {
3097 return (ENXIO);
3098 }
3099 #endif
3100
3101 #ifdef KDB
3102
3103 /*
3104 * Provide inb() and outb() as functions. They are normally only
3105 * available as macros calling inlined functions, thus cannot be
3106 * called from the debugger.
3107 *
3108 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
3109 */
3110
3111 #undef inb
3112 #undef outb
3113
3114 /* silence compiler warnings */
3115 u_char inb(u_int);
3116 void outb(u_int, u_char);
3117
3118 u_char
3119 inb(u_int port)
3120 {
3121 u_char data;
3122 /*
3123 * We use %%dx and not %1 here because i/o is done at %dx and not at
3124 * %edx, while gcc generates inferior code (movw instead of movl)
3125 * if we tell it to load (u_short) port.
3126 */
3127 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
3128 return (data);
3129 }
3130
3131 void
3132 outb(u_int port, u_char data)
3133 {
3134 u_char al;
3135 /*
3136 * Use an unnecessary assignment to help gcc's register allocator.
3137 * This make a large difference for gcc-1.40 and a tiny difference
3138 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
3139 * best results. gcc-2.6.0 can't handle this.
3140 */
3141 al = data;
3142 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
3143 }
3144
3145 #endif /* KDB */
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