Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/i386/i386/machdep.c
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1 /*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 */ 39 40 #include <sys/cdefs.h> 41 __FBSDID("$FreeBSD: releng/7.3/sys/i386/i386/machdep.c 198589 2009-10-29 14:34:02Z jhb $"); 42 43 #include "opt_apic.h" 44 #include "opt_atalk.h" 45 #include "opt_compat.h" 46 #include "opt_cpu.h" 47 #include "opt_ddb.h" 48 #include "opt_inet.h" 49 #include "opt_ipx.h" 50 #include "opt_isa.h" 51 #include "opt_kstack_pages.h" 52 #include "opt_maxmem.h" 53 #include "opt_msgbuf.h" 54 #include "opt_npx.h" 55 #include "opt_perfmon.h" 56 #include "opt_xbox.h" 57 58 #include <sys/param.h> 59 #include <sys/proc.h> 60 #include <sys/systm.h> 61 #include <sys/bio.h> 62 #include <sys/buf.h> 63 #include <sys/bus.h> 64 #include <sys/callout.h> 65 #include <sys/clock.h> 66 #include <sys/cons.h> 67 #include <sys/cpu.h> 68 #include <sys/eventhandler.h> 69 #include <sys/exec.h> 70 #include <sys/imgact.h> 71 #include <sys/kdb.h> 72 #include <sys/kernel.h> 73 #include <sys/ktr.h> 74 #include <sys/linker.h> 75 #include <sys/lock.h> 76 #include <sys/malloc.h> 77 #include <sys/memrange.h> 78 #include <sys/msgbuf.h> 79 #include <sys/mutex.h> 80 #include <sys/pcpu.h> 81 #include <sys/ptrace.h> 82 #include <sys/reboot.h> 83 #include <sys/sched.h> 84 #include <sys/signalvar.h> 85 #include <sys/sysctl.h> 86 #include <sys/sysent.h> 87 #include <sys/sysproto.h> 88 #include <sys/ucontext.h> 89 #include <sys/vmmeter.h> 90 91 #include <vm/vm.h> 92 #include <vm/vm_extern.h> 93 #include <vm/vm_kern.h> 94 #include <vm/vm_page.h> 95 #include <vm/vm_map.h> 96 #include <vm/vm_object.h> 97 #include <vm/vm_pager.h> 98 #include <vm/vm_param.h> 99 100 #ifdef DDB 101 #ifndef KDB 102 #error KDB must be enabled in order for DDB to work! 103 #endif 104 #include <ddb/ddb.h> 105 #include <ddb/db_sym.h> 106 #endif 107 108 #include <isa/rtc.h> 109 110 #include <net/netisr.h> 111 112 #include <machine/bootinfo.h> 113 #include <machine/clock.h> 114 #include <machine/cpu.h> 115 #include <machine/cputypes.h> 116 #include <machine/intr_machdep.h> 117 #include <machine/mca.h> 118 #include <machine/md_var.h> 119 #include <machine/metadata.h> 120 #include <machine/pc/bios.h> 121 #include <machine/pcb.h> 122 #include <machine/pcb_ext.h> 123 #include <machine/proc.h> 124 #include <machine/reg.h> 125 #include <machine/sigframe.h> 126 #include <machine/specialreg.h> 127 #include <machine/vm86.h> 128 #ifdef PERFMON 129 #include <machine/perfmon.h> 130 #endif 131 #ifdef SMP 132 #include <machine/smp.h> 133 #endif 134 135 #ifdef DEV_ISA 136 #include <i386/isa/icu.h> 137 #endif 138 139 #ifdef XBOX 140 #include <machine/xbox.h> 141 142 int arch_i386_is_xbox = 0; 143 uint32_t arch_i386_xbox_memsize = 0; 144 #endif 145 146 /* Sanity check for __curthread() */ 147 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 148 149 extern void init386(int first); 150 extern void dblfault_handler(void); 151 152 extern void printcpuinfo(void); /* XXX header file */ 153 extern void finishidentcpu(void); 154 extern void panicifcpuunsupported(void); 155 extern void initializecpu(void); 156 157 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 158 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 159 160 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 161 #define CPU_ENABLE_SSE 162 #endif 163 164 static void cpu_startup(void *); 165 static void fpstate_drop(struct thread *td); 166 static void get_fpcontext(struct thread *td, mcontext_t *mcp); 167 static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 168 #ifdef CPU_ENABLE_SSE 169 static void set_fpregs_xmm(struct save87 *, struct savexmm *); 170 static void fill_fpregs_xmm(struct savexmm *, struct save87 *); 171 #endif /* CPU_ENABLE_SSE */ 172 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 173 174 #ifdef DDB 175 extern vm_offset_t ksym_start, ksym_end; 176 #endif 177 178 /* Intel ICH registers */ 179 #define ICH_PMBASE 0x400 180 #define ICH_SMI_EN ICH_PMBASE + 0x30 181 182 int _udatasel, _ucodesel; 183 u_int basemem; 184 185 int cold = 1; 186 187 #ifdef COMPAT_43 188 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask); 189 #endif 190 #ifdef COMPAT_FREEBSD4 191 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask); 192 #endif 193 194 long Maxmem = 0; 195 long realmem = 0; 196 197 #ifdef PAE 198 FEATURE(pae, "Physical Address Extensions"); 199 #endif 200 201 /* 202 * The number of PHYSMAP entries must be one less than the number of 203 * PHYSSEG entries because the PHYSMAP entry that spans the largest 204 * physical address that is accessible by ISA DMA is split into two 205 * PHYSSEG entries. 206 */ 207 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 208 209 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 210 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 211 212 /* must be 2 less so 0 0 can signal end of chunks */ 213 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 214 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 215 216 struct kva_md_info kmi; 217 218 static struct trapframe proc0_tf; 219 struct pcpu __pcpu[MAXCPU]; 220 221 struct mtx icu_lock; 222 223 struct mem_range_softc mem_range_softc; 224 225 static void 226 cpu_startup(dummy) 227 void *dummy; 228 { 229 char *sysenv; 230 231 /* 232 * On MacBooks, we need to disallow the legacy USB circuit to 233 * generate an SMI# because this can cause several problems, 234 * namely: incorrect CPU frequency detection and failure to 235 * start the APs. 236 * We do this by disabling a bit in the SMI_EN (SMI Control and 237 * Enable register) of the Intel ICH LPC Interface Bridge. 238 */ 239 sysenv = getenv("smbios.system.product"); 240 if (sysenv != NULL) { 241 if (strncmp(sysenv, "MacBook", 7) == 0) { 242 if (bootverbose) 243 printf("Disabling LEGACY_USB_EN bit on " 244 "Intel ICH.\n"); 245 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8); 246 } 247 freeenv(sysenv); 248 } 249 250 /* 251 * Good {morning,afternoon,evening,night}. 252 */ 253 startrtclock(); 254 printcpuinfo(); 255 panicifcpuunsupported(); 256 #ifdef PERFMON 257 perfmon_init(); 258 #endif 259 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem), 260 ptoa((uintmax_t)Maxmem) / 1048576); 261 realmem = Maxmem; 262 /* 263 * Display any holes after the first chunk of extended memory. 264 */ 265 if (bootverbose) { 266 int indx; 267 268 printf("Physical memory chunk(s):\n"); 269 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 270 vm_paddr_t size; 271 272 size = phys_avail[indx + 1] - phys_avail[indx]; 273 printf( 274 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 275 (uintmax_t)phys_avail[indx], 276 (uintmax_t)phys_avail[indx + 1] - 1, 277 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 278 } 279 } 280 281 vm_ksubmap_init(&kmi); 282 283 printf("avail memory = %ju (%ju MB)\n", 284 ptoa((uintmax_t)cnt.v_free_count), 285 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 286 287 /* 288 * Set up buffers, so they can be used to read disk labels. 289 */ 290 bufinit(); 291 vm_pager_bufferinit(); 292 293 cpu_setregs(); 294 mca_init(); 295 } 296 297 /* 298 * Send an interrupt to process. 299 * 300 * Stack is set up to allow sigcode stored 301 * at top to call routine, followed by kcall 302 * to sigreturn routine below. After sigreturn 303 * resets the signal mask, the stack, and the 304 * frame pointer, it returns to the user 305 * specified pc, psl. 306 */ 307 #ifdef COMPAT_43 308 static void 309 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 310 { 311 struct osigframe sf, *fp; 312 struct proc *p; 313 struct thread *td; 314 struct sigacts *psp; 315 struct trapframe *regs; 316 int sig; 317 int oonstack; 318 319 td = curthread; 320 p = td->td_proc; 321 PROC_LOCK_ASSERT(p, MA_OWNED); 322 sig = ksi->ksi_signo; 323 psp = p->p_sigacts; 324 mtx_assert(&psp->ps_mtx, MA_OWNED); 325 regs = td->td_frame; 326 oonstack = sigonstack(regs->tf_esp); 327 328 /* Allocate space for the signal handler context. */ 329 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack && 330 SIGISMEMBER(psp->ps_sigonstack, sig)) { 331 fp = (struct osigframe *)(td->td_sigstk.ss_sp + 332 td->td_sigstk.ss_size - sizeof(struct osigframe)); 333 #if defined(COMPAT_43) 334 td->td_sigstk.ss_flags |= SS_ONSTACK; 335 #endif 336 } else 337 fp = (struct osigframe *)regs->tf_esp - 1; 338 339 /* Translate the signal if appropriate. */ 340 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 341 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 342 343 /* Build the argument list for the signal handler. */ 344 sf.sf_signum = sig; 345 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; 346 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 347 /* Signal handler installed with SA_SIGINFO. */ 348 sf.sf_arg2 = (register_t)&fp->sf_siginfo; 349 sf.sf_siginfo.si_signo = sig; 350 sf.sf_siginfo.si_code = ksi->ksi_code; 351 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher; 352 } else { 353 /* Old FreeBSD-style arguments. */ 354 sf.sf_arg2 = ksi->ksi_code; 355 sf.sf_addr = (register_t)ksi->ksi_addr; 356 sf.sf_ahu.sf_handler = catcher; 357 } 358 mtx_unlock(&psp->ps_mtx); 359 PROC_UNLOCK(p); 360 361 /* Save most if not all of trap frame. */ 362 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax; 363 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx; 364 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx; 365 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx; 366 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi; 367 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi; 368 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs; 369 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds; 370 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss; 371 sf.sf_siginfo.si_sc.sc_es = regs->tf_es; 372 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs; 373 sf.sf_siginfo.si_sc.sc_gs = rgs(); 374 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp; 375 376 /* Build the signal context to be used by osigreturn(). */ 377 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0; 378 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask); 379 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp; 380 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp; 381 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip; 382 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags; 383 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno; 384 sf.sf_siginfo.si_sc.sc_err = regs->tf_err; 385 386 /* 387 * If we're a vm86 process, we want to save the segment registers. 388 * We also change eflags to be our emulated eflags, not the actual 389 * eflags. 390 */ 391 if (regs->tf_eflags & PSL_VM) { 392 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */ 393 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 394 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 395 396 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs; 397 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs; 398 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es; 399 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds; 400 401 if (vm86->vm86_has_vme == 0) 402 sf.sf_siginfo.si_sc.sc_ps = 403 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 404 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 405 406 /* See sendsig() for comments. */ 407 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 408 } 409 410 /* 411 * Copy the sigframe out to the user's stack. 412 */ 413 if (copyout(&sf, fp, sizeof(*fp)) != 0) { 414 #ifdef DEBUG 415 printf("process %ld has trashed its stack\n", (long)p->p_pid); 416 #endif 417 PROC_LOCK(p); 418 sigexit(td, SIGILL); 419 } 420 421 regs->tf_esp = (int)fp; 422 regs->tf_eip = PS_STRINGS - szosigcode; 423 regs->tf_eflags &= ~(PSL_T | PSL_D); 424 regs->tf_cs = _ucodesel; 425 regs->tf_ds = _udatasel; 426 regs->tf_es = _udatasel; 427 regs->tf_fs = _udatasel; 428 load_gs(_udatasel); 429 regs->tf_ss = _udatasel; 430 PROC_LOCK(p); 431 mtx_lock(&psp->ps_mtx); 432 } 433 #endif /* COMPAT_43 */ 434 435 #ifdef COMPAT_FREEBSD4 436 static void 437 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 438 { 439 struct sigframe4 sf, *sfp; 440 struct proc *p; 441 struct thread *td; 442 struct sigacts *psp; 443 struct trapframe *regs; 444 int sig; 445 int oonstack; 446 447 td = curthread; 448 p = td->td_proc; 449 PROC_LOCK_ASSERT(p, MA_OWNED); 450 sig = ksi->ksi_signo; 451 psp = p->p_sigacts; 452 mtx_assert(&psp->ps_mtx, MA_OWNED); 453 regs = td->td_frame; 454 oonstack = sigonstack(regs->tf_esp); 455 456 /* Save user context. */ 457 bzero(&sf, sizeof(sf)); 458 sf.sf_uc.uc_sigmask = *mask; 459 sf.sf_uc.uc_stack = td->td_sigstk; 460 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 461 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 462 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 463 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 464 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 465 466 /* Allocate space for the signal handler context. */ 467 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 468 SIGISMEMBER(psp->ps_sigonstack, sig)) { 469 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp + 470 td->td_sigstk.ss_size - sizeof(struct sigframe4)); 471 #if defined(COMPAT_43) 472 td->td_sigstk.ss_flags |= SS_ONSTACK; 473 #endif 474 } else 475 sfp = (struct sigframe4 *)regs->tf_esp - 1; 476 477 /* Translate the signal if appropriate. */ 478 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 479 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 480 481 /* Build the argument list for the signal handler. */ 482 sf.sf_signum = sig; 483 sf.sf_ucontext = (register_t)&sfp->sf_uc; 484 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 485 /* Signal handler installed with SA_SIGINFO. */ 486 sf.sf_siginfo = (register_t)&sfp->sf_si; 487 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 488 489 /* Fill in POSIX parts */ 490 sf.sf_si.si_signo = sig; 491 sf.sf_si.si_code = ksi->ksi_code; 492 sf.sf_si.si_addr = ksi->ksi_addr; 493 } else { 494 /* Old FreeBSD-style arguments. */ 495 sf.sf_siginfo = ksi->ksi_code; 496 sf.sf_addr = (register_t)ksi->ksi_addr; 497 sf.sf_ahu.sf_handler = catcher; 498 } 499 mtx_unlock(&psp->ps_mtx); 500 PROC_UNLOCK(p); 501 502 /* 503 * If we're a vm86 process, we want to save the segment registers. 504 * We also change eflags to be our emulated eflags, not the actual 505 * eflags. 506 */ 507 if (regs->tf_eflags & PSL_VM) { 508 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 509 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 510 511 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 512 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 513 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 514 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 515 516 if (vm86->vm86_has_vme == 0) 517 sf.sf_uc.uc_mcontext.mc_eflags = 518 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 519 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 520 521 /* 522 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 523 * syscalls made by the signal handler. This just avoids 524 * wasting time for our lazy fixup of such faults. PSL_NT 525 * does nothing in vm86 mode, but vm86 programs can set it 526 * almost legitimately in probes for old cpu types. 527 */ 528 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 529 } 530 531 /* 532 * Copy the sigframe out to the user's stack. 533 */ 534 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 535 #ifdef DEBUG 536 printf("process %ld has trashed its stack\n", (long)p->p_pid); 537 #endif 538 PROC_LOCK(p); 539 sigexit(td, SIGILL); 540 } 541 542 regs->tf_esp = (int)sfp; 543 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode; 544 regs->tf_eflags &= ~(PSL_T | PSL_D); 545 regs->tf_cs = _ucodesel; 546 regs->tf_ds = _udatasel; 547 regs->tf_es = _udatasel; 548 regs->tf_fs = _udatasel; 549 regs->tf_ss = _udatasel; 550 PROC_LOCK(p); 551 mtx_lock(&psp->ps_mtx); 552 } 553 #endif /* COMPAT_FREEBSD4 */ 554 555 void 556 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 557 { 558 struct sigframe sf, *sfp; 559 struct proc *p; 560 struct thread *td; 561 struct sigacts *psp; 562 char *sp; 563 struct trapframe *regs; 564 int sig; 565 int oonstack; 566 567 td = curthread; 568 p = td->td_proc; 569 PROC_LOCK_ASSERT(p, MA_OWNED); 570 sig = ksi->ksi_signo; 571 psp = p->p_sigacts; 572 mtx_assert(&psp->ps_mtx, MA_OWNED); 573 #ifdef COMPAT_FREEBSD4 574 if (SIGISMEMBER(psp->ps_freebsd4, sig)) { 575 freebsd4_sendsig(catcher, ksi, mask); 576 return; 577 } 578 #endif 579 #ifdef COMPAT_43 580 if (SIGISMEMBER(psp->ps_osigset, sig)) { 581 osendsig(catcher, ksi, mask); 582 return; 583 } 584 #endif 585 regs = td->td_frame; 586 oonstack = sigonstack(regs->tf_esp); 587 588 /* Save user context. */ 589 bzero(&sf, sizeof(sf)); 590 sf.sf_uc.uc_sigmask = *mask; 591 sf.sf_uc.uc_stack = td->td_sigstk; 592 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 593 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 594 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 595 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 596 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 597 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 598 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 599 fpstate_drop(td); 600 601 /* Allocate space for the signal handler context. */ 602 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 603 SIGISMEMBER(psp->ps_sigonstack, sig)) { 604 sp = td->td_sigstk.ss_sp + 605 td->td_sigstk.ss_size - sizeof(struct sigframe); 606 #if defined(COMPAT_43) 607 td->td_sigstk.ss_flags |= SS_ONSTACK; 608 #endif 609 } else 610 sp = (char *)regs->tf_esp - sizeof(struct sigframe); 611 /* Align to 16 bytes. */ 612 sfp = (struct sigframe *)((unsigned int)sp & ~0xF); 613 614 /* Translate the signal if appropriate. */ 615 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 616 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 617 618 /* Build the argument list for the signal handler. */ 619 sf.sf_signum = sig; 620 sf.sf_ucontext = (register_t)&sfp->sf_uc; 621 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 622 /* Signal handler installed with SA_SIGINFO. */ 623 sf.sf_siginfo = (register_t)&sfp->sf_si; 624 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 625 626 /* Fill in POSIX parts */ 627 sf.sf_si = ksi->ksi_info; 628 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 629 } else { 630 /* Old FreeBSD-style arguments. */ 631 sf.sf_siginfo = ksi->ksi_code; 632 sf.sf_addr = (register_t)ksi->ksi_addr; 633 sf.sf_ahu.sf_handler = catcher; 634 } 635 mtx_unlock(&psp->ps_mtx); 636 PROC_UNLOCK(p); 637 638 /* 639 * If we're a vm86 process, we want to save the segment registers. 640 * We also change eflags to be our emulated eflags, not the actual 641 * eflags. 642 */ 643 if (regs->tf_eflags & PSL_VM) { 644 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 645 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 646 647 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 648 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 649 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 650 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 651 652 if (vm86->vm86_has_vme == 0) 653 sf.sf_uc.uc_mcontext.mc_eflags = 654 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 655 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 656 657 /* 658 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 659 * syscalls made by the signal handler. This just avoids 660 * wasting time for our lazy fixup of such faults. PSL_NT 661 * does nothing in vm86 mode, but vm86 programs can set it 662 * almost legitimately in probes for old cpu types. 663 */ 664 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 665 } 666 667 /* 668 * Copy the sigframe out to the user's stack. 669 */ 670 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 671 #ifdef DEBUG 672 printf("process %ld has trashed its stack\n", (long)p->p_pid); 673 #endif 674 PROC_LOCK(p); 675 sigexit(td, SIGILL); 676 } 677 678 regs->tf_esp = (int)sfp; 679 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 680 regs->tf_eflags &= ~(PSL_T | PSL_D); 681 regs->tf_cs = _ucodesel; 682 regs->tf_ds = _udatasel; 683 regs->tf_es = _udatasel; 684 regs->tf_fs = _udatasel; 685 regs->tf_ss = _udatasel; 686 PROC_LOCK(p); 687 mtx_lock(&psp->ps_mtx); 688 } 689 690 /* 691 * System call to cleanup state after a signal 692 * has been taken. Reset signal mask and 693 * stack state from context left by sendsig (above). 694 * Return to previous pc and psl as specified by 695 * context left by sendsig. Check carefully to 696 * make sure that the user has not modified the 697 * state to gain improper privileges. 698 * 699 * MPSAFE 700 */ 701 #ifdef COMPAT_43 702 int 703 osigreturn(td, uap) 704 struct thread *td; 705 struct osigreturn_args /* { 706 struct osigcontext *sigcntxp; 707 } */ *uap; 708 { 709 struct osigcontext sc; 710 struct trapframe *regs; 711 struct osigcontext *scp; 712 struct proc *p = td->td_proc; 713 int eflags, error; 714 ksiginfo_t ksi; 715 716 regs = td->td_frame; 717 error = copyin(uap->sigcntxp, &sc, sizeof(sc)); 718 if (error != 0) 719 return (error); 720 scp = ≻ 721 eflags = scp->sc_ps; 722 if (eflags & PSL_VM) { 723 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 724 struct vm86_kernel *vm86; 725 726 /* 727 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 728 * set up the vm86 area, and we can't enter vm86 mode. 729 */ 730 if (td->td_pcb->pcb_ext == 0) 731 return (EINVAL); 732 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 733 if (vm86->vm86_inited == 0) 734 return (EINVAL); 735 736 /* Go back to user mode if both flags are set. */ 737 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 738 ksiginfo_init_trap(&ksi); 739 ksi.ksi_signo = SIGBUS; 740 ksi.ksi_code = BUS_OBJERR; 741 ksi.ksi_addr = (void *)regs->tf_eip; 742 trapsignal(td, &ksi); 743 } 744 745 if (vm86->vm86_has_vme) { 746 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 747 (eflags & VME_USERCHANGE) | PSL_VM; 748 } else { 749 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 750 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 751 (eflags & VM_USERCHANGE) | PSL_VM; 752 } 753 tf->tf_vm86_ds = scp->sc_ds; 754 tf->tf_vm86_es = scp->sc_es; 755 tf->tf_vm86_fs = scp->sc_fs; 756 tf->tf_vm86_gs = scp->sc_gs; 757 tf->tf_ds = _udatasel; 758 tf->tf_es = _udatasel; 759 tf->tf_fs = _udatasel; 760 } else { 761 /* 762 * Don't allow users to change privileged or reserved flags. 763 */ 764 /* 765 * XXX do allow users to change the privileged flag PSL_RF. 766 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 767 * should sometimes set it there too. tf_eflags is kept in 768 * the signal context during signal handling and there is no 769 * other place to remember it, so the PSL_RF bit may be 770 * corrupted by the signal handler without us knowing. 771 * Corruption of the PSL_RF bit at worst causes one more or 772 * one less debugger trap, so allowing it is fairly harmless. 773 */ 774 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 775 return (EINVAL); 776 } 777 778 /* 779 * Don't allow users to load a valid privileged %cs. Let the 780 * hardware check for invalid selectors, excess privilege in 781 * other selectors, invalid %eip's and invalid %esp's. 782 */ 783 if (!CS_SECURE(scp->sc_cs)) { 784 ksiginfo_init_trap(&ksi); 785 ksi.ksi_signo = SIGBUS; 786 ksi.ksi_code = BUS_OBJERR; 787 ksi.ksi_trapno = T_PROTFLT; 788 ksi.ksi_addr = (void *)regs->tf_eip; 789 trapsignal(td, &ksi); 790 return (EINVAL); 791 } 792 regs->tf_ds = scp->sc_ds; 793 regs->tf_es = scp->sc_es; 794 regs->tf_fs = scp->sc_fs; 795 } 796 797 /* Restore remaining registers. */ 798 regs->tf_eax = scp->sc_eax; 799 regs->tf_ebx = scp->sc_ebx; 800 regs->tf_ecx = scp->sc_ecx; 801 regs->tf_edx = scp->sc_edx; 802 regs->tf_esi = scp->sc_esi; 803 regs->tf_edi = scp->sc_edi; 804 regs->tf_cs = scp->sc_cs; 805 regs->tf_ss = scp->sc_ss; 806 regs->tf_isp = scp->sc_isp; 807 regs->tf_ebp = scp->sc_fp; 808 regs->tf_esp = scp->sc_sp; 809 regs->tf_eip = scp->sc_pc; 810 regs->tf_eflags = eflags; 811 812 PROC_LOCK(p); 813 #if defined(COMPAT_43) 814 if (scp->sc_onstack & 1) 815 td->td_sigstk.ss_flags |= SS_ONSTACK; 816 else 817 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 818 #endif 819 SIGSETOLD(td->td_sigmask, scp->sc_mask); 820 SIG_CANTMASK(td->td_sigmask); 821 signotify(td); 822 PROC_UNLOCK(p); 823 return (EJUSTRETURN); 824 } 825 #endif /* COMPAT_43 */ 826 827 #ifdef COMPAT_FREEBSD4 828 /* 829 * MPSAFE 830 */ 831 int 832 freebsd4_sigreturn(td, uap) 833 struct thread *td; 834 struct freebsd4_sigreturn_args /* { 835 const ucontext4 *sigcntxp; 836 } */ *uap; 837 { 838 struct ucontext4 uc; 839 struct proc *p = td->td_proc; 840 struct trapframe *regs; 841 const struct ucontext4 *ucp; 842 int cs, eflags, error; 843 ksiginfo_t ksi; 844 845 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 846 if (error != 0) 847 return (error); 848 ucp = &uc; 849 regs = td->td_frame; 850 eflags = ucp->uc_mcontext.mc_eflags; 851 if (eflags & PSL_VM) { 852 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 853 struct vm86_kernel *vm86; 854 855 /* 856 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 857 * set up the vm86 area, and we can't enter vm86 mode. 858 */ 859 if (td->td_pcb->pcb_ext == 0) 860 return (EINVAL); 861 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 862 if (vm86->vm86_inited == 0) 863 return (EINVAL); 864 865 /* Go back to user mode if both flags are set. */ 866 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 867 ksiginfo_init_trap(&ksi); 868 ksi.ksi_signo = SIGBUS; 869 ksi.ksi_code = BUS_OBJERR; 870 ksi.ksi_addr = (void *)regs->tf_eip; 871 trapsignal(td, &ksi); 872 } 873 if (vm86->vm86_has_vme) { 874 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 875 (eflags & VME_USERCHANGE) | PSL_VM; 876 } else { 877 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 878 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 879 (eflags & VM_USERCHANGE) | PSL_VM; 880 } 881 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 882 tf->tf_eflags = eflags; 883 tf->tf_vm86_ds = tf->tf_ds; 884 tf->tf_vm86_es = tf->tf_es; 885 tf->tf_vm86_fs = tf->tf_fs; 886 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 887 tf->tf_ds = _udatasel; 888 tf->tf_es = _udatasel; 889 tf->tf_fs = _udatasel; 890 } else { 891 /* 892 * Don't allow users to change privileged or reserved flags. 893 */ 894 /* 895 * XXX do allow users to change the privileged flag PSL_RF. 896 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 897 * should sometimes set it there too. tf_eflags is kept in 898 * the signal context during signal handling and there is no 899 * other place to remember it, so the PSL_RF bit may be 900 * corrupted by the signal handler without us knowing. 901 * Corruption of the PSL_RF bit at worst causes one more or 902 * one less debugger trap, so allowing it is fairly harmless. 903 */ 904 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 905 printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags); 906 return (EINVAL); 907 } 908 909 /* 910 * Don't allow users to load a valid privileged %cs. Let the 911 * hardware check for invalid selectors, excess privilege in 912 * other selectors, invalid %eip's and invalid %esp's. 913 */ 914 cs = ucp->uc_mcontext.mc_cs; 915 if (!CS_SECURE(cs)) { 916 printf("freebsd4_sigreturn: cs = 0x%x\n", cs); 917 ksiginfo_init_trap(&ksi); 918 ksi.ksi_signo = SIGBUS; 919 ksi.ksi_code = BUS_OBJERR; 920 ksi.ksi_trapno = T_PROTFLT; 921 ksi.ksi_addr = (void *)regs->tf_eip; 922 trapsignal(td, &ksi); 923 return (EINVAL); 924 } 925 926 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 927 } 928 929 PROC_LOCK(p); 930 #if defined(COMPAT_43) 931 if (ucp->uc_mcontext.mc_onstack & 1) 932 td->td_sigstk.ss_flags |= SS_ONSTACK; 933 else 934 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 935 #endif 936 937 td->td_sigmask = ucp->uc_sigmask; 938 SIG_CANTMASK(td->td_sigmask); 939 signotify(td); 940 PROC_UNLOCK(p); 941 return (EJUSTRETURN); 942 } 943 #endif /* COMPAT_FREEBSD4 */ 944 945 /* 946 * MPSAFE 947 */ 948 int 949 sigreturn(td, uap) 950 struct thread *td; 951 struct sigreturn_args /* { 952 const struct __ucontext *sigcntxp; 953 } */ *uap; 954 { 955 ucontext_t uc; 956 struct proc *p = td->td_proc; 957 struct trapframe *regs; 958 const ucontext_t *ucp; 959 int cs, eflags, error, ret; 960 ksiginfo_t ksi; 961 962 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 963 if (error != 0) 964 return (error); 965 ucp = &uc; 966 regs = td->td_frame; 967 eflags = ucp->uc_mcontext.mc_eflags; 968 if (eflags & PSL_VM) { 969 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 970 struct vm86_kernel *vm86; 971 972 /* 973 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 974 * set up the vm86 area, and we can't enter vm86 mode. 975 */ 976 if (td->td_pcb->pcb_ext == 0) 977 return (EINVAL); 978 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 979 if (vm86->vm86_inited == 0) 980 return (EINVAL); 981 982 /* Go back to user mode if both flags are set. */ 983 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 984 ksiginfo_init_trap(&ksi); 985 ksi.ksi_signo = SIGBUS; 986 ksi.ksi_code = BUS_OBJERR; 987 ksi.ksi_addr = (void *)regs->tf_eip; 988 trapsignal(td, &ksi); 989 } 990 991 if (vm86->vm86_has_vme) { 992 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 993 (eflags & VME_USERCHANGE) | PSL_VM; 994 } else { 995 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 996 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 997 (eflags & VM_USERCHANGE) | PSL_VM; 998 } 999 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 1000 tf->tf_eflags = eflags; 1001 tf->tf_vm86_ds = tf->tf_ds; 1002 tf->tf_vm86_es = tf->tf_es; 1003 tf->tf_vm86_fs = tf->tf_fs; 1004 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 1005 tf->tf_ds = _udatasel; 1006 tf->tf_es = _udatasel; 1007 tf->tf_fs = _udatasel; 1008 } else { 1009 /* 1010 * Don't allow users to change privileged or reserved flags. 1011 */ 1012 /* 1013 * XXX do allow users to change the privileged flag PSL_RF. 1014 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 1015 * should sometimes set it there too. tf_eflags is kept in 1016 * the signal context during signal handling and there is no 1017 * other place to remember it, so the PSL_RF bit may be 1018 * corrupted by the signal handler without us knowing. 1019 * Corruption of the PSL_RF bit at worst causes one more or 1020 * one less debugger trap, so allowing it is fairly harmless. 1021 */ 1022 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 1023 printf("sigreturn: eflags = 0x%x\n", eflags); 1024 return (EINVAL); 1025 } 1026 1027 /* 1028 * Don't allow users to load a valid privileged %cs. Let the 1029 * hardware check for invalid selectors, excess privilege in 1030 * other selectors, invalid %eip's and invalid %esp's. 1031 */ 1032 cs = ucp->uc_mcontext.mc_cs; 1033 if (!CS_SECURE(cs)) { 1034 printf("sigreturn: cs = 0x%x\n", cs); 1035 ksiginfo_init_trap(&ksi); 1036 ksi.ksi_signo = SIGBUS; 1037 ksi.ksi_code = BUS_OBJERR; 1038 ksi.ksi_trapno = T_PROTFLT; 1039 ksi.ksi_addr = (void *)regs->tf_eip; 1040 trapsignal(td, &ksi); 1041 return (EINVAL); 1042 } 1043 1044 ret = set_fpcontext(td, &ucp->uc_mcontext); 1045 if (ret != 0) 1046 return (ret); 1047 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 1048 } 1049 1050 PROC_LOCK(p); 1051 #if defined(COMPAT_43) 1052 if (ucp->uc_mcontext.mc_onstack & 1) 1053 td->td_sigstk.ss_flags |= SS_ONSTACK; 1054 else 1055 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 1056 #endif 1057 1058 td->td_sigmask = ucp->uc_sigmask; 1059 SIG_CANTMASK(td->td_sigmask); 1060 signotify(td); 1061 PROC_UNLOCK(p); 1062 return (EJUSTRETURN); 1063 } 1064 1065 /* 1066 * Machine dependent boot() routine 1067 * 1068 * I haven't seen anything to put here yet 1069 * Possibly some stuff might be grafted back here from boot() 1070 */ 1071 void 1072 cpu_boot(int howto) 1073 { 1074 } 1075 1076 /* Get current clock frequency for the given cpu id. */ 1077 int 1078 cpu_est_clockrate(int cpu_id, uint64_t *rate) 1079 { 1080 register_t reg; 1081 uint64_t tsc1, tsc2; 1082 1083 if (pcpu_find(cpu_id) == NULL || rate == NULL) 1084 return (EINVAL); 1085 if (!tsc_present) 1086 return (EOPNOTSUPP); 1087 1088 /* If we're booting, trust the rate calibrated moments ago. */ 1089 if (cold) { 1090 *rate = tsc_freq; 1091 return (0); 1092 } 1093 1094 #ifdef SMP 1095 /* Schedule ourselves on the indicated cpu. */ 1096 thread_lock(curthread); 1097 sched_bind(curthread, cpu_id); 1098 thread_unlock(curthread); 1099 #endif 1100 1101 /* Calibrate by measuring a short delay. */ 1102 reg = intr_disable(); 1103 tsc1 = rdtsc(); 1104 DELAY(1000); 1105 tsc2 = rdtsc(); 1106 intr_restore(reg); 1107 1108 #ifdef SMP 1109 thread_lock(curthread); 1110 sched_unbind(curthread); 1111 thread_unlock(curthread); 1112 #endif 1113 1114 /* 1115 * Calculate the difference in readings, convert to Mhz, and 1116 * subtract 0.5% of the total. Empirical testing has shown that 1117 * overhead in DELAY() works out to approximately this value. 1118 */ 1119 tsc2 -= tsc1; 1120 *rate = tsc2 * 1000 - tsc2 * 5; 1121 return (0); 1122 } 1123 1124 /* 1125 * Shutdown the CPU as much as possible 1126 */ 1127 void 1128 cpu_halt(void) 1129 { 1130 for (;;) 1131 __asm__ ("hlt"); 1132 } 1133 1134 /* 1135 * Hook to idle the CPU when possible. In the SMP case we default to 1136 * off because a halted cpu will not currently pick up a new thread in the 1137 * run queue until the next timer tick. If turned on this will result in 1138 * approximately a 4.2% loss in real time performance in buildworld tests 1139 * (but improves user and sys times oddly enough), and saves approximately 1140 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 1141 * 1142 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 1143 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 1144 * Then we can have our cake and eat it too. 1145 * 1146 * XXX I'm turning it on for SMP as well by default for now. It seems to 1147 * help lock contention somewhat, and this is critical for HTT. -Peter 1148 */ 1149 static int cpu_idle_hlt = 1; 1150 TUNABLE_INT("machdep.cpu_idle_hlt", &cpu_idle_hlt); 1151 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 1152 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 1153 1154 static void 1155 cpu_idle_default(void) 1156 { 1157 /* 1158 * we must absolutely guarentee that hlt is the 1159 * absolute next instruction after sti or we 1160 * introduce a timing window. 1161 */ 1162 __asm __volatile("sti; hlt"); 1163 } 1164 1165 /* 1166 * Note that we have to be careful here to avoid a race between checking 1167 * sched_runnable() and actually halting. If we don't do this, we may waste 1168 * the time between calling hlt and the next interrupt even though there 1169 * is a runnable process. 1170 */ 1171 void 1172 cpu_idle(void) 1173 { 1174 1175 #ifdef SMP 1176 if (mp_grab_cpu_hlt()) 1177 return; 1178 #endif 1179 1180 if (cpu_idle_hlt) { 1181 disable_intr(); 1182 if (sched_runnable()) 1183 enable_intr(); 1184 else 1185 (*cpu_idle_hook)(); 1186 } 1187 } 1188 1189 /* Other subsystems (e.g., ACPI) can hook this later. */ 1190 void (*cpu_idle_hook)(void) = cpu_idle_default; 1191 1192 /* 1193 * Reset registers to default values on exec. 1194 */ 1195 void 1196 exec_setregs(td, entry, stack, ps_strings) 1197 struct thread *td; 1198 u_long entry; 1199 u_long stack; 1200 u_long ps_strings; 1201 { 1202 struct trapframe *regs = td->td_frame; 1203 struct pcb *pcb = td->td_pcb; 1204 1205 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */ 1206 pcb->pcb_gs = _udatasel; 1207 load_gs(_udatasel); 1208 1209 mtx_lock_spin(&dt_lock); 1210 if (td->td_proc->p_md.md_ldt) 1211 user_ldt_free(td); 1212 else 1213 mtx_unlock_spin(&dt_lock); 1214 1215 bzero((char *)regs, sizeof(struct trapframe)); 1216 regs->tf_eip = entry; 1217 regs->tf_esp = stack; 1218 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 1219 regs->tf_ss = _udatasel; 1220 regs->tf_ds = _udatasel; 1221 regs->tf_es = _udatasel; 1222 regs->tf_fs = _udatasel; 1223 regs->tf_cs = _ucodesel; 1224 1225 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */ 1226 regs->tf_ebx = ps_strings; 1227 1228 /* 1229 * Reset the hardware debug registers if they were in use. 1230 * They won't have any meaning for the newly exec'd process. 1231 */ 1232 if (pcb->pcb_flags & PCB_DBREGS) { 1233 pcb->pcb_dr0 = 0; 1234 pcb->pcb_dr1 = 0; 1235 pcb->pcb_dr2 = 0; 1236 pcb->pcb_dr3 = 0; 1237 pcb->pcb_dr6 = 0; 1238 pcb->pcb_dr7 = 0; 1239 if (pcb == PCPU_GET(curpcb)) { 1240 /* 1241 * Clear the debug registers on the running 1242 * CPU, otherwise they will end up affecting 1243 * the next process we switch to. 1244 */ 1245 reset_dbregs(); 1246 } 1247 pcb->pcb_flags &= ~PCB_DBREGS; 1248 } 1249 1250 /* 1251 * Initialize the math emulator (if any) for the current process. 1252 * Actually, just clear the bit that says that the emulator has 1253 * been initialized. Initialization is delayed until the process 1254 * traps to the emulator (if it is done at all) mainly because 1255 * emulators don't provide an entry point for initialization. 1256 */ 1257 td->td_pcb->pcb_flags &= ~FP_SOFTFP; 1258 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__; 1259 1260 /* 1261 * Drop the FP state if we hold it, so that the process gets a 1262 * clean FP state if it uses the FPU again. 1263 */ 1264 fpstate_drop(td); 1265 1266 /* 1267 * XXX - Linux emulator 1268 * Make sure sure edx is 0x0 on entry. Linux binaries depend 1269 * on it. 1270 */ 1271 td->td_retval[1] = 0; 1272 } 1273 1274 void 1275 cpu_setregs(void) 1276 { 1277 unsigned int cr0; 1278 1279 cr0 = rcr0(); 1280 1281 /* 1282 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support: 1283 * 1284 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 1285 * instructions. We must set the CR0_MP bit and use the CR0_TS 1286 * bit to control the trap, because setting the CR0_EM bit does 1287 * not cause WAIT instructions to trap. It's important to trap 1288 * WAIT instructions - otherwise the "wait" variants of no-wait 1289 * control instructions would degenerate to the "no-wait" variants 1290 * after FP context switches but work correctly otherwise. It's 1291 * particularly important to trap WAITs when there is no NPX - 1292 * otherwise the "wait" variants would always degenerate. 1293 * 1294 * Try setting CR0_NE to get correct error reporting on 486DX's. 1295 * Setting it should fail or do nothing on lesser processors. 1296 */ 1297 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 1298 load_cr0(cr0); 1299 load_gs(_udatasel); 1300 } 1301 1302 u_long bootdev; /* not a struct cdev *- encoding is different */ 1303 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 1304 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)"); 1305 1306 /* 1307 * Initialize 386 and configure to run kernel 1308 */ 1309 1310 /* 1311 * Initialize segments & interrupt table 1312 */ 1313 1314 int _default_ldt; 1315 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ 1316 static struct gate_descriptor idt0[NIDT]; 1317 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 1318 union descriptor ldt[NLDT]; /* local descriptor table */ 1319 struct region_descriptor r_gdt, r_idt; /* table descriptors */ 1320 struct mtx dt_lock; /* lock for GDT and LDT */ 1321 1322 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 1323 extern int has_f00f_bug; 1324 #endif 1325 1326 static struct i386tss dblfault_tss; 1327 static char dblfault_stack[PAGE_SIZE]; 1328 1329 extern vm_offset_t proc0kstack; 1330 1331 1332 /* 1333 * software prototypes -- in more palatable form. 1334 * 1335 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret 1336 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it) 1337 */ 1338 struct soft_segment_descriptor gdt_segs[] = { 1339 /* GNULL_SEL 0 Null Descriptor */ 1340 { 0x0, /* segment base address */ 1341 0x0, /* length */ 1342 0, /* segment type */ 1343 0, /* segment descriptor priority level */ 1344 0, /* segment descriptor present */ 1345 0, 0, 1346 0, /* default 32 vs 16 bit size */ 1347 0 /* limit granularity (byte/page units)*/ }, 1348 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */ 1349 { 0x0, /* segment base address */ 1350 0xfffff, /* length - all address space */ 1351 SDT_MEMRWA, /* segment type */ 1352 0, /* segment descriptor priority level */ 1353 1, /* segment descriptor present */ 1354 0, 0, 1355 1, /* default 32 vs 16 bit size */ 1356 1 /* limit granularity (byte/page units)*/ }, 1357 /* GUFS_SEL 2 %fs Descriptor for user */ 1358 { 0x0, /* segment base address */ 1359 0xfffff, /* length - all address space */ 1360 SDT_MEMRWA, /* segment type */ 1361 SEL_UPL, /* segment descriptor priority level */ 1362 1, /* segment descriptor present */ 1363 0, 0, 1364 1, /* default 32 vs 16 bit size */ 1365 1 /* limit granularity (byte/page units)*/ }, 1366 /* GUGS_SEL 3 %gs Descriptor for user */ 1367 { 0x0, /* segment base address */ 1368 0xfffff, /* length - all address space */ 1369 SDT_MEMRWA, /* segment type */ 1370 SEL_UPL, /* segment descriptor priority level */ 1371 1, /* segment descriptor present */ 1372 0, 0, 1373 1, /* default 32 vs 16 bit size */ 1374 1 /* limit granularity (byte/page units)*/ }, 1375 /* GCODE_SEL 4 Code Descriptor for kernel */ 1376 { 0x0, /* segment base address */ 1377 0xfffff, /* length - all address space */ 1378 SDT_MEMERA, /* segment type */ 1379 0, /* segment descriptor priority level */ 1380 1, /* segment descriptor present */ 1381 0, 0, 1382 1, /* default 32 vs 16 bit size */ 1383 1 /* limit granularity (byte/page units)*/ }, 1384 /* GDATA_SEL 5 Data Descriptor for kernel */ 1385 { 0x0, /* segment base address */ 1386 0xfffff, /* length - all address space */ 1387 SDT_MEMRWA, /* segment type */ 1388 0, /* segment descriptor priority level */ 1389 1, /* segment descriptor present */ 1390 0, 0, 1391 1, /* default 32 vs 16 bit size */ 1392 1 /* limit granularity (byte/page units)*/ }, 1393 /* GUCODE_SEL 6 Code Descriptor for user */ 1394 { 0x0, /* segment base address */ 1395 0xfffff, /* length - all address space */ 1396 SDT_MEMERA, /* segment type */ 1397 SEL_UPL, /* segment descriptor priority level */ 1398 1, /* segment descriptor present */ 1399 0, 0, 1400 1, /* default 32 vs 16 bit size */ 1401 1 /* limit granularity (byte/page units)*/ }, 1402 /* GUDATA_SEL 7 Data Descriptor for user */ 1403 { 0x0, /* segment base address */ 1404 0xfffff, /* length - all address space */ 1405 SDT_MEMRWA, /* segment type */ 1406 SEL_UPL, /* segment descriptor priority level */ 1407 1, /* segment descriptor present */ 1408 0, 0, 1409 1, /* default 32 vs 16 bit size */ 1410 1 /* limit granularity (byte/page units)*/ }, 1411 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */ 1412 { 0x400, /* segment base address */ 1413 0xfffff, /* length */ 1414 SDT_MEMRWA, /* segment type */ 1415 0, /* segment descriptor priority level */ 1416 1, /* segment descriptor present */ 1417 0, 0, 1418 1, /* default 32 vs 16 bit size */ 1419 1 /* limit granularity (byte/page units)*/ }, 1420 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */ 1421 { 1422 0x0, /* segment base address */ 1423 sizeof(struct i386tss)-1,/* length */ 1424 SDT_SYS386TSS, /* segment type */ 1425 0, /* segment descriptor priority level */ 1426 1, /* segment descriptor present */ 1427 0, 0, 1428 0, /* unused - default 32 vs 16 bit size */ 1429 0 /* limit granularity (byte/page units)*/ }, 1430 /* GLDT_SEL 10 LDT Descriptor */ 1431 { (int) ldt, /* segment base address */ 1432 sizeof(ldt)-1, /* length - all address space */ 1433 SDT_SYSLDT, /* segment type */ 1434 SEL_UPL, /* segment descriptor priority level */ 1435 1, /* segment descriptor present */ 1436 0, 0, 1437 0, /* unused - default 32 vs 16 bit size */ 1438 0 /* limit granularity (byte/page units)*/ }, 1439 /* GUSERLDT_SEL 11 User LDT Descriptor per process */ 1440 { (int) ldt, /* segment base address */ 1441 (512 * sizeof(union descriptor)-1), /* length */ 1442 SDT_SYSLDT, /* segment type */ 1443 0, /* segment descriptor priority level */ 1444 1, /* segment descriptor present */ 1445 0, 0, 1446 0, /* unused - default 32 vs 16 bit size */ 1447 0 /* limit granularity (byte/page units)*/ }, 1448 /* GPANIC_SEL 12 Panic Tss Descriptor */ 1449 { (int) &dblfault_tss, /* segment base address */ 1450 sizeof(struct i386tss)-1,/* length - all address space */ 1451 SDT_SYS386TSS, /* segment type */ 1452 0, /* segment descriptor priority level */ 1453 1, /* segment descriptor present */ 1454 0, 0, 1455 0, /* unused - default 32 vs 16 bit size */ 1456 0 /* limit granularity (byte/page units)*/ }, 1457 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */ 1458 { 0, /* segment base address (overwritten) */ 1459 0xfffff, /* length */ 1460 SDT_MEMERA, /* segment type */ 1461 0, /* segment descriptor priority level */ 1462 1, /* segment descriptor present */ 1463 0, 0, 1464 0, /* default 32 vs 16 bit size */ 1465 1 /* limit granularity (byte/page units)*/ }, 1466 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */ 1467 { 0, /* segment base address (overwritten) */ 1468 0xfffff, /* length */ 1469 SDT_MEMERA, /* segment type */ 1470 0, /* segment descriptor priority level */ 1471 1, /* segment descriptor present */ 1472 0, 0, 1473 0, /* default 32 vs 16 bit size */ 1474 1 /* limit granularity (byte/page units)*/ }, 1475 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */ 1476 { 0, /* segment base address (overwritten) */ 1477 0xfffff, /* length */ 1478 SDT_MEMRWA, /* segment type */ 1479 0, /* segment descriptor priority level */ 1480 1, /* segment descriptor present */ 1481 0, 0, 1482 1, /* default 32 vs 16 bit size */ 1483 1 /* limit granularity (byte/page units)*/ }, 1484 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */ 1485 { 0, /* segment base address (overwritten) */ 1486 0xfffff, /* length */ 1487 SDT_MEMRWA, /* segment type */ 1488 0, /* segment descriptor priority level */ 1489 1, /* segment descriptor present */ 1490 0, 0, 1491 0, /* default 32 vs 16 bit size */ 1492 1 /* limit granularity (byte/page units)*/ }, 1493 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */ 1494 { 0, /* segment base address (overwritten) */ 1495 0xfffff, /* length */ 1496 SDT_MEMRWA, /* segment type */ 1497 0, /* segment descriptor priority level */ 1498 1, /* segment descriptor present */ 1499 0, 0, 1500 0, /* default 32 vs 16 bit size */ 1501 1 /* limit granularity (byte/page units)*/ }, 1502 /* GNDIS_SEL 18 NDIS Descriptor */ 1503 { 0x0, /* segment base address */ 1504 0x0, /* length */ 1505 0, /* segment type */ 1506 0, /* segment descriptor priority level */ 1507 0, /* segment descriptor present */ 1508 0, 0, 1509 0, /* default 32 vs 16 bit size */ 1510 0 /* limit granularity (byte/page units)*/ }, 1511 }; 1512 1513 static struct soft_segment_descriptor ldt_segs[] = { 1514 /* Null Descriptor - overwritten by call gate */ 1515 { 0x0, /* segment base address */ 1516 0x0, /* length - all address space */ 1517 0, /* segment type */ 1518 0, /* segment descriptor priority level */ 1519 0, /* segment descriptor present */ 1520 0, 0, 1521 0, /* default 32 vs 16 bit size */ 1522 0 /* limit granularity (byte/page units)*/ }, 1523 /* Null Descriptor - overwritten by call gate */ 1524 { 0x0, /* segment base address */ 1525 0x0, /* length - all address space */ 1526 0, /* segment type */ 1527 0, /* segment descriptor priority level */ 1528 0, /* segment descriptor present */ 1529 0, 0, 1530 0, /* default 32 vs 16 bit size */ 1531 0 /* limit granularity (byte/page units)*/ }, 1532 /* Null Descriptor - overwritten by call gate */ 1533 { 0x0, /* segment base address */ 1534 0x0, /* length - all address space */ 1535 0, /* segment type */ 1536 0, /* segment descriptor priority level */ 1537 0, /* segment descriptor present */ 1538 0, 0, 1539 0, /* default 32 vs 16 bit size */ 1540 0 /* limit granularity (byte/page units)*/ }, 1541 /* Code Descriptor for user */ 1542 { 0x0, /* segment base address */ 1543 0xfffff, /* length - all address space */ 1544 SDT_MEMERA, /* segment type */ 1545 SEL_UPL, /* segment descriptor priority level */ 1546 1, /* segment descriptor present */ 1547 0, 0, 1548 1, /* default 32 vs 16 bit size */ 1549 1 /* limit granularity (byte/page units)*/ }, 1550 /* Null Descriptor - overwritten by call gate */ 1551 { 0x0, /* segment base address */ 1552 0x0, /* length - all address space */ 1553 0, /* segment type */ 1554 0, /* segment descriptor priority level */ 1555 0, /* segment descriptor present */ 1556 0, 0, 1557 0, /* default 32 vs 16 bit size */ 1558 0 /* limit granularity (byte/page units)*/ }, 1559 /* Data Descriptor for user */ 1560 { 0x0, /* segment base address */ 1561 0xfffff, /* length - all address space */ 1562 SDT_MEMRWA, /* segment type */ 1563 SEL_UPL, /* segment descriptor priority level */ 1564 1, /* segment descriptor present */ 1565 0, 0, 1566 1, /* default 32 vs 16 bit size */ 1567 1 /* limit granularity (byte/page units)*/ }, 1568 }; 1569 1570 void 1571 setidt(idx, func, typ, dpl, selec) 1572 int idx; 1573 inthand_t *func; 1574 int typ; 1575 int dpl; 1576 int selec; 1577 { 1578 struct gate_descriptor *ip; 1579 1580 ip = idt + idx; 1581 ip->gd_looffset = (int)func; 1582 ip->gd_selector = selec; 1583 ip->gd_stkcpy = 0; 1584 ip->gd_xx = 0; 1585 ip->gd_type = typ; 1586 ip->gd_dpl = dpl; 1587 ip->gd_p = 1; 1588 ip->gd_hioffset = ((int)func)>>16 ; 1589 } 1590 1591 extern inthand_t 1592 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1593 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1594 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1595 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1596 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall); 1597 1598 #ifdef DDB 1599 /* 1600 * Display the index and function name of any IDT entries that don't use 1601 * the default 'rsvd' entry point. 1602 */ 1603 DB_SHOW_COMMAND(idt, db_show_idt) 1604 { 1605 struct gate_descriptor *ip; 1606 int idx; 1607 uintptr_t func; 1608 1609 ip = idt; 1610 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) { 1611 func = (ip->gd_hioffset << 16 | ip->gd_looffset); 1612 if (func != (uintptr_t)&IDTVEC(rsvd)) { 1613 db_printf("%3d\t", idx); 1614 db_printsym(func, DB_STGY_PROC); 1615 db_printf("\n"); 1616 } 1617 ip++; 1618 } 1619 } 1620 1621 /* Show privileged registers. */ 1622 DB_SHOW_COMMAND(sysregs, db_show_sysregs) 1623 { 1624 uint64_t idtr, gdtr; 1625 1626 idtr = ridt(); 1627 db_printf("idtr\t0x%08x/%04x\n", 1628 (u_int)(idtr >> 16), (u_int)idtr & 0xffff); 1629 gdtr = rgdt(); 1630 db_printf("gdtr\t0x%08x/%04x\n", 1631 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff); 1632 db_printf("ldtr\t0x%04x\n", rldt()); 1633 db_printf("tr\t0x%04x\n", rtr()); 1634 db_printf("cr0\t0x%08x\n", rcr0()); 1635 db_printf("cr2\t0x%08x\n", rcr2()); 1636 db_printf("cr3\t0x%08x\n", rcr3()); 1637 db_printf("cr4\t0x%08x\n", rcr4()); 1638 } 1639 #endif 1640 1641 void 1642 sdtossd(sd, ssd) 1643 struct segment_descriptor *sd; 1644 struct soft_segment_descriptor *ssd; 1645 { 1646 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1647 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1648 ssd->ssd_type = sd->sd_type; 1649 ssd->ssd_dpl = sd->sd_dpl; 1650 ssd->ssd_p = sd->sd_p; 1651 ssd->ssd_def32 = sd->sd_def32; 1652 ssd->ssd_gran = sd->sd_gran; 1653 } 1654 1655 static int 1656 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp) 1657 { 1658 int i, insert_idx, physmap_idx; 1659 1660 physmap_idx = *physmap_idxp; 1661 1662 if (boothowto & RB_VERBOSE) 1663 printf("SMAP type=%02x base=%016llx len=%016llx\n", 1664 smap->type, smap->base, smap->length); 1665 1666 if (smap->type != SMAP_TYPE_MEMORY) 1667 return (1); 1668 1669 if (smap->length == 0) 1670 return (1); 1671 1672 #ifndef PAE 1673 if (smap->base >= 0xffffffff) { 1674 printf("%uK of memory above 4GB ignored\n", 1675 (u_int)(smap->length / 1024)); 1676 return (1); 1677 } 1678 #endif 1679 1680 /* 1681 * Find insertion point while checking for overlap. Start off by 1682 * assuming the new entry will be added to the end. 1683 */ 1684 insert_idx = physmap_idx + 2; 1685 for (i = 0; i <= physmap_idx; i += 2) { 1686 if (smap->base < physmap[i + 1]) { 1687 if (smap->base + smap->length <= physmap[i]) { 1688 insert_idx = i; 1689 break; 1690 } 1691 if (boothowto & RB_VERBOSE) 1692 printf( 1693 "Overlapping memory regions, ignoring second region\n"); 1694 return (1); 1695 } 1696 } 1697 1698 /* See if we can prepend to the next entry. */ 1699 if (insert_idx <= physmap_idx && 1700 smap->base + smap->length == physmap[insert_idx]) { 1701 physmap[insert_idx] = smap->base; 1702 return (1); 1703 } 1704 1705 /* See if we can append to the previous entry. */ 1706 if (insert_idx > 0 && smap->base == physmap[insert_idx - 1]) { 1707 physmap[insert_idx - 1] += smap->length; 1708 return (1); 1709 } 1710 1711 physmap_idx += 2; 1712 *physmap_idxp = physmap_idx; 1713 if (physmap_idx == PHYSMAP_SIZE) { 1714 printf( 1715 "Too many segments in the physical address map, giving up\n"); 1716 return (0); 1717 } 1718 1719 /* 1720 * Move the last 'N' entries down to make room for the new 1721 * entry if needed. 1722 */ 1723 for (i = physmap_idx; i > insert_idx; i -= 2) { 1724 physmap[i] = physmap[i - 2]; 1725 physmap[i + 1] = physmap[i - 1]; 1726 } 1727 1728 /* Insert the new entry. */ 1729 physmap[insert_idx] = smap->base; 1730 physmap[insert_idx + 1] = smap->base + smap->length; 1731 return (1); 1732 } 1733 1734 /* 1735 * Populate the (physmap) array with base/bound pairs describing the 1736 * available physical memory in the system, then test this memory and 1737 * build the phys_avail array describing the actually-available memory. 1738 * 1739 * If we cannot accurately determine the physical memory map, then use 1740 * value from the 0xE801 call, and failing that, the RTC. 1741 * 1742 * Total memory size may be set by the kernel environment variable 1743 * hw.physmem or the compile-time define MAXMEM. 1744 * 1745 * XXX first should be vm_paddr_t. 1746 */ 1747 static void 1748 getmemsize(int first) 1749 { 1750 int i, off, physmap_idx, pa_indx, da_indx; 1751 int hasbrokenint12, has_smap; 1752 u_long physmem_tunable; 1753 u_int extmem; 1754 struct vm86frame vmf; 1755 struct vm86context vmc; 1756 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 1757 pt_entry_t *pte; 1758 struct bios_smap *smap, *smapbase, *smapend; 1759 u_int32_t smapsize; 1760 quad_t dcons_addr, dcons_size; 1761 caddr_t kmdp; 1762 1763 has_smap = 0; 1764 #ifdef XBOX 1765 if (arch_i386_is_xbox) { 1766 /* 1767 * We queried the memory size before, so chop off 4MB for 1768 * the framebuffer and inform the OS of this. 1769 */ 1770 physmap[0] = 0; 1771 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE; 1772 physmap_idx = 0; 1773 goto physmap_done; 1774 } 1775 #endif 1776 1777 hasbrokenint12 = 0; 1778 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12); 1779 bzero(&vmf, sizeof(vmf)); 1780 bzero(physmap, sizeof(physmap)); 1781 basemem = 0; 1782 1783 /* 1784 * Some newer BIOSes has broken INT 12H implementation which cause 1785 * kernel panic immediately. In this case, we need to scan SMAP 1786 * with INT 15:E820 first, then determine base memory size. 1787 */ 1788 if (hasbrokenint12) { 1789 goto int15e820; 1790 } 1791 1792 /* 1793 * Perform "base memory" related probes & setup 1794 */ 1795 vm86_intcall(0x12, &vmf); 1796 basemem = vmf.vmf_ax; 1797 if (basemem > 640) { 1798 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1799 basemem); 1800 basemem = 640; 1801 } 1802 1803 /* 1804 * XXX if biosbasemem is now < 640, there is a `hole' 1805 * between the end of base memory and the start of 1806 * ISA memory. The hole may be empty or it may 1807 * contain BIOS code or data. Map it read/write so 1808 * that the BIOS can write to it. (Memory from 0 to 1809 * the physical end of the kernel is mapped read-only 1810 * to begin with and then parts of it are remapped. 1811 * The parts that aren't remapped form holes that 1812 * remain read-only and are unused by the kernel. 1813 * The base memory area is below the physical end of 1814 * the kernel and right now forms a read-only hole. 1815 * The part of it from PAGE_SIZE to 1816 * (trunc_page(biosbasemem * 1024) - 1) will be 1817 * remapped and used by the kernel later.) 1818 * 1819 * This code is similar to the code used in 1820 * pmap_mapdev, but since no memory needs to be 1821 * allocated we simply change the mapping. 1822 */ 1823 for (pa = trunc_page(basemem * 1024); 1824 pa < ISA_HOLE_START; pa += PAGE_SIZE) 1825 pmap_kenter(KERNBASE + pa, pa); 1826 1827 /* 1828 * Map pages between basemem and ISA_HOLE_START, if any, r/w into 1829 * the vm86 page table so that vm86 can scribble on them using 1830 * the vm86 map too. XXX: why 2 ways for this and only 1 way for 1831 * page 0, at least as initialized here? 1832 */ 1833 pte = (pt_entry_t *)vm86paddr; 1834 for (i = basemem / 4; i < 160; i++) 1835 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1836 1837 int15e820: 1838 /* 1839 * Fetch the memory map with INT 15:E820. First, check to see 1840 * if the loader supplied it and use that if so. Otherwise, 1841 * use vm86 to invoke the BIOS call directly. 1842 */ 1843 physmap_idx = 0; 1844 smapbase = NULL; 1845 kmdp = preload_search_by_type("elf kernel"); 1846 if (kmdp == NULL) 1847 kmdp = preload_search_by_type("elf32 kernel"); 1848 if (kmdp != NULL) 1849 smapbase = (struct bios_smap *)preload_search_info(kmdp, 1850 MODINFO_METADATA | MODINFOMD_SMAP); 1851 if (smapbase != NULL) { 1852 /* subr_module.c says: 1853 * "Consumer may safely assume that size value precedes data." 1854 * ie: an int32_t immediately precedes smap. 1855 */ 1856 smapsize = *((u_int32_t *)smapbase - 1); 1857 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize); 1858 has_smap = 1; 1859 1860 for (smap = smapbase; smap < smapend; smap++) 1861 if (!add_smap_entry(smap, physmap, &physmap_idx)) 1862 break; 1863 } else { 1864 /* 1865 * map page 1 R/W into the kernel page table so we can use it 1866 * as a buffer. The kernel will unmap this page later. 1867 */ 1868 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT); 1869 vmc.npages = 0; 1870 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + 1871 (1 << PAGE_SHIFT)); 1872 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di); 1873 1874 vmf.vmf_ebx = 0; 1875 do { 1876 vmf.vmf_eax = 0xE820; 1877 vmf.vmf_edx = SMAP_SIG; 1878 vmf.vmf_ecx = sizeof(struct bios_smap); 1879 i = vm86_datacall(0x15, &vmf, &vmc); 1880 if (i || vmf.vmf_eax != SMAP_SIG) 1881 break; 1882 has_smap = 1; 1883 if (!add_smap_entry(smap, physmap, &physmap_idx)) 1884 break; 1885 } while (vmf.vmf_ebx != 0); 1886 } 1887 1888 /* 1889 * Perform "base memory" related probes & setup based on SMAP 1890 */ 1891 if (basemem == 0) { 1892 for (i = 0; i <= physmap_idx; i += 2) { 1893 if (physmap[i] == 0x00000000) { 1894 basemem = physmap[i + 1] / 1024; 1895 break; 1896 } 1897 } 1898 1899 /* 1900 * XXX this function is horribly organized and has to the same 1901 * things that it does above here. 1902 */ 1903 if (basemem == 0) 1904 basemem = 640; 1905 if (basemem > 640) { 1906 printf( 1907 "Preposterous BIOS basemem of %uK, truncating to 640K\n", 1908 basemem); 1909 basemem = 640; 1910 } 1911 1912 /* 1913 * Let vm86 scribble on pages between basemem and 1914 * ISA_HOLE_START, as above. 1915 */ 1916 for (pa = trunc_page(basemem * 1024); 1917 pa < ISA_HOLE_START; pa += PAGE_SIZE) 1918 pmap_kenter(KERNBASE + pa, pa); 1919 pte = (pt_entry_t *)vm86paddr; 1920 for (i = basemem / 4; i < 160; i++) 1921 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1922 } 1923 1924 if (physmap[1] != 0) 1925 goto physmap_done; 1926 1927 /* 1928 * If we failed above, try memory map with INT 15:E801 1929 */ 1930 vmf.vmf_ax = 0xE801; 1931 if (vm86_intcall(0x15, &vmf) == 0) { 1932 extmem = vmf.vmf_cx + vmf.vmf_dx * 64; 1933 } else { 1934 #if 0 1935 vmf.vmf_ah = 0x88; 1936 vm86_intcall(0x15, &vmf); 1937 extmem = vmf.vmf_ax; 1938 #else 1939 /* 1940 * Prefer the RTC value for extended memory. 1941 */ 1942 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8); 1943 #endif 1944 } 1945 1946 /* 1947 * Special hack for chipsets that still remap the 384k hole when 1948 * there's 16MB of memory - this really confuses people that 1949 * are trying to use bus mastering ISA controllers with the 1950 * "16MB limit"; they only have 16MB, but the remapping puts 1951 * them beyond the limit. 1952 * 1953 * If extended memory is between 15-16MB (16-17MB phys address range), 1954 * chop it to 15MB. 1955 */ 1956 if ((extmem > 15 * 1024) && (extmem < 16 * 1024)) 1957 extmem = 15 * 1024; 1958 1959 physmap[0] = 0; 1960 physmap[1] = basemem * 1024; 1961 physmap_idx = 2; 1962 physmap[physmap_idx] = 0x100000; 1963 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 1964 1965 physmap_done: 1966 /* 1967 * Now, physmap contains a map of physical memory. 1968 */ 1969 1970 #ifdef SMP 1971 /* make hole for AP bootstrap code */ 1972 physmap[1] = mp_bootaddress(physmap[1]); 1973 #endif 1974 1975 /* 1976 * Maxmem isn't the "maximum memory", it's one larger than the 1977 * highest page of the physical address space. It should be 1978 * called something like "Maxphyspage". We may adjust this 1979 * based on ``hw.physmem'' and the results of the memory test. 1980 */ 1981 Maxmem = atop(physmap[physmap_idx + 1]); 1982 1983 #ifdef MAXMEM 1984 Maxmem = MAXMEM / 4; 1985 #endif 1986 1987 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1988 Maxmem = atop(physmem_tunable); 1989 1990 /* 1991 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend 1992 * the amount of memory in the system. 1993 */ 1994 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1])) 1995 Maxmem = atop(physmap[physmap_idx + 1]); 1996 1997 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1998 (boothowto & RB_VERBOSE)) 1999 printf("Physical memory use set to %ldK\n", Maxmem * 4); 2000 2001 /* 2002 * If Maxmem has been increased beyond what the system has detected, 2003 * extend the last memory segment to the new limit. 2004 */ 2005 if (atop(physmap[physmap_idx + 1]) < Maxmem) 2006 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 2007 2008 /* call pmap initialization to make new kernel address space */ 2009 pmap_bootstrap(first); 2010 2011 /* 2012 * Size up each available chunk of physical memory. 2013 */ 2014 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 2015 pa_indx = 0; 2016 da_indx = 1; 2017 phys_avail[pa_indx++] = physmap[0]; 2018 phys_avail[pa_indx] = physmap[0]; 2019 dump_avail[da_indx] = physmap[0]; 2020 pte = CMAP1; 2021 2022 /* 2023 * Get dcons buffer address 2024 */ 2025 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 2026 getenv_quad("dcons.size", &dcons_size) == 0) 2027 dcons_addr = 0; 2028 2029 /* 2030 * physmap is in bytes, so when converting to page boundaries, 2031 * round up the start address and round down the end address. 2032 */ 2033 for (i = 0; i <= physmap_idx; i += 2) { 2034 vm_paddr_t end; 2035 2036 end = ptoa((vm_paddr_t)Maxmem); 2037 if (physmap[i + 1] < end) 2038 end = trunc_page(physmap[i + 1]); 2039 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 2040 int tmp, page_bad, full; 2041 int *ptr = (int *)CADDR1; 2042 2043 full = FALSE; 2044 /* 2045 * block out kernel memory as not available. 2046 */ 2047 if (pa >= KERNLOAD && pa < first) 2048 goto do_dump_avail; 2049 2050 /* 2051 * block out dcons buffer 2052 */ 2053 if (dcons_addr > 0 2054 && pa >= trunc_page(dcons_addr) 2055 && pa < dcons_addr + dcons_size) 2056 goto do_dump_avail; 2057 2058 page_bad = FALSE; 2059 2060 /* 2061 * map page into kernel: valid, read/write,non-cacheable 2062 */ 2063 *pte = pa | PG_V | PG_RW | PG_N; 2064 invltlb(); 2065 2066 tmp = *(int *)ptr; 2067 /* 2068 * Test for alternating 1's and 0's 2069 */ 2070 *(volatile int *)ptr = 0xaaaaaaaa; 2071 if (*(volatile int *)ptr != 0xaaaaaaaa) 2072 page_bad = TRUE; 2073 /* 2074 * Test for alternating 0's and 1's 2075 */ 2076 *(volatile int *)ptr = 0x55555555; 2077 if (*(volatile int *)ptr != 0x55555555) 2078 page_bad = TRUE; 2079 /* 2080 * Test for all 1's 2081 */ 2082 *(volatile int *)ptr = 0xffffffff; 2083 if (*(volatile int *)ptr != 0xffffffff) 2084 page_bad = TRUE; 2085 /* 2086 * Test for all 0's 2087 */ 2088 *(volatile int *)ptr = 0x0; 2089 if (*(volatile int *)ptr != 0x0) 2090 page_bad = TRUE; 2091 /* 2092 * Restore original value. 2093 */ 2094 *(int *)ptr = tmp; 2095 2096 /* 2097 * Adjust array of valid/good pages. 2098 */ 2099 if (page_bad == TRUE) 2100 continue; 2101 /* 2102 * If this good page is a continuation of the 2103 * previous set of good pages, then just increase 2104 * the end pointer. Otherwise start a new chunk. 2105 * Note that "end" points one higher than end, 2106 * making the range >= start and < end. 2107 * If we're also doing a speculative memory 2108 * test and we at or past the end, bump up Maxmem 2109 * so that we keep going. The first bad page 2110 * will terminate the loop. 2111 */ 2112 if (phys_avail[pa_indx] == pa) { 2113 phys_avail[pa_indx] += PAGE_SIZE; 2114 } else { 2115 pa_indx++; 2116 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 2117 printf( 2118 "Too many holes in the physical address space, giving up\n"); 2119 pa_indx--; 2120 full = TRUE; 2121 goto do_dump_avail; 2122 } 2123 phys_avail[pa_indx++] = pa; /* start */ 2124 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 2125 } 2126 physmem++; 2127 do_dump_avail: 2128 if (dump_avail[da_indx] == pa) { 2129 dump_avail[da_indx] += PAGE_SIZE; 2130 } else { 2131 da_indx++; 2132 if (da_indx == DUMP_AVAIL_ARRAY_END) { 2133 da_indx--; 2134 goto do_next; 2135 } 2136 dump_avail[da_indx++] = pa; /* start */ 2137 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 2138 } 2139 do_next: 2140 if (full) 2141 break; 2142 } 2143 } 2144 *pte = 0; 2145 invltlb(); 2146 2147 /* 2148 * XXX 2149 * The last chunk must contain at least one page plus the message 2150 * buffer to avoid complicating other code (message buffer address 2151 * calculation, etc.). 2152 */ 2153 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 2154 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 2155 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 2156 phys_avail[pa_indx--] = 0; 2157 phys_avail[pa_indx--] = 0; 2158 } 2159 2160 Maxmem = atop(phys_avail[pa_indx]); 2161 2162 /* Trim off space for the message buffer. */ 2163 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 2164 2165 /* Map the message buffer. */ 2166 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 2167 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] + 2168 off); 2169 } 2170 2171 void 2172 init386(first) 2173 int first; 2174 { 2175 struct gate_descriptor *gdp; 2176 int gsel_tss, metadata_missing, x; 2177 struct pcpu *pc; 2178 2179 thread0.td_kstack = proc0kstack; 2180 thread0.td_pcb = (struct pcb *) 2181 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 2182 2183 /* 2184 * This may be done better later if it gets more high level 2185 * components in it. If so just link td->td_proc here. 2186 */ 2187 proc_linkup0(&proc0, &thread0); 2188 2189 metadata_missing = 0; 2190 if (bootinfo.bi_modulep) { 2191 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 2192 preload_bootstrap_relocate(KERNBASE); 2193 } else { 2194 metadata_missing = 1; 2195 } 2196 if (envmode == 1) 2197 kern_envp = static_env; 2198 else if (bootinfo.bi_envp) 2199 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 2200 2201 /* Init basic tunables, hz etc */ 2202 init_param1(); 2203 2204 /* 2205 * Make gdt memory segments. All segments cover the full 4GB 2206 * of address space and permissions are enforced at page level. 2207 */ 2208 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1); 2209 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1); 2210 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1); 2211 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1); 2212 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1); 2213 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1); 2214 2215 pc = &__pcpu[0]; 2216 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1); 2217 gdt_segs[GPRIV_SEL].ssd_base = (int) pc; 2218 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss; 2219 2220 for (x = 0; x < NGDT; x++) 2221 ssdtosd(&gdt_segs[x], &gdt[x].sd); 2222 2223 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 2224 r_gdt.rd_base = (int) gdt; 2225 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN); 2226 lgdt(&r_gdt); 2227 2228 pcpu_init(pc, 0, sizeof(struct pcpu)); 2229 PCPU_SET(prvspace, pc); 2230 PCPU_SET(curthread, &thread0); 2231 PCPU_SET(curpcb, thread0.td_pcb); 2232 2233 /* 2234 * Initialize mutexes. 2235 * 2236 * icu_lock: in order to allow an interrupt to occur in a critical 2237 * section, to set pcpu->ipending (etc...) properly, we 2238 * must be able to get the icu lock, so it can't be 2239 * under witness. 2240 */ 2241 mutex_init(); 2242 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE); 2243 2244 /* make ldt memory segments */ 2245 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1); 2246 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1); 2247 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 2248 ssdtosd(&ldt_segs[x], &ldt[x].sd); 2249 2250 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 2251 lldt(_default_ldt); 2252 PCPU_SET(currentldt, _default_ldt); 2253 2254 /* exceptions */ 2255 for (x = 0; x < NIDT; x++) 2256 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, 2257 GSEL(GCODE_SEL, SEL_KPL)); 2258 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, 2259 GSEL(GCODE_SEL, SEL_KPL)); 2260 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL, 2261 GSEL(GCODE_SEL, SEL_KPL)); 2262 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL, 2263 GSEL(GCODE_SEL, SEL_KPL)); 2264 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL, 2265 GSEL(GCODE_SEL, SEL_KPL)); 2266 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, 2267 GSEL(GCODE_SEL, SEL_KPL)); 2268 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, 2269 GSEL(GCODE_SEL, SEL_KPL)); 2270 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2271 GSEL(GCODE_SEL, SEL_KPL)); 2272 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL 2273 , GSEL(GCODE_SEL, SEL_KPL)); 2274 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 2275 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, 2276 GSEL(GCODE_SEL, SEL_KPL)); 2277 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, 2278 GSEL(GCODE_SEL, SEL_KPL)); 2279 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, 2280 GSEL(GCODE_SEL, SEL_KPL)); 2281 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, 2282 GSEL(GCODE_SEL, SEL_KPL)); 2283 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2284 GSEL(GCODE_SEL, SEL_KPL)); 2285 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, 2286 GSEL(GCODE_SEL, SEL_KPL)); 2287 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, 2288 GSEL(GCODE_SEL, SEL_KPL)); 2289 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, 2290 GSEL(GCODE_SEL, SEL_KPL)); 2291 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, 2292 GSEL(GCODE_SEL, SEL_KPL)); 2293 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, 2294 GSEL(GCODE_SEL, SEL_KPL)); 2295 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL, 2296 GSEL(GCODE_SEL, SEL_KPL)); 2297 2298 r_idt.rd_limit = sizeof(idt0) - 1; 2299 r_idt.rd_base = (int) idt; 2300 lidt(&r_idt); 2301 2302 #ifdef XBOX 2303 /* 2304 * The following code queries the PCI ID of 0:0:0. For the XBOX, 2305 * This should be 0x10de / 0x02a5. 2306 * 2307 * This is exactly what Linux does. 2308 */ 2309 outl(0xcf8, 0x80000000); 2310 if (inl(0xcfc) == 0x02a510de) { 2311 arch_i386_is_xbox = 1; 2312 pic16l_setled(XBOX_LED_GREEN); 2313 2314 /* 2315 * We are an XBOX, but we may have either 64MB or 128MB of 2316 * memory. The PCI host bridge should be programmed for this, 2317 * so we just query it. 2318 */ 2319 outl(0xcf8, 0x80000084); 2320 arch_i386_xbox_memsize = (inl(0xcfc) == 0x7FFFFFF) ? 128 : 64; 2321 } 2322 #endif /* XBOX */ 2323 2324 /* 2325 * Initialize the i8254 before the console so that console 2326 * initialization can use DELAY(). 2327 */ 2328 i8254_init(); 2329 2330 /* 2331 * Initialize the console before we print anything out. 2332 */ 2333 cninit(); 2334 2335 if (metadata_missing) 2336 printf("WARNING: loader(8) metadata is missing!\n"); 2337 2338 #ifdef DEV_ISA 2339 elcr_probe(); 2340 atpic_startup(); 2341 #endif 2342 2343 #ifdef DDB 2344 ksym_start = bootinfo.bi_symtab; 2345 ksym_end = bootinfo.bi_esymtab; 2346 #endif 2347 2348 kdb_init(); 2349 2350 #ifdef KDB 2351 if (boothowto & RB_KDB) 2352 kdb_enter_why(KDB_WHY_BOOTFLAGS, 2353 "Boot flags requested debugger"); 2354 #endif 2355 2356 finishidentcpu(); /* Final stage of CPU initialization */ 2357 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2358 GSEL(GCODE_SEL, SEL_KPL)); 2359 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2360 GSEL(GCODE_SEL, SEL_KPL)); 2361 initializecpu(); /* Initialize CPU registers */ 2362 2363 /* make an initial tss so cpu can get interrupt stack on syscall! */ 2364 /* Note: -16 is so we can grow the trapframe if we came from vm86 */ 2365 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack + 2366 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16); 2367 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL)); 2368 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 2369 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd); 2370 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 2371 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16); 2372 ltr(gsel_tss); 2373 2374 /* pointer to selector slot for %fs/%gs */ 2375 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd); 2376 2377 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 2378 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)]; 2379 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 2380 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 2381 #ifdef PAE 2382 dblfault_tss.tss_cr3 = (int)IdlePDPT; 2383 #else 2384 dblfault_tss.tss_cr3 = (int)IdlePTD; 2385 #endif 2386 dblfault_tss.tss_eip = (int)dblfault_handler; 2387 dblfault_tss.tss_eflags = PSL_KERNEL; 2388 dblfault_tss.tss_ds = dblfault_tss.tss_es = 2389 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 2390 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL); 2391 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 2392 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 2393 2394 vm86_initialize(); 2395 getmemsize(first); 2396 init_param2(physmem); 2397 2398 /* now running on new page tables, configured,and u/iom is accessible */ 2399 2400 msgbufinit(msgbufp, MSGBUF_SIZE); 2401 2402 /* make a call gate to reenter kernel with */ 2403 gdp = &ldt[LSYS5CALLS_SEL].gd; 2404 2405 x = (int) &IDTVEC(lcall_syscall); 2406 gdp->gd_looffset = x; 2407 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 2408 gdp->gd_stkcpy = 1; 2409 gdp->gd_type = SDT_SYS386CGT; 2410 gdp->gd_dpl = SEL_UPL; 2411 gdp->gd_p = 1; 2412 gdp->gd_hioffset = x >> 16; 2413 2414 /* XXX does this work? */ 2415 /* XXX yes! */ 2416 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2417 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2418 2419 /* transfer to user mode */ 2420 2421 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 2422 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 2423 2424 /* setup proc 0's pcb */ 2425 thread0.td_pcb->pcb_flags = 0; 2426 #ifdef PAE 2427 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT; 2428 #else 2429 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; 2430 #endif 2431 thread0.td_pcb->pcb_ext = 0; 2432 thread0.td_frame = &proc0_tf; 2433 } 2434 2435 void 2436 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 2437 { 2438 2439 pcpu->pc_acpi_id = 0xffffffff; 2440 } 2441 2442 void 2443 spinlock_enter(void) 2444 { 2445 struct thread *td; 2446 2447 td = curthread; 2448 if (td->td_md.md_spinlock_count == 0) 2449 td->td_md.md_saved_flags = intr_disable(); 2450 td->td_md.md_spinlock_count++; 2451 critical_enter(); 2452 } 2453 2454 void 2455 spinlock_exit(void) 2456 { 2457 struct thread *td; 2458 2459 td = curthread; 2460 critical_exit(); 2461 td->td_md.md_spinlock_count--; 2462 if (td->td_md.md_spinlock_count == 0) 2463 intr_restore(td->td_md.md_saved_flags); 2464 } 2465 2466 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 2467 static void f00f_hack(void *unused); 2468 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL); 2469 2470 static void 2471 f00f_hack(void *unused) 2472 { 2473 struct gate_descriptor *new_idt; 2474 vm_offset_t tmp; 2475 2476 if (!has_f00f_bug) 2477 return; 2478 2479 GIANT_REQUIRED; 2480 2481 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 2482 2483 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 2484 if (tmp == 0) 2485 panic("kmem_alloc returned 0"); 2486 2487 /* Put the problematic entry (#6) at the end of the lower page. */ 2488 new_idt = (struct gate_descriptor*) 2489 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor)); 2490 bcopy(idt, new_idt, sizeof(idt0)); 2491 r_idt.rd_base = (u_int)new_idt; 2492 lidt(&r_idt); 2493 idt = new_idt; 2494 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 2495 VM_PROT_READ, FALSE) != KERN_SUCCESS) 2496 panic("vm_map_protect failed"); 2497 } 2498 #endif /* defined(I586_CPU) && !NO_F00F_HACK */ 2499 2500 /* 2501 * Construct a PCB from a trapframe. This is called from kdb_trap() where 2502 * we want to start a backtrace from the function that caused us to enter 2503 * the debugger. We have the context in the trapframe, but base the trace 2504 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 2505 * enough for a backtrace. 2506 */ 2507 void 2508 makectx(struct trapframe *tf, struct pcb *pcb) 2509 { 2510 2511 pcb->pcb_edi = tf->tf_edi; 2512 pcb->pcb_esi = tf->tf_esi; 2513 pcb->pcb_ebp = tf->tf_ebp; 2514 pcb->pcb_ebx = tf->tf_ebx; 2515 pcb->pcb_eip = tf->tf_eip; 2516 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8; 2517 } 2518 2519 int 2520 ptrace_set_pc(struct thread *td, u_long addr) 2521 { 2522 2523 td->td_frame->tf_eip = addr; 2524 return (0); 2525 } 2526 2527 int 2528 ptrace_single_step(struct thread *td) 2529 { 2530 td->td_frame->tf_eflags |= PSL_T; 2531 return (0); 2532 } 2533 2534 int 2535 ptrace_clear_single_step(struct thread *td) 2536 { 2537 td->td_frame->tf_eflags &= ~PSL_T; 2538 return (0); 2539 } 2540 2541 int 2542 fill_regs(struct thread *td, struct reg *regs) 2543 { 2544 struct pcb *pcb; 2545 struct trapframe *tp; 2546 2547 tp = td->td_frame; 2548 pcb = td->td_pcb; 2549 regs->r_fs = tp->tf_fs; 2550 regs->r_es = tp->tf_es; 2551 regs->r_ds = tp->tf_ds; 2552 regs->r_edi = tp->tf_edi; 2553 regs->r_esi = tp->tf_esi; 2554 regs->r_ebp = tp->tf_ebp; 2555 regs->r_ebx = tp->tf_ebx; 2556 regs->r_edx = tp->tf_edx; 2557 regs->r_ecx = tp->tf_ecx; 2558 regs->r_eax = tp->tf_eax; 2559 regs->r_eip = tp->tf_eip; 2560 regs->r_cs = tp->tf_cs; 2561 regs->r_eflags = tp->tf_eflags; 2562 regs->r_esp = tp->tf_esp; 2563 regs->r_ss = tp->tf_ss; 2564 regs->r_gs = pcb->pcb_gs; 2565 return (0); 2566 } 2567 2568 int 2569 set_regs(struct thread *td, struct reg *regs) 2570 { 2571 struct pcb *pcb; 2572 struct trapframe *tp; 2573 2574 tp = td->td_frame; 2575 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) || 2576 !CS_SECURE(regs->r_cs)) 2577 return (EINVAL); 2578 pcb = td->td_pcb; 2579 tp->tf_fs = regs->r_fs; 2580 tp->tf_es = regs->r_es; 2581 tp->tf_ds = regs->r_ds; 2582 tp->tf_edi = regs->r_edi; 2583 tp->tf_esi = regs->r_esi; 2584 tp->tf_ebp = regs->r_ebp; 2585 tp->tf_ebx = regs->r_ebx; 2586 tp->tf_edx = regs->r_edx; 2587 tp->tf_ecx = regs->r_ecx; 2588 tp->tf_eax = regs->r_eax; 2589 tp->tf_eip = regs->r_eip; 2590 tp->tf_cs = regs->r_cs; 2591 tp->tf_eflags = regs->r_eflags; 2592 tp->tf_esp = regs->r_esp; 2593 tp->tf_ss = regs->r_ss; 2594 pcb->pcb_gs = regs->r_gs; 2595 return (0); 2596 } 2597 2598 #ifdef CPU_ENABLE_SSE 2599 static void 2600 fill_fpregs_xmm(sv_xmm, sv_87) 2601 struct savexmm *sv_xmm; 2602 struct save87 *sv_87; 2603 { 2604 register struct env87 *penv_87 = &sv_87->sv_env; 2605 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2606 int i; 2607 2608 bzero(sv_87, sizeof(*sv_87)); 2609 2610 /* FPU control/status */ 2611 penv_87->en_cw = penv_xmm->en_cw; 2612 penv_87->en_sw = penv_xmm->en_sw; 2613 penv_87->en_tw = penv_xmm->en_tw; 2614 penv_87->en_fip = penv_xmm->en_fip; 2615 penv_87->en_fcs = penv_xmm->en_fcs; 2616 penv_87->en_opcode = penv_xmm->en_opcode; 2617 penv_87->en_foo = penv_xmm->en_foo; 2618 penv_87->en_fos = penv_xmm->en_fos; 2619 2620 /* FPU registers */ 2621 for (i = 0; i < 8; ++i) 2622 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 2623 } 2624 2625 static void 2626 set_fpregs_xmm(sv_87, sv_xmm) 2627 struct save87 *sv_87; 2628 struct savexmm *sv_xmm; 2629 { 2630 register struct env87 *penv_87 = &sv_87->sv_env; 2631 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2632 int i; 2633 2634 /* FPU control/status */ 2635 penv_xmm->en_cw = penv_87->en_cw; 2636 penv_xmm->en_sw = penv_87->en_sw; 2637 penv_xmm->en_tw = penv_87->en_tw; 2638 penv_xmm->en_fip = penv_87->en_fip; 2639 penv_xmm->en_fcs = penv_87->en_fcs; 2640 penv_xmm->en_opcode = penv_87->en_opcode; 2641 penv_xmm->en_foo = penv_87->en_foo; 2642 penv_xmm->en_fos = penv_87->en_fos; 2643 2644 /* FPU registers */ 2645 for (i = 0; i < 8; ++i) 2646 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 2647 } 2648 #endif /* CPU_ENABLE_SSE */ 2649 2650 int 2651 fill_fpregs(struct thread *td, struct fpreg *fpregs) 2652 { 2653 #ifdef CPU_ENABLE_SSE 2654 if (cpu_fxsr) { 2655 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm, 2656 (struct save87 *)fpregs); 2657 return (0); 2658 } 2659 #endif /* CPU_ENABLE_SSE */ 2660 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 2661 return (0); 2662 } 2663 2664 int 2665 set_fpregs(struct thread *td, struct fpreg *fpregs) 2666 { 2667 #ifdef CPU_ENABLE_SSE 2668 if (cpu_fxsr) { 2669 set_fpregs_xmm((struct save87 *)fpregs, 2670 &td->td_pcb->pcb_save.sv_xmm); 2671 return (0); 2672 } 2673 #endif /* CPU_ENABLE_SSE */ 2674 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs); 2675 return (0); 2676 } 2677 2678 /* 2679 * Get machine context. 2680 */ 2681 int 2682 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 2683 { 2684 struct trapframe *tp; 2685 2686 tp = td->td_frame; 2687 2688 PROC_LOCK(curthread->td_proc); 2689 mcp->mc_onstack = sigonstack(tp->tf_esp); 2690 PROC_UNLOCK(curthread->td_proc); 2691 mcp->mc_gs = td->td_pcb->pcb_gs; 2692 mcp->mc_fs = tp->tf_fs; 2693 mcp->mc_es = tp->tf_es; 2694 mcp->mc_ds = tp->tf_ds; 2695 mcp->mc_edi = tp->tf_edi; 2696 mcp->mc_esi = tp->tf_esi; 2697 mcp->mc_ebp = tp->tf_ebp; 2698 mcp->mc_isp = tp->tf_isp; 2699 mcp->mc_eflags = tp->tf_eflags; 2700 if (flags & GET_MC_CLEAR_RET) { 2701 mcp->mc_eax = 0; 2702 mcp->mc_edx = 0; 2703 mcp->mc_eflags &= ~PSL_C; 2704 } else { 2705 mcp->mc_eax = tp->tf_eax; 2706 mcp->mc_edx = tp->tf_edx; 2707 } 2708 mcp->mc_ebx = tp->tf_ebx; 2709 mcp->mc_ecx = tp->tf_ecx; 2710 mcp->mc_eip = tp->tf_eip; 2711 mcp->mc_cs = tp->tf_cs; 2712 mcp->mc_esp = tp->tf_esp; 2713 mcp->mc_ss = tp->tf_ss; 2714 mcp->mc_len = sizeof(*mcp); 2715 get_fpcontext(td, mcp); 2716 return (0); 2717 } 2718 2719 /* 2720 * Set machine context. 2721 * 2722 * However, we don't set any but the user modifiable flags, and we won't 2723 * touch the cs selector. 2724 */ 2725 int 2726 set_mcontext(struct thread *td, const mcontext_t *mcp) 2727 { 2728 struct trapframe *tp; 2729 int eflags, ret; 2730 2731 tp = td->td_frame; 2732 if (mcp->mc_len != sizeof(*mcp)) 2733 return (EINVAL); 2734 eflags = (mcp->mc_eflags & PSL_USERCHANGE) | 2735 (tp->tf_eflags & ~PSL_USERCHANGE); 2736 if ((ret = set_fpcontext(td, mcp)) == 0) { 2737 tp->tf_fs = mcp->mc_fs; 2738 tp->tf_es = mcp->mc_es; 2739 tp->tf_ds = mcp->mc_ds; 2740 tp->tf_edi = mcp->mc_edi; 2741 tp->tf_esi = mcp->mc_esi; 2742 tp->tf_ebp = mcp->mc_ebp; 2743 tp->tf_ebx = mcp->mc_ebx; 2744 tp->tf_edx = mcp->mc_edx; 2745 tp->tf_ecx = mcp->mc_ecx; 2746 tp->tf_eax = mcp->mc_eax; 2747 tp->tf_eip = mcp->mc_eip; 2748 tp->tf_eflags = eflags; 2749 tp->tf_esp = mcp->mc_esp; 2750 tp->tf_ss = mcp->mc_ss; 2751 td->td_pcb->pcb_gs = mcp->mc_gs; 2752 ret = 0; 2753 } 2754 return (ret); 2755 } 2756 2757 static void 2758 get_fpcontext(struct thread *td, mcontext_t *mcp) 2759 { 2760 #ifndef DEV_NPX 2761 mcp->mc_fpformat = _MC_FPFMT_NODEV; 2762 mcp->mc_ownedfp = _MC_FPOWNED_NONE; 2763 #else 2764 union savefpu *addr; 2765 2766 /* 2767 * XXX mc_fpstate might be misaligned, since its declaration is not 2768 * unportabilized using __attribute__((aligned(16))) like the 2769 * declaration of struct savemm, and anyway, alignment doesn't work 2770 * for auto variables since we don't use gcc's pessimal stack 2771 * alignment. Work around this by abusing the spare fields after 2772 * mcp->mc_fpstate. 2773 * 2774 * XXX unpessimize most cases by only aligning when fxsave might be 2775 * called, although this requires knowing too much about 2776 * npxgetregs()'s internals. 2777 */ 2778 addr = (union savefpu *)&mcp->mc_fpstate; 2779 if (td == PCPU_GET(fpcurthread) && 2780 #ifdef CPU_ENABLE_SSE 2781 cpu_fxsr && 2782 #endif 2783 ((uintptr_t)(void *)addr & 0xF)) { 2784 do 2785 addr = (void *)((char *)addr + 4); 2786 while ((uintptr_t)(void *)addr & 0xF); 2787 } 2788 mcp->mc_ownedfp = npxgetregs(td, addr); 2789 if (addr != (union savefpu *)&mcp->mc_fpstate) { 2790 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate)); 2791 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2)); 2792 } 2793 mcp->mc_fpformat = npxformat(); 2794 #endif 2795 } 2796 2797 static int 2798 set_fpcontext(struct thread *td, const mcontext_t *mcp) 2799 { 2800 union savefpu *addr; 2801 2802 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2803 return (0); 2804 else if (mcp->mc_fpformat != _MC_FPFMT_387 && 2805 mcp->mc_fpformat != _MC_FPFMT_XMM) 2806 return (EINVAL); 2807 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 2808 /* We don't care what state is left in the FPU or PCB. */ 2809 fpstate_drop(td); 2810 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2811 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2812 /* XXX align as above. */ 2813 addr = (union savefpu *)&mcp->mc_fpstate; 2814 if (td == PCPU_GET(fpcurthread) && 2815 #ifdef CPU_ENABLE_SSE 2816 cpu_fxsr && 2817 #endif 2818 ((uintptr_t)(void *)addr & 0xF)) { 2819 do 2820 addr = (void *)((char *)addr + 4); 2821 while ((uintptr_t)(void *)addr & 0xF); 2822 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate)); 2823 } 2824 #ifdef DEV_NPX 2825 #ifdef CPU_ENABLE_SSE 2826 if (cpu_fxsr) 2827 addr->sv_xmm.sv_env.en_mxcsr &= cpu_mxcsr_mask; 2828 #endif 2829 /* 2830 * XXX we violate the dubious requirement that npxsetregs() 2831 * be called with interrupts disabled. 2832 */ 2833 npxsetregs(td, addr); 2834 #endif 2835 /* 2836 * Don't bother putting things back where they were in the 2837 * misaligned case, since we know that the caller won't use 2838 * them again. 2839 */ 2840 } else 2841 return (EINVAL); 2842 return (0); 2843 } 2844 2845 static void 2846 fpstate_drop(struct thread *td) 2847 { 2848 register_t s; 2849 2850 s = intr_disable(); 2851 #ifdef DEV_NPX 2852 if (PCPU_GET(fpcurthread) == td) 2853 npxdrop(); 2854 #endif 2855 /* 2856 * XXX force a full drop of the npx. The above only drops it if we 2857 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case. 2858 * 2859 * XXX I don't much like npxgetregs()'s semantics of doing a full 2860 * drop. Dropping only to the pcb matches fnsave's behaviour. 2861 * We only need to drop to !PCB_INITDONE in sendsig(). But 2862 * sendsig() is the only caller of npxgetregs()... perhaps we just 2863 * have too many layers. 2864 */ 2865 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE; 2866 intr_restore(s); 2867 } 2868 2869 int 2870 fill_dbregs(struct thread *td, struct dbreg *dbregs) 2871 { 2872 struct pcb *pcb; 2873 2874 if (td == NULL) { 2875 dbregs->dr[0] = rdr0(); 2876 dbregs->dr[1] = rdr1(); 2877 dbregs->dr[2] = rdr2(); 2878 dbregs->dr[3] = rdr3(); 2879 dbregs->dr[4] = rdr4(); 2880 dbregs->dr[5] = rdr5(); 2881 dbregs->dr[6] = rdr6(); 2882 dbregs->dr[7] = rdr7(); 2883 } else { 2884 pcb = td->td_pcb; 2885 dbregs->dr[0] = pcb->pcb_dr0; 2886 dbregs->dr[1] = pcb->pcb_dr1; 2887 dbregs->dr[2] = pcb->pcb_dr2; 2888 dbregs->dr[3] = pcb->pcb_dr3; 2889 dbregs->dr[4] = 0; 2890 dbregs->dr[5] = 0; 2891 dbregs->dr[6] = pcb->pcb_dr6; 2892 dbregs->dr[7] = pcb->pcb_dr7; 2893 } 2894 return (0); 2895 } 2896 2897 int 2898 set_dbregs(struct thread *td, struct dbreg *dbregs) 2899 { 2900 struct pcb *pcb; 2901 int i; 2902 2903 if (td == NULL) { 2904 load_dr0(dbregs->dr[0]); 2905 load_dr1(dbregs->dr[1]); 2906 load_dr2(dbregs->dr[2]); 2907 load_dr3(dbregs->dr[3]); 2908 load_dr4(dbregs->dr[4]); 2909 load_dr5(dbregs->dr[5]); 2910 load_dr6(dbregs->dr[6]); 2911 load_dr7(dbregs->dr[7]); 2912 } else { 2913 /* 2914 * Don't let an illegal value for dr7 get set. Specifically, 2915 * check for undefined settings. Setting these bit patterns 2916 * result in undefined behaviour and can lead to an unexpected 2917 * TRCTRAP. 2918 */ 2919 for (i = 0; i < 4; i++) { 2920 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 2921 return (EINVAL); 2922 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02) 2923 return (EINVAL); 2924 } 2925 2926 pcb = td->td_pcb; 2927 2928 /* 2929 * Don't let a process set a breakpoint that is not within the 2930 * process's address space. If a process could do this, it 2931 * could halt the system by setting a breakpoint in the kernel 2932 * (if ddb was enabled). Thus, we need to check to make sure 2933 * that no breakpoints are being enabled for addresses outside 2934 * process's address space. 2935 * 2936 * XXX - what about when the watched area of the user's 2937 * address space is written into from within the kernel 2938 * ... wouldn't that still cause a breakpoint to be generated 2939 * from within kernel mode? 2940 */ 2941 2942 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 2943 /* dr0 is enabled */ 2944 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2945 return (EINVAL); 2946 } 2947 2948 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 2949 /* dr1 is enabled */ 2950 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2951 return (EINVAL); 2952 } 2953 2954 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 2955 /* dr2 is enabled */ 2956 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2957 return (EINVAL); 2958 } 2959 2960 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 2961 /* dr3 is enabled */ 2962 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2963 return (EINVAL); 2964 } 2965 2966 pcb->pcb_dr0 = dbregs->dr[0]; 2967 pcb->pcb_dr1 = dbregs->dr[1]; 2968 pcb->pcb_dr2 = dbregs->dr[2]; 2969 pcb->pcb_dr3 = dbregs->dr[3]; 2970 pcb->pcb_dr6 = dbregs->dr[6]; 2971 pcb->pcb_dr7 = dbregs->dr[7]; 2972 2973 pcb->pcb_flags |= PCB_DBREGS; 2974 } 2975 2976 return (0); 2977 } 2978 2979 /* 2980 * Return > 0 if a hardware breakpoint has been hit, and the 2981 * breakpoint was in user space. Return 0, otherwise. 2982 */ 2983 int 2984 user_dbreg_trap(void) 2985 { 2986 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 2987 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 2988 int nbp; /* number of breakpoints that triggered */ 2989 caddr_t addr[4]; /* breakpoint addresses */ 2990 int i; 2991 2992 dr7 = rdr7(); 2993 if ((dr7 & 0x000000ff) == 0) { 2994 /* 2995 * all GE and LE bits in the dr7 register are zero, 2996 * thus the trap couldn't have been caused by the 2997 * hardware debug registers 2998 */ 2999 return 0; 3000 } 3001 3002 nbp = 0; 3003 dr6 = rdr6(); 3004 bp = dr6 & 0x0000000f; 3005 3006 if (!bp) { 3007 /* 3008 * None of the breakpoint bits are set meaning this 3009 * trap was not caused by any of the debug registers 3010 */ 3011 return 0; 3012 } 3013 3014 /* 3015 * at least one of the breakpoints were hit, check to see 3016 * which ones and if any of them are user space addresses 3017 */ 3018 3019 if (bp & 0x01) { 3020 addr[nbp++] = (caddr_t)rdr0(); 3021 } 3022 if (bp & 0x02) { 3023 addr[nbp++] = (caddr_t)rdr1(); 3024 } 3025 if (bp & 0x04) { 3026 addr[nbp++] = (caddr_t)rdr2(); 3027 } 3028 if (bp & 0x08) { 3029 addr[nbp++] = (caddr_t)rdr3(); 3030 } 3031 3032 for (i = 0; i < nbp; i++) { 3033 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 3034 /* 3035 * addr[i] is in user space 3036 */ 3037 return nbp; 3038 } 3039 } 3040 3041 /* 3042 * None of the breakpoints are in user space. 3043 */ 3044 return 0; 3045 } 3046 3047 #ifndef DEV_APIC 3048 #include <machine/apicvar.h> 3049 3050 /* 3051 * Provide stub functions so that the MADT APIC enumerator in the acpi 3052 * kernel module will link against a kernel without 'device apic'. 3053 * 3054 * XXX - This is a gross hack. 3055 */ 3056 void 3057 apic_register_enumerator(struct apic_enumerator *enumerator) 3058 { 3059 } 3060 3061 void * 3062 ioapic_create(vm_paddr_t addr, int32_t apic_id, int intbase) 3063 { 3064 return (NULL); 3065 } 3066 3067 int 3068 ioapic_disable_pin(void *cookie, u_int pin) 3069 { 3070 return (ENXIO); 3071 } 3072 3073 int 3074 ioapic_get_vector(void *cookie, u_int pin) 3075 { 3076 return (-1); 3077 } 3078 3079 void 3080 ioapic_register(void *cookie) 3081 { 3082 } 3083 3084 int 3085 ioapic_remap_vector(void *cookie, u_int pin, int vector) 3086 { 3087 return (ENXIO); 3088 } 3089 3090 int 3091 ioapic_set_extint(void *cookie, u_int pin) 3092 { 3093 return (ENXIO); 3094 } 3095 3096 int 3097 ioapic_set_nmi(void *cookie, u_int pin) 3098 { 3099 return (ENXIO); 3100 } 3101 3102 int 3103 ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol) 3104 { 3105 return (ENXIO); 3106 } 3107 3108 int 3109 ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger) 3110 { 3111 return (ENXIO); 3112 } 3113 3114 void 3115 lapic_create(u_int apic_id, int boot_cpu) 3116 { 3117 } 3118 3119 void 3120 lapic_init(vm_paddr_t addr) 3121 { 3122 } 3123 3124 int 3125 lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode) 3126 { 3127 return (ENXIO); 3128 } 3129 3130 int 3131 lapic_set_lvt_polarity(u_int apic_id, u_int lvt, enum intr_polarity pol) 3132 { 3133 return (ENXIO); 3134 } 3135 3136 int 3137 lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, enum intr_trigger trigger) 3138 { 3139 return (ENXIO); 3140 } 3141 #endif 3142 3143 #ifdef KDB 3144 3145 /* 3146 * Provide inb() and outb() as functions. They are normally only 3147 * available as macros calling inlined functions, thus cannot be 3148 * called from the debugger. 3149 * 3150 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 3151 */ 3152 3153 #undef inb 3154 #undef outb 3155 3156 /* silence compiler warnings */ 3157 u_char inb(u_int); 3158 void outb(u_int, u_char); 3159 3160 u_char 3161 inb(u_int port) 3162 { 3163 u_char data; 3164 /* 3165 * We use %%dx and not %1 here because i/o is done at %dx and not at 3166 * %edx, while gcc generates inferior code (movw instead of movl) 3167 * if we tell it to load (u_short) port. 3168 */ 3169 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 3170 return (data); 3171 } 3172 3173 void 3174 outb(u_int port, u_char data) 3175 { 3176 u_char al; 3177 /* 3178 * Use an unnecessary assignment to help gcc's register allocator. 3179 * This make a large difference for gcc-1.40 and a tiny difference 3180 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 3181 * best results. gcc-2.6.0 can't handle this. 3182 */ 3183 al = data; 3184 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 3185 } 3186 3187 #endif /* KDB */
Cache object: 239e4d4e830cc7894a76f36a5c7aa786
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