The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/mp_machdep.c

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    1 /*-
    2  * Copyright (c) 1996, by Steve Passe
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. The name of the developer may NOT be used to endorse or promote products
   11  *    derived from this software without specific prior written permission.
   12  *
   13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   23  * SUCH DAMAGE.
   24  */
   25 
   26 #include <sys/cdefs.h>
   27 __FBSDID("$FreeBSD: releng/11.0/sys/i386/i386/mp_machdep.c 297857 2016-04-12 13:30:39Z avg $");
   28 
   29 #include "opt_apic.h"
   30 #include "opt_cpu.h"
   31 #include "opt_kstack_pages.h"
   32 #include "opt_pmap.h"
   33 #include "opt_sched.h"
   34 #include "opt_smp.h"
   35 
   36 #if !defined(lint)
   37 #if !defined(SMP)
   38 #error How did you get here?
   39 #endif
   40 
   41 #ifndef DEV_APIC
   42 #error The apic device is required for SMP, add "device apic" to your config file.
   43 #endif
   44 #if defined(CPU_DISABLE_CMPXCHG) && !defined(COMPILING_LINT)
   45 #error SMP not supported with CPU_DISABLE_CMPXCHG
   46 #endif
   47 #endif /* not lint */
   48 
   49 #include <sys/param.h>
   50 #include <sys/systm.h>
   51 #include <sys/bus.h>
   52 #include <sys/cons.h>   /* cngetc() */
   53 #include <sys/cpuset.h>
   54 #ifdef GPROF 
   55 #include <sys/gmon.h>
   56 #endif
   57 #include <sys/kernel.h>
   58 #include <sys/ktr.h>
   59 #include <sys/lock.h>
   60 #include <sys/malloc.h>
   61 #include <sys/memrange.h>
   62 #include <sys/mutex.h>
   63 #include <sys/pcpu.h>
   64 #include <sys/proc.h>
   65 #include <sys/sched.h>
   66 #include <sys/smp.h>
   67 #include <sys/sysctl.h>
   68 
   69 #include <vm/vm.h>
   70 #include <vm/vm_param.h>
   71 #include <vm/pmap.h>
   72 #include <vm/vm_kern.h>
   73 #include <vm/vm_extern.h>
   74 
   75 #include <x86/apicreg.h>
   76 #include <machine/clock.h>
   77 #include <machine/cputypes.h>
   78 #include <x86/mca.h>
   79 #include <machine/md_var.h>
   80 #include <machine/pcb.h>
   81 #include <machine/psl.h>
   82 #include <machine/smp.h>
   83 #include <machine/specialreg.h>
   84 #include <machine/cpu.h>
   85 
   86 #define WARMBOOT_TARGET         0
   87 #define WARMBOOT_OFF            (KERNBASE + 0x0467)
   88 #define WARMBOOT_SEG            (KERNBASE + 0x0469)
   89 
   90 #define CMOS_REG                (0x70)
   91 #define CMOS_DATA               (0x71)
   92 #define BIOS_RESET              (0x0f)
   93 #define BIOS_WARM               (0x0a)
   94 
   95 /*
   96  * this code MUST be enabled here and in mpboot.s.
   97  * it follows the very early stages of AP boot by placing values in CMOS ram.
   98  * it NORMALLY will never be needed and thus the primitive method for enabling.
   99  *
  100 #define CHECK_POINTS
  101  */
  102 
  103 #if defined(CHECK_POINTS) && !defined(PC98)
  104 #define CHECK_READ(A)    (outb(CMOS_REG, (A)), inb(CMOS_DATA))
  105 #define CHECK_WRITE(A,D) (outb(CMOS_REG, (A)), outb(CMOS_DATA, (D)))
  106 
  107 #define CHECK_INIT(D);                          \
  108         CHECK_WRITE(0x34, (D));                 \
  109         CHECK_WRITE(0x35, (D));                 \
  110         CHECK_WRITE(0x36, (D));                 \
  111         CHECK_WRITE(0x37, (D));                 \
  112         CHECK_WRITE(0x38, (D));                 \
  113         CHECK_WRITE(0x39, (D));
  114 
  115 #define CHECK_PRINT(S);                         \
  116         printf("%s: %d, %d, %d, %d, %d, %d\n",  \
  117            (S),                                 \
  118            CHECK_READ(0x34),                    \
  119            CHECK_READ(0x35),                    \
  120            CHECK_READ(0x36),                    \
  121            CHECK_READ(0x37),                    \
  122            CHECK_READ(0x38),                    \
  123            CHECK_READ(0x39));
  124 
  125 #else                           /* CHECK_POINTS */
  126 
  127 #define CHECK_INIT(D)
  128 #define CHECK_PRINT(S)
  129 #define CHECK_WRITE(A, D)
  130 
  131 #endif                          /* CHECK_POINTS */
  132 
  133 extern  struct pcpu __pcpu[];
  134 
  135 /*
  136  * Local data and functions.
  137  */
  138 
  139 static void     install_ap_tramp(void);
  140 static int      start_all_aps(void);
  141 static int      start_ap(int apic_id);
  142 
  143 static u_int    boot_address;
  144 
  145 /*
  146  * Calculate usable address in base memory for AP trampoline code.
  147  */
  148 u_int
  149 mp_bootaddress(u_int basemem)
  150 {
  151 
  152         boot_address = trunc_page(basemem);     /* round down to 4k boundary */
  153         if ((basemem - boot_address) < bootMP_size)
  154                 boot_address -= PAGE_SIZE;      /* not enough, lower by 4k */
  155 
  156         return boot_address;
  157 }
  158 
  159 /*
  160  * Initialize the IPI handlers and start up the AP's.
  161  */
  162 void
  163 cpu_mp_start(void)
  164 {
  165         int i;
  166 
  167         /* Initialize the logical ID to APIC ID table. */
  168         for (i = 0; i < MAXCPU; i++) {
  169                 cpu_apic_ids[i] = -1;
  170                 cpu_ipi_pending[i] = 0;
  171         }
  172 
  173         /* Install an inter-CPU IPI for TLB invalidation */
  174         setidt(IPI_INVLTLB, IDTVEC(invltlb),
  175                SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
  176         setidt(IPI_INVLPG, IDTVEC(invlpg),
  177                SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
  178         setidt(IPI_INVLRNG, IDTVEC(invlrng),
  179                SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
  180 
  181         /* Install an inter-CPU IPI for cache invalidation. */
  182         setidt(IPI_INVLCACHE, IDTVEC(invlcache),
  183                SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
  184 
  185         /* Install an inter-CPU IPI for all-CPU rendezvous */
  186         setidt(IPI_RENDEZVOUS, IDTVEC(rendezvous),
  187                SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
  188 
  189         /* Install generic inter-CPU IPI handler */
  190         setidt(IPI_BITMAP_VECTOR, IDTVEC(ipi_intr_bitmap_handler),
  191                SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
  192 
  193         /* Install an inter-CPU IPI for CPU stop/restart */
  194         setidt(IPI_STOP, IDTVEC(cpustop),
  195                SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
  196 
  197         /* Install an inter-CPU IPI for CPU suspend/resume */
  198         setidt(IPI_SUSPEND, IDTVEC(cpususpend),
  199                SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
  200 
  201         /* Set boot_cpu_id if needed. */
  202         if (boot_cpu_id == -1) {
  203                 boot_cpu_id = PCPU_GET(apic_id);
  204                 cpu_info[boot_cpu_id].cpu_bsp = 1;
  205         } else
  206                 KASSERT(boot_cpu_id == PCPU_GET(apic_id),
  207                     ("BSP's APIC ID doesn't match boot_cpu_id"));
  208 
  209         /* Probe logical/physical core configuration. */
  210         topo_probe();
  211 
  212         assign_cpu_ids();
  213 
  214         /* Start each Application Processor */
  215         start_all_aps();
  216 
  217         set_interrupt_apic_ids();
  218 }
  219 
  220 /*
  221  * AP CPU's call this to initialize themselves.
  222  */
  223 void
  224 init_secondary(void)
  225 {
  226         struct pcpu *pc;
  227         vm_offset_t addr;
  228         int     gsel_tss;
  229         int     x, myid;
  230         u_int   cr0;
  231 
  232         /* bootAP is set in start_ap() to our ID. */
  233         myid = bootAP;
  234 
  235         /* Get per-cpu data */
  236         pc = &__pcpu[myid];
  237 
  238         /* prime data page for it to use */
  239         pcpu_init(pc, myid, sizeof(struct pcpu));
  240         dpcpu_init(dpcpu, myid);
  241         pc->pc_apic_id = cpu_apic_ids[myid];
  242         pc->pc_prvspace = pc;
  243         pc->pc_curthread = 0;
  244 
  245         fix_cpuid();
  246 
  247         gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
  248         gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
  249 
  250         for (x = 0; x < NGDT; x++) {
  251                 ssdtosd(&gdt_segs[x], &gdt[myid * NGDT + x].sd);
  252         }
  253 
  254         r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
  255         r_gdt.rd_base = (int) &gdt[myid * NGDT];
  256         lgdt(&r_gdt);                   /* does magic intra-segment return */
  257 
  258         lidt(&r_idt);
  259 
  260         lldt(_default_ldt);
  261         PCPU_SET(currentldt, _default_ldt);
  262 
  263         gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
  264         gdt[myid * NGDT + GPROC0_SEL].sd.sd_type = SDT_SYS386TSS;
  265         PCPU_SET(common_tss.tss_esp0, 0); /* not used until after switch */
  266         PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
  267         PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
  268         PCPU_SET(tss_gdt, &gdt[myid * NGDT + GPROC0_SEL].sd);
  269         PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
  270         ltr(gsel_tss);
  271 
  272         PCPU_SET(fsgs_gdt, &gdt[myid * NGDT + GUFS_SEL].sd);
  273 
  274         /*
  275          * Set to a known state:
  276          * Set by mpboot.s: CR0_PG, CR0_PE
  277          * Set by cpu_setregs: CR0_NE, CR0_MP, CR0_TS, CR0_WP, CR0_AM
  278          */
  279         cr0 = rcr0();
  280         cr0 &= ~(CR0_CD | CR0_NW | CR0_EM);
  281         load_cr0(cr0);
  282         CHECK_WRITE(0x38, 5);
  283         
  284         /* signal our startup to the BSP. */
  285         mp_naps++;
  286         CHECK_WRITE(0x39, 6);
  287 
  288         /* Spin until the BSP releases the AP's. */
  289         while (atomic_load_acq_int(&aps_ready) == 0)
  290                 ia32_pause();
  291 
  292         /* BSP may have changed PTD while we were waiting */
  293         invltlb();
  294         for (addr = 0; addr < NKPT * NBPDR - 1; addr += PAGE_SIZE)
  295                 invlpg(addr);
  296 
  297 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
  298         lidt(&r_idt);
  299 #endif
  300 
  301         init_secondary_tail();
  302 }
  303 
  304 /*
  305  * start each AP in our list
  306  */
  307 /* Lowest 1MB is already mapped: don't touch*/
  308 #define TMPMAP_START 1
  309 static int
  310 start_all_aps(void)
  311 {
  312 #ifndef PC98
  313         u_char mpbiosreason;
  314 #endif
  315         u_int32_t mpbioswarmvec;
  316         int apic_id, cpu, i;
  317 
  318         mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
  319 
  320         /* install the AP 1st level boot code */
  321         install_ap_tramp();
  322 
  323         /* save the current value of the warm-start vector */
  324         mpbioswarmvec = *((u_int32_t *) WARMBOOT_OFF);
  325 #ifndef PC98
  326         outb(CMOS_REG, BIOS_RESET);
  327         mpbiosreason = inb(CMOS_DATA);
  328 #endif
  329 
  330         /* set up temporary P==V mapping for AP boot */
  331         /* XXX this is a hack, we should boot the AP on its own stack/PTD */
  332         for (i = TMPMAP_START; i < NKPT; i++)
  333                 PTD[i] = PTD[KPTDI + i];
  334         invltlb();
  335 
  336         /* start each AP */
  337         for (cpu = 1; cpu < mp_ncpus; cpu++) {
  338                 apic_id = cpu_apic_ids[cpu];
  339 
  340                 /* allocate and set up a boot stack data page */
  341                 bootstacks[cpu] =
  342                     (char *)kmem_malloc(kernel_arena, kstack_pages * PAGE_SIZE,
  343                     M_WAITOK | M_ZERO);
  344                 dpcpu = (void *)kmem_malloc(kernel_arena, DPCPU_SIZE,
  345                     M_WAITOK | M_ZERO);
  346                 /* setup a vector to our boot code */
  347                 *((volatile u_short *) WARMBOOT_OFF) = WARMBOOT_TARGET;
  348                 *((volatile u_short *) WARMBOOT_SEG) = (boot_address >> 4);
  349 #ifndef PC98
  350                 outb(CMOS_REG, BIOS_RESET);
  351                 outb(CMOS_DATA, BIOS_WARM);     /* 'warm-start' */
  352 #endif
  353 
  354                 bootSTK = (char *)bootstacks[cpu] + kstack_pages *
  355                     PAGE_SIZE - 4;
  356                 bootAP = cpu;
  357 
  358                 /* attempt to start the Application Processor */
  359                 CHECK_INIT(99); /* setup checkpoints */
  360                 if (!start_ap(apic_id)) {
  361                         printf("AP #%d (PHY# %d) failed!\n", cpu, apic_id);
  362                         CHECK_PRINT("trace");   /* show checkpoints */
  363                         /* better panic as the AP may be running loose */
  364                         printf("panic y/n? [y] ");
  365                         if (cngetc() != 'n')
  366                                 panic("bye-bye");
  367                 }
  368                 CHECK_PRINT("trace");           /* show checkpoints */
  369 
  370                 CPU_SET(cpu, &all_cpus);        /* record AP in CPU map */
  371         }
  372 
  373         /* restore the warmstart vector */
  374         *(u_int32_t *) WARMBOOT_OFF = mpbioswarmvec;
  375 
  376 #ifndef PC98
  377         outb(CMOS_REG, BIOS_RESET);
  378         outb(CMOS_DATA, mpbiosreason);
  379 #endif
  380 
  381         /* Undo V==P hack from above */
  382         for (i = TMPMAP_START; i < NKPT; i++)
  383                 PTD[i] = 0;
  384         pmap_invalidate_range(kernel_pmap, 0, NKPT * NBPDR - 1);
  385 
  386         /* number of APs actually started */
  387         return mp_naps;
  388 }
  389 
  390 /*
  391  * load the 1st level AP boot code into base memory.
  392  */
  393 
  394 /* targets for relocation */
  395 extern void bigJump(void);
  396 extern void bootCodeSeg(void);
  397 extern void bootDataSeg(void);
  398 extern void MPentry(void);
  399 extern u_int MP_GDT;
  400 extern u_int mp_gdtbase;
  401 
  402 static void
  403 install_ap_tramp(void)
  404 {
  405         int     x;
  406         int     size = *(int *) ((u_long) & bootMP_size);
  407         vm_offset_t va = boot_address + KERNBASE;
  408         u_char *src = (u_char *) ((u_long) bootMP);
  409         u_char *dst = (u_char *) va;
  410         u_int   boot_base = (u_int) bootMP;
  411         u_int8_t *dst8;
  412         u_int16_t *dst16;
  413         u_int32_t *dst32;
  414 
  415         KASSERT (size <= PAGE_SIZE,
  416             ("'size' do not fit into PAGE_SIZE, as expected."));
  417         pmap_kenter(va, boot_address);
  418         pmap_invalidate_page (kernel_pmap, va);
  419         for (x = 0; x < size; ++x)
  420                 *dst++ = *src++;
  421 
  422         /*
  423          * modify addresses in code we just moved to basemem. unfortunately we
  424          * need fairly detailed info about mpboot.s for this to work.  changes
  425          * to mpboot.s might require changes here.
  426          */
  427 
  428         /* boot code is located in KERNEL space */
  429         dst = (u_char *) va;
  430 
  431         /* modify the lgdt arg */
  432         dst32 = (u_int32_t *) (dst + ((u_int) & mp_gdtbase - boot_base));
  433         *dst32 = boot_address + ((u_int) & MP_GDT - boot_base);
  434 
  435         /* modify the ljmp target for MPentry() */
  436         dst32 = (u_int32_t *) (dst + ((u_int) bigJump - boot_base) + 1);
  437         *dst32 = ((u_int) MPentry - KERNBASE);
  438 
  439         /* modify the target for boot code segment */
  440         dst16 = (u_int16_t *) (dst + ((u_int) bootCodeSeg - boot_base));
  441         dst8 = (u_int8_t *) (dst16 + 1);
  442         *dst16 = (u_int) boot_address & 0xffff;
  443         *dst8 = ((u_int) boot_address >> 16) & 0xff;
  444 
  445         /* modify the target for boot data segment */
  446         dst16 = (u_int16_t *) (dst + ((u_int) bootDataSeg - boot_base));
  447         dst8 = (u_int8_t *) (dst16 + 1);
  448         *dst16 = (u_int) boot_address & 0xffff;
  449         *dst8 = ((u_int) boot_address >> 16) & 0xff;
  450 }
  451 
  452 /*
  453  * This function starts the AP (application processor) identified
  454  * by the APIC ID 'physicalCpu'.  It does quite a "song and dance"
  455  * to accomplish this.  This is necessary because of the nuances
  456  * of the different hardware we might encounter.  It isn't pretty,
  457  * but it seems to work.
  458  */
  459 static int
  460 start_ap(int apic_id)
  461 {
  462         int vector, ms;
  463         int cpus;
  464 
  465         /* calculate the vector */
  466         vector = (boot_address >> 12) & 0xff;
  467 
  468         /* used as a watchpoint to signal AP startup */
  469         cpus = mp_naps;
  470 
  471         ipi_startup(apic_id, vector);
  472 
  473         /* Wait up to 5 seconds for it to start. */
  474         for (ms = 0; ms < 5000; ms++) {
  475                 if (mp_naps > cpus)
  476                         return 1;       /* return SUCCESS */
  477                 DELAY(1000);
  478         }
  479         return 0;               /* return FAILURE */
  480 }

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