1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 1996, by Steve Passe
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. The name of the developer may NOT be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 #include "opt_acpi.h"
32 #include "opt_apic.h"
33 #include "opt_cpu.h"
34 #include "opt_kstack_pages.h"
35 #include "opt_pmap.h"
36 #include "opt_sched.h"
37 #include "opt_smp.h"
38
39 #if !defined(lint)
40 #if !defined(SMP)
41 #error How did you get here?
42 #endif
43
44 #ifndef DEV_APIC
45 #error The apic device is required for SMP, add "device apic" to your config file.
46 #endif
47 #endif /* not lint */
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/bus.h>
52 #include <sys/cons.h> /* cngetc() */
53 #include <sys/cpuset.h>
54 #ifdef GPROF
55 #include <sys/gmon.h>
56 #endif
57 #include <sys/kernel.h>
58 #include <sys/ktr.h>
59 #include <sys/lock.h>
60 #include <sys/malloc.h>
61 #include <sys/memrange.h>
62 #include <sys/mutex.h>
63 #include <sys/pcpu.h>
64 #include <sys/proc.h>
65 #include <sys/sched.h>
66 #include <sys/smp.h>
67 #include <sys/sysctl.h>
68
69 #include <vm/vm.h>
70 #include <vm/vm_param.h>
71 #include <vm/pmap.h>
72 #include <vm/vm_kern.h>
73 #include <vm/vm_extern.h>
74
75 #include <x86/apicreg.h>
76 #include <machine/clock.h>
77 #include <machine/cpu.h>
78 #include <machine/cputypes.h>
79 #include <x86/mca.h>
80 #include <machine/md_var.h>
81 #include <machine/pcb.h>
82 #include <machine/psl.h>
83 #include <machine/smp.h>
84 #include <machine/specialreg.h>
85 #include <x86/ucode.h>
86
87 #ifdef DEV_ACPI
88 #include <contrib/dev/acpica/include/acpi.h>
89 #include <dev/acpica/acpivar.h>
90 #endif
91
92 #define WARMBOOT_TARGET 0
93 #define WARMBOOT_OFF (PMAP_MAP_LOW + 0x0467)
94 #define WARMBOOT_SEG (PMAP_MAP_LOW + 0x0469)
95
96 #define CMOS_REG (0x70)
97 #define CMOS_DATA (0x71)
98 #define BIOS_RESET (0x0f)
99 #define BIOS_WARM (0x0a)
100
101 /*
102 * this code MUST be enabled here and in mpboot.s.
103 * it follows the very early stages of AP boot by placing values in CMOS ram.
104 * it NORMALLY will never be needed and thus the primitive method for enabling.
105 *
106 #define CHECK_POINTS
107 */
108
109 #if defined(CHECK_POINTS)
110 #define CHECK_READ(A) (outb(CMOS_REG, (A)), inb(CMOS_DATA))
111 #define CHECK_WRITE(A,D) (outb(CMOS_REG, (A)), outb(CMOS_DATA, (D)))
112
113 #define CHECK_INIT(D); \
114 CHECK_WRITE(0x34, (D)); \
115 CHECK_WRITE(0x35, (D)); \
116 CHECK_WRITE(0x36, (D)); \
117 CHECK_WRITE(0x37, (D)); \
118 CHECK_WRITE(0x38, (D)); \
119 CHECK_WRITE(0x39, (D));
120
121 #define CHECK_PRINT(S); \
122 printf("%s: %d, %d, %d, %d, %d, %d\n", \
123 (S), \
124 CHECK_READ(0x34), \
125 CHECK_READ(0x35), \
126 CHECK_READ(0x36), \
127 CHECK_READ(0x37), \
128 CHECK_READ(0x38), \
129 CHECK_READ(0x39));
130
131 #else /* CHECK_POINTS */
132
133 #define CHECK_INIT(D)
134 #define CHECK_PRINT(S)
135 #define CHECK_WRITE(A, D)
136
137 #endif /* CHECK_POINTS */
138
139 /*
140 * Local data and functions.
141 */
142
143 static void install_ap_tramp(void);
144 static int start_all_aps(void);
145 static int start_ap(int apic_id);
146
147 static char *ap_copyout_buf;
148 static char *ap_tramp_stack_base;
149 /*
150 * Initialize the IPI handlers and start up the AP's.
151 */
152 void
153 cpu_mp_start(void)
154 {
155 int i;
156
157 /* Initialize the logical ID to APIC ID table. */
158 for (i = 0; i < MAXCPU; i++) {
159 cpu_apic_ids[i] = -1;
160 cpu_ipi_pending[i] = 0;
161 }
162
163 /* Install an inter-CPU IPI for TLB invalidation */
164 setidt(IPI_INVLTLB, IDTVEC(invltlb),
165 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
166 setidt(IPI_INVLPG, IDTVEC(invlpg),
167 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
168 setidt(IPI_INVLRNG, IDTVEC(invlrng),
169 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
170
171 /* Install an inter-CPU IPI for cache invalidation. */
172 setidt(IPI_INVLCACHE, IDTVEC(invlcache),
173 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
174
175 /* Install an inter-CPU IPI for all-CPU rendezvous */
176 setidt(IPI_RENDEZVOUS, IDTVEC(rendezvous),
177 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
178
179 /* Install generic inter-CPU IPI handler */
180 setidt(IPI_BITMAP_VECTOR, IDTVEC(ipi_intr_bitmap_handler),
181 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
182
183 /* Install an inter-CPU IPI for CPU stop/restart */
184 setidt(IPI_STOP, IDTVEC(cpustop),
185 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
186
187 /* Install an inter-CPU IPI for CPU suspend/resume */
188 setidt(IPI_SUSPEND, IDTVEC(cpususpend),
189 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
190
191 /* Install an IPI for calling delayed SWI */
192 setidt(IPI_SWI, IDTVEC(ipi_swi),
193 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
194
195 /* Set boot_cpu_id if needed. */
196 if (boot_cpu_id == -1) {
197 boot_cpu_id = PCPU_GET(apic_id);
198 cpu_info[boot_cpu_id].cpu_bsp = 1;
199 } else
200 KASSERT(boot_cpu_id == PCPU_GET(apic_id),
201 ("BSP's APIC ID doesn't match boot_cpu_id"));
202
203 /* Probe logical/physical core configuration. */
204 topo_probe();
205
206 assign_cpu_ids();
207
208 /* Start each Application Processor */
209 start_all_aps();
210
211 set_interrupt_apic_ids();
212
213 #if defined(DEV_ACPI) && MAXMEMDOM > 1
214 acpi_pxm_set_cpu_locality();
215 #endif
216 }
217
218 /*
219 * AP CPU's call this to initialize themselves.
220 */
221 void
222 init_secondary(void)
223 {
224 struct pcpu *pc;
225 struct i386tss *common_tssp;
226 struct region_descriptor r_gdt, r_idt;
227 int gsel_tss, myid, x;
228 u_int cr0;
229
230 /* bootAP is set in start_ap() to our ID. */
231 myid = bootAP;
232
233 /* Update microcode before doing anything else. */
234 ucode_load_ap(myid);
235
236 /* Get per-cpu data */
237 pc = &__pcpu[myid];
238
239 /* prime data page for it to use */
240 pcpu_init(pc, myid, sizeof(struct pcpu));
241 dpcpu_init(dpcpu, myid);
242 pc->pc_apic_id = cpu_apic_ids[myid];
243 pc->pc_prvspace = pc;
244 pc->pc_curthread = 0;
245 pc->pc_common_tssp = common_tssp = &(__pcpu[0].pc_common_tssp)[myid];
246
247 fix_cpuid();
248
249 gdt_segs[GPRIV_SEL].ssd_base = (int)pc;
250 gdt_segs[GPROC0_SEL].ssd_base = (int)common_tssp;
251 gdt_segs[GLDT_SEL].ssd_base = (int)ldt;
252
253 for (x = 0; x < NGDT; x++) {
254 ssdtosd(&gdt_segs[x], &gdt[myid * NGDT + x].sd);
255 }
256
257 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
258 r_gdt.rd_base = (int) &gdt[myid * NGDT];
259 lgdt(&r_gdt); /* does magic intra-segment return */
260
261 r_idt.rd_limit = sizeof(struct gate_descriptor) * NIDT - 1;
262 r_idt.rd_base = (int)idt;
263 lidt(&r_idt);
264
265 lldt(_default_ldt);
266 PCPU_SET(currentldt, _default_ldt);
267
268 PCPU_SET(trampstk, (uintptr_t)ap_tramp_stack_base + TRAMP_STACK_SZ -
269 VM86_STACK_SPACE);
270
271 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
272 gdt[myid * NGDT + GPROC0_SEL].sd.sd_type = SDT_SYS386TSS;
273 common_tssp->tss_esp0 = PCPU_GET(trampstk);
274 common_tssp->tss_ss0 = GSEL(GDATA_SEL, SEL_KPL);
275 common_tssp->tss_ioopt = sizeof(struct i386tss) << 16;
276 PCPU_SET(tss_gdt, &gdt[myid * NGDT + GPROC0_SEL].sd);
277 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
278 ltr(gsel_tss);
279
280 PCPU_SET(fsgs_gdt, &gdt[myid * NGDT + GUFS_SEL].sd);
281 PCPU_SET(copyout_buf, ap_copyout_buf);
282
283 /*
284 * Set to a known state:
285 * Set by mpboot.s: CR0_PG, CR0_PE
286 * Set by cpu_setregs: CR0_NE, CR0_MP, CR0_TS, CR0_WP, CR0_AM
287 */
288 cr0 = rcr0();
289 cr0 &= ~(CR0_CD | CR0_NW | CR0_EM);
290 load_cr0(cr0);
291 CHECK_WRITE(0x38, 5);
292
293 /* signal our startup to the BSP. */
294 mp_naps++;
295 CHECK_WRITE(0x39, 6);
296
297 /* Spin until the BSP releases the AP's. */
298 while (atomic_load_acq_int(&aps_ready) == 0)
299 ia32_pause();
300
301 /* BSP may have changed PTD while we were waiting */
302 invltlb();
303
304 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
305 lidt(&r_idt);
306 #endif
307
308 init_secondary_tail();
309 }
310
311 /*
312 * start each AP in our list
313 */
314 #define TMPMAP_START 1
315 static int
316 start_all_aps(void)
317 {
318 u_char mpbiosreason;
319 u_int32_t mpbioswarmvec;
320 int apic_id, cpu;
321
322 mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN);
323
324 /* Remap lowest 1MB */
325 IdlePTD[0] = IdlePTD[1];
326 load_cr3(rcr3()); /* invalidate TLB */
327
328 /* install the AP 1st level boot code */
329 install_ap_tramp();
330
331 /* save the current value of the warm-start vector */
332 mpbioswarmvec = *((u_int32_t *) WARMBOOT_OFF);
333 outb(CMOS_REG, BIOS_RESET);
334 mpbiosreason = inb(CMOS_DATA);
335
336 /* take advantage of the P==V mapping for PTD[0] for AP boot */
337
338 /* start each AP */
339 for (cpu = 1; cpu < mp_ncpus; cpu++) {
340 apic_id = cpu_apic_ids[cpu];
341
342 /* allocate and set up a boot stack data page */
343 bootstacks[cpu] = (char *)kmem_malloc(kstack_pages * PAGE_SIZE,
344 M_WAITOK | M_ZERO);
345 dpcpu = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | M_ZERO);
346 /* setup a vector to our boot code */
347 *((volatile u_short *) WARMBOOT_OFF) = WARMBOOT_TARGET;
348 *((volatile u_short *) WARMBOOT_SEG) = (boot_address >> 4);
349 outb(CMOS_REG, BIOS_RESET);
350 outb(CMOS_DATA, BIOS_WARM); /* 'warm-start' */
351
352 bootSTK = (char *)bootstacks[cpu] + kstack_pages *
353 PAGE_SIZE - 4;
354 bootAP = cpu;
355
356 ap_tramp_stack_base = pmap_trm_alloc(TRAMP_STACK_SZ, M_NOWAIT);
357 ap_copyout_buf = pmap_trm_alloc(TRAMP_COPYOUT_SZ, M_NOWAIT);
358
359 /* attempt to start the Application Processor */
360 CHECK_INIT(99); /* setup checkpoints */
361 if (!start_ap(apic_id)) {
362 printf("AP #%d (PHY# %d) failed!\n", cpu, apic_id);
363 CHECK_PRINT("trace"); /* show checkpoints */
364 /* better panic as the AP may be running loose */
365 printf("panic y/n? [y] ");
366 if (cngetc() != 'n')
367 panic("bye-bye");
368 }
369 CHECK_PRINT("trace"); /* show checkpoints */
370
371 CPU_SET(cpu, &all_cpus); /* record AP in CPU map */
372 }
373
374 /* Unmap lowest 1MB again */
375 IdlePTD[0] = 0;
376 load_cr3(rcr3());
377
378 /* restore the warmstart vector */
379 *(u_int32_t *) WARMBOOT_OFF = mpbioswarmvec;
380
381 outb(CMOS_REG, BIOS_RESET);
382 outb(CMOS_DATA, mpbiosreason);
383
384 /* number of APs actually started */
385 return mp_naps;
386 }
387
388 /*
389 * load the 1st level AP boot code into base memory.
390 */
391
392 /* targets for relocation */
393 extern void bigJump(void);
394 extern void bootCodeSeg(void);
395 extern void bootDataSeg(void);
396 extern void MPentry(void);
397 extern u_int MP_GDT;
398 extern u_int mp_gdtbase;
399
400 static void
401 install_ap_tramp(void)
402 {
403 int x;
404 int size = *(int *) ((u_long) & bootMP_size);
405 vm_offset_t va = boot_address;
406 u_char *src = (u_char *) ((u_long) bootMP);
407 u_char *dst = (u_char *) va;
408 u_int boot_base = (u_int) bootMP;
409 u_int8_t *dst8;
410 u_int16_t *dst16;
411 u_int32_t *dst32;
412
413 KASSERT (size <= PAGE_SIZE,
414 ("'size' do not fit into PAGE_SIZE, as expected."));
415 pmap_kenter(va, boot_address);
416 pmap_invalidate_page (kernel_pmap, va);
417 for (x = 0; x < size; ++x)
418 *dst++ = *src++;
419
420 /*
421 * modify addresses in code we just moved to basemem. unfortunately we
422 * need fairly detailed info about mpboot.s for this to work. changes
423 * to mpboot.s might require changes here.
424 */
425
426 /* boot code is located in KERNEL space */
427 dst = (u_char *) va;
428
429 /* modify the lgdt arg */
430 dst32 = (u_int32_t *) (dst + ((u_int) & mp_gdtbase - boot_base));
431 *dst32 = boot_address + ((u_int) & MP_GDT - boot_base);
432
433 /* modify the ljmp target for MPentry() */
434 dst32 = (u_int32_t *) (dst + ((u_int) bigJump - boot_base) + 1);
435 *dst32 = (u_int)MPentry;
436
437 /* modify the target for boot code segment */
438 dst16 = (u_int16_t *) (dst + ((u_int) bootCodeSeg - boot_base));
439 dst8 = (u_int8_t *) (dst16 + 1);
440 *dst16 = (u_int) boot_address & 0xffff;
441 *dst8 = ((u_int) boot_address >> 16) & 0xff;
442
443 /* modify the target for boot data segment */
444 dst16 = (u_int16_t *) (dst + ((u_int) bootDataSeg - boot_base));
445 dst8 = (u_int8_t *) (dst16 + 1);
446 *dst16 = (u_int) boot_address & 0xffff;
447 *dst8 = ((u_int) boot_address >> 16) & 0xff;
448 }
449
450 /*
451 * This function starts the AP (application processor) identified
452 * by the APIC ID 'physicalCpu'. It does quite a "song and dance"
453 * to accomplish this. This is necessary because of the nuances
454 * of the different hardware we might encounter. It isn't pretty,
455 * but it seems to work.
456 */
457 static int
458 start_ap(int apic_id)
459 {
460 int vector, ms;
461 int cpus;
462
463 /* calculate the vector */
464 vector = (boot_address >> 12) & 0xff;
465
466 /* used as a watchpoint to signal AP startup */
467 cpus = mp_naps;
468
469 ipi_startup(apic_id, vector);
470
471 /* Wait up to 5 seconds for it to start. */
472 for (ms = 0; ms < 5000; ms++) {
473 if (mp_naps > cpus)
474 return 1; /* return SUCCESS */
475 DELAY(1000);
476 }
477 return 0; /* return FAILURE */
478 }
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