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sys/i386/i386/pmap.c
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1 /*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * Copyright (c) 1994 John S. Dyson 5 * All rights reserved. 6 * Copyright (c) 1994 David Greenman 7 * All rights reserved. 8 * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu> 9 * All rights reserved. 10 * 11 * This code is derived from software contributed to Berkeley by 12 * the Systems Programming Group of the University of Utah Computer 13 * Science Department and William Jolitz of UUNET Technologies Inc. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the University of 26 * California, Berkeley and its contributors. 27 * 4. Neither the name of the University nor the names of its contributors 28 * may be used to endorse or promote products derived from this software 29 * without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41 * SUCH DAMAGE. 42 * 43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 44 */ 45 /*- 46 * Copyright (c) 2003 Networks Associates Technology, Inc. 47 * All rights reserved. 48 * 49 * This software was developed for the FreeBSD Project by Jake Burkholder, 50 * Safeport Network Services, and Network Associates Laboratories, the 51 * Security Research Division of Network Associates, Inc. under 52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 53 * CHATS research program. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74 * SUCH DAMAGE. 75 */ 76 77 #include <sys/cdefs.h> 78 __FBSDID("$FreeBSD: releng/6.4/sys/i386/i386/pmap.c 183313 2008-09-23 18:33:36Z jhb $"); 79 80 /* 81 * Manages physical address maps. 82 * 83 * In addition to hardware address maps, this 84 * module is called upon to provide software-use-only 85 * maps which may or may not be stored in the same 86 * form as hardware maps. These pseudo-maps are 87 * used to store intermediate results from copy 88 * operations to and from address spaces. 89 * 90 * Since the information managed by this module is 91 * also stored by the logical address mapping module, 92 * this module may throw away valid virtual-to-physical 93 * mappings at almost any time. However, invalidations 94 * of virtual-to-physical mappings must be done as 95 * requested. 96 * 97 * In order to cope with hardware architectures which 98 * make virtual-to-physical map invalidates expensive, 99 * this module may delay invalidate or reduced protection 100 * operations until such time as they are actually 101 * necessary. This module is given full information as 102 * to which processors are currently using which maps, 103 * and to when physical maps must be made correct. 104 */ 105 106 #include "opt_cpu.h" 107 #include "opt_pmap.h" 108 #include "opt_msgbuf.h" 109 #include "opt_xbox.h" 110 111 #include <sys/param.h> 112 #include <sys/systm.h> 113 #include <sys/kernel.h> 114 #include <sys/lock.h> 115 #include <sys/malloc.h> 116 #include <sys/mman.h> 117 #include <sys/msgbuf.h> 118 #include <sys/mutex.h> 119 #include <sys/proc.h> 120 #include <sys/sx.h> 121 #include <sys/vmmeter.h> 122 #include <sys/sched.h> 123 #include <sys/sysctl.h> 124 #ifdef SMP 125 #include <sys/smp.h> 126 #endif 127 128 #ifdef XBOX 129 #include <machine/xbox.h> 130 #endif 131 132 #include <vm/vm.h> 133 #include <vm/vm_param.h> 134 #include <vm/vm_kern.h> 135 #include <vm/vm_page.h> 136 #include <vm/vm_map.h> 137 #include <vm/vm_object.h> 138 #include <vm/vm_extern.h> 139 #include <vm/vm_pageout.h> 140 #include <vm/vm_pager.h> 141 #include <vm/uma.h> 142 143 #include <machine/cpu.h> 144 #include <machine/cputypes.h> 145 #include <machine/md_var.h> 146 #include <machine/pcb.h> 147 #include <machine/specialreg.h> 148 #ifdef SMP 149 #include <machine/smp.h> 150 #endif 151 152 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 153 #define CPU_ENABLE_SSE 154 #endif 155 156 #ifndef PMAP_SHPGPERPROC 157 #define PMAP_SHPGPERPROC 200 158 #endif 159 160 #if defined(DIAGNOSTIC) 161 #define PMAP_DIAGNOSTIC 162 #endif 163 164 #if !defined(PMAP_DIAGNOSTIC) 165 #define PMAP_INLINE __inline 166 #else 167 #define PMAP_INLINE 168 #endif 169 170 /* 171 * Get PDEs and PTEs for user/kernel address space 172 */ 173 #define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 174 #define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 175 176 #define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 177 #define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 178 #define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 179 #define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 180 #define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 181 182 #define pmap_pte_set_w(pte, v) ((v) ? atomic_set_int((u_int *)(pte), PG_W) : \ 183 atomic_clear_int((u_int *)(pte), PG_W)) 184 #define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 185 186 struct pmap kernel_pmap_store; 187 LIST_HEAD(pmaplist, pmap); 188 static struct pmaplist allpmaps; 189 static struct mtx allpmaps_lock; 190 191 vm_paddr_t avail_end; /* PA of last available physical page */ 192 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 193 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 194 int pgeflag = 0; /* PG_G or-in */ 195 int pseflag = 0; /* PG_PS or-in */ 196 197 static int nkpt; 198 vm_offset_t kernel_vm_end; 199 extern u_int32_t KERNend; 200 201 #ifdef PAE 202 static uma_zone_t pdptzone; 203 #endif 204 205 /* 206 * Data for the pv entry allocation mechanism 207 */ 208 static uma_zone_t pvzone; 209 static struct vm_object pvzone_obj; 210 static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 211 int pmap_pagedaemon_waken; 212 213 /* 214 * All those kernel PT submaps that BSD is so fond of 215 */ 216 struct sysmaps { 217 struct mtx lock; 218 pt_entry_t *CMAP1; 219 pt_entry_t *CMAP2; 220 caddr_t CADDR1; 221 caddr_t CADDR2; 222 }; 223 static struct sysmaps sysmaps_pcpu[MAXCPU]; 224 pt_entry_t *CMAP1 = 0; 225 static pt_entry_t *CMAP3; 226 caddr_t CADDR1 = 0, ptvmmap = 0; 227 static caddr_t CADDR3; 228 struct msgbuf *msgbufp = 0; 229 230 /* 231 * Crashdump maps. 232 */ 233 static caddr_t crashdumpmap; 234 235 static pt_entry_t *PMAP1 = 0, *PMAP2; 236 static pt_entry_t *PADDR1 = 0, *PADDR2; 237 #ifdef SMP 238 static int PMAP1cpu; 239 static int PMAP1changedcpu; 240 SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 241 &PMAP1changedcpu, 0, 242 "Number of times pmap_pte_quick changed CPU with same PMAP1"); 243 #endif 244 static int PMAP1changed; 245 SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 246 &PMAP1changed, 0, 247 "Number of times pmap_pte_quick changed PMAP1"); 248 static int PMAP1unchanged; 249 SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 250 &PMAP1unchanged, 0, 251 "Number of times pmap_pte_quick didn't change PMAP1"); 252 static struct mtx PMAP2mutex; 253 254 static PMAP_INLINE void free_pv_entry(pv_entry_t pv); 255 static pv_entry_t get_pv_entry(void); 256 static void pmap_clear_ptes(vm_page_t m, int bit); 257 258 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, 259 vm_page_t m, vm_prot_t prot, vm_page_t mpte); 260 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, 261 vm_page_t *free); 262 static void pmap_remove_page(struct pmap *pmap, vm_offset_t va); 263 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m, 264 vm_offset_t va); 265 static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m); 266 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, 267 vm_page_t m); 268 269 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 270 271 static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 272 static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free); 273 static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 274 static void pmap_pte_release(pt_entry_t *pte); 275 static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *); 276 static vm_offset_t pmap_kmem_choose(vm_offset_t addr); 277 #ifdef PAE 278 static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 279 #endif 280 281 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 282 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 283 284 /* 285 * If you get an error here, then you set KVA_PAGES wrong! See the 286 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be 287 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE. 288 */ 289 CTASSERT(KERNBASE % (1 << 24) == 0); 290 291 /* 292 * Move the kernel virtual free pointer to the next 293 * 4MB. This is used to help improve performance 294 * by using a large (4MB) page for much of the kernel 295 * (.text, .data, .bss) 296 */ 297 static vm_offset_t 298 pmap_kmem_choose(vm_offset_t addr) 299 { 300 vm_offset_t newaddr = addr; 301 302 #ifndef DISABLE_PSE 303 if (cpu_feature & CPUID_PSE) 304 newaddr = (addr + PDRMASK) & ~PDRMASK; 305 #endif 306 return newaddr; 307 } 308 309 /* 310 * Bootstrap the system enough to run with virtual memory. 311 * 312 * On the i386 this is called after mapping has already been enabled 313 * and just syncs the pmap module with what has already been done. 314 * [We can't call it easily with mapping off since the kernel is not 315 * mapped with PA == VA, hence we would have to relocate every address 316 * from the linked base (virtual) address "KERNBASE" to the actual 317 * (physical) address starting relative to 0] 318 */ 319 void 320 pmap_bootstrap(firstaddr, loadaddr) 321 vm_paddr_t firstaddr; 322 vm_paddr_t loadaddr; 323 { 324 vm_offset_t va; 325 pt_entry_t *pte, *unused; 326 struct sysmaps *sysmaps; 327 int i; 328 329 /* 330 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 331 * large. It should instead be correctly calculated in locore.s and 332 * not based on 'first' (which is a physical address, not a virtual 333 * address, for the start of unused physical memory). The kernel 334 * page tables are NOT double mapped and thus should not be included 335 * in this calculation. 336 */ 337 virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 338 virtual_avail = pmap_kmem_choose(virtual_avail); 339 340 virtual_end = VM_MAX_KERNEL_ADDRESS; 341 342 /* 343 * Initialize the kernel pmap (which is statically allocated). 344 */ 345 PMAP_LOCK_INIT(kernel_pmap); 346 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 347 #ifdef PAE 348 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 349 #endif 350 kernel_pmap->pm_active = -1; /* don't allow deactivation */ 351 TAILQ_INIT(&kernel_pmap->pm_pvlist); 352 LIST_INIT(&allpmaps); 353 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 354 mtx_lock_spin(&allpmaps_lock); 355 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 356 mtx_unlock_spin(&allpmaps_lock); 357 nkpt = NKPT; 358 359 /* 360 * Reserve some special page table entries/VA space for temporary 361 * mapping of pages. 362 */ 363 #define SYSMAP(c, p, v, n) \ 364 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 365 366 va = virtual_avail; 367 pte = vtopte(va); 368 369 /* 370 * CMAP1/CMAP2 are used for zeroing and copying pages. 371 * CMAP3 is used for the idle process page zeroing. 372 */ 373 for (i = 0; i < MAXCPU; i++) { 374 sysmaps = &sysmaps_pcpu[i]; 375 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 376 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 377 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 378 } 379 SYSMAP(caddr_t, CMAP1, CADDR1, 1) 380 SYSMAP(caddr_t, CMAP3, CADDR3, 1) 381 *CMAP3 = 0; 382 383 /* 384 * Crashdump maps. 385 */ 386 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 387 388 /* 389 * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 390 */ 391 SYSMAP(caddr_t, unused, ptvmmap, 1) 392 393 /* 394 * msgbufp is used to map the system message buffer. 395 */ 396 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 397 398 /* 399 * ptemap is used for pmap_pte_quick 400 */ 401 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 402 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 403 404 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 405 406 virtual_avail = va; 407 408 *CMAP1 = 0; 409 410 #ifdef XBOX 411 /* FIXME: This is gross, but needed for the XBOX. Since we are in such 412 * an early stadium, we cannot yet neatly map video memory ... :-( 413 * Better fixes are very welcome! 414 */ 415 if (!arch_i386_is_xbox) 416 #endif 417 for (i = 0; i < NKPT; i++) 418 PTD[i] = 0; 419 420 /* Initialize the PAT MSR if present. */ 421 pmap_init_pat(); 422 423 /* Turn on PG_G on kernel page(s) */ 424 pmap_set_pg(); 425 } 426 427 /* 428 * Setup the PAT MSR. 429 */ 430 void 431 pmap_init_pat(void) 432 { 433 uint64_t pat_msr; 434 435 /* Bail if this CPU doesn't implement PAT. */ 436 if (!(cpu_feature & CPUID_PAT)) 437 return; 438 439 #ifdef PAT_WORKS 440 /* 441 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-. 442 * Program 4 and 5 as WP and WC. 443 * Leave 6 and 7 as UC and UC-. 444 */ 445 pat_msr = rdmsr(MSR_PAT); 446 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5)); 447 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) | 448 PAT_VALUE(5, PAT_WRITE_COMBINING); 449 #else 450 /* 451 * Due to some Intel errata, we can only safely use the lower 4 452 * PAT entries. Thus, just replace PAT Index 2 with WC instead 453 * of UC-. 454 * 455 * Intel Pentium III Processor Specification Update 456 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B 457 * or Mode C Paging) 458 * 459 * Intel Pentium IV Processor Specification Update 460 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly) 461 */ 462 pat_msr = rdmsr(MSR_PAT); 463 pat_msr &= ~PAT_MASK(2); 464 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING); 465 #endif 466 wrmsr(MSR_PAT, pat_msr); 467 } 468 469 /* 470 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on. 471 */ 472 void 473 pmap_set_pg(void) 474 { 475 pd_entry_t pdir; 476 pt_entry_t *pte; 477 vm_offset_t va, endva; 478 int i; 479 480 if (pgeflag == 0) 481 return; 482 483 i = KERNLOAD/NBPDR; 484 endva = KERNBASE + KERNend; 485 486 if (pseflag) { 487 va = KERNBASE + KERNLOAD; 488 while (va < endva) { 489 pdir = kernel_pmap->pm_pdir[KPTDI+i]; 490 pdir |= pgeflag; 491 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir; 492 invltlb(); /* Play it safe, invltlb() every time */ 493 i++; 494 va += NBPDR; 495 } 496 } else { 497 va = (vm_offset_t)btext; 498 while (va < endva) { 499 pte = vtopte(va); 500 if (*pte) 501 *pte |= pgeflag; 502 invltlb(); /* Play it safe, invltlb() every time */ 503 va += PAGE_SIZE; 504 } 505 } 506 } 507 508 /* 509 * Initialize a vm_page's machine-dependent fields. 510 */ 511 void 512 pmap_page_init(vm_page_t m) 513 { 514 515 TAILQ_INIT(&m->md.pv_list); 516 m->md.pv_list_count = 0; 517 } 518 519 #ifdef PAE 520 521 static MALLOC_DEFINE(M_PMAPPDPT, "pmap", "pmap pdpt"); 522 523 static void * 524 pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 525 { 526 *flags = UMA_SLAB_PRIV; 527 return (contigmalloc(PAGE_SIZE, M_PMAPPDPT, 0, 0x0ULL, 0xffffffffULL, 528 1, 0)); 529 } 530 #endif 531 532 /* 533 * Initialize the pmap module. 534 * Called by vm_init, to initialize any structures that the pmap 535 * system needs to map virtual memory. 536 */ 537 void 538 pmap_init(void) 539 { 540 int shpgperproc = PMAP_SHPGPERPROC; 541 542 /* 543 * Initialize the address space (zone) for the pv entries. Set a 544 * high water mark so that the system can recover from excessive 545 * numbers of pv entries. 546 */ 547 pvzone = uma_zcreate("PV ENTRY", sizeof(struct pv_entry), NULL, NULL, 548 NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE); 549 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 550 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count; 551 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 552 pv_entry_high_water = 9 * (pv_entry_max / 10); 553 uma_zone_set_obj(pvzone, &pvzone_obj, pv_entry_max); 554 555 #ifdef PAE 556 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 557 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 558 UMA_ZONE_VM | UMA_ZONE_NOFREE); 559 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 560 #endif 561 } 562 563 void 564 pmap_init2() 565 { 566 } 567 568 569 /*************************************************** 570 * Low level helper routines..... 571 ***************************************************/ 572 573 /* 574 * Determine the appropriate bits to set in a PTE or PDE for a specified 575 * caching mode. 576 */ 577 static int 578 pmap_cache_bits(int mode, boolean_t is_pde) 579 { 580 int pat_flag, pat_index, cache_bits; 581 582 /* The PAT bit is different for PTE's and PDE's. */ 583 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT; 584 585 /* If we don't support PAT, map extended modes to older ones. */ 586 if (!(cpu_feature & CPUID_PAT)) { 587 switch (mode) { 588 case PAT_UNCACHEABLE: 589 case PAT_WRITE_THROUGH: 590 case PAT_WRITE_BACK: 591 break; 592 case PAT_UNCACHED: 593 case PAT_WRITE_COMBINING: 594 case PAT_WRITE_PROTECTED: 595 mode = PAT_UNCACHEABLE; 596 break; 597 } 598 } 599 600 /* Map the caching mode to a PAT index. */ 601 switch (mode) { 602 #ifdef PAT_WORKS 603 case PAT_UNCACHEABLE: 604 pat_index = 3; 605 break; 606 case PAT_WRITE_THROUGH: 607 pat_index = 1; 608 break; 609 case PAT_WRITE_BACK: 610 pat_index = 0; 611 break; 612 case PAT_UNCACHED: 613 pat_index = 2; 614 break; 615 case PAT_WRITE_COMBINING: 616 pat_index = 5; 617 break; 618 case PAT_WRITE_PROTECTED: 619 pat_index = 4; 620 break; 621 #else 622 case PAT_UNCACHED: 623 case PAT_UNCACHEABLE: 624 case PAT_WRITE_PROTECTED: 625 pat_index = 3; 626 break; 627 case PAT_WRITE_THROUGH: 628 pat_index = 1; 629 break; 630 case PAT_WRITE_BACK: 631 pat_index = 0; 632 break; 633 case PAT_WRITE_COMBINING: 634 pat_index = 2; 635 break; 636 #endif 637 default: 638 panic("Unknown caching mode %d\n", mode); 639 } 640 641 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */ 642 cache_bits = 0; 643 if (pat_index & 0x4) 644 cache_bits |= pat_flag; 645 if (pat_index & 0x2) 646 cache_bits |= PG_NC_PCD; 647 if (pat_index & 0x1) 648 cache_bits |= PG_NC_PWT; 649 return (cache_bits); 650 } 651 #ifdef SMP 652 /* 653 * For SMP, these functions have to use the IPI mechanism for coherence. 654 * 655 * N.B.: Before calling any of the following TLB invalidation functions, 656 * the calling processor must ensure that all stores updating a non- 657 * kernel page table are globally performed. Otherwise, another 658 * processor could cache an old, pre-update entry without being 659 * invalidated. This can happen one of two ways: (1) The pmap becomes 660 * active on another processor after its pm_active field is checked by 661 * one of the following functions but before a store updating the page 662 * table is globally performed. (2) The pmap becomes active on another 663 * processor before its pm_active field is checked but due to 664 * speculative loads one of the following functions stills reads the 665 * pmap as inactive on the other processor. 666 * 667 * The kernel page table is exempt because its pm_active field is 668 * immutable. The kernel page table is always active on every 669 * processor. 670 */ 671 void 672 pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 673 { 674 u_int cpumask; 675 u_int other_cpus; 676 677 sched_pin(); 678 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 679 invlpg(va); 680 smp_invlpg(va); 681 } else { 682 cpumask = PCPU_GET(cpumask); 683 other_cpus = PCPU_GET(other_cpus); 684 if (pmap->pm_active & cpumask) 685 invlpg(va); 686 if (pmap->pm_active & other_cpus) 687 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 688 } 689 sched_unpin(); 690 } 691 692 void 693 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 694 { 695 u_int cpumask; 696 u_int other_cpus; 697 vm_offset_t addr; 698 699 sched_pin(); 700 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 701 for (addr = sva; addr < eva; addr += PAGE_SIZE) 702 invlpg(addr); 703 smp_invlpg_range(sva, eva); 704 } else { 705 cpumask = PCPU_GET(cpumask); 706 other_cpus = PCPU_GET(other_cpus); 707 if (pmap->pm_active & cpumask) 708 for (addr = sva; addr < eva; addr += PAGE_SIZE) 709 invlpg(addr); 710 if (pmap->pm_active & other_cpus) 711 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 712 sva, eva); 713 } 714 sched_unpin(); 715 } 716 717 void 718 pmap_invalidate_all(pmap_t pmap) 719 { 720 u_int cpumask; 721 u_int other_cpus; 722 723 sched_pin(); 724 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 725 invltlb(); 726 smp_invltlb(); 727 } else { 728 cpumask = PCPU_GET(cpumask); 729 other_cpus = PCPU_GET(other_cpus); 730 if (pmap->pm_active & cpumask) 731 invltlb(); 732 if (pmap->pm_active & other_cpus) 733 smp_masked_invltlb(pmap->pm_active & other_cpus); 734 } 735 sched_unpin(); 736 } 737 738 void 739 pmap_invalidate_cache(void) 740 { 741 742 sched_pin(); 743 wbinvd(); 744 smp_cache_flush(); 745 sched_unpin(); 746 } 747 #else /* !SMP */ 748 /* 749 * Normal, non-SMP, 486+ invalidation functions. 750 * We inline these within pmap.c for speed. 751 */ 752 PMAP_INLINE void 753 pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 754 { 755 756 if (pmap == kernel_pmap || pmap->pm_active) 757 invlpg(va); 758 } 759 760 PMAP_INLINE void 761 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 762 { 763 vm_offset_t addr; 764 765 if (pmap == kernel_pmap || pmap->pm_active) 766 for (addr = sva; addr < eva; addr += PAGE_SIZE) 767 invlpg(addr); 768 } 769 770 PMAP_INLINE void 771 pmap_invalidate_all(pmap_t pmap) 772 { 773 774 if (pmap == kernel_pmap || pmap->pm_active) 775 invltlb(); 776 } 777 778 PMAP_INLINE void 779 pmap_invalidate_cache(void) 780 { 781 782 wbinvd(); 783 } 784 #endif /* !SMP */ 785 786 /* 787 * Are we current address space or kernel? N.B. We return FALSE when 788 * a pmap's page table is in use because a kernel thread is borrowing 789 * it. The borrowed page table can change spontaneously, making any 790 * dependence on its continued use subject to a race condition. 791 */ 792 static __inline int 793 pmap_is_current(pmap_t pmap) 794 { 795 796 return (pmap == kernel_pmap || 797 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 798 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 799 } 800 801 /* 802 * If the given pmap is not the current or kernel pmap, the returned pte must 803 * be released by passing it to pmap_pte_release(). 804 */ 805 pt_entry_t * 806 pmap_pte(pmap_t pmap, vm_offset_t va) 807 { 808 pd_entry_t newpf; 809 pd_entry_t *pde; 810 811 pde = pmap_pde(pmap, va); 812 if (*pde & PG_PS) 813 return (pde); 814 if (*pde != 0) { 815 /* are we current address space or kernel? */ 816 if (pmap_is_current(pmap)) 817 return (vtopte(va)); 818 mtx_lock(&PMAP2mutex); 819 newpf = *pde & PG_FRAME; 820 if ((*PMAP2 & PG_FRAME) != newpf) { 821 *PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M; 822 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2); 823 } 824 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 825 } 826 return (0); 827 } 828 829 /* 830 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 831 * being NULL. 832 */ 833 static __inline void 834 pmap_pte_release(pt_entry_t *pte) 835 { 836 837 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) 838 mtx_unlock(&PMAP2mutex); 839 } 840 841 static __inline void 842 invlcaddr(void *caddr) 843 { 844 845 invlpg((u_int)caddr); 846 } 847 848 /* 849 * Super fast pmap_pte routine best used when scanning 850 * the pv lists. This eliminates many coarse-grained 851 * invltlb calls. Note that many of the pv list 852 * scans are across different pmaps. It is very wasteful 853 * to do an entire invltlb for checking a single mapping. 854 * 855 * If the given pmap is not the current pmap, vm_page_queue_mtx 856 * must be held and curthread pinned to a CPU. 857 */ 858 static pt_entry_t * 859 pmap_pte_quick(pmap_t pmap, vm_offset_t va) 860 { 861 pd_entry_t newpf; 862 pd_entry_t *pde; 863 864 pde = pmap_pde(pmap, va); 865 if (*pde & PG_PS) 866 return (pde); 867 if (*pde != 0) { 868 /* are we current address space or kernel? */ 869 if (pmap_is_current(pmap)) 870 return (vtopte(va)); 871 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 872 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 873 newpf = *pde & PG_FRAME; 874 if ((*PMAP1 & PG_FRAME) != newpf) { 875 *PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M; 876 #ifdef SMP 877 PMAP1cpu = PCPU_GET(cpuid); 878 #endif 879 invlcaddr(PADDR1); 880 PMAP1changed++; 881 } else 882 #ifdef SMP 883 if (PMAP1cpu != PCPU_GET(cpuid)) { 884 PMAP1cpu = PCPU_GET(cpuid); 885 invlcaddr(PADDR1); 886 PMAP1changedcpu++; 887 } else 888 #endif 889 PMAP1unchanged++; 890 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 891 } 892 return (0); 893 } 894 895 /* 896 * Routine: pmap_extract 897 * Function: 898 * Extract the physical page address associated 899 * with the given map/virtual_address pair. 900 */ 901 vm_paddr_t 902 pmap_extract(pmap_t pmap, vm_offset_t va) 903 { 904 vm_paddr_t rtval; 905 pt_entry_t *pte; 906 pd_entry_t pde; 907 908 rtval = 0; 909 PMAP_LOCK(pmap); 910 pde = pmap->pm_pdir[va >> PDRSHIFT]; 911 if (pde != 0) { 912 if ((pde & PG_PS) != 0) { 913 rtval = (pde & ~PDRMASK) | (va & PDRMASK); 914 PMAP_UNLOCK(pmap); 915 return rtval; 916 } 917 pte = pmap_pte(pmap, va); 918 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 919 pmap_pte_release(pte); 920 } 921 PMAP_UNLOCK(pmap); 922 return (rtval); 923 } 924 925 /* 926 * Routine: pmap_extract_and_hold 927 * Function: 928 * Atomically extract and hold the physical page 929 * with the given pmap and virtual address pair 930 * if that mapping permits the given protection. 931 */ 932 vm_page_t 933 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 934 { 935 pd_entry_t pde; 936 pt_entry_t pte; 937 vm_page_t m; 938 939 m = NULL; 940 vm_page_lock_queues(); 941 PMAP_LOCK(pmap); 942 pde = *pmap_pde(pmap, va); 943 if (pde != 0) { 944 if (pde & PG_PS) { 945 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 946 m = PHYS_TO_VM_PAGE((pde & ~PDRMASK) | 947 (va & PDRMASK)); 948 vm_page_hold(m); 949 } 950 } else { 951 sched_pin(); 952 pte = *pmap_pte_quick(pmap, va); 953 if (pte != 0 && 954 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 955 m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 956 vm_page_hold(m); 957 } 958 sched_unpin(); 959 } 960 } 961 vm_page_unlock_queues(); 962 PMAP_UNLOCK(pmap); 963 return (m); 964 } 965 966 /*************************************************** 967 * Low level mapping routines..... 968 ***************************************************/ 969 970 /* 971 * Add a wired page to the kva. 972 * Note: not SMP coherent. 973 */ 974 PMAP_INLINE void 975 pmap_kenter(vm_offset_t va, vm_paddr_t pa) 976 { 977 pt_entry_t *pte; 978 979 pte = vtopte(va); 980 pte_store(pte, pa | PG_RW | PG_V | pgeflag); 981 } 982 983 PMAP_INLINE void 984 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode) 985 { 986 pt_entry_t *pte; 987 988 pte = vtopte(va); 989 pte_store(pte, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0)); 990 } 991 992 /* 993 * Remove a page from the kernel pagetables. 994 * Note: not SMP coherent. 995 */ 996 PMAP_INLINE void 997 pmap_kremove(vm_offset_t va) 998 { 999 pt_entry_t *pte; 1000 1001 pte = vtopte(va); 1002 pte_clear(pte); 1003 } 1004 1005 /* 1006 * Used to map a range of physical addresses into kernel 1007 * virtual address space. 1008 * 1009 * The value passed in '*virt' is a suggested virtual address for 1010 * the mapping. Architectures which can support a direct-mapped 1011 * physical to virtual region can return the appropriate address 1012 * within that region, leaving '*virt' unchanged. Other 1013 * architectures should map the pages starting at '*virt' and 1014 * update '*virt' with the first usable address after the mapped 1015 * region. 1016 */ 1017 vm_offset_t 1018 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 1019 { 1020 vm_offset_t va, sva; 1021 1022 va = sva = *virt; 1023 while (start < end) { 1024 pmap_kenter(va, start); 1025 va += PAGE_SIZE; 1026 start += PAGE_SIZE; 1027 } 1028 pmap_invalidate_range(kernel_pmap, sva, va); 1029 *virt = va; 1030 return (sva); 1031 } 1032 1033 1034 /* 1035 * Add a list of wired pages to the kva 1036 * this routine is only used for temporary 1037 * kernel mappings that do not need to have 1038 * page modification or references recorded. 1039 * Note that old mappings are simply written 1040 * over. The page *must* be wired. 1041 * Note: SMP coherent. Uses a ranged shootdown IPI. 1042 */ 1043 void 1044 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) 1045 { 1046 pt_entry_t *endpte, oldpte, *pte; 1047 1048 oldpte = 0; 1049 pte = vtopte(sva); 1050 endpte = pte + count; 1051 while (pte < endpte) { 1052 oldpte |= *pte; 1053 pte_store(pte, VM_PAGE_TO_PHYS(*ma) | pgeflag | PG_RW | PG_V); 1054 pte++; 1055 ma++; 1056 } 1057 if ((oldpte & PG_V) != 0) 1058 pmap_invalidate_range(kernel_pmap, sva, sva + count * 1059 PAGE_SIZE); 1060 } 1061 1062 /* 1063 * This routine tears out page mappings from the 1064 * kernel -- it is meant only for temporary mappings. 1065 * Note: SMP coherent. Uses a ranged shootdown IPI. 1066 */ 1067 void 1068 pmap_qremove(vm_offset_t sva, int count) 1069 { 1070 vm_offset_t va; 1071 1072 va = sva; 1073 while (count-- > 0) { 1074 pmap_kremove(va); 1075 va += PAGE_SIZE; 1076 } 1077 pmap_invalidate_range(kernel_pmap, sva, va); 1078 } 1079 1080 /*************************************************** 1081 * Page table page management routines..... 1082 ***************************************************/ 1083 static PMAP_INLINE void 1084 pmap_free_zero_pages(vm_page_t free) 1085 { 1086 vm_page_t m; 1087 1088 while (free != NULL) { 1089 m = free; 1090 free = m->right; 1091 vm_page_free_zero(m); 1092 } 1093 } 1094 1095 /* 1096 * This routine unholds page table pages, and if the hold count 1097 * drops to zero, then it decrements the wire count. 1098 */ 1099 static PMAP_INLINE int 1100 pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1101 { 1102 1103 --m->wire_count; 1104 if (m->wire_count == 0) 1105 return _pmap_unwire_pte_hold(pmap, m, free); 1106 else 1107 return 0; 1108 } 1109 1110 static int 1111 _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1112 { 1113 vm_offset_t pteva; 1114 1115 /* 1116 * unmap the page table page 1117 */ 1118 pmap->pm_pdir[m->pindex] = 0; 1119 --pmap->pm_stats.resident_count; 1120 1121 /* 1122 * This is a release store so that the ordinary store unmapping 1123 * the page table page is globally performed before TLB shoot- 1124 * down is begun. 1125 */ 1126 atomic_subtract_rel_int(&cnt.v_wire_count, 1); 1127 1128 /* 1129 * Do an invltlb to make the invalidated mapping 1130 * take effect immediately. 1131 */ 1132 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1133 pmap_invalidate_page(pmap, pteva); 1134 1135 /* 1136 * Put page on a list so that it is released after 1137 * *ALL* TLB shootdown is done 1138 */ 1139 m->right = *free; 1140 *free = m; 1141 1142 return 1; 1143 } 1144 1145 /* 1146 * After removing a page table entry, this routine is used to 1147 * conditionally free the page, and manage the hold/wire counts. 1148 */ 1149 static int 1150 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1151 { 1152 pd_entry_t ptepde; 1153 vm_page_t mpte; 1154 1155 if (va >= VM_MAXUSER_ADDRESS) 1156 return 0; 1157 ptepde = *pmap_pde(pmap, va); 1158 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1159 return pmap_unwire_pte_hold(pmap, mpte, free); 1160 } 1161 1162 void 1163 pmap_pinit0(pmap) 1164 struct pmap *pmap; 1165 { 1166 1167 PMAP_LOCK_INIT(pmap); 1168 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1169 #ifdef PAE 1170 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1171 #endif 1172 pmap->pm_active = 0; 1173 PCPU_SET(curpmap, pmap); 1174 TAILQ_INIT(&pmap->pm_pvlist); 1175 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1176 mtx_lock_spin(&allpmaps_lock); 1177 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1178 mtx_unlock_spin(&allpmaps_lock); 1179 } 1180 1181 /* 1182 * Initialize a preallocated and zeroed pmap structure, 1183 * such as one in a vmspace structure. 1184 */ 1185 void 1186 pmap_pinit(pmap) 1187 register struct pmap *pmap; 1188 { 1189 vm_page_t m, ptdpg[NPGPTD]; 1190 vm_paddr_t pa; 1191 static int color; 1192 int i; 1193 1194 PMAP_LOCK_INIT(pmap); 1195 1196 /* 1197 * No need to allocate page table space yet but we do need a valid 1198 * page directory table. 1199 */ 1200 if (pmap->pm_pdir == NULL) { 1201 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1202 NBPTD); 1203 #ifdef PAE 1204 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1205 KASSERT(((vm_offset_t)pmap->pm_pdpt & 1206 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1207 ("pmap_pinit: pdpt misaligned")); 1208 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1209 ("pmap_pinit: pdpt above 4g")); 1210 #endif 1211 } 1212 1213 /* 1214 * allocate the page directory page(s) 1215 */ 1216 for (i = 0; i < NPGPTD;) { 1217 m = vm_page_alloc(NULL, color++, 1218 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1219 VM_ALLOC_ZERO); 1220 if (m == NULL) 1221 VM_WAIT; 1222 else { 1223 ptdpg[i++] = m; 1224 } 1225 } 1226 1227 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1228 1229 for (i = 0; i < NPGPTD; i++) { 1230 if ((ptdpg[i]->flags & PG_ZERO) == 0) 1231 bzero(pmap->pm_pdir + (i * NPDEPG), PAGE_SIZE); 1232 } 1233 1234 mtx_lock_spin(&allpmaps_lock); 1235 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1236 mtx_unlock_spin(&allpmaps_lock); 1237 /* Wire in kernel global address entries. */ 1238 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1239 1240 /* install self-referential address mapping entry(s) */ 1241 for (i = 0; i < NPGPTD; i++) { 1242 pa = VM_PAGE_TO_PHYS(ptdpg[i]); 1243 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M; 1244 #ifdef PAE 1245 pmap->pm_pdpt[i] = pa | PG_V; 1246 #endif 1247 } 1248 1249 pmap->pm_active = 0; 1250 TAILQ_INIT(&pmap->pm_pvlist); 1251 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1252 } 1253 1254 /* 1255 * this routine is called if the page table page is not 1256 * mapped correctly. 1257 */ 1258 static vm_page_t 1259 _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags) 1260 { 1261 vm_paddr_t ptepa; 1262 vm_page_t m; 1263 1264 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1265 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1266 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1267 1268 /* 1269 * Allocate a page table page. 1270 */ 1271 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1272 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1273 if (flags & M_WAITOK) { 1274 PMAP_UNLOCK(pmap); 1275 vm_page_unlock_queues(); 1276 VM_WAIT; 1277 vm_page_lock_queues(); 1278 PMAP_LOCK(pmap); 1279 } 1280 1281 /* 1282 * Indicate the need to retry. While waiting, the page table 1283 * page may have been allocated. 1284 */ 1285 return (NULL); 1286 } 1287 if ((m->flags & PG_ZERO) == 0) 1288 pmap_zero_page(m); 1289 1290 /* 1291 * Map the pagetable page into the process address space, if 1292 * it isn't already there. 1293 */ 1294 1295 pmap->pm_stats.resident_count++; 1296 1297 ptepa = VM_PAGE_TO_PHYS(m); 1298 pmap->pm_pdir[ptepindex] = 1299 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M); 1300 1301 return m; 1302 } 1303 1304 static vm_page_t 1305 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1306 { 1307 unsigned ptepindex; 1308 pd_entry_t ptepa; 1309 vm_page_t m; 1310 1311 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1312 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1313 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1314 1315 /* 1316 * Calculate pagetable page index 1317 */ 1318 ptepindex = va >> PDRSHIFT; 1319 retry: 1320 /* 1321 * Get the page directory entry 1322 */ 1323 ptepa = pmap->pm_pdir[ptepindex]; 1324 1325 /* 1326 * This supports switching from a 4MB page to a 1327 * normal 4K page. 1328 */ 1329 if (ptepa & PG_PS) { 1330 pmap->pm_pdir[ptepindex] = 0; 1331 ptepa = 0; 1332 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1333 pmap_invalidate_all(kernel_pmap); 1334 } 1335 1336 /* 1337 * If the page table page is mapped, we just increment the 1338 * hold count, and activate it. 1339 */ 1340 if (ptepa) { 1341 m = PHYS_TO_VM_PAGE(ptepa); 1342 m->wire_count++; 1343 } else { 1344 /* 1345 * Here if the pte page isn't mapped, or if it has 1346 * been deallocated. 1347 */ 1348 m = _pmap_allocpte(pmap, ptepindex, flags); 1349 if (m == NULL && (flags & M_WAITOK)) 1350 goto retry; 1351 } 1352 return (m); 1353 } 1354 1355 1356 /*************************************************** 1357 * Pmap allocation/deallocation routines. 1358 ***************************************************/ 1359 1360 #ifdef SMP 1361 /* 1362 * Deal with a SMP shootdown of other users of the pmap that we are 1363 * trying to dispose of. This can be a bit hairy. 1364 */ 1365 static u_int *lazymask; 1366 static u_int lazyptd; 1367 static volatile u_int lazywait; 1368 1369 void pmap_lazyfix_action(void); 1370 1371 void 1372 pmap_lazyfix_action(void) 1373 { 1374 u_int mymask = PCPU_GET(cpumask); 1375 1376 if (rcr3() == lazyptd) 1377 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1378 atomic_clear_int(lazymask, mymask); 1379 atomic_store_rel_int(&lazywait, 1); 1380 } 1381 1382 static void 1383 pmap_lazyfix_self(u_int mymask) 1384 { 1385 1386 if (rcr3() == lazyptd) 1387 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1388 atomic_clear_int(lazymask, mymask); 1389 } 1390 1391 1392 static void 1393 pmap_lazyfix(pmap_t pmap) 1394 { 1395 u_int mymask; 1396 u_int mask; 1397 register u_int spins; 1398 1399 while ((mask = pmap->pm_active) != 0) { 1400 spins = 50000000; 1401 mask = mask & -mask; /* Find least significant set bit */ 1402 mtx_lock_spin(&smp_ipi_mtx); 1403 #ifdef PAE 1404 lazyptd = vtophys(pmap->pm_pdpt); 1405 #else 1406 lazyptd = vtophys(pmap->pm_pdir); 1407 #endif 1408 mymask = PCPU_GET(cpumask); 1409 if (mask == mymask) { 1410 lazymask = &pmap->pm_active; 1411 pmap_lazyfix_self(mymask); 1412 } else { 1413 atomic_store_rel_int((u_int *)&lazymask, 1414 (u_int)&pmap->pm_active); 1415 atomic_store_rel_int(&lazywait, 0); 1416 ipi_selected(mask, IPI_LAZYPMAP); 1417 while (lazywait == 0) { 1418 ia32_pause(); 1419 if (--spins == 0) 1420 break; 1421 } 1422 } 1423 mtx_unlock_spin(&smp_ipi_mtx); 1424 if (spins == 0) 1425 printf("pmap_lazyfix: spun for 50000000\n"); 1426 } 1427 } 1428 1429 #else /* SMP */ 1430 1431 /* 1432 * Cleaning up on uniprocessor is easy. For various reasons, we're 1433 * unlikely to have to even execute this code, including the fact 1434 * that the cleanup is deferred until the parent does a wait(2), which 1435 * means that another userland process has run. 1436 */ 1437 static void 1438 pmap_lazyfix(pmap_t pmap) 1439 { 1440 u_int cr3; 1441 1442 cr3 = vtophys(pmap->pm_pdir); 1443 if (cr3 == rcr3()) { 1444 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1445 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1446 } 1447 } 1448 #endif /* SMP */ 1449 1450 /* 1451 * Release any resources held by the given physical map. 1452 * Called when a pmap initialized by pmap_pinit is being released. 1453 * Should only be called if the map contains no valid mappings. 1454 */ 1455 void 1456 pmap_release(pmap_t pmap) 1457 { 1458 vm_page_t m, ptdpg[NPGPTD]; 1459 int i; 1460 1461 KASSERT(pmap->pm_stats.resident_count == 0, 1462 ("pmap_release: pmap resident count %ld != 0", 1463 pmap->pm_stats.resident_count)); 1464 1465 pmap_lazyfix(pmap); 1466 mtx_lock_spin(&allpmaps_lock); 1467 LIST_REMOVE(pmap, pm_list); 1468 mtx_unlock_spin(&allpmaps_lock); 1469 1470 for (i = 0; i < NPGPTD; i++) 1471 ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i]); 1472 1473 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) * 1474 sizeof(*pmap->pm_pdir)); 1475 1476 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1477 1478 vm_page_lock_queues(); 1479 for (i = 0; i < NPGPTD; i++) { 1480 m = ptdpg[i]; 1481 #ifdef PAE 1482 KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME), 1483 ("pmap_release: got wrong ptd page")); 1484 #endif 1485 m->wire_count--; 1486 atomic_subtract_int(&cnt.v_wire_count, 1); 1487 vm_page_free_zero(m); 1488 } 1489 vm_page_unlock_queues(); 1490 PMAP_LOCK_DESTROY(pmap); 1491 } 1492 1493 static int 1494 kvm_size(SYSCTL_HANDLER_ARGS) 1495 { 1496 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1497 1498 return sysctl_handle_long(oidp, &ksize, 0, req); 1499 } 1500 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1501 0, 0, kvm_size, "IU", "Size of KVM"); 1502 1503 static int 1504 kvm_free(SYSCTL_HANDLER_ARGS) 1505 { 1506 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1507 1508 return sysctl_handle_long(oidp, &kfree, 0, req); 1509 } 1510 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1511 0, 0, kvm_free, "IU", "Amount of KVM free"); 1512 1513 /* 1514 * grow the number of kernel page table entries, if needed 1515 */ 1516 void 1517 pmap_growkernel(vm_offset_t addr) 1518 { 1519 struct pmap *pmap; 1520 vm_paddr_t ptppaddr; 1521 vm_page_t nkpg; 1522 pd_entry_t newpdir; 1523 pt_entry_t *pde; 1524 1525 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1526 if (kernel_vm_end == 0) { 1527 kernel_vm_end = KERNBASE; 1528 nkpt = 0; 1529 while (pdir_pde(PTD, kernel_vm_end)) { 1530 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1531 nkpt++; 1532 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1533 kernel_vm_end = kernel_map->max_offset; 1534 break; 1535 } 1536 } 1537 } 1538 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1539 if (addr - 1 >= kernel_map->max_offset) 1540 addr = kernel_map->max_offset; 1541 while (kernel_vm_end < addr) { 1542 if (pdir_pde(PTD, kernel_vm_end)) { 1543 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1544 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1545 kernel_vm_end = kernel_map->max_offset; 1546 break; 1547 } 1548 continue; 1549 } 1550 1551 /* 1552 * This index is bogus, but out of the way 1553 */ 1554 nkpg = vm_page_alloc(NULL, nkpt, 1555 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1556 if (!nkpg) 1557 panic("pmap_growkernel: no memory to grow kernel"); 1558 1559 nkpt++; 1560 1561 pmap_zero_page(nkpg); 1562 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1563 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1564 pdir_pde(PTD, kernel_vm_end) = newpdir; 1565 1566 mtx_lock_spin(&allpmaps_lock); 1567 LIST_FOREACH(pmap, &allpmaps, pm_list) { 1568 pde = pmap_pde(pmap, kernel_vm_end); 1569 pde_store(pde, newpdir); 1570 } 1571 mtx_unlock_spin(&allpmaps_lock); 1572 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1573 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1574 kernel_vm_end = kernel_map->max_offset; 1575 break; 1576 } 1577 } 1578 } 1579 1580 1581 /*************************************************** 1582 * page management routines. 1583 ***************************************************/ 1584 1585 /* 1586 * free the pv_entry back to the free list 1587 */ 1588 static PMAP_INLINE void 1589 free_pv_entry(pv_entry_t pv) 1590 { 1591 pv_entry_count--; 1592 uma_zfree(pvzone, pv); 1593 } 1594 1595 /* 1596 * get a new pv_entry, allocating a block from the system 1597 * when needed. 1598 * the memory allocation is performed bypassing the malloc code 1599 * because of the possibility of allocations at interrupt time. 1600 */ 1601 static pv_entry_t 1602 get_pv_entry(void) 1603 { 1604 pv_entry_count++; 1605 if ((pv_entry_count > pv_entry_high_water) && 1606 (pmap_pagedaemon_waken == 0)) { 1607 pmap_pagedaemon_waken = 1; 1608 wakeup(&vm_pages_needed); 1609 } 1610 return uma_zalloc(pvzone, M_NOWAIT); 1611 } 1612 1613 1614 static void 1615 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 1616 { 1617 pv_entry_t pv; 1618 1619 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1620 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1621 if (m->md.pv_list_count < pmap->pm_stats.resident_count) { 1622 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 1623 if (pmap == pv->pv_pmap && va == pv->pv_va) 1624 break; 1625 } 1626 } else { 1627 TAILQ_FOREACH(pv, &pmap->pm_pvlist, pv_plist) { 1628 if (va == pv->pv_va) 1629 break; 1630 } 1631 } 1632 KASSERT(pv != NULL, ("pmap_remove_entry: pv not found")); 1633 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1634 m->md.pv_list_count--; 1635 if (TAILQ_EMPTY(&m->md.pv_list)) 1636 vm_page_flag_clear(m, PG_WRITEABLE); 1637 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist); 1638 free_pv_entry(pv); 1639 } 1640 1641 /* 1642 * Create a pv entry for page at pa for 1643 * (pmap, va). 1644 */ 1645 static void 1646 pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 1647 { 1648 pv_entry_t pv; 1649 1650 pv = get_pv_entry(); 1651 if (pv == NULL) 1652 panic("no pv entries: increase vm.pmap.shpgperproc"); 1653 pv->pv_va = va; 1654 pv->pv_pmap = pmap; 1655 1656 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1657 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1658 TAILQ_INSERT_TAIL(&pmap->pm_pvlist, pv, pv_plist); 1659 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 1660 m->md.pv_list_count++; 1661 } 1662 1663 /* 1664 * Conditionally create a pv entry. 1665 */ 1666 static boolean_t 1667 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 1668 { 1669 pv_entry_t pv; 1670 1671 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1672 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1673 if (pv_entry_count < pv_entry_high_water && 1674 (pv = uma_zalloc(pvzone, M_NOWAIT)) != NULL) { 1675 pv_entry_count++; 1676 pv->pv_va = va; 1677 pv->pv_pmap = pmap; 1678 TAILQ_INSERT_TAIL(&pmap->pm_pvlist, pv, pv_plist); 1679 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 1680 m->md.pv_list_count++; 1681 return (TRUE); 1682 } else 1683 return (FALSE); 1684 } 1685 1686 /* 1687 * pmap_remove_pte: do the things to unmap a page in a process 1688 */ 1689 static int 1690 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free) 1691 { 1692 pt_entry_t oldpte; 1693 vm_page_t m; 1694 1695 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1696 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1697 oldpte = pte_load_clear(ptq); 1698 if (oldpte & PG_W) 1699 pmap->pm_stats.wired_count -= 1; 1700 /* 1701 * Machines that don't support invlpg, also don't support 1702 * PG_G. 1703 */ 1704 if (oldpte & PG_G) 1705 pmap_invalidate_page(kernel_pmap, va); 1706 pmap->pm_stats.resident_count -= 1; 1707 if (oldpte & PG_MANAGED) { 1708 m = PHYS_TO_VM_PAGE(oldpte); 1709 if (oldpte & PG_M) { 1710 KASSERT((oldpte & PG_RW), 1711 ("pmap_remove_pte: modified page not writable: va: %#x, pte: %#jx", 1712 va, (uintmax_t)oldpte)); 1713 vm_page_dirty(m); 1714 } 1715 if (oldpte & PG_A) 1716 vm_page_flag_set(m, PG_REFERENCED); 1717 pmap_remove_entry(pmap, m, va); 1718 } 1719 return (pmap_unuse_pt(pmap, va, free)); 1720 } 1721 1722 /* 1723 * Remove a single page from a process address space 1724 */ 1725 static void 1726 pmap_remove_page(pmap_t pmap, vm_offset_t va) 1727 { 1728 pt_entry_t *pte; 1729 vm_page_t free = NULL; 1730 1731 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1732 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 1733 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1734 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0) 1735 return; 1736 pmap_remove_pte(pmap, pte, va, &free); 1737 pmap_invalidate_page(pmap, va); 1738 pmap_free_zero_pages(free); 1739 } 1740 1741 /* 1742 * Remove the given range of addresses from the specified map. 1743 * 1744 * It is assumed that the start and end are properly 1745 * rounded to the page size. 1746 */ 1747 void 1748 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 1749 { 1750 vm_offset_t pdnxt; 1751 pd_entry_t ptpaddr; 1752 pt_entry_t *pte; 1753 vm_page_t free = NULL; 1754 int anyvalid; 1755 1756 /* 1757 * Perform an unsynchronized read. This is, however, safe. 1758 */ 1759 if (pmap->pm_stats.resident_count == 0) 1760 return; 1761 1762 anyvalid = 0; 1763 1764 vm_page_lock_queues(); 1765 sched_pin(); 1766 PMAP_LOCK(pmap); 1767 1768 /* 1769 * special handling of removing one page. a very 1770 * common operation and easy to short circuit some 1771 * code. 1772 */ 1773 if ((sva + PAGE_SIZE == eva) && 1774 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 1775 pmap_remove_page(pmap, sva); 1776 goto out; 1777 } 1778 1779 for (; sva < eva; sva = pdnxt) { 1780 unsigned pdirindex; 1781 1782 /* 1783 * Calculate index for next page table. 1784 */ 1785 pdnxt = (sva + NBPDR) & ~PDRMASK; 1786 if (pmap->pm_stats.resident_count == 0) 1787 break; 1788 1789 pdirindex = sva >> PDRSHIFT; 1790 ptpaddr = pmap->pm_pdir[pdirindex]; 1791 1792 /* 1793 * Weed out invalid mappings. Note: we assume that the page 1794 * directory table is always allocated, and in kernel virtual. 1795 */ 1796 if (ptpaddr == 0) 1797 continue; 1798 1799 /* 1800 * Check for large page. 1801 */ 1802 if ((ptpaddr & PG_PS) != 0) { 1803 pmap->pm_pdir[pdirindex] = 0; 1804 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1805 anyvalid = 1; 1806 continue; 1807 } 1808 1809 /* 1810 * Limit our scan to either the end of the va represented 1811 * by the current page table page, or to the end of the 1812 * range being removed. 1813 */ 1814 if (pdnxt > eva) 1815 pdnxt = eva; 1816 1817 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 1818 sva += PAGE_SIZE) { 1819 if (*pte == 0) 1820 continue; 1821 1822 /* 1823 * The TLB entry for a PG_G mapping is invalidated 1824 * by pmap_remove_pte(). 1825 */ 1826 if ((*pte & PG_G) == 0) 1827 anyvalid = 1; 1828 if (pmap_remove_pte(pmap, pte, sva, &free)) 1829 break; 1830 } 1831 } 1832 out: 1833 sched_unpin(); 1834 if (anyvalid) { 1835 pmap_invalidate_all(pmap); 1836 pmap_free_zero_pages(free); 1837 } 1838 vm_page_unlock_queues(); 1839 PMAP_UNLOCK(pmap); 1840 } 1841 1842 /* 1843 * Routine: pmap_remove_all 1844 * Function: 1845 * Removes this physical page from 1846 * all physical maps in which it resides. 1847 * Reflects back modify bits to the pager. 1848 * 1849 * Notes: 1850 * Original versions of this routine were very 1851 * inefficient because they iteratively called 1852 * pmap_remove (slow...) 1853 */ 1854 1855 void 1856 pmap_remove_all(vm_page_t m) 1857 { 1858 register pv_entry_t pv; 1859 pt_entry_t *pte, tpte; 1860 vm_page_t free; 1861 1862 #if defined(PMAP_DIAGNOSTIC) 1863 /* 1864 * XXX This makes pmap_remove_all() illegal for non-managed pages! 1865 */ 1866 if (m->flags & PG_FICTITIOUS) { 1867 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%x", 1868 VM_PAGE_TO_PHYS(m)); 1869 } 1870 #endif 1871 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1872 sched_pin(); 1873 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 1874 PMAP_LOCK(pv->pv_pmap); 1875 pv->pv_pmap->pm_stats.resident_count--; 1876 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va); 1877 tpte = pte_load_clear(pte); 1878 if (tpte & PG_W) 1879 pv->pv_pmap->pm_stats.wired_count--; 1880 if (tpte & PG_A) 1881 vm_page_flag_set(m, PG_REFERENCED); 1882 1883 /* 1884 * Update the vm_page_t clean and reference bits. 1885 */ 1886 if (tpte & PG_M) { 1887 KASSERT((tpte & PG_RW), 1888 ("pmap_remove_all: modified page not writable: va: %#x, pte: %#jx", 1889 pv->pv_va, (uintmax_t)tpte)); 1890 vm_page_dirty(m); 1891 } 1892 free = NULL; 1893 pmap_unuse_pt(pv->pv_pmap, pv->pv_va, &free); 1894 pmap_invalidate_page(pv->pv_pmap, pv->pv_va); 1895 pmap_free_zero_pages(free); 1896 TAILQ_REMOVE(&pv->pv_pmap->pm_pvlist, pv, pv_plist); 1897 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1898 m->md.pv_list_count--; 1899 PMAP_UNLOCK(pv->pv_pmap); 1900 free_pv_entry(pv); 1901 } 1902 vm_page_flag_clear(m, PG_WRITEABLE); 1903 sched_unpin(); 1904 } 1905 1906 /* 1907 * Set the physical protection on the 1908 * specified range of this map as requested. 1909 */ 1910 void 1911 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 1912 { 1913 vm_offset_t pdnxt; 1914 pd_entry_t ptpaddr; 1915 pt_entry_t *pte; 1916 int anychanged; 1917 1918 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 1919 pmap_remove(pmap, sva, eva); 1920 return; 1921 } 1922 1923 if (prot & VM_PROT_WRITE) 1924 return; 1925 1926 anychanged = 0; 1927 1928 vm_page_lock_queues(); 1929 sched_pin(); 1930 PMAP_LOCK(pmap); 1931 for (; sva < eva; sva = pdnxt) { 1932 unsigned obits, pbits, pdirindex; 1933 1934 pdnxt = (sva + NBPDR) & ~PDRMASK; 1935 1936 pdirindex = sva >> PDRSHIFT; 1937 ptpaddr = pmap->pm_pdir[pdirindex]; 1938 1939 /* 1940 * Weed out invalid mappings. Note: we assume that the page 1941 * directory table is always allocated, and in kernel virtual. 1942 */ 1943 if (ptpaddr == 0) 1944 continue; 1945 1946 /* 1947 * Check for large page. 1948 */ 1949 if ((ptpaddr & PG_PS) != 0) { 1950 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW); 1951 anychanged = 1; 1952 continue; 1953 } 1954 1955 if (pdnxt > eva) 1956 pdnxt = eva; 1957 1958 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 1959 sva += PAGE_SIZE) { 1960 vm_page_t m; 1961 1962 retry: 1963 /* 1964 * Regardless of whether a pte is 32 or 64 bits in 1965 * size, PG_RW, PG_A, and PG_M are among the least 1966 * significant 32 bits. 1967 */ 1968 obits = pbits = *(u_int *)pte; 1969 if (pbits & PG_MANAGED) { 1970 m = NULL; 1971 if (pbits & PG_A) { 1972 m = PHYS_TO_VM_PAGE(*pte); 1973 vm_page_flag_set(m, PG_REFERENCED); 1974 pbits &= ~PG_A; 1975 } 1976 if ((pbits & PG_M) != 0) { 1977 if (m == NULL) 1978 m = PHYS_TO_VM_PAGE(*pte); 1979 vm_page_dirty(m); 1980 } 1981 } 1982 1983 pbits &= ~(PG_RW | PG_M); 1984 1985 if (pbits != obits) { 1986 if (!atomic_cmpset_int((u_int *)pte, obits, 1987 pbits)) 1988 goto retry; 1989 if (obits & PG_G) 1990 pmap_invalidate_page(pmap, sva); 1991 else 1992 anychanged = 1; 1993 } 1994 } 1995 } 1996 sched_unpin(); 1997 if (anychanged) 1998 pmap_invalidate_all(pmap); 1999 vm_page_unlock_queues(); 2000 PMAP_UNLOCK(pmap); 2001 } 2002 2003 /* 2004 * Insert the given physical page (p) at 2005 * the specified virtual address (v) in the 2006 * target physical map with the protection requested. 2007 * 2008 * If specified, the page will be wired down, meaning 2009 * that the related pte can not be reclaimed. 2010 * 2011 * NB: This is the only routine which MAY NOT lazy-evaluate 2012 * or lose information. That is, this routine must actually 2013 * insert this page into the given map NOW. 2014 */ 2015 void 2016 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 2017 boolean_t wired) 2018 { 2019 vm_paddr_t pa; 2020 pd_entry_t *pde; 2021 register pt_entry_t *pte; 2022 vm_paddr_t opa; 2023 pt_entry_t origpte, newpte; 2024 vm_page_t mpte, om; 2025 boolean_t invlva; 2026 2027 va &= PG_FRAME; 2028 #ifdef PMAP_DIAGNOSTIC 2029 if (va > VM_MAX_KERNEL_ADDRESS) 2030 panic("pmap_enter: toobig"); 2031 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS)) 2032 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va); 2033 #endif 2034 2035 mpte = NULL; 2036 2037 vm_page_lock_queues(); 2038 PMAP_LOCK(pmap); 2039 sched_pin(); 2040 2041 /* 2042 * In the case that a page table page is not 2043 * resident, we are creating it here. 2044 */ 2045 if (va < VM_MAXUSER_ADDRESS) { 2046 mpte = pmap_allocpte(pmap, va, M_WAITOK); 2047 } 2048 #if 0 && defined(PMAP_DIAGNOSTIC) 2049 else { 2050 pd_entry_t *pdeaddr = pmap_pde(pmap, va); 2051 origpte = *pdeaddr; 2052 if ((origpte & PG_V) == 0) { 2053 panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n", 2054 pmap->pm_pdir[PTDPTDI], origpte, va); 2055 } 2056 } 2057 #endif 2058 2059 pde = pmap_pde(pmap, va); 2060 if ((*pde & PG_PS) != 0) 2061 panic("pmap_enter: attempted pmap_enter on 4MB page"); 2062 pte = pmap_pte_quick(pmap, va); 2063 2064 /* 2065 * Page Directory table entry not valid, we need a new PT page 2066 */ 2067 if (pte == NULL) { 2068 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n", 2069 (uintmax_t)pmap->pm_pdir[PTDPTDI], va); 2070 } 2071 2072 pa = VM_PAGE_TO_PHYS(m); 2073 om = NULL; 2074 origpte = *pte; 2075 opa = origpte & PG_FRAME; 2076 2077 /* 2078 * Mapping has not changed, must be protection or wiring change. 2079 */ 2080 if (origpte && (opa == pa)) { 2081 /* 2082 * Wiring change, just update stats. We don't worry about 2083 * wiring PT pages as they remain resident as long as there 2084 * are valid mappings in them. Hence, if a user page is wired, 2085 * the PT page will be also. 2086 */ 2087 if (wired && ((origpte & PG_W) == 0)) 2088 pmap->pm_stats.wired_count++; 2089 else if (!wired && (origpte & PG_W)) 2090 pmap->pm_stats.wired_count--; 2091 2092 /* 2093 * Remove extra pte reference 2094 */ 2095 if (mpte) 2096 mpte->wire_count--; 2097 2098 /* 2099 * We might be turning off write access to the page, 2100 * so we go ahead and sense modify status. 2101 */ 2102 if (origpte & PG_MANAGED) { 2103 om = m; 2104 pa |= PG_MANAGED; 2105 } 2106 goto validate; 2107 } 2108 /* 2109 * Mapping has changed, invalidate old range and fall through to 2110 * handle validating new mapping. 2111 */ 2112 if (opa) { 2113 if (origpte & PG_W) 2114 pmap->pm_stats.wired_count--; 2115 if (origpte & PG_MANAGED) { 2116 om = PHYS_TO_VM_PAGE(opa); 2117 pmap_remove_entry(pmap, om, va); 2118 } 2119 if (mpte != NULL) { 2120 mpte->wire_count--; 2121 KASSERT(mpte->wire_count > 0, 2122 ("pmap_enter: missing reference to page table page," 2123 " va: 0x%x", va)); 2124 } 2125 } else 2126 pmap->pm_stats.resident_count++; 2127 2128 /* 2129 * Enter on the PV list if part of our managed memory. 2130 */ 2131 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 2132 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva, 2133 ("pmap_enter: managed mapping within the clean submap")); 2134 pmap_insert_entry(pmap, va, m); 2135 pa |= PG_MANAGED; 2136 } 2137 2138 /* 2139 * Increment counters 2140 */ 2141 if (wired) 2142 pmap->pm_stats.wired_count++; 2143 2144 validate: 2145 /* 2146 * Now validate mapping with desired protection/wiring. 2147 */ 2148 newpte = (pt_entry_t)(pa | PG_V); 2149 if ((prot & VM_PROT_WRITE) != 0) 2150 newpte |= PG_RW; 2151 if (wired) 2152 newpte |= PG_W; 2153 if (va < VM_MAXUSER_ADDRESS) 2154 newpte |= PG_U; 2155 if (pmap == kernel_pmap) 2156 newpte |= pgeflag; 2157 2158 /* 2159 * if the mapping or permission bits are different, we need 2160 * to update the pte. 2161 */ 2162 if ((origpte & ~(PG_M|PG_A)) != newpte) { 2163 if (origpte & PG_V) { 2164 invlva = FALSE; 2165 origpte = pte_load_store(pte, newpte | PG_A); 2166 if (origpte & PG_A) { 2167 if (origpte & PG_MANAGED) 2168 vm_page_flag_set(om, PG_REFERENCED); 2169 if (opa != VM_PAGE_TO_PHYS(m)) 2170 invlva = TRUE; 2171 } 2172 if (origpte & PG_M) { 2173 KASSERT((origpte & PG_RW), 2174 ("pmap_enter: modified page not writable: va: %#x, pte: %#jx", 2175 va, (uintmax_t)origpte)); 2176 if ((origpte & PG_MANAGED) != 0) 2177 vm_page_dirty(om); 2178 if ((prot & VM_PROT_WRITE) == 0) 2179 invlva = TRUE; 2180 } 2181 if (invlva) 2182 pmap_invalidate_page(pmap, va); 2183 } else 2184 pte_store(pte, newpte | PG_A); 2185 } 2186 sched_unpin(); 2187 vm_page_unlock_queues(); 2188 PMAP_UNLOCK(pmap); 2189 } 2190 2191 /* 2192 * Maps a sequence of resident pages belonging to the same object. 2193 * The sequence begins with the given page m_start. This page is 2194 * mapped at the given virtual address start. Each subsequent page is 2195 * mapped at a virtual address that is offset from start by the same 2196 * amount as the page is offset from m_start within the object. The 2197 * last page in the sequence is the page with the largest offset from 2198 * m_start that can be mapped at a virtual address less than the given 2199 * virtual address end. Not every virtual page between start and end 2200 * is mapped; only those for which a resident page exists with the 2201 * corresponding offset from m_start are mapped. 2202 */ 2203 void 2204 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, 2205 vm_page_t m_start, vm_prot_t prot) 2206 { 2207 vm_page_t m, mpte; 2208 vm_pindex_t diff, psize; 2209 2210 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED); 2211 psize = atop(end - start); 2212 mpte = NULL; 2213 m = m_start; 2214 PMAP_LOCK(pmap); 2215 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 2216 mpte = pmap_enter_quick_locked(pmap, start + ptoa(diff), m, 2217 prot, mpte); 2218 m = TAILQ_NEXT(m, listq); 2219 } 2220 PMAP_UNLOCK(pmap); 2221 } 2222 2223 /* 2224 * this code makes some *MAJOR* assumptions: 2225 * 1. Current pmap & pmap exists. 2226 * 2. Not wired. 2227 * 3. Read access. 2228 * 4. No page table pages. 2229 * but is *MUCH* faster than pmap_enter... 2230 */ 2231 2232 void 2233 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 2234 { 2235 2236 PMAP_LOCK(pmap); 2237 (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL); 2238 PMAP_UNLOCK(pmap); 2239 } 2240 2241 static vm_page_t 2242 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, 2243 vm_prot_t prot, vm_page_t mpte) 2244 { 2245 pt_entry_t *pte; 2246 vm_paddr_t pa; 2247 vm_page_t free; 2248 2249 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || 2250 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, 2251 ("pmap_enter_quick_locked: managed mapping within the clean submap")); 2252 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2253 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2254 2255 /* 2256 * In the case that a page table page is not 2257 * resident, we are creating it here. 2258 */ 2259 if (va < VM_MAXUSER_ADDRESS) { 2260 unsigned ptepindex; 2261 pd_entry_t ptepa; 2262 2263 /* 2264 * Calculate pagetable page index 2265 */ 2266 ptepindex = va >> PDRSHIFT; 2267 if (mpte && (mpte->pindex == ptepindex)) { 2268 mpte->wire_count++; 2269 } else { 2270 /* 2271 * Get the page directory entry 2272 */ 2273 ptepa = pmap->pm_pdir[ptepindex]; 2274 2275 /* 2276 * If the page table page is mapped, we just increment 2277 * the hold count, and activate it. 2278 */ 2279 if (ptepa) { 2280 if (ptepa & PG_PS) 2281 panic("pmap_enter_quick: unexpected mapping into 4MB page"); 2282 mpte = PHYS_TO_VM_PAGE(ptepa); 2283 mpte->wire_count++; 2284 } else { 2285 mpte = _pmap_allocpte(pmap, ptepindex, 2286 M_NOWAIT); 2287 if (mpte == NULL) 2288 return (mpte); 2289 } 2290 } 2291 } else { 2292 mpte = NULL; 2293 } 2294 2295 /* 2296 * This call to vtopte makes the assumption that we are 2297 * entering the page into the current pmap. In order to support 2298 * quick entry into any pmap, one would likely use pmap_pte_quick. 2299 * But that isn't as quick as vtopte. 2300 */ 2301 pte = vtopte(va); 2302 if (*pte) { 2303 if (mpte != NULL) { 2304 mpte->wire_count--; 2305 mpte = NULL; 2306 } 2307 return (mpte); 2308 } 2309 2310 /* 2311 * Enter on the PV list if part of our managed memory. 2312 */ 2313 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 && 2314 !pmap_try_insert_pv_entry(pmap, va, m)) { 2315 if (mpte != NULL) { 2316 free = NULL; 2317 if (pmap_unwire_pte_hold(pmap, mpte, &free)) { 2318 pmap_invalidate_page(pmap, va); 2319 pmap_free_zero_pages(free); 2320 } 2321 2322 mpte = NULL; 2323 } 2324 return (mpte); 2325 } 2326 2327 /* 2328 * Increment counters 2329 */ 2330 pmap->pm_stats.resident_count++; 2331 2332 pa = VM_PAGE_TO_PHYS(m); 2333 2334 /* 2335 * Now validate mapping with RO protection 2336 */ 2337 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 2338 pte_store(pte, pa | PG_V | PG_U); 2339 else 2340 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 2341 return mpte; 2342 } 2343 2344 /* 2345 * Make a temporary mapping for a physical address. This is only intended 2346 * to be used for panic dumps. 2347 */ 2348 void * 2349 pmap_kenter_temporary(vm_paddr_t pa, int i) 2350 { 2351 vm_offset_t va; 2352 2353 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 2354 pmap_kenter(va, pa); 2355 invlpg(va); 2356 return ((void *)crashdumpmap); 2357 } 2358 2359 /* 2360 * This code maps large physical mmap regions into the 2361 * processor address space. Note that some shortcuts 2362 * are taken, but the code works. 2363 */ 2364 void 2365 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 2366 vm_object_t object, vm_pindex_t pindex, 2367 vm_size_t size) 2368 { 2369 vm_page_t p; 2370 2371 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 2372 KASSERT(object->type == OBJT_DEVICE, 2373 ("pmap_object_init_pt: non-device object")); 2374 if (pseflag && 2375 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 2376 int i; 2377 vm_page_t m[1]; 2378 unsigned int ptepindex; 2379 int npdes; 2380 pd_entry_t ptepa; 2381 2382 PMAP_LOCK(pmap); 2383 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)]) 2384 goto out; 2385 PMAP_UNLOCK(pmap); 2386 retry: 2387 p = vm_page_lookup(object, pindex); 2388 if (p != NULL) { 2389 vm_page_lock_queues(); 2390 if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 2391 goto retry; 2392 } else { 2393 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 2394 if (p == NULL) 2395 return; 2396 m[0] = p; 2397 2398 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 2399 vm_page_lock_queues(); 2400 vm_page_free(p); 2401 vm_page_unlock_queues(); 2402 return; 2403 } 2404 2405 p = vm_page_lookup(object, pindex); 2406 vm_page_lock_queues(); 2407 vm_page_wakeup(p); 2408 } 2409 vm_page_unlock_queues(); 2410 2411 ptepa = VM_PAGE_TO_PHYS(p); 2412 if (ptepa & (NBPDR - 1)) 2413 return; 2414 2415 p->valid = VM_PAGE_BITS_ALL; 2416 2417 PMAP_LOCK(pmap); 2418 pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 2419 npdes = size >> PDRSHIFT; 2420 for(i = 0; i < npdes; i++) { 2421 pde_store(&pmap->pm_pdir[ptepindex], 2422 ptepa | PG_U | PG_RW | PG_V | PG_PS); 2423 ptepa += NBPDR; 2424 ptepindex += 1; 2425 } 2426 pmap_invalidate_all(pmap); 2427 out: 2428 PMAP_UNLOCK(pmap); 2429 } 2430 } 2431 2432 /* 2433 * Routine: pmap_change_wiring 2434 * Function: Change the wiring attribute for a map/virtual-address 2435 * pair. 2436 * In/out conditions: 2437 * The mapping must already exist in the pmap. 2438 */ 2439 void 2440 pmap_change_wiring(pmap, va, wired) 2441 register pmap_t pmap; 2442 vm_offset_t va; 2443 boolean_t wired; 2444 { 2445 register pt_entry_t *pte; 2446 2447 PMAP_LOCK(pmap); 2448 pte = pmap_pte(pmap, va); 2449 2450 if (wired && !pmap_pte_w(pte)) 2451 pmap->pm_stats.wired_count++; 2452 else if (!wired && pmap_pte_w(pte)) 2453 pmap->pm_stats.wired_count--; 2454 2455 /* 2456 * Wiring is not a hardware characteristic so there is no need to 2457 * invalidate TLB. 2458 */ 2459 pmap_pte_set_w(pte, wired); 2460 pmap_pte_release(pte); 2461 PMAP_UNLOCK(pmap); 2462 } 2463 2464 2465 2466 /* 2467 * Copy the range specified by src_addr/len 2468 * from the source map to the range dst_addr/len 2469 * in the destination map. 2470 * 2471 * This routine is only advisory and need not do anything. 2472 */ 2473 2474 void 2475 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 2476 vm_offset_t src_addr) 2477 { 2478 vm_page_t free; 2479 vm_offset_t addr; 2480 vm_offset_t end_addr = src_addr + len; 2481 vm_offset_t pdnxt; 2482 2483 if (dst_addr != src_addr) 2484 return; 2485 2486 if (!pmap_is_current(src_pmap)) 2487 return; 2488 2489 vm_page_lock_queues(); 2490 if (dst_pmap < src_pmap) { 2491 PMAP_LOCK(dst_pmap); 2492 PMAP_LOCK(src_pmap); 2493 } else { 2494 PMAP_LOCK(src_pmap); 2495 PMAP_LOCK(dst_pmap); 2496 } 2497 sched_pin(); 2498 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 2499 pt_entry_t *src_pte, *dst_pte; 2500 vm_page_t dstmpte, srcmpte; 2501 pd_entry_t srcptepaddr; 2502 unsigned ptepindex; 2503 2504 if (addr >= UPT_MIN_ADDRESS) 2505 panic("pmap_copy: invalid to pmap_copy page tables"); 2506 2507 pdnxt = (addr + NBPDR) & ~PDRMASK; 2508 ptepindex = addr >> PDRSHIFT; 2509 2510 srcptepaddr = src_pmap->pm_pdir[ptepindex]; 2511 if (srcptepaddr == 0) 2512 continue; 2513 2514 if (srcptepaddr & PG_PS) { 2515 if (dst_pmap->pm_pdir[ptepindex] == 0) { 2516 dst_pmap->pm_pdir[ptepindex] = srcptepaddr & 2517 ~PG_W; 2518 dst_pmap->pm_stats.resident_count += 2519 NBPDR / PAGE_SIZE; 2520 } 2521 continue; 2522 } 2523 2524 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr); 2525 if (srcmpte->wire_count == 0) 2526 panic("pmap_copy: source page table page is unused"); 2527 2528 if (pdnxt > end_addr) 2529 pdnxt = end_addr; 2530 2531 src_pte = vtopte(addr); 2532 while (addr < pdnxt) { 2533 pt_entry_t ptetemp; 2534 ptetemp = *src_pte; 2535 /* 2536 * we only virtual copy managed pages 2537 */ 2538 if ((ptetemp & PG_MANAGED) != 0) { 2539 dstmpte = pmap_allocpte(dst_pmap, addr, 2540 M_NOWAIT); 2541 if (dstmpte == NULL) 2542 break; 2543 dst_pte = pmap_pte_quick(dst_pmap, addr); 2544 if (*dst_pte == 0 && 2545 pmap_try_insert_pv_entry(dst_pmap, addr, 2546 PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) { 2547 /* 2548 * Clear the wired, modified, and 2549 * accessed (referenced) bits 2550 * during the copy. 2551 */ 2552 *dst_pte = ptetemp & ~(PG_W | PG_M | 2553 PG_A); 2554 dst_pmap->pm_stats.resident_count++; 2555 } else { 2556 free = NULL; 2557 if (pmap_unwire_pte_hold( dst_pmap, 2558 dstmpte, &free)) { 2559 pmap_invalidate_page(dst_pmap, 2560 addr); 2561 pmap_free_zero_pages(free); 2562 } 2563 } 2564 if (dstmpte->wire_count >= srcmpte->wire_count) 2565 break; 2566 } 2567 addr += PAGE_SIZE; 2568 src_pte++; 2569 } 2570 } 2571 sched_unpin(); 2572 vm_page_unlock_queues(); 2573 PMAP_UNLOCK(src_pmap); 2574 PMAP_UNLOCK(dst_pmap); 2575 } 2576 2577 static __inline void 2578 pagezero(void *page) 2579 { 2580 #if defined(I686_CPU) 2581 if (cpu_class == CPUCLASS_686) { 2582 #if defined(CPU_ENABLE_SSE) 2583 if (cpu_feature & CPUID_SSE2) 2584 sse2_pagezero(page); 2585 else 2586 #endif 2587 i686_pagezero(page); 2588 } else 2589 #endif 2590 bzero(page, PAGE_SIZE); 2591 } 2592 2593 /* 2594 * pmap_zero_page zeros the specified hardware page by mapping 2595 * the page into KVM and using bzero to clear its contents. 2596 */ 2597 void 2598 pmap_zero_page(vm_page_t m) 2599 { 2600 struct sysmaps *sysmaps; 2601 2602 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2603 mtx_lock(&sysmaps->lock); 2604 if (*sysmaps->CMAP2) 2605 panic("pmap_zero_page: CMAP2 busy"); 2606 sched_pin(); 2607 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2608 invlcaddr(sysmaps->CADDR2); 2609 pagezero(sysmaps->CADDR2); 2610 *sysmaps->CMAP2 = 0; 2611 sched_unpin(); 2612 mtx_unlock(&sysmaps->lock); 2613 } 2614 2615 /* 2616 * pmap_zero_page_area zeros the specified hardware page by mapping 2617 * the page into KVM and using bzero to clear its contents. 2618 * 2619 * off and size may not cover an area beyond a single hardware page. 2620 */ 2621 void 2622 pmap_zero_page_area(vm_page_t m, int off, int size) 2623 { 2624 struct sysmaps *sysmaps; 2625 2626 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2627 mtx_lock(&sysmaps->lock); 2628 if (*sysmaps->CMAP2) 2629 panic("pmap_zero_page: CMAP2 busy"); 2630 sched_pin(); 2631 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2632 invlcaddr(sysmaps->CADDR2); 2633 if (off == 0 && size == PAGE_SIZE) 2634 pagezero(sysmaps->CADDR2); 2635 else 2636 bzero((char *)sysmaps->CADDR2 + off, size); 2637 *sysmaps->CMAP2 = 0; 2638 sched_unpin(); 2639 mtx_unlock(&sysmaps->lock); 2640 } 2641 2642 /* 2643 * pmap_zero_page_idle zeros the specified hardware page by mapping 2644 * the page into KVM and using bzero to clear its contents. This 2645 * is intended to be called from the vm_pagezero process only and 2646 * outside of Giant. 2647 */ 2648 void 2649 pmap_zero_page_idle(vm_page_t m) 2650 { 2651 2652 if (*CMAP3) 2653 panic("pmap_zero_page: CMAP3 busy"); 2654 sched_pin(); 2655 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2656 invlcaddr(CADDR3); 2657 pagezero(CADDR3); 2658 *CMAP3 = 0; 2659 sched_unpin(); 2660 } 2661 2662 /* 2663 * pmap_copy_page copies the specified (machine independent) 2664 * page by mapping the page into virtual memory and using 2665 * bcopy to copy the page, one machine dependent page at a 2666 * time. 2667 */ 2668 void 2669 pmap_copy_page(vm_page_t src, vm_page_t dst) 2670 { 2671 struct sysmaps *sysmaps; 2672 2673 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2674 mtx_lock(&sysmaps->lock); 2675 if (*sysmaps->CMAP1) 2676 panic("pmap_copy_page: CMAP1 busy"); 2677 if (*sysmaps->CMAP2) 2678 panic("pmap_copy_page: CMAP2 busy"); 2679 sched_pin(); 2680 invlpg((u_int)sysmaps->CADDR1); 2681 invlpg((u_int)sysmaps->CADDR2); 2682 *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A; 2683 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M; 2684 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 2685 *sysmaps->CMAP1 = 0; 2686 *sysmaps->CMAP2 = 0; 2687 sched_unpin(); 2688 mtx_unlock(&sysmaps->lock); 2689 } 2690 2691 /* 2692 * Returns true if the pmap's pv is one of the first 2693 * 16 pvs linked to from this page. This count may 2694 * be changed upwards or downwards in the future; it 2695 * is only necessary that true be returned for a small 2696 * subset of pmaps for proper page aging. 2697 */ 2698 boolean_t 2699 pmap_page_exists_quick(pmap, m) 2700 pmap_t pmap; 2701 vm_page_t m; 2702 { 2703 pv_entry_t pv; 2704 int loops = 0; 2705 2706 if (m->flags & PG_FICTITIOUS) 2707 return FALSE; 2708 2709 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2710 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2711 if (pv->pv_pmap == pmap) { 2712 return TRUE; 2713 } 2714 loops++; 2715 if (loops >= 16) 2716 break; 2717 } 2718 return (FALSE); 2719 } 2720 2721 #define PMAP_REMOVE_PAGES_CURPROC_ONLY 2722 /* 2723 * Remove all pages from specified address space 2724 * this aids process exit speeds. Also, this code 2725 * is special cased for current process only, but 2726 * can have the more generic (and slightly slower) 2727 * mode enabled. This is much faster than pmap_remove 2728 * in the case of running down an entire address space. 2729 */ 2730 void 2731 pmap_remove_pages(pmap, sva, eva) 2732 pmap_t pmap; 2733 vm_offset_t sva, eva; 2734 { 2735 pt_entry_t *pte, tpte; 2736 vm_page_t m, free = NULL; 2737 pv_entry_t pv, npv; 2738 2739 #ifdef PMAP_REMOVE_PAGES_CURPROC_ONLY 2740 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 2741 printf("warning: pmap_remove_pages called with non-current pmap\n"); 2742 return; 2743 } 2744 #endif 2745 vm_page_lock_queues(); 2746 PMAP_LOCK(pmap); 2747 sched_pin(); 2748 for (pv = TAILQ_FIRST(&pmap->pm_pvlist); pv; pv = npv) { 2749 2750 if (pv->pv_va >= eva || pv->pv_va < sva) { 2751 npv = TAILQ_NEXT(pv, pv_plist); 2752 continue; 2753 } 2754 2755 #ifdef PMAP_REMOVE_PAGES_CURPROC_ONLY 2756 pte = vtopte(pv->pv_va); 2757 #else 2758 pte = pmap_pte_quick(pmap, pv->pv_va); 2759 #endif 2760 tpte = *pte; 2761 2762 if (tpte == 0) { 2763 printf("TPTE at %p IS ZERO @ VA %08x\n", 2764 pte, pv->pv_va); 2765 panic("bad pte"); 2766 } 2767 2768 /* 2769 * We cannot remove wired pages from a process' mapping at this time 2770 */ 2771 if (tpte & PG_W) { 2772 npv = TAILQ_NEXT(pv, pv_plist); 2773 continue; 2774 } 2775 2776 m = PHYS_TO_VM_PAGE(tpte); 2777 KASSERT(m->phys_addr == (tpte & PG_FRAME), 2778 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 2779 m, (uintmax_t)m->phys_addr, (uintmax_t)tpte)); 2780 2781 KASSERT(m < &vm_page_array[vm_page_array_size], 2782 ("pmap_remove_pages: bad tpte %#jx", (uintmax_t)tpte)); 2783 2784 pmap->pm_stats.resident_count--; 2785 2786 pte_clear(pte); 2787 2788 /* 2789 * Update the vm_page_t clean and reference bits. 2790 */ 2791 if (tpte & PG_M) { 2792 vm_page_dirty(m); 2793 } 2794 2795 npv = TAILQ_NEXT(pv, pv_plist); 2796 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist); 2797 2798 m->md.pv_list_count--; 2799 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2800 if (TAILQ_EMPTY(&m->md.pv_list)) 2801 vm_page_flag_clear(m, PG_WRITEABLE); 2802 2803 pmap_unuse_pt(pmap, pv->pv_va, &free); 2804 free_pv_entry(pv); 2805 } 2806 sched_unpin(); 2807 pmap_invalidate_all(pmap); 2808 pmap_free_zero_pages(free); 2809 vm_page_unlock_queues(); 2810 PMAP_UNLOCK(pmap); 2811 } 2812 2813 /* 2814 * pmap_is_modified: 2815 * 2816 * Return whether or not the specified physical page was modified 2817 * in any physical maps. 2818 */ 2819 boolean_t 2820 pmap_is_modified(vm_page_t m) 2821 { 2822 pv_entry_t pv; 2823 pt_entry_t *pte; 2824 boolean_t rv; 2825 2826 rv = FALSE; 2827 if (m->flags & PG_FICTITIOUS) 2828 return (rv); 2829 2830 sched_pin(); 2831 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2832 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2833 PMAP_LOCK(pv->pv_pmap); 2834 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va); 2835 rv = (*pte & PG_M) != 0; 2836 PMAP_UNLOCK(pv->pv_pmap); 2837 if (rv) 2838 break; 2839 } 2840 sched_unpin(); 2841 return (rv); 2842 } 2843 2844 /* 2845 * pmap_is_prefaultable: 2846 * 2847 * Return whether or not the specified virtual address is elgible 2848 * for prefault. 2849 */ 2850 boolean_t 2851 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 2852 { 2853 pt_entry_t *pte; 2854 boolean_t rv; 2855 2856 rv = FALSE; 2857 PMAP_LOCK(pmap); 2858 if (*pmap_pde(pmap, addr)) { 2859 pte = vtopte(addr); 2860 rv = *pte == 0; 2861 } 2862 PMAP_UNLOCK(pmap); 2863 return (rv); 2864 } 2865 2866 /* 2867 * Clear the given bit in each of the given page's ptes. The bit is 2868 * expressed as a 32-bit mask. Consequently, if the pte is 64 bits in 2869 * size, only a bit within the least significant 32 can be cleared. 2870 */ 2871 static __inline void 2872 pmap_clear_ptes(vm_page_t m, int bit) 2873 { 2874 register pv_entry_t pv; 2875 pt_entry_t pbits, *pte; 2876 2877 if ((m->flags & PG_FICTITIOUS) || 2878 (bit == PG_RW && (m->flags & PG_WRITEABLE) == 0)) 2879 return; 2880 2881 sched_pin(); 2882 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2883 /* 2884 * Loop over all current mappings setting/clearing as appropos If 2885 * setting RO do we need to clear the VAC? 2886 */ 2887 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2888 PMAP_LOCK(pv->pv_pmap); 2889 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va); 2890 retry: 2891 pbits = *pte; 2892 if (pbits & bit) { 2893 if (bit == PG_RW) { 2894 /* 2895 * Regardless of whether a pte is 32 or 64 bits 2896 * in size, PG_RW and PG_M are among the least 2897 * significant 32 bits. 2898 */ 2899 if (!atomic_cmpset_int((u_int *)pte, pbits, 2900 pbits & ~(PG_RW | PG_M))) 2901 goto retry; 2902 if (pbits & PG_M) { 2903 vm_page_dirty(m); 2904 } 2905 } else { 2906 atomic_clear_int((u_int *)pte, bit); 2907 } 2908 pmap_invalidate_page(pv->pv_pmap, pv->pv_va); 2909 } 2910 PMAP_UNLOCK(pv->pv_pmap); 2911 } 2912 if (bit == PG_RW) 2913 vm_page_flag_clear(m, PG_WRITEABLE); 2914 sched_unpin(); 2915 } 2916 2917 /* 2918 * pmap_page_protect: 2919 * 2920 * Lower the permission for all mappings to a given page. 2921 */ 2922 void 2923 pmap_page_protect(vm_page_t m, vm_prot_t prot) 2924 { 2925 if ((prot & VM_PROT_WRITE) == 0) { 2926 if (prot & (VM_PROT_READ | VM_PROT_EXECUTE)) { 2927 pmap_clear_ptes(m, PG_RW); 2928 } else { 2929 pmap_remove_all(m); 2930 } 2931 } 2932 } 2933 2934 /* 2935 * pmap_ts_referenced: 2936 * 2937 * Return a count of reference bits for a page, clearing those bits. 2938 * It is not necessary for every reference bit to be cleared, but it 2939 * is necessary that 0 only be returned when there are truly no 2940 * reference bits set. 2941 * 2942 * XXX: The exact number of bits to check and clear is a matter that 2943 * should be tested and standardized at some point in the future for 2944 * optimal aging of shared pages. 2945 */ 2946 int 2947 pmap_ts_referenced(vm_page_t m) 2948 { 2949 register pv_entry_t pv, pvf, pvn; 2950 pt_entry_t *pte; 2951 pt_entry_t v; 2952 int rtval = 0; 2953 2954 if (m->flags & PG_FICTITIOUS) 2955 return (rtval); 2956 2957 sched_pin(); 2958 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2959 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2960 2961 pvf = pv; 2962 2963 do { 2964 pvn = TAILQ_NEXT(pv, pv_list); 2965 2966 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2967 2968 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2969 2970 PMAP_LOCK(pv->pv_pmap); 2971 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va); 2972 2973 if (pte && ((v = pte_load(pte)) & PG_A) != 0) { 2974 atomic_clear_int((u_int *)pte, PG_A); 2975 pmap_invalidate_page(pv->pv_pmap, pv->pv_va); 2976 2977 rtval++; 2978 if (rtval > 4) { 2979 PMAP_UNLOCK(pv->pv_pmap); 2980 break; 2981 } 2982 } 2983 PMAP_UNLOCK(pv->pv_pmap); 2984 } while ((pv = pvn) != NULL && pv != pvf); 2985 } 2986 sched_unpin(); 2987 2988 return (rtval); 2989 } 2990 2991 /* 2992 * Clear the modify bits on the specified physical page. 2993 */ 2994 void 2995 pmap_clear_modify(vm_page_t m) 2996 { 2997 pmap_clear_ptes(m, PG_M); 2998 } 2999 3000 /* 3001 * pmap_clear_reference: 3002 * 3003 * Clear the reference bit on the specified physical page. 3004 */ 3005 void 3006 pmap_clear_reference(vm_page_t m) 3007 { 3008 pmap_clear_ptes(m, PG_A); 3009 } 3010 3011 /* 3012 * Miscellaneous support routines follow 3013 */ 3014 3015 /* 3016 * Map a set of physical memory pages into the kernel virtual 3017 * address space. Return a pointer to where it is mapped. This 3018 * routine is intended to be used for mapping device memory, 3019 * NOT real memory. 3020 */ 3021 void * 3022 pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode) 3023 { 3024 vm_offset_t va, tmpva, offset; 3025 3026 offset = pa & PAGE_MASK; 3027 size = roundup(offset + size, PAGE_SIZE); 3028 pa = pa & PG_FRAME; 3029 3030 if (pa < KERNLOAD && pa + size <= KERNLOAD) 3031 va = KERNBASE + pa; 3032 else 3033 va = kmem_alloc_nofault(kernel_map, size); 3034 if (!va) 3035 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 3036 3037 for (tmpva = va; size > 0; ) { 3038 pmap_kenter_attr(tmpva, pa, mode); 3039 size -= PAGE_SIZE; 3040 tmpva += PAGE_SIZE; 3041 pa += PAGE_SIZE; 3042 } 3043 pmap_invalidate_range(kernel_pmap, va, tmpva); 3044 pmap_invalidate_cache(); 3045 return ((void *)(va + offset)); 3046 } 3047 3048 void * 3049 pmap_mapdev(vm_paddr_t pa, vm_size_t size) 3050 { 3051 3052 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE)); 3053 } 3054 3055 void * 3056 pmap_mapbios(vm_paddr_t pa, vm_size_t size) 3057 { 3058 3059 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK)); 3060 } 3061 3062 void 3063 pmap_unmapdev(va, size) 3064 vm_offset_t va; 3065 vm_size_t size; 3066 { 3067 vm_offset_t base, offset, tmpva; 3068 3069 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 3070 return; 3071 base = va & PG_FRAME; 3072 offset = va & PAGE_MASK; 3073 size = roundup(offset + size, PAGE_SIZE); 3074 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 3075 pmap_kremove(tmpva); 3076 pmap_invalidate_range(kernel_pmap, va, tmpva); 3077 kmem_free(kernel_map, base, size); 3078 } 3079 3080 int 3081 pmap_change_attr(va, size, mode) 3082 vm_offset_t va; 3083 vm_size_t size; 3084 int mode; 3085 { 3086 vm_offset_t base, offset, tmpva; 3087 pt_entry_t *pte; 3088 u_int opte, npte; 3089 pd_entry_t *pde; 3090 3091 base = va & PG_FRAME; 3092 offset = va & PAGE_MASK; 3093 size = roundup(offset + size, PAGE_SIZE); 3094 3095 /* Only supported on kernel virtual addresses. */ 3096 if (base <= VM_MAXUSER_ADDRESS) 3097 return (EINVAL); 3098 3099 /* 4MB pages and pages that aren't mapped aren't supported. */ 3100 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 3101 pde = pmap_pde(kernel_pmap, tmpva); 3102 if (*pde & PG_PS) 3103 return (EINVAL); 3104 if (*pde == 0) 3105 return (EINVAL); 3106 pte = vtopte(va); 3107 if (*pte == 0) 3108 return (EINVAL); 3109 } 3110 3111 /* 3112 * Ok, all the pages exist and are 4k, so run through them updating 3113 * their cache mode. 3114 */ 3115 for (tmpva = base; size > 0; ) { 3116 pte = vtopte(tmpva); 3117 3118 /* 3119 * The cache mode bits are all in the low 32-bits of the 3120 * PTE, so we can just spin on updating the low 32-bits. 3121 */ 3122 do { 3123 opte = *(u_int *)pte; 3124 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT); 3125 npte |= pmap_cache_bits(mode, 0); 3126 } while (npte != opte && 3127 !atomic_cmpset_int((u_int *)pte, opte, npte)); 3128 tmpva += PAGE_SIZE; 3129 size -= PAGE_SIZE; 3130 } 3131 3132 /* 3133 * Flush CPU caches to make sure any data isn't cached that shouldn't 3134 * be, etc. 3135 */ 3136 pmap_invalidate_range(kernel_pmap, base, tmpva); 3137 pmap_invalidate_cache(); 3138 return (0); 3139 } 3140 3141 /* 3142 * perform the pmap work for mincore 3143 */ 3144 int 3145 pmap_mincore(pmap, addr) 3146 pmap_t pmap; 3147 vm_offset_t addr; 3148 { 3149 pt_entry_t *ptep, pte; 3150 vm_page_t m; 3151 int val = 0; 3152 3153 PMAP_LOCK(pmap); 3154 ptep = pmap_pte(pmap, addr); 3155 pte = (ptep != NULL) ? *ptep : 0; 3156 pmap_pte_release(ptep); 3157 PMAP_UNLOCK(pmap); 3158 3159 if (pte != 0) { 3160 vm_paddr_t pa; 3161 3162 val = MINCORE_INCORE; 3163 if ((pte & PG_MANAGED) == 0) 3164 return val; 3165 3166 pa = pte & PG_FRAME; 3167 3168 m = PHYS_TO_VM_PAGE(pa); 3169 3170 /* 3171 * Modified by us 3172 */ 3173 if (pte & PG_M) 3174 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 3175 else { 3176 /* 3177 * Modified by someone else 3178 */ 3179 vm_page_lock_queues(); 3180 if (m->dirty || pmap_is_modified(m)) 3181 val |= MINCORE_MODIFIED_OTHER; 3182 vm_page_unlock_queues(); 3183 } 3184 /* 3185 * Referenced by us 3186 */ 3187 if (pte & PG_A) 3188 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 3189 else { 3190 /* 3191 * Referenced by someone else 3192 */ 3193 vm_page_lock_queues(); 3194 if ((m->flags & PG_REFERENCED) || 3195 pmap_ts_referenced(m)) { 3196 val |= MINCORE_REFERENCED_OTHER; 3197 vm_page_flag_set(m, PG_REFERENCED); 3198 } 3199 vm_page_unlock_queues(); 3200 } 3201 } 3202 return val; 3203 } 3204 3205 void 3206 pmap_activate(struct thread *td) 3207 { 3208 pmap_t pmap, oldpmap; 3209 u_int32_t cr3; 3210 3211 critical_enter(); 3212 pmap = vmspace_pmap(td->td_proc->p_vmspace); 3213 oldpmap = PCPU_GET(curpmap); 3214 #if defined(SMP) 3215 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 3216 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 3217 #else 3218 oldpmap->pm_active &= ~1; 3219 pmap->pm_active |= 1; 3220 #endif 3221 #ifdef PAE 3222 cr3 = vtophys(pmap->pm_pdpt); 3223 #else 3224 cr3 = vtophys(pmap->pm_pdir); 3225 #endif 3226 /* 3227 * pmap_activate is for the current thread on the current cpu 3228 */ 3229 td->td_pcb->pcb_cr3 = cr3; 3230 load_cr3(cr3); 3231 PCPU_SET(curpmap, pmap); 3232 critical_exit(); 3233 } 3234 3235 vm_offset_t 3236 pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size) 3237 { 3238 3239 if ((obj == NULL) || (size < NBPDR) || (obj->type != OBJT_DEVICE)) { 3240 return addr; 3241 } 3242 3243 addr = (addr + PDRMASK) & ~PDRMASK; 3244 return addr; 3245 } 3246 3247 3248 #if defined(PMAP_DEBUG) 3249 pmap_pid_dump(int pid) 3250 { 3251 pmap_t pmap; 3252 struct proc *p; 3253 int npte = 0; 3254 int index; 3255 3256 sx_slock(&allproc_lock); 3257 FOREACH_PROC_IN_SYSTEM(p) { 3258 if (p->p_pid != pid) 3259 continue; 3260 3261 if (p->p_vmspace) { 3262 int i,j; 3263 index = 0; 3264 pmap = vmspace_pmap(p->p_vmspace); 3265 for (i = 0; i < NPDEPTD; i++) { 3266 pd_entry_t *pde; 3267 pt_entry_t *pte; 3268 vm_offset_t base = i << PDRSHIFT; 3269 3270 pde = &pmap->pm_pdir[i]; 3271 if (pde && pmap_pde_v(pde)) { 3272 for (j = 0; j < NPTEPG; j++) { 3273 vm_offset_t va = base + (j << PAGE_SHIFT); 3274 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 3275 if (index) { 3276 index = 0; 3277 printf("\n"); 3278 } 3279 sx_sunlock(&allproc_lock); 3280 return npte; 3281 } 3282 pte = pmap_pte(pmap, va); 3283 if (pte && pmap_pte_v(pte)) { 3284 pt_entry_t pa; 3285 vm_page_t m; 3286 pa = *pte; 3287 m = PHYS_TO_VM_PAGE(pa); 3288 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 3289 va, pa, m->hold_count, m->wire_count, m->flags); 3290 npte++; 3291 index++; 3292 if (index >= 2) { 3293 index = 0; 3294 printf("\n"); 3295 } else { 3296 printf(" "); 3297 } 3298 } 3299 } 3300 } 3301 } 3302 } 3303 } 3304 sx_sunlock(&allproc_lock); 3305 return npte; 3306 } 3307 #endif 3308 3309 #if defined(DEBUG) 3310 3311 static void pads(pmap_t pm); 3312 void pmap_pvdump(vm_offset_t pa); 3313 3314 /* print address space of pmap*/ 3315 static void 3316 pads(pm) 3317 pmap_t pm; 3318 { 3319 int i, j; 3320 vm_paddr_t va; 3321 pt_entry_t *ptep; 3322 3323 if (pm == kernel_pmap) 3324 return; 3325 for (i = 0; i < NPDEPTD; i++) 3326 if (pm->pm_pdir[i]) 3327 for (j = 0; j < NPTEPG; j++) { 3328 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 3329 if (pm == kernel_pmap && va < KERNBASE) 3330 continue; 3331 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 3332 continue; 3333 ptep = pmap_pte(pm, va); 3334 if (pmap_pte_v(ptep)) 3335 printf("%x:%x ", va, *ptep); 3336 }; 3337 3338 } 3339 3340 void 3341 pmap_pvdump(pa) 3342 vm_paddr_t pa; 3343 { 3344 pv_entry_t pv; 3345 vm_page_t m; 3346 3347 printf("pa %x", pa); 3348 m = PHYS_TO_VM_PAGE(pa); 3349 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3350 printf(" -> pmap %p, va %x", (void *)pv->pv_pmap, pv->pv_va); 3351 pads(pv->pv_pmap); 3352 } 3353 printf(" "); 3354 } 3355 #endif
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