Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/i386/i386/swtch.s
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1 /*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 4. Neither the name of the University nor the names of its contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 * $FreeBSD: releng/11.0/sys/i386/i386/swtch.s 282274 2015-04-30 15:48:48Z jhb $ 33 */ 34 35 #include "opt_npx.h" 36 #include "opt_sched.h" 37 38 #include <machine/asmacros.h> 39 40 #include "assym.s" 41 42 #if defined(SMP) && defined(SCHED_ULE) 43 #define SETOP xchgl 44 #define BLOCK_SPIN(reg) \ 45 movl $blocked_lock,%eax ; \ 46 100: ; \ 47 lock ; \ 48 cmpxchgl %eax,TD_LOCK(reg) ; \ 49 jne 101f ; \ 50 pause ; \ 51 jmp 100b ; \ 52 101: 53 #else 54 #define SETOP movl 55 #define BLOCK_SPIN(reg) 56 #endif 57 58 /*****************************************************************************/ 59 /* Scheduling */ 60 /*****************************************************************************/ 61 62 .text 63 64 /* 65 * cpu_throw() 66 * 67 * This is the second half of cpu_switch(). It is used when the current 68 * thread is either a dummy or slated to die, and we no longer care 69 * about its state. This is only a slight optimization and is probably 70 * not worth it anymore. Note that we need to clear the pm_active bits so 71 * we do need the old proc if it still exists. 72 * 0(%esp) = ret 73 * 4(%esp) = oldtd 74 * 8(%esp) = newtd 75 */ 76 ENTRY(cpu_throw) 77 movl PCPU(CPUID), %esi 78 movl 4(%esp),%ecx /* Old thread */ 79 testl %ecx,%ecx /* no thread? */ 80 jz 1f 81 /* release bit from old pm_active */ 82 movl PCPU(CURPMAP), %ebx 83 #ifdef SMP 84 lock 85 #endif 86 btrl %esi, PM_ACTIVE(%ebx) /* clear old */ 87 1: 88 movl 8(%esp),%ecx /* New thread */ 89 movl TD_PCB(%ecx),%edx 90 movl PCB_CR3(%edx),%eax 91 movl %eax,%cr3 92 /* set bit in new pm_active */ 93 movl TD_PROC(%ecx),%eax 94 movl P_VMSPACE(%eax), %ebx 95 addl $VM_PMAP, %ebx 96 movl %ebx, PCPU(CURPMAP) 97 #ifdef SMP 98 lock 99 #endif 100 btsl %esi, PM_ACTIVE(%ebx) /* set new */ 101 jmp sw1 102 END(cpu_throw) 103 104 /* 105 * cpu_switch(old, new) 106 * 107 * Save the current thread state, then select the next thread to run 108 * and load its state. 109 * 0(%esp) = ret 110 * 4(%esp) = oldtd 111 * 8(%esp) = newtd 112 * 12(%esp) = newlock 113 */ 114 ENTRY(cpu_switch) 115 116 /* Switch to new thread. First, save context. */ 117 movl 4(%esp),%ecx 118 119 #ifdef INVARIANTS 120 testl %ecx,%ecx /* no thread? */ 121 jz badsw2 /* no, panic */ 122 #endif 123 124 movl TD_PCB(%ecx),%edx 125 126 movl (%esp),%eax /* Hardware registers */ 127 movl %eax,PCB_EIP(%edx) 128 movl %ebx,PCB_EBX(%edx) 129 movl %esp,PCB_ESP(%edx) 130 movl %ebp,PCB_EBP(%edx) 131 movl %esi,PCB_ESI(%edx) 132 movl %edi,PCB_EDI(%edx) 133 mov %gs,PCB_GS(%edx) 134 pushfl /* PSL */ 135 popl PCB_PSL(%edx) 136 /* Test if debug registers should be saved. */ 137 testl $PCB_DBREGS,PCB_FLAGS(%edx) 138 jz 1f /* no, skip over */ 139 movl %dr7,%eax /* yes, do the save */ 140 movl %eax,PCB_DR7(%edx) 141 andl $0x0000fc00, %eax /* disable all watchpoints */ 142 movl %eax,%dr7 143 movl %dr6,%eax 144 movl %eax,PCB_DR6(%edx) 145 movl %dr3,%eax 146 movl %eax,PCB_DR3(%edx) 147 movl %dr2,%eax 148 movl %eax,PCB_DR2(%edx) 149 movl %dr1,%eax 150 movl %eax,PCB_DR1(%edx) 151 movl %dr0,%eax 152 movl %eax,PCB_DR0(%edx) 153 1: 154 155 #ifdef DEV_NPX 156 /* have we used fp, and need a save? */ 157 cmpl %ecx,PCPU(FPCURTHREAD) 158 jne 1f 159 pushl PCB_SAVEFPU(%edx) /* h/w bugs make saving complicated */ 160 call npxsave /* do it in a big C function */ 161 popl %eax 162 1: 163 #endif 164 165 /* Save is done. Now fire up new thread. Leave old vmspace. */ 166 movl 4(%esp),%edi 167 movl 8(%esp),%ecx /* New thread */ 168 movl 12(%esp),%esi /* New lock */ 169 #ifdef INVARIANTS 170 testl %ecx,%ecx /* no thread? */ 171 jz badsw3 /* no, panic */ 172 #endif 173 movl TD_PCB(%ecx),%edx 174 175 /* switch address space */ 176 movl PCB_CR3(%edx),%eax 177 movl %cr3,%ebx /* The same address space? */ 178 cmpl %ebx,%eax 179 je sw0 180 movl %eax,%cr3 /* new address space */ 181 movl %esi,%eax 182 movl PCPU(CPUID),%esi 183 SETOP %eax,TD_LOCK(%edi) /* Switchout td_lock */ 184 185 /* Release bit from old pmap->pm_active */ 186 movl PCPU(CURPMAP), %ebx 187 #ifdef SMP 188 lock 189 #endif 190 btrl %esi, PM_ACTIVE(%ebx) /* clear old */ 191 192 /* Set bit in new pmap->pm_active */ 193 movl TD_PROC(%ecx),%eax /* newproc */ 194 movl P_VMSPACE(%eax), %ebx 195 addl $VM_PMAP, %ebx 196 movl %ebx, PCPU(CURPMAP) 197 #ifdef SMP 198 lock 199 #endif 200 btsl %esi, PM_ACTIVE(%ebx) /* set new */ 201 jmp sw1 202 203 sw0: 204 SETOP %esi,TD_LOCK(%edi) /* Switchout td_lock */ 205 sw1: 206 BLOCK_SPIN(%ecx) 207 /* 208 * At this point, we've switched address spaces and are ready 209 * to load up the rest of the next context. 210 */ 211 cmpl $0, PCB_EXT(%edx) /* has pcb extension? */ 212 je 1f /* If not, use the default */ 213 movl $1, PCPU(PRIVATE_TSS) /* mark use of private tss */ 214 movl PCB_EXT(%edx), %edi /* new tss descriptor */ 215 jmp 2f /* Load it up */ 216 217 1: /* 218 * Use the common default TSS instead of our own. 219 * Set our stack pointer into the TSS, it's set to just 220 * below the PCB. In C, common_tss.tss_esp0 = &pcb - 16; 221 */ 222 leal -16(%edx), %ebx /* leave space for vm86 */ 223 movl %ebx, PCPU(COMMON_TSS) + TSS_ESP0 224 225 /* 226 * Test this CPU's bit in the bitmap to see if this 227 * CPU was using a private TSS. 228 */ 229 cmpl $0, PCPU(PRIVATE_TSS) /* Already using the common? */ 230 je 3f /* if so, skip reloading */ 231 movl $0, PCPU(PRIVATE_TSS) 232 PCPU_ADDR(COMMON_TSSD, %edi) 233 2: 234 /* Move correct tss descriptor into GDT slot, then reload tr. */ 235 movl PCPU(TSS_GDT), %ebx /* entry in GDT */ 236 movl 0(%edi), %eax 237 movl 4(%edi), %esi 238 movl %eax, 0(%ebx) 239 movl %esi, 4(%ebx) 240 movl $GPROC0_SEL*8, %esi /* GSEL(GPROC0_SEL, SEL_KPL) */ 241 ltr %si 242 3: 243 244 /* Copy the %fs and %gs selectors into this pcpu gdt */ 245 leal PCB_FSD(%edx), %esi 246 movl PCPU(FSGS_GDT), %edi 247 movl 0(%esi), %eax /* %fs selector */ 248 movl 4(%esi), %ebx 249 movl %eax, 0(%edi) 250 movl %ebx, 4(%edi) 251 movl 8(%esi), %eax /* %gs selector, comes straight after */ 252 movl 12(%esi), %ebx 253 movl %eax, 8(%edi) 254 movl %ebx, 12(%edi) 255 256 /* Restore context. */ 257 movl PCB_EBX(%edx),%ebx 258 movl PCB_ESP(%edx),%esp 259 movl PCB_EBP(%edx),%ebp 260 movl PCB_ESI(%edx),%esi 261 movl PCB_EDI(%edx),%edi 262 movl PCB_EIP(%edx),%eax 263 movl %eax,(%esp) 264 pushl PCB_PSL(%edx) 265 popfl 266 267 movl %edx, PCPU(CURPCB) 268 movl TD_TID(%ecx),%eax 269 movl %ecx, PCPU(CURTHREAD) /* into next thread */ 270 271 /* 272 * Determine the LDT to use and load it if is the default one and 273 * that is not the current one. 274 */ 275 movl TD_PROC(%ecx),%eax 276 cmpl $0,P_MD+MD_LDT(%eax) 277 jnz 1f 278 movl _default_ldt,%eax 279 cmpl PCPU(CURRENTLDT),%eax 280 je 2f 281 lldt _default_ldt 282 movl %eax,PCPU(CURRENTLDT) 283 jmp 2f 284 1: 285 /* Load the LDT when it is not the default one. */ 286 pushl %edx /* Preserve pointer to pcb. */ 287 addl $P_MD,%eax /* Pointer to mdproc is arg. */ 288 pushl %eax 289 call set_user_ldt 290 addl $4,%esp 291 popl %edx 292 2: 293 294 /* This must be done after loading the user LDT. */ 295 .globl cpu_switch_load_gs 296 cpu_switch_load_gs: 297 mov PCB_GS(%edx),%gs 298 299 /* Test if debug registers should be restored. */ 300 testl $PCB_DBREGS,PCB_FLAGS(%edx) 301 jz 1f 302 303 /* 304 * Restore debug registers. The special code for dr7 is to 305 * preserve the current values of its reserved bits. 306 */ 307 movl PCB_DR6(%edx),%eax 308 movl %eax,%dr6 309 movl PCB_DR3(%edx),%eax 310 movl %eax,%dr3 311 movl PCB_DR2(%edx),%eax 312 movl %eax,%dr2 313 movl PCB_DR1(%edx),%eax 314 movl %eax,%dr1 315 movl PCB_DR0(%edx),%eax 316 movl %eax,%dr0 317 movl %dr7,%eax 318 andl $0x0000fc00,%eax 319 movl PCB_DR7(%edx),%ecx 320 andl $~0x0000fc00,%ecx 321 orl %ecx,%eax 322 movl %eax,%dr7 323 1: 324 ret 325 326 #ifdef INVARIANTS 327 badsw1: 328 pushal 329 pushl $sw0_1 330 call panic 331 sw0_1: .asciz "cpu_throw: no newthread supplied" 332 333 badsw2: 334 pushal 335 pushl $sw0_2 336 call panic 337 sw0_2: .asciz "cpu_switch: no curthread supplied" 338 339 badsw3: 340 pushal 341 pushl $sw0_3 342 call panic 343 sw0_3: .asciz "cpu_switch: no newthread supplied" 344 #endif 345 END(cpu_switch) 346 347 /* 348 * savectx(pcb) 349 * Update pcb, saving current processor state. 350 */ 351 ENTRY(savectx) 352 /* Fetch PCB. */ 353 movl 4(%esp),%ecx 354 355 /* Save caller's return address. Child won't execute this routine. */ 356 movl (%esp),%eax 357 movl %eax,PCB_EIP(%ecx) 358 359 movl %cr3,%eax 360 movl %eax,PCB_CR3(%ecx) 361 362 movl %ebx,PCB_EBX(%ecx) 363 movl %esp,PCB_ESP(%ecx) 364 movl %ebp,PCB_EBP(%ecx) 365 movl %esi,PCB_ESI(%ecx) 366 movl %edi,PCB_EDI(%ecx) 367 mov %gs,PCB_GS(%ecx) 368 pushfl 369 popl PCB_PSL(%ecx) 370 371 movl %cr0,%eax 372 movl %eax,PCB_CR0(%ecx) 373 movl %cr2,%eax 374 movl %eax,PCB_CR2(%ecx) 375 movl %cr4,%eax 376 movl %eax,PCB_CR4(%ecx) 377 378 movl %dr0,%eax 379 movl %eax,PCB_DR0(%ecx) 380 movl %dr1,%eax 381 movl %eax,PCB_DR1(%ecx) 382 movl %dr2,%eax 383 movl %eax,PCB_DR2(%ecx) 384 movl %dr3,%eax 385 movl %eax,PCB_DR3(%ecx) 386 movl %dr6,%eax 387 movl %eax,PCB_DR6(%ecx) 388 movl %dr7,%eax 389 movl %eax,PCB_DR7(%ecx) 390 391 mov %ds,PCB_DS(%ecx) 392 mov %es,PCB_ES(%ecx) 393 mov %fs,PCB_FS(%ecx) 394 mov %ss,PCB_SS(%ecx) 395 396 sgdt PCB_GDT(%ecx) 397 sidt PCB_IDT(%ecx) 398 sldt PCB_LDT(%ecx) 399 str PCB_TR(%ecx) 400 401 movl $1,%eax 402 ret 403 END(savectx) 404 405 /* 406 * resumectx(pcb) __fastcall 407 * Resuming processor state from pcb. 408 */ 409 ENTRY(resumectx) 410 /* Restore GDT. */ 411 lgdt PCB_GDT(%ecx) 412 413 /* Restore segment registers */ 414 movzwl PCB_DS(%ecx),%eax 415 mov %ax,%ds 416 movzwl PCB_ES(%ecx),%eax 417 mov %ax,%es 418 movzwl PCB_FS(%ecx),%eax 419 mov %ax,%fs 420 movzwl PCB_GS(%ecx),%eax 421 movw %ax,%gs 422 movzwl PCB_SS(%ecx),%eax 423 mov %ax,%ss 424 425 /* Restore CR2, CR4, CR3 and CR0 */ 426 movl PCB_CR2(%ecx),%eax 427 movl %eax,%cr2 428 movl PCB_CR4(%ecx),%eax 429 movl %eax,%cr4 430 movl PCB_CR3(%ecx),%eax 431 movl %eax,%cr3 432 movl PCB_CR0(%ecx),%eax 433 movl %eax,%cr0 434 jmp 1f 435 1: 436 437 /* Restore descriptor tables */ 438 lidt PCB_IDT(%ecx) 439 lldt PCB_LDT(%ecx) 440 441 #define SDT_SYS386TSS 9 442 #define SDT_SYS386BSY 11 443 /* Clear "task busy" bit and reload TR */ 444 movl PCPU(TSS_GDT),%eax 445 andb $(~SDT_SYS386BSY | SDT_SYS386TSS),5(%eax) 446 movzwl PCB_TR(%ecx),%eax 447 ltr %ax 448 #undef SDT_SYS386TSS 449 #undef SDT_SYS386BSY 450 451 /* Restore debug registers */ 452 movl PCB_DR0(%ecx),%eax 453 movl %eax,%dr0 454 movl PCB_DR1(%ecx),%eax 455 movl %eax,%dr1 456 movl PCB_DR2(%ecx),%eax 457 movl %eax,%dr2 458 movl PCB_DR3(%ecx),%eax 459 movl %eax,%dr3 460 movl PCB_DR6(%ecx),%eax 461 movl %eax,%dr6 462 movl PCB_DR7(%ecx),%eax 463 movl %eax,%dr7 464 465 /* Restore other registers */ 466 movl PCB_EDI(%ecx),%edi 467 movl PCB_ESI(%ecx),%esi 468 movl PCB_EBP(%ecx),%ebp 469 movl PCB_ESP(%ecx),%esp 470 movl PCB_EBX(%ecx),%ebx 471 472 /* reload code selector by turning return into intersegmental return */ 473 pushl PCB_EIP(%ecx) 474 movl $KCSEL,4(%esp) 475 xorl %eax,%eax 476 lret 477 END(resumectx)
Cache object: d5ea1c50e34064bdbda1e79468cee3b3
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