Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/i386/i386/swtch.s
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1 /*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 4. Neither the name of the University nor the names of its contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 * $FreeBSD: releng/11.1/sys/i386/i386/swtch.s 335465 2018-06-21 05:17:13Z gordon $ 33 */ 34 35 #include "opt_sched.h" 36 37 #include <machine/asmacros.h> 38 39 #include "assym.s" 40 41 #if defined(SMP) && defined(SCHED_ULE) 42 #define SETOP xchgl 43 #define BLOCK_SPIN(reg) \ 44 movl $blocked_lock,%eax ; \ 45 100: ; \ 46 lock ; \ 47 cmpxchgl %eax,TD_LOCK(reg) ; \ 48 jne 101f ; \ 49 pause ; \ 50 jmp 100b ; \ 51 101: 52 #else 53 #define SETOP movl 54 #define BLOCK_SPIN(reg) 55 #endif 56 57 /*****************************************************************************/ 58 /* Scheduling */ 59 /*****************************************************************************/ 60 61 .text 62 63 /* 64 * cpu_throw() 65 * 66 * This is the second half of cpu_switch(). It is used when the current 67 * thread is either a dummy or slated to die, and we no longer care 68 * about its state. This is only a slight optimization and is probably 69 * not worth it anymore. Note that we need to clear the pm_active bits so 70 * we do need the old proc if it still exists. 71 * 0(%esp) = ret 72 * 4(%esp) = oldtd 73 * 8(%esp) = newtd 74 */ 75 ENTRY(cpu_throw) 76 movl PCPU(CPUID), %esi 77 movl 4(%esp),%ecx /* Old thread */ 78 testl %ecx,%ecx /* no thread? */ 79 jz 1f 80 /* release bit from old pm_active */ 81 movl PCPU(CURPMAP), %ebx 82 #ifdef SMP 83 lock 84 #endif 85 btrl %esi, PM_ACTIVE(%ebx) /* clear old */ 86 1: 87 movl 8(%esp),%ecx /* New thread */ 88 movl TD_PCB(%ecx),%edx 89 movl PCB_CR3(%edx),%eax 90 movl %eax,%cr3 91 /* set bit in new pm_active */ 92 movl TD_PROC(%ecx),%eax 93 movl P_VMSPACE(%eax), %ebx 94 addl $VM_PMAP, %ebx 95 movl %ebx, PCPU(CURPMAP) 96 #ifdef SMP 97 lock 98 #endif 99 btsl %esi, PM_ACTIVE(%ebx) /* set new */ 100 jmp sw1 101 END(cpu_throw) 102 103 /* 104 * cpu_switch(old, new) 105 * 106 * Save the current thread state, then select the next thread to run 107 * and load its state. 108 * 0(%esp) = ret 109 * 4(%esp) = oldtd 110 * 8(%esp) = newtd 111 * 12(%esp) = newlock 112 */ 113 ENTRY(cpu_switch) 114 115 /* Switch to new thread. First, save context. */ 116 movl 4(%esp),%ecx 117 118 #ifdef INVARIANTS 119 testl %ecx,%ecx /* no thread? */ 120 jz badsw2 /* no, panic */ 121 #endif 122 123 movl TD_PCB(%ecx),%edx 124 125 movl (%esp),%eax /* Hardware registers */ 126 movl %eax,PCB_EIP(%edx) 127 movl %ebx,PCB_EBX(%edx) 128 movl %esp,PCB_ESP(%edx) 129 movl %ebp,PCB_EBP(%edx) 130 movl %esi,PCB_ESI(%edx) 131 movl %edi,PCB_EDI(%edx) 132 mov %gs,PCB_GS(%edx) 133 pushfl /* PSL */ 134 popl PCB_PSL(%edx) 135 /* Test if debug registers should be saved. */ 136 testl $PCB_DBREGS,PCB_FLAGS(%edx) 137 jz 1f /* no, skip over */ 138 movl %dr7,%eax /* yes, do the save */ 139 movl %eax,PCB_DR7(%edx) 140 andl $0x0000fc00, %eax /* disable all watchpoints */ 141 movl %eax,%dr7 142 movl %dr6,%eax 143 movl %eax,PCB_DR6(%edx) 144 movl %dr3,%eax 145 movl %eax,PCB_DR3(%edx) 146 movl %dr2,%eax 147 movl %eax,PCB_DR2(%edx) 148 movl %dr1,%eax 149 movl %eax,PCB_DR1(%edx) 150 movl %dr0,%eax 151 movl %eax,PCB_DR0(%edx) 152 1: 153 154 /* have we used fp, and need a save? */ 155 cmpl %ecx,PCPU(FPCURTHREAD) 156 jne 1f 157 pushl PCB_SAVEFPU(%edx) /* h/w bugs make saving complicated */ 158 call npxsave /* do it in a big C function */ 159 popl %eax 160 1: 161 162 /* Save is done. Now fire up new thread. Leave old vmspace. */ 163 movl 4(%esp),%edi 164 movl 8(%esp),%ecx /* New thread */ 165 movl 12(%esp),%esi /* New lock */ 166 #ifdef INVARIANTS 167 testl %ecx,%ecx /* no thread? */ 168 jz badsw3 /* no, panic */ 169 #endif 170 movl TD_PCB(%ecx),%edx 171 172 /* switch address space */ 173 movl PCB_CR3(%edx),%eax 174 movl %cr3,%ebx /* The same address space? */ 175 cmpl %ebx,%eax 176 je sw0 177 movl %eax,%cr3 /* new address space */ 178 movl %esi,%eax 179 movl PCPU(CPUID),%esi 180 SETOP %eax,TD_LOCK(%edi) /* Switchout td_lock */ 181 182 /* Release bit from old pmap->pm_active */ 183 movl PCPU(CURPMAP), %ebx 184 #ifdef SMP 185 lock 186 #endif 187 btrl %esi, PM_ACTIVE(%ebx) /* clear old */ 188 189 /* Set bit in new pmap->pm_active */ 190 movl TD_PROC(%ecx),%eax /* newproc */ 191 movl P_VMSPACE(%eax), %ebx 192 addl $VM_PMAP, %ebx 193 movl %ebx, PCPU(CURPMAP) 194 #ifdef SMP 195 lock 196 #endif 197 btsl %esi, PM_ACTIVE(%ebx) /* set new */ 198 jmp sw1 199 200 sw0: 201 SETOP %esi,TD_LOCK(%edi) /* Switchout td_lock */ 202 sw1: 203 BLOCK_SPIN(%ecx) 204 /* 205 * At this point, we've switched address spaces and are ready 206 * to load up the rest of the next context. 207 */ 208 cmpl $0, PCB_EXT(%edx) /* has pcb extension? */ 209 je 1f /* If not, use the default */ 210 movl $1, PCPU(PRIVATE_TSS) /* mark use of private tss */ 211 movl PCB_EXT(%edx), %edi /* new tss descriptor */ 212 jmp 2f /* Load it up */ 213 214 1: /* 215 * Use the common default TSS instead of our own. 216 * Set our stack pointer into the TSS, it's set to just 217 * below the PCB. In C, common_tss.tss_esp0 = &pcb - 16; 218 */ 219 leal -16(%edx), %ebx /* leave space for vm86 */ 220 movl %ebx, PCPU(COMMON_TSS) + TSS_ESP0 221 222 /* 223 * Test this CPU's bit in the bitmap to see if this 224 * CPU was using a private TSS. 225 */ 226 cmpl $0, PCPU(PRIVATE_TSS) /* Already using the common? */ 227 je 3f /* if so, skip reloading */ 228 movl $0, PCPU(PRIVATE_TSS) 229 PCPU_ADDR(COMMON_TSSD, %edi) 230 2: 231 /* Move correct tss descriptor into GDT slot, then reload tr. */ 232 movl PCPU(TSS_GDT), %ebx /* entry in GDT */ 233 movl 0(%edi), %eax 234 movl 4(%edi), %esi 235 movl %eax, 0(%ebx) 236 movl %esi, 4(%ebx) 237 movl $GPROC0_SEL*8, %esi /* GSEL(GPROC0_SEL, SEL_KPL) */ 238 ltr %si 239 3: 240 241 /* Copy the %fs and %gs selectors into this pcpu gdt */ 242 leal PCB_FSD(%edx), %esi 243 movl PCPU(FSGS_GDT), %edi 244 movl 0(%esi), %eax /* %fs selector */ 245 movl 4(%esi), %ebx 246 movl %eax, 0(%edi) 247 movl %ebx, 4(%edi) 248 movl 8(%esi), %eax /* %gs selector, comes straight after */ 249 movl 12(%esi), %ebx 250 movl %eax, 8(%edi) 251 movl %ebx, 12(%edi) 252 253 /* Restore context. */ 254 movl PCB_EBX(%edx),%ebx 255 movl PCB_ESP(%edx),%esp 256 movl PCB_EBP(%edx),%ebp 257 movl PCB_ESI(%edx),%esi 258 movl PCB_EDI(%edx),%edi 259 movl PCB_EIP(%edx),%eax 260 movl %eax,(%esp) 261 pushl PCB_PSL(%edx) 262 popfl 263 264 movl %edx, PCPU(CURPCB) 265 movl TD_TID(%ecx),%eax 266 movl %ecx, PCPU(CURTHREAD) /* into next thread */ 267 268 /* 269 * Determine the LDT to use and load it if is the default one and 270 * that is not the current one. 271 */ 272 movl TD_PROC(%ecx),%eax 273 cmpl $0,P_MD+MD_LDT(%eax) 274 jnz 1f 275 movl _default_ldt,%eax 276 cmpl PCPU(CURRENTLDT),%eax 277 je 2f 278 lldt _default_ldt 279 movl %eax,PCPU(CURRENTLDT) 280 jmp 2f 281 1: 282 /* Load the LDT when it is not the default one. */ 283 pushl %edx /* Preserve pointer to pcb. */ 284 addl $P_MD,%eax /* Pointer to mdproc is arg. */ 285 pushl %eax 286 call set_user_ldt 287 addl $4,%esp 288 popl %edx 289 2: 290 291 /* This must be done after loading the user LDT. */ 292 .globl cpu_switch_load_gs 293 cpu_switch_load_gs: 294 mov PCB_GS(%edx),%gs 295 296 pushl %edx 297 pushl PCPU(CURTHREAD) 298 call npxswitch 299 popl %edx 300 popl %edx 301 302 /* Test if debug registers should be restored. */ 303 testl $PCB_DBREGS,PCB_FLAGS(%edx) 304 jz 1f 305 306 /* 307 * Restore debug registers. The special code for dr7 is to 308 * preserve the current values of its reserved bits. 309 */ 310 movl PCB_DR6(%edx),%eax 311 movl %eax,%dr6 312 movl PCB_DR3(%edx),%eax 313 movl %eax,%dr3 314 movl PCB_DR2(%edx),%eax 315 movl %eax,%dr2 316 movl PCB_DR1(%edx),%eax 317 movl %eax,%dr1 318 movl PCB_DR0(%edx),%eax 319 movl %eax,%dr0 320 movl %dr7,%eax 321 andl $0x0000fc00,%eax 322 movl PCB_DR7(%edx),%ecx 323 andl $~0x0000fc00,%ecx 324 orl %ecx,%eax 325 movl %eax,%dr7 326 1: 327 ret 328 329 #ifdef INVARIANTS 330 badsw1: 331 pushal 332 pushl $sw0_1 333 call panic 334 sw0_1: .asciz "cpu_throw: no newthread supplied" 335 336 badsw2: 337 pushal 338 pushl $sw0_2 339 call panic 340 sw0_2: .asciz "cpu_switch: no curthread supplied" 341 342 badsw3: 343 pushal 344 pushl $sw0_3 345 call panic 346 sw0_3: .asciz "cpu_switch: no newthread supplied" 347 #endif 348 END(cpu_switch) 349 350 /* 351 * savectx(pcb) 352 * Update pcb, saving current processor state. 353 */ 354 ENTRY(savectx) 355 /* Fetch PCB. */ 356 movl 4(%esp),%ecx 357 358 /* Save caller's return address. Child won't execute this routine. */ 359 movl (%esp),%eax 360 movl %eax,PCB_EIP(%ecx) 361 362 movl %cr3,%eax 363 movl %eax,PCB_CR3(%ecx) 364 365 movl %ebx,PCB_EBX(%ecx) 366 movl %esp,PCB_ESP(%ecx) 367 movl %ebp,PCB_EBP(%ecx) 368 movl %esi,PCB_ESI(%ecx) 369 movl %edi,PCB_EDI(%ecx) 370 mov %gs,PCB_GS(%ecx) 371 pushfl 372 popl PCB_PSL(%ecx) 373 374 movl %cr0,%eax 375 movl %eax,PCB_CR0(%ecx) 376 movl %cr2,%eax 377 movl %eax,PCB_CR2(%ecx) 378 movl %cr4,%eax 379 movl %eax,PCB_CR4(%ecx) 380 381 movl %dr0,%eax 382 movl %eax,PCB_DR0(%ecx) 383 movl %dr1,%eax 384 movl %eax,PCB_DR1(%ecx) 385 movl %dr2,%eax 386 movl %eax,PCB_DR2(%ecx) 387 movl %dr3,%eax 388 movl %eax,PCB_DR3(%ecx) 389 movl %dr6,%eax 390 movl %eax,PCB_DR6(%ecx) 391 movl %dr7,%eax 392 movl %eax,PCB_DR7(%ecx) 393 394 mov %ds,PCB_DS(%ecx) 395 mov %es,PCB_ES(%ecx) 396 mov %fs,PCB_FS(%ecx) 397 mov %ss,PCB_SS(%ecx) 398 399 sgdt PCB_GDT(%ecx) 400 sidt PCB_IDT(%ecx) 401 sldt PCB_LDT(%ecx) 402 str PCB_TR(%ecx) 403 404 movl $1,%eax 405 ret 406 END(savectx) 407 408 /* 409 * resumectx(pcb) __fastcall 410 * Resuming processor state from pcb. 411 */ 412 ENTRY(resumectx) 413 /* Restore GDT. */ 414 lgdt PCB_GDT(%ecx) 415 416 /* Restore segment registers */ 417 movzwl PCB_DS(%ecx),%eax 418 mov %ax,%ds 419 movzwl PCB_ES(%ecx),%eax 420 mov %ax,%es 421 movzwl PCB_FS(%ecx),%eax 422 mov %ax,%fs 423 movzwl PCB_GS(%ecx),%eax 424 movw %ax,%gs 425 movzwl PCB_SS(%ecx),%eax 426 mov %ax,%ss 427 428 /* Restore CR2, CR4, CR3 and CR0 */ 429 movl PCB_CR2(%ecx),%eax 430 movl %eax,%cr2 431 movl PCB_CR4(%ecx),%eax 432 movl %eax,%cr4 433 movl PCB_CR3(%ecx),%eax 434 movl %eax,%cr3 435 movl PCB_CR0(%ecx),%eax 436 movl %eax,%cr0 437 jmp 1f 438 1: 439 440 /* Restore descriptor tables */ 441 lidt PCB_IDT(%ecx) 442 lldt PCB_LDT(%ecx) 443 444 #define SDT_SYS386TSS 9 445 #define SDT_SYS386BSY 11 446 /* Clear "task busy" bit and reload TR */ 447 movl PCPU(TSS_GDT),%eax 448 andb $(~SDT_SYS386BSY | SDT_SYS386TSS),5(%eax) 449 movzwl PCB_TR(%ecx),%eax 450 ltr %ax 451 #undef SDT_SYS386TSS 452 #undef SDT_SYS386BSY 453 454 /* Restore debug registers */ 455 movl PCB_DR0(%ecx),%eax 456 movl %eax,%dr0 457 movl PCB_DR1(%ecx),%eax 458 movl %eax,%dr1 459 movl PCB_DR2(%ecx),%eax 460 movl %eax,%dr2 461 movl PCB_DR3(%ecx),%eax 462 movl %eax,%dr3 463 movl PCB_DR6(%ecx),%eax 464 movl %eax,%dr6 465 movl PCB_DR7(%ecx),%eax 466 movl %eax,%dr7 467 468 /* Restore other registers */ 469 movl PCB_EDI(%ecx),%edi 470 movl PCB_ESI(%ecx),%esi 471 movl PCB_EBP(%ecx),%ebp 472 movl PCB_ESP(%ecx),%esp 473 movl PCB_EBX(%ecx),%ebx 474 475 /* reload code selector by turning return into intersegmental return */ 476 pushl PCB_EIP(%ecx) 477 movl $KCSEL,4(%esp) 478 xorl %eax,%eax 479 lret 480 END(resumectx)
Cache object: da7fb739d24c46ce53ce10f364aa5a95
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