FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/swtch.s
1 /*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 * $FreeBSD: releng/8.1/sys/i386/i386/swtch.s 199583 2009-11-20 15:27:52Z jhb $
33 */
34
35 #include "opt_npx.h"
36 #include "opt_sched.h"
37
38 #include <machine/asmacros.h>
39
40 #include "assym.s"
41
42 #if defined(SMP) && defined(SCHED_ULE)
43 #define SETOP xchgl
44 #define BLOCK_SPIN(reg) \
45 movl $blocked_lock,%eax ; \
46 100: ; \
47 lock ; \
48 cmpxchgl %eax,TD_LOCK(reg) ; \
49 jne 101f ; \
50 pause ; \
51 jmp 100b ; \
52 101:
53 #else
54 #define SETOP movl
55 #define BLOCK_SPIN(reg)
56 #endif
57
58 /*****************************************************************************/
59 /* Scheduling */
60 /*****************************************************************************/
61
62 .text
63
64 /*
65 * cpu_throw()
66 *
67 * This is the second half of cpu_switch(). It is used when the current
68 * thread is either a dummy or slated to die, and we no longer care
69 * about its state. This is only a slight optimization and is probably
70 * not worth it anymore. Note that we need to clear the pm_active bits so
71 * we do need the old proc if it still exists.
72 * 0(%esp) = ret
73 * 4(%esp) = oldtd
74 * 8(%esp) = newtd
75 */
76 ENTRY(cpu_throw)
77 movl PCPU(CPUID), %esi
78 movl 4(%esp),%ecx /* Old thread */
79 testl %ecx,%ecx /* no thread? */
80 jz 1f
81 /* release bit from old pm_active */
82 movl PCPU(CURPMAP), %ebx
83 #ifdef SMP
84 lock
85 #endif
86 btrl %esi, PM_ACTIVE(%ebx) /* clear old */
87 1:
88 movl 8(%esp),%ecx /* New thread */
89 movl TD_PCB(%ecx),%edx
90 movl PCB_CR3(%edx),%eax
91 LOAD_CR3(%eax)
92 /* set bit in new pm_active */
93 movl TD_PROC(%ecx),%eax
94 movl P_VMSPACE(%eax), %ebx
95 addl $VM_PMAP, %ebx
96 movl %ebx, PCPU(CURPMAP)
97 #ifdef SMP
98 lock
99 #endif
100 btsl %esi, PM_ACTIVE(%ebx) /* set new */
101 jmp sw1
102 END(cpu_throw)
103
104 /*
105 * cpu_switch(old, new)
106 *
107 * Save the current thread state, then select the next thread to run
108 * and load its state.
109 * 0(%esp) = ret
110 * 4(%esp) = oldtd
111 * 8(%esp) = newtd
112 * 12(%esp) = newlock
113 */
114 ENTRY(cpu_switch)
115
116 /* Switch to new thread. First, save context. */
117 movl 4(%esp),%ecx
118
119 #ifdef INVARIANTS
120 testl %ecx,%ecx /* no thread? */
121 jz badsw2 /* no, panic */
122 #endif
123
124 movl TD_PCB(%ecx),%edx
125
126 movl (%esp),%eax /* Hardware registers */
127 movl %eax,PCB_EIP(%edx)
128 movl %ebx,PCB_EBX(%edx)
129 movl %esp,PCB_ESP(%edx)
130 movl %ebp,PCB_EBP(%edx)
131 movl %esi,PCB_ESI(%edx)
132 movl %edi,PCB_EDI(%edx)
133 mov %gs,PCB_GS(%edx)
134 pushfl /* PSL */
135 popl PCB_PSL(%edx)
136 /* Test if debug registers should be saved. */
137 testl $PCB_DBREGS,PCB_FLAGS(%edx)
138 jz 1f /* no, skip over */
139 movl %dr7,%eax /* yes, do the save */
140 movl %eax,PCB_DR7(%edx)
141 andl $0x0000fc00, %eax /* disable all watchpoints */
142 movl %eax,%dr7
143 movl %dr6,%eax
144 movl %eax,PCB_DR6(%edx)
145 movl %dr3,%eax
146 movl %eax,PCB_DR3(%edx)
147 movl %dr2,%eax
148 movl %eax,PCB_DR2(%edx)
149 movl %dr1,%eax
150 movl %eax,PCB_DR1(%edx)
151 movl %dr0,%eax
152 movl %eax,PCB_DR0(%edx)
153 1:
154
155 #ifdef DEV_NPX
156 /* have we used fp, and need a save? */
157 cmpl %ecx,PCPU(FPCURTHREAD)
158 jne 1f
159 addl $PCB_SAVEFPU,%edx /* h/w bugs make saving complicated */
160 pushl %edx
161 call npxsave /* do it in a big C function */
162 popl %eax
163 1:
164 #endif
165
166 /* Save is done. Now fire up new thread. Leave old vmspace. */
167 movl 4(%esp),%edi
168 movl 8(%esp),%ecx /* New thread */
169 movl 12(%esp),%esi /* New lock */
170 #ifdef INVARIANTS
171 testl %ecx,%ecx /* no thread? */
172 jz badsw3 /* no, panic */
173 #endif
174 movl TD_PCB(%ecx),%edx
175
176 /* switch address space */
177 movl PCB_CR3(%edx),%eax
178 #ifdef PAE
179 cmpl %eax,IdlePDPT /* Kernel address space? */
180 #else
181 cmpl %eax,IdlePTD /* Kernel address space? */
182 #endif
183 je sw0
184 READ_CR3(%ebx) /* The same address space? */
185 cmpl %ebx,%eax
186 je sw0
187 LOAD_CR3(%eax) /* new address space */
188 movl %esi,%eax
189 movl PCPU(CPUID),%esi
190 SETOP %eax,TD_LOCK(%edi) /* Switchout td_lock */
191
192 /* Release bit from old pmap->pm_active */
193 movl PCPU(CURPMAP), %ebx
194 #ifdef SMP
195 lock
196 #endif
197 btrl %esi, PM_ACTIVE(%ebx) /* clear old */
198
199 /* Set bit in new pmap->pm_active */
200 movl TD_PROC(%ecx),%eax /* newproc */
201 movl P_VMSPACE(%eax), %ebx
202 addl $VM_PMAP, %ebx
203 movl %ebx, PCPU(CURPMAP)
204 #ifdef SMP
205 lock
206 #endif
207 btsl %esi, PM_ACTIVE(%ebx) /* set new */
208 jmp sw1
209
210 sw0:
211 SETOP %esi,TD_LOCK(%edi) /* Switchout td_lock */
212 sw1:
213 BLOCK_SPIN(%ecx)
214 #ifdef XEN
215 pushl %eax
216 pushl %ecx
217 pushl %edx
218 call xen_handle_thread_switch
219 popl %edx
220 popl %ecx
221 popl %eax
222 /*
223 * XXX set IOPL
224 */
225 #else
226 /*
227 * At this point, we've switched address spaces and are ready
228 * to load up the rest of the next context.
229 */
230 cmpl $0, PCB_EXT(%edx) /* has pcb extension? */
231 je 1f /* If not, use the default */
232 movl $1, PCPU(PRIVATE_TSS) /* mark use of private tss */
233 movl PCB_EXT(%edx), %edi /* new tss descriptor */
234 jmp 2f /* Load it up */
235
236 1: /*
237 * Use the common default TSS instead of our own.
238 * Set our stack pointer into the TSS, it's set to just
239 * below the PCB. In C, common_tss.tss_esp0 = &pcb - 16;
240 */
241 leal -16(%edx), %ebx /* leave space for vm86 */
242 movl %ebx, PCPU(COMMON_TSS) + TSS_ESP0
243
244 /*
245 * Test this CPU's bit in the bitmap to see if this
246 * CPU was using a private TSS.
247 */
248 cmpl $0, PCPU(PRIVATE_TSS) /* Already using the common? */
249 je 3f /* if so, skip reloading */
250 movl $0, PCPU(PRIVATE_TSS)
251 PCPU_ADDR(COMMON_TSSD, %edi)
252 2:
253 /* Move correct tss descriptor into GDT slot, then reload tr. */
254 movl PCPU(TSS_GDT), %ebx /* entry in GDT */
255 movl 0(%edi), %eax
256 movl 4(%edi), %esi
257 movl %eax, 0(%ebx)
258 movl %esi, 4(%ebx)
259 movl $GPROC0_SEL*8, %esi /* GSEL(GPROC0_SEL, SEL_KPL) */
260 ltr %si
261 3:
262
263 /* Copy the %fs and %gs selectors into this pcpu gdt */
264 leal PCB_FSD(%edx), %esi
265 movl PCPU(FSGS_GDT), %edi
266 movl 0(%esi), %eax /* %fs selector */
267 movl 4(%esi), %ebx
268 movl %eax, 0(%edi)
269 movl %ebx, 4(%edi)
270 movl 8(%esi), %eax /* %gs selector, comes straight after */
271 movl 12(%esi), %ebx
272 movl %eax, 8(%edi)
273 movl %ebx, 12(%edi)
274 #endif
275 /* Restore context. */
276 movl PCB_EBX(%edx),%ebx
277 movl PCB_ESP(%edx),%esp
278 movl PCB_EBP(%edx),%ebp
279 movl PCB_ESI(%edx),%esi
280 movl PCB_EDI(%edx),%edi
281 movl PCB_EIP(%edx),%eax
282 movl %eax,(%esp)
283 pushl PCB_PSL(%edx)
284 popfl
285
286 movl %edx, PCPU(CURPCB)
287 movl TD_TID(%ecx),%eax
288 movl %ecx, PCPU(CURTHREAD) /* into next thread */
289
290 /*
291 * Determine the LDT to use and load it if is the default one and
292 * that is not the current one.
293 */
294 movl TD_PROC(%ecx),%eax
295 cmpl $0,P_MD+MD_LDT(%eax)
296 jnz 1f
297 movl _default_ldt,%eax
298 cmpl PCPU(CURRENTLDT),%eax
299 je 2f
300 LLDT(_default_ldt)
301 movl %eax,PCPU(CURRENTLDT)
302 jmp 2f
303 1:
304 /* Load the LDT when it is not the default one. */
305 pushl %edx /* Preserve pointer to pcb. */
306 addl $P_MD,%eax /* Pointer to mdproc is arg. */
307 pushl %eax
308 call set_user_ldt
309 addl $4,%esp
310 popl %edx
311 2:
312
313 /* This must be done after loading the user LDT. */
314 .globl cpu_switch_load_gs
315 cpu_switch_load_gs:
316 mov PCB_GS(%edx),%gs
317
318 /* Test if debug registers should be restored. */
319 testl $PCB_DBREGS,PCB_FLAGS(%edx)
320 jz 1f
321
322 /*
323 * Restore debug registers. The special code for dr7 is to
324 * preserve the current values of its reserved bits.
325 */
326 movl PCB_DR6(%edx),%eax
327 movl %eax,%dr6
328 movl PCB_DR3(%edx),%eax
329 movl %eax,%dr3
330 movl PCB_DR2(%edx),%eax
331 movl %eax,%dr2
332 movl PCB_DR1(%edx),%eax
333 movl %eax,%dr1
334 movl PCB_DR0(%edx),%eax
335 movl %eax,%dr0
336 movl %dr7,%eax
337 andl $0x0000fc00,%eax
338 movl PCB_DR7(%edx),%ecx
339 andl $~0x0000fc00,%ecx
340 orl %ecx,%eax
341 movl %eax,%dr7
342 1:
343 ret
344
345 #ifdef INVARIANTS
346 badsw1:
347 pushal
348 pushl $sw0_1
349 call panic
350 sw0_1: .asciz "cpu_throw: no newthread supplied"
351
352 badsw2:
353 pushal
354 pushl $sw0_2
355 call panic
356 sw0_2: .asciz "cpu_switch: no curthread supplied"
357
358 badsw3:
359 pushal
360 pushl $sw0_3
361 call panic
362 sw0_3: .asciz "cpu_switch: no newthread supplied"
363 #endif
364 END(cpu_switch)
365
366 /*
367 * savectx(pcb)
368 * Update pcb, saving current processor state.
369 */
370 ENTRY(savectx)
371 /* Fetch PCB. */
372 movl 4(%esp),%ecx
373
374 /* Save caller's return address. Child won't execute this routine. */
375 movl (%esp),%eax
376 movl %eax,PCB_EIP(%ecx)
377
378 movl %cr3,%eax
379 movl %eax,PCB_CR3(%ecx)
380
381 movl %ebx,PCB_EBX(%ecx)
382 movl %esp,PCB_ESP(%ecx)
383 movl %ebp,PCB_EBP(%ecx)
384 movl %esi,PCB_ESI(%ecx)
385 movl %edi,PCB_EDI(%ecx)
386 mov %gs,PCB_GS(%ecx)
387 pushfl
388 popl PCB_PSL(%ecx)
389
390 #ifdef DEV_NPX
391 /*
392 * If fpcurthread == NULL, then the npx h/w state is irrelevant and the
393 * state had better already be in the pcb. This is true for forks
394 * but not for dumps (the old book-keeping with FP flags in the pcb
395 * always lost for dumps because the dump pcb has 0 flags).
396 *
397 * If fpcurthread != NULL, then we have to save the npx h/w state to
398 * fpcurthread's pcb and copy it to the requested pcb, or save to the
399 * requested pcb and reload. Copying is easier because we would
400 * have to handle h/w bugs for reloading. We used to lose the
401 * parent's npx state for forks by forgetting to reload.
402 */
403 pushfl
404 CLI
405 movl PCPU(FPCURTHREAD),%eax
406 testl %eax,%eax
407 je 1f
408
409 pushl %ecx
410 movl TD_PCB(%eax),%eax
411 leal PCB_SAVEFPU(%eax),%eax
412 pushl %eax
413 pushl %eax
414 call npxsave
415 addl $4,%esp
416 popl %eax
417 popl %ecx
418
419 pushl $PCB_SAVEFPU_SIZE
420 leal PCB_SAVEFPU(%ecx),%ecx
421 pushl %ecx
422 pushl %eax
423 call bcopy
424 addl $12,%esp
425 1:
426 popfl
427 #endif /* DEV_NPX */
428
429 ret
430 END(savectx)
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