The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/i386/i386/swtch.s

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 /*-
    2  * Copyright (c) 1990 The Regents of the University of California.
    3  * All rights reserved.
    4  *
    5  * This code is derived from software contributed to Berkeley by
    6  * William Jolitz.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 4. Neither the name of the University nor the names of its contributors
   17  *    may be used to endorse or promote products derived from this software
   18  *    without specific prior written permission.
   19  *
   20  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   30  * SUCH DAMAGE.
   31  *
   32  * $FreeBSD: releng/9.0/sys/i386/i386/swtch.s 210617 2010-07-29 17:00:41Z jkim $
   33  */
   34 
   35 #include "opt_npx.h"
   36 #include "opt_sched.h"
   37 
   38 #include <machine/asmacros.h>
   39 
   40 #include "assym.s"
   41 
   42 #if defined(SMP) && defined(SCHED_ULE)
   43 #define SETOP           xchgl
   44 #define BLOCK_SPIN(reg)                                                 \
   45                 movl            $blocked_lock,%eax ;                    \
   46         100: ;                                                          \
   47                 lock ;                                                  \
   48                 cmpxchgl        %eax,TD_LOCK(reg) ;                     \
   49                 jne             101f ;                                  \
   50                 pause ;                                                 \
   51                 jmp             100b ;                                  \
   52         101:
   53 #else
   54 #define SETOP           movl
   55 #define BLOCK_SPIN(reg)
   56 #endif
   57 
   58 /*****************************************************************************/
   59 /* Scheduling                                                                */
   60 /*****************************************************************************/
   61 
   62         .text
   63 
   64 /*
   65  * cpu_throw()
   66  *
   67  * This is the second half of cpu_switch(). It is used when the current
   68  * thread is either a dummy or slated to die, and we no longer care
   69  * about its state.  This is only a slight optimization and is probably
   70  * not worth it anymore.  Note that we need to clear the pm_active bits so
   71  * we do need the old proc if it still exists.
   72  * 0(%esp) = ret
   73  * 4(%esp) = oldtd
   74  * 8(%esp) = newtd
   75  */
   76 ENTRY(cpu_throw)
   77         movl    PCPU(CPUID), %esi
   78         movl    4(%esp),%ecx                    /* Old thread */
   79         testl   %ecx,%ecx                       /* no thread? */
   80         jz      1f
   81         /* release bit from old pm_active */
   82         movl    PCPU(CURPMAP), %ebx
   83 #ifdef SMP
   84         lock
   85 #endif
   86         btrl    %esi, PM_ACTIVE(%ebx)           /* clear old */
   87 1:
   88         movl    8(%esp),%ecx                    /* New thread */
   89         movl    TD_PCB(%ecx),%edx
   90         movl    PCB_CR3(%edx),%eax
   91         LOAD_CR3(%eax)
   92         /* set bit in new pm_active */
   93         movl    TD_PROC(%ecx),%eax
   94         movl    P_VMSPACE(%eax), %ebx
   95         addl    $VM_PMAP, %ebx
   96         movl    %ebx, PCPU(CURPMAP)
   97 #ifdef SMP
   98         lock
   99 #endif
  100         btsl    %esi, PM_ACTIVE(%ebx)           /* set new */
  101         jmp     sw1
  102 END(cpu_throw)
  103 
  104 /*
  105  * cpu_switch(old, new)
  106  *
  107  * Save the current thread state, then select the next thread to run
  108  * and load its state.
  109  * 0(%esp) = ret
  110  * 4(%esp) = oldtd
  111  * 8(%esp) = newtd
  112  * 12(%esp) = newlock
  113  */
  114 ENTRY(cpu_switch)
  115 
  116         /* Switch to new thread.  First, save context. */
  117         movl    4(%esp),%ecx
  118 
  119 #ifdef INVARIANTS
  120         testl   %ecx,%ecx                       /* no thread? */
  121         jz      badsw2                          /* no, panic */
  122 #endif
  123 
  124         movl    TD_PCB(%ecx),%edx
  125 
  126         movl    (%esp),%eax                     /* Hardware registers */
  127         movl    %eax,PCB_EIP(%edx)
  128         movl    %ebx,PCB_EBX(%edx)
  129         movl    %esp,PCB_ESP(%edx)
  130         movl    %ebp,PCB_EBP(%edx)
  131         movl    %esi,PCB_ESI(%edx)
  132         movl    %edi,PCB_EDI(%edx)
  133         mov     %gs,PCB_GS(%edx)
  134         pushfl                                  /* PSL */
  135         popl    PCB_PSL(%edx)
  136         /* Test if debug registers should be saved. */
  137         testl   $PCB_DBREGS,PCB_FLAGS(%edx)
  138         jz      1f                              /* no, skip over */
  139         movl    %dr7,%eax                       /* yes, do the save */
  140         movl    %eax,PCB_DR7(%edx)
  141         andl    $0x0000fc00, %eax               /* disable all watchpoints */
  142         movl    %eax,%dr7
  143         movl    %dr6,%eax
  144         movl    %eax,PCB_DR6(%edx)
  145         movl    %dr3,%eax
  146         movl    %eax,PCB_DR3(%edx)
  147         movl    %dr2,%eax
  148         movl    %eax,PCB_DR2(%edx)
  149         movl    %dr1,%eax
  150         movl    %eax,PCB_DR1(%edx)
  151         movl    %dr0,%eax
  152         movl    %eax,PCB_DR0(%edx)
  153 1:
  154 
  155 #ifdef DEV_NPX
  156         /* have we used fp, and need a save? */
  157         cmpl    %ecx,PCPU(FPCURTHREAD)
  158         jne     1f
  159         pushl   PCB_SAVEFPU(%edx)               /* h/w bugs make saving complicated */
  160         call    npxsave                         /* do it in a big C function */
  161         popl    %eax
  162 1:
  163 #endif
  164 
  165         /* Save is done.  Now fire up new thread. Leave old vmspace. */
  166         movl    4(%esp),%edi
  167         movl    8(%esp),%ecx                    /* New thread */
  168         movl    12(%esp),%esi                   /* New lock */
  169 #ifdef INVARIANTS
  170         testl   %ecx,%ecx                       /* no thread? */
  171         jz      badsw3                          /* no, panic */
  172 #endif
  173         movl    TD_PCB(%ecx),%edx
  174 
  175         /* switch address space */
  176         movl    PCB_CR3(%edx),%eax
  177 #ifdef PAE
  178         cmpl    %eax,IdlePDPT                   /* Kernel address space? */
  179 #else
  180         cmpl    %eax,IdlePTD                    /* Kernel address space? */
  181 #endif
  182         je      sw0
  183         READ_CR3(%ebx)                          /* The same address space? */
  184         cmpl    %ebx,%eax
  185         je      sw0
  186         LOAD_CR3(%eax)                          /* new address space */
  187         movl    %esi,%eax
  188         movl    PCPU(CPUID),%esi
  189         SETOP   %eax,TD_LOCK(%edi)              /* Switchout td_lock */
  190 
  191         /* Release bit from old pmap->pm_active */
  192         movl    PCPU(CURPMAP), %ebx
  193 #ifdef SMP
  194         lock
  195 #endif
  196         btrl    %esi, PM_ACTIVE(%ebx)           /* clear old */
  197 
  198         /* Set bit in new pmap->pm_active */
  199         movl    TD_PROC(%ecx),%eax              /* newproc */
  200         movl    P_VMSPACE(%eax), %ebx
  201         addl    $VM_PMAP, %ebx
  202         movl    %ebx, PCPU(CURPMAP)
  203 #ifdef SMP
  204         lock
  205 #endif
  206         btsl    %esi, PM_ACTIVE(%ebx)           /* set new */
  207         jmp     sw1
  208 
  209 sw0:
  210         SETOP   %esi,TD_LOCK(%edi)              /* Switchout td_lock */
  211 sw1:
  212         BLOCK_SPIN(%ecx)
  213 #ifdef XEN
  214         pushl   %eax
  215         pushl   %ecx
  216         pushl   %edx
  217         call    xen_handle_thread_switch
  218         popl    %edx
  219         popl    %ecx
  220         popl    %eax
  221         /*
  222          * XXX set IOPL
  223          */
  224 #else           
  225         /*
  226          * At this point, we've switched address spaces and are ready
  227          * to load up the rest of the next context.
  228          */
  229         cmpl    $0, PCB_EXT(%edx)               /* has pcb extension? */
  230         je      1f                              /* If not, use the default */
  231         movl    $1, PCPU(PRIVATE_TSS)           /* mark use of private tss */
  232         movl    PCB_EXT(%edx), %edi             /* new tss descriptor */
  233         jmp     2f                              /* Load it up */
  234 
  235 1:      /*
  236          * Use the common default TSS instead of our own.
  237          * Set our stack pointer into the TSS, it's set to just
  238          * below the PCB.  In C, common_tss.tss_esp0 = &pcb - 16;
  239          */
  240         leal    -16(%edx), %ebx                 /* leave space for vm86 */
  241         movl    %ebx, PCPU(COMMON_TSS) + TSS_ESP0
  242 
  243         /*
  244          * Test this CPU's  bit in the bitmap to see if this
  245          * CPU was using a private TSS.
  246          */
  247         cmpl    $0, PCPU(PRIVATE_TSS)           /* Already using the common? */
  248         je      3f                              /* if so, skip reloading */
  249         movl    $0, PCPU(PRIVATE_TSS)
  250         PCPU_ADDR(COMMON_TSSD, %edi)
  251 2:
  252         /* Move correct tss descriptor into GDT slot, then reload tr. */
  253         movl    PCPU(TSS_GDT), %ebx             /* entry in GDT */
  254         movl    0(%edi), %eax
  255         movl    4(%edi), %esi
  256         movl    %eax, 0(%ebx)
  257         movl    %esi, 4(%ebx)
  258         movl    $GPROC0_SEL*8, %esi             /* GSEL(GPROC0_SEL, SEL_KPL) */
  259         ltr     %si
  260 3:
  261 
  262         /* Copy the %fs and %gs selectors into this pcpu gdt */
  263         leal    PCB_FSD(%edx), %esi
  264         movl    PCPU(FSGS_GDT), %edi
  265         movl    0(%esi), %eax           /* %fs selector */
  266         movl    4(%esi), %ebx
  267         movl    %eax, 0(%edi)
  268         movl    %ebx, 4(%edi)
  269         movl    8(%esi), %eax           /* %gs selector, comes straight after */
  270         movl    12(%esi), %ebx
  271         movl    %eax, 8(%edi)
  272         movl    %ebx, 12(%edi)
  273 #endif
  274         /* Restore context. */
  275         movl    PCB_EBX(%edx),%ebx
  276         movl    PCB_ESP(%edx),%esp
  277         movl    PCB_EBP(%edx),%ebp
  278         movl    PCB_ESI(%edx),%esi
  279         movl    PCB_EDI(%edx),%edi
  280         movl    PCB_EIP(%edx),%eax
  281         movl    %eax,(%esp)
  282         pushl   PCB_PSL(%edx)
  283         popfl
  284 
  285         movl    %edx, PCPU(CURPCB)
  286         movl    TD_TID(%ecx),%eax
  287         movl    %ecx, PCPU(CURTHREAD)           /* into next thread */
  288 
  289         /*
  290          * Determine the LDT to use and load it if is the default one and
  291          * that is not the current one.
  292          */
  293         movl    TD_PROC(%ecx),%eax
  294         cmpl    $0,P_MD+MD_LDT(%eax)
  295         jnz     1f
  296         movl    _default_ldt,%eax
  297         cmpl    PCPU(CURRENTLDT),%eax
  298         je      2f
  299         LLDT(_default_ldt)
  300         movl    %eax,PCPU(CURRENTLDT)
  301         jmp     2f
  302 1:
  303         /* Load the LDT when it is not the default one. */
  304         pushl   %edx                            /* Preserve pointer to pcb. */
  305         addl    $P_MD,%eax                      /* Pointer to mdproc is arg. */
  306         pushl   %eax
  307         call    set_user_ldt
  308         addl    $4,%esp
  309         popl    %edx
  310 2:
  311 
  312         /* This must be done after loading the user LDT. */
  313         .globl  cpu_switch_load_gs
  314 cpu_switch_load_gs:
  315         mov     PCB_GS(%edx),%gs
  316 
  317         /* Test if debug registers should be restored. */
  318         testl   $PCB_DBREGS,PCB_FLAGS(%edx)
  319         jz      1f
  320 
  321         /*
  322          * Restore debug registers.  The special code for dr7 is to
  323          * preserve the current values of its reserved bits.
  324          */
  325         movl    PCB_DR6(%edx),%eax
  326         movl    %eax,%dr6
  327         movl    PCB_DR3(%edx),%eax
  328         movl    %eax,%dr3
  329         movl    PCB_DR2(%edx),%eax
  330         movl    %eax,%dr2
  331         movl    PCB_DR1(%edx),%eax
  332         movl    %eax,%dr1
  333         movl    PCB_DR0(%edx),%eax
  334         movl    %eax,%dr0
  335         movl    %dr7,%eax
  336         andl    $0x0000fc00,%eax
  337         movl    PCB_DR7(%edx),%ecx
  338         andl    $~0x0000fc00,%ecx
  339         orl     %ecx,%eax
  340         movl    %eax,%dr7
  341 1:
  342         ret
  343 
  344 #ifdef INVARIANTS
  345 badsw1:
  346         pushal
  347         pushl   $sw0_1
  348         call    panic
  349 sw0_1:  .asciz  "cpu_throw: no newthread supplied"
  350 
  351 badsw2:
  352         pushal
  353         pushl   $sw0_2
  354         call    panic
  355 sw0_2:  .asciz  "cpu_switch: no curthread supplied"
  356 
  357 badsw3:
  358         pushal
  359         pushl   $sw0_3
  360         call    panic
  361 sw0_3:  .asciz  "cpu_switch: no newthread supplied"
  362 #endif
  363 END(cpu_switch)
  364 
  365 /*
  366  * savectx(pcb)
  367  * Update pcb, saving current processor state.
  368  */
  369 ENTRY(savectx)
  370         /* Fetch PCB. */
  371         movl    4(%esp),%ecx
  372 
  373         /* Save caller's return address.  Child won't execute this routine. */
  374         movl    (%esp),%eax
  375         movl    %eax,PCB_EIP(%ecx)
  376 
  377         movl    %cr3,%eax
  378         movl    %eax,PCB_CR3(%ecx)
  379 
  380         movl    %ebx,PCB_EBX(%ecx)
  381         movl    %esp,PCB_ESP(%ecx)
  382         movl    %ebp,PCB_EBP(%ecx)
  383         movl    %esi,PCB_ESI(%ecx)
  384         movl    %edi,PCB_EDI(%ecx)
  385         mov     %gs,PCB_GS(%ecx)
  386         pushfl
  387         popl    PCB_PSL(%ecx)
  388 
  389 #ifdef DEV_NPX
  390         /*
  391          * If fpcurthread == NULL, then the npx h/w state is irrelevant and the
  392          * state had better already be in the pcb.  This is true for forks
  393          * but not for dumps (the old book-keeping with FP flags in the pcb
  394          * always lost for dumps because the dump pcb has 0 flags).
  395          *
  396          * If fpcurthread != NULL, then we have to save the npx h/w state to
  397          * fpcurthread's pcb and copy it to the requested pcb, or save to the
  398          * requested pcb and reload.  Copying is easier because we would
  399          * have to handle h/w bugs for reloading.  We used to lose the
  400          * parent's npx state for forks by forgetting to reload.
  401          */
  402         pushfl
  403         CLI
  404         movl    PCPU(FPCURTHREAD),%eax
  405         testl   %eax,%eax
  406         je      1f
  407 
  408         pushl   %ecx
  409         movl    TD_PCB(%eax),%eax
  410         movl    PCB_SAVEFPU(%eax),%eax
  411         pushl   %eax
  412         pushl   %eax
  413         call    npxsave
  414         addl    $4,%esp
  415         popl    %eax
  416         popl    %ecx
  417 
  418         pushl   $PCB_SAVEFPU_SIZE
  419         leal    PCB_USERFPU(%ecx),%ecx
  420         pushl   %ecx
  421         pushl   %eax
  422         call    bcopy
  423         addl    $12,%esp
  424 1:
  425         popfl
  426 #endif  /* DEV_NPX */
  427 
  428         ret
  429 END(savectx)

Cache object: 1db2e61874792c13bd4ba4f924596927


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.