The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/i386/include/if_wl_wavelan.h

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    1 /* $FreeBSD: releng/8.4/sys/i386/include/if_wl_wavelan.h 199583 2009-11-20 15:27:52Z jhb $ */
    2 /*-
    3  * Redistribution and use in source and binary forms, with or without
    4  * modification, are permitted provided that the following conditions
    5  * are met:
    6  * 1. Redistributions of source code must retain all copyright 
    7  *    notices, this list of conditions and the following disclaimer.
    8  * 2. The names of the authors may not be used to endorse or promote products
    9  *    derived from this software without specific prior written permission
   10  *
   11  * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
   12  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   13  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   14  * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
   15  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   16  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   17  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   18  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   19  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   20  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   21  * 
   22  */
   23 #ifndef _CHIPS_WAVELAN_H
   24 #define _CHIPS_WAVELAN_H
   25 
   26 /* This file contains definitions that are common for all versions of
   27  * the NCR WaveLAN
   28  */
   29 
   30 #define WAVELAN_ADDR_SIZE       6       /* Size of a MAC address */
   31 #define WAVELAN_MTU             1500    /* Maximum size of Wavelan packet */
   32 
   33 /* Modem Management Controler write commands */
   34 #define MMC_ENCR_KEY            0x00    /* to 0x07 */
   35 #define MMC_ENCR_ENABLE         0x08
   36 #define MMC_DES_IO_INVERT       0x0a
   37 #define MMC_LOOPT_SEL           0x10
   38 #define MMC_JABBER_ENABLE       0x11
   39 #define MMC_FREEZE              0x12
   40 #define MMC_ANTEN_SEL           0x13
   41 #define MMC_IFS                 0x14
   42 #define MMC_MOD_DELAY           0x15
   43 #define MMC_JAM_TIME            0x16
   44 #define MMC_THR_PRE_SET         0x18
   45 #define MMC_DECAY_PRM           0x19
   46 #define MMC_DECAY_UPDAT_PRM     0x1a
   47 #define MMC_QUALITY_THR         0x1b
   48 #define MMC_NETW_ID_L           0x1c
   49 #define MMC_NETW_ID_H           0x1d
   50 #define MMC_MODE_SEL            0x1e
   51 #define MMC_EECTRL              0x20    /* 2.4 Gz */
   52 #define MMC_EEADDR              0x21    /* 2.4 Gz */
   53 #define MMC_EEDATAL             0x22    /* 2.4 Gz */
   54 #define MMC_EEDATAH             0x23    /* 2.4 Gz */
   55 #define MMC_ANALCTRL            0x24    /* 2.4 Gz */
   56 
   57 /* fields in MMC registers that relate to EEPROM in WaveMODEM daughtercard */
   58 #define MMC_EECTRL_EEPRE        0x10    /* 2.4 Gz EEPROM Protect Reg Enable */
   59 #define MMC_EECTRL_DWLD         0x08    /* 2.4 Gz EEPROM Download Synths   */
   60 #define MMC_EECTRL_EEOP         0x07    /* 2.4 Gz EEPROM Opcode mask     */
   61 #define MMC_EECTRL_EEOP_READ    0x06    /* 2.4 Gz EEPROM Read Opcode     */
   62 #define MMC_EEADDR_CHAN         0xf0    /* 2.4 Gz EEPROM Channel # mask  */
   63 #define MMC_EEADDR_WDCNT        0x0f    /* 2.4 Gz EEPROM DNLD WordCount-1 */
   64 #define MMC_ANALCTRL_ANTPOL     0x02    /* 2.4 Gz Antenna Polarity mask  */
   65 #define MMC_ANALCTRL_EXTANT     0x01    /* 2.4 Gz External Antenna mask  */
   66 
   67 /* MMC read register names */
   68 #define MMC_DCE_STATUS          0x10
   69 #define MMC_CORRECT_NWID_L      0x14
   70 #define MMC_CORRECT_NWID_H      0x15
   71 #define MMC_WRONG_NWID_L        0x16
   72 #define MMC_WRONG_NWID_H        0x17
   73 #define MMC_THR_PRE_SET         0x18
   74 #define MMC_SIGNAL_LVL          0x19
   75 #define MMC_SILENCE_LVL         0x1a
   76 #define MMC_SIGN_QUAL           0x1b
   77 #define MMC_DES_AVAIL           0x09
   78 #define MMC_EECTRLstat          0x20    /* 2.4 Gz  EEPROM r/w/dwld status */
   79 #define MMC_EEDATALrv           0x22    /* 2.4 Gz  EEPROM read value      */
   80 #define MMC_EEDATAHrv           0x23    /* 2.4 Gz  EEPROM read value      */
   81 
   82 /* fields in MMC registers that relate to EEPROM in WaveMODEM daughtercard */
   83 #define MMC_EECTRLstat_ID24     0xf0    /* 2.4 Gz  =A0 rev-A, =B0 rev-B   */
   84 #define MMC_EECTRLstat_DWLD     0x08    /* 2.4 Gz  Synth/Tx-Pwr DWLD busy */
   85 #define MMC_EECTRLstat_EEBUSY   0x04    /* 2.4 Gz  EEPROM busy            */
   86 
   87 /* additional socket ioctl params for wl card   
   88  * see sys/sockio.h for numbers.  The 2nd params here
   89  * must be greater than any values in sockio.h
   90  */
   91 
   92 #define SIOCGWLCNWID    _IOWR('i', 60, struct ifreq)    /* get wlan current nwid */
   93 #define SIOCSWLCNWID    _IOWR('i', 61, struct ifreq)    /* set wlan current nwid */
   94 #define SIOCGWLPSA      _IOWR('i', 62, struct ifreq)    /* get wlan PSA (all) */
   95 #define SIOCSWLPSA      _IOWR('i', 63, struct ifreq)    /* set wlan PSA (all) */
   96 #define SIOCDWLCACHE    _IOW('i',  64, struct ifreq)    /* clear SNR cache    */
   97 #define SIOCSWLTHR      _IOW('i',  65, struct ifreq)    /* set new quality threshold */
   98 #define SIOCGWLEEPROM   _IOWR('i', 66, struct ifreq)    /* get modem EEPROM   */
   99 #define SIOCGWLCACHE    _IOWR('i', 67, struct ifreq)    /* get SNR cache */
  100 #define SIOCGWLCITEM    _IOWR('i', 68, struct ifreq)    /* get cache element count */
  101 
  102 /* PSA address definitions */
  103 #define WLPSA_ID                0x0     /* ID byte (0 for ISA, 0x14 for MCA) */
  104 #define WLPSA_IO1               0x1     /* I/O address 1 */
  105 #define WLPSA_IO2               0x2     /* I/O address 2 */
  106 #define WLPSA_IO3               0x3     /* I/O address 3 */
  107 #define WLPSA_BR1               0x4     /* Bootrom address 1 */
  108 #define WLPSA_BR2               0x5     /* Bootrom address 2 */
  109 #define WLPSA_BR3               0x6     /* Bootrom address 3 */
  110 #define WLPSA_HWCONF            0x7     /* HW config bits */
  111 #define WLPSA_IRQNO             0x8     /* IRQ value */
  112 #define WLPSA_UNIMAC            0x10    /* Universal MAC address */
  113 #define WLPSA_LOCALMAC          0x16    /* Locally configured MAC address */
  114 #define WLPSA_MACSEL            0x1c    /* MAC selector */
  115 #define WLPSA_COMPATNO          0x1d    /* compatibility number */
  116 #define WLPSA_THRESH            0x1e    /* RF modem threshold preset */
  117 #define WLPSA_FEATSEL           0x1f    /* feature select */
  118 #define WLPSA_SUBBAND           0x20    /* subband selector */
  119 #define WLPSA_QUALTHRESH        0x21    /* RF modem quality threshold preset */
  120 #define WLPSA_HWVERSION         0x22    /* hardware version indicator */
  121 #define WLPSA_NWID              0x23    /* network ID */
  122 #define WLPSA_NWIDENABLE        0x24    /* network ID enable */
  123 #define WLPSA_SECURITY          0x25    /* datalink security enable */
  124 #define WLPSA_DESKEY            0x26    /* datalink security DES key */
  125 #define WLPSA_DBWIDTH           0x2f    /* databus width select */
  126 #define WLPSA_CALLCODE          0x30    /* call code (japan only) */
  127 #define WLPSA_CONFIGURED        0x3c    /* configuration status */
  128 #define WLPSA_CRCLOW            0x3d    /* CRC-16 (lowbyte) */
  129 #define WLPSA_CRCHIGH           0x3e    /*        (highbyte) */
  130 #define WLPSA_CRCOK             0x3f    /* CRC OK flag */
  131 
  132 #define WLPSA_COMPATNO_WL24B    0x04    /* 2.4 Gz WaveMODEM ISA rev-B  */
  133 
  134 /* 
  135  * signal strength cache
  136  *
  137  * driver (wlp only at the moment) keeps cache of last
  138  * IP (only) packets to arrive including signal strength info.
  139  * daemons may read this with kvm.  See if_wlp.c for globals
  140  * that may be accessed through kvm.
  141  *
  142  * Each entry in the w_sigcache has a unique macsrc and age.
  143  * Each entry is identified by its macsrc field.
  144  * Age of the packet is identified by its age field.
  145  */
  146 
  147 #define  MAXCACHEITEMS  10
  148 #ifndef INT_MAX
  149 #define        INT_MAX         2147483647
  150 #endif
  151 #define  MAX_AGE        (INT_MAX - MAXCACHEITEMS)
  152 
  153 /* signal is 7 bits, 0..63, although it doesn't seem to get to 63.
  154  * silence is 7 bits, 0..63
  155  * quality is 4 bits, 0..15
  156  */
  157 struct w_sigcache {
  158         char   macsrc[6]; /* unique MAC address for entry */
  159         int    ipsrc;     /* ip address associated with packet */
  160         int    signal;    /* signal strength of the packet */
  161         int    silence;   /* silence of the packet */
  162         int    quality;   /* quality of the packet */
  163         int    snr;       /* packet has unique age between 1 to MAX_AGE - 1 */
  164 };
  165 
  166 #endif /* _CHIPS_WAVELAN_H */
  167 

Cache object: d96df71e74d1a42ab0a7df3b68cddfa4


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