1 /*
2 * Copyright (c) 1996, by Steve Passe
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. The name of the developer may NOT be used to endorse or promote products
11 * derived from this software without specific prior written permission.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 *
25 * $FreeBSD$
26 */
27
28 #ifndef _MACHINE_MPAPIC_H_
29 #define _MACHINE_MPAPIC_H_
30
31 #include <machine/apic.h>
32
33 #include <i386/isa/icu.h>
34
35 /* number of busses */
36 #if !defined(NBUS)
37 # define NBUS 4
38 #endif /* NBUS */
39
40 /* total number of APIC INTs, including SHARED INTs */
41 #if !defined(NINTR)
42 #define NINTR 48
43 #endif /* NINTR */
44
45
46 /*
47 * Size of APIC ID list.
48 * Also used a MAX size of various other arrays.
49 */
50 #define NAPICID 16
51
52 /* these don't really belong in here... */
53 enum busTypes {
54 CBUS = 1,
55 CBUSII = 2,
56 EISA = 3,
57 ISA = 6,
58 PCI = 13,
59 XPRESS = 18,
60 MAX_BUSTYPE = 18,
61 UNKNOWN_BUSTYPE = 0xff
62 };
63
64
65 /*
66 * the physical/logical APIC ID management macors
67 */
68 #define CPU_TO_ID(CPU) (cpu_num_to_apic_id[CPU])
69 #define ID_TO_CPU(ID) (apic_id_to_logical[ID])
70 #define IO_TO_ID(IO) (io_num_to_apic_id[IO])
71 #define ID_TO_IO(ID) (apic_id_to_logical[ID])
72
73
74 /*
75 * send an IPI INTerrupt containing 'vector' to CPUs in 'targetMap'
76 * 'targetMap' is a bitfiled of length 14,
77 * APIC #0 == bit 0, ..., APIC #14 == bit 14
78 * NOTE: these are LOGICAL APIC IDs
79 */
80 static __inline int
81 selected_procs_ipi(int targetMap, int vector)
82 {
83 return selected_apic_ipi(targetMap, vector, APIC_DELMODE_FIXED);
84 }
85
86 /*
87 * send an IPI INTerrupt containing 'vector' to all CPUs, including myself
88 */
89 static __inline int
90 all_procs_ipi(int vector)
91 {
92 return apic_ipi(APIC_DEST_ALLISELF, vector, APIC_DELMODE_FIXED);
93 }
94
95 /*
96 * send an IPI INTerrupt containing 'vector' to all CPUs EXCEPT myself
97 */
98 static __inline int
99 all_but_self_ipi(int vector)
100 {
101 return apic_ipi(APIC_DEST_ALLESELF, vector, APIC_DELMODE_FIXED);
102 }
103
104 /*
105 * send an IPI INTerrupt containing 'vector' to myself
106 */
107 static __inline int
108 self_ipi(int vector)
109 {
110 return apic_ipi(APIC_DEST_SELF, vector, APIC_DELMODE_FIXED);
111 }
112
113 #endif /* _MACHINE_MPAPIC_H */
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