1 /*-
2 * Copyright (c) 1991 Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * the Systems Programming Group of the University of Utah Computer
7 * Science Department and William Jolitz of UUNET Technologies Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * Derived from hp300 version by Mike Hibler, this version by William
34 * Jolitz uses a recursive map [a pde points to the page directory] to
35 * map the page tables using the pagetables themselves. This is done to
36 * reduce the impact on kernel virtual memory for lots of sparse address
37 * space, and to reduce the cost of memory to each process.
38 *
39 * from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
40 * from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
41 * $FreeBSD: releng/7.3/sys/i386/include/pmap.h 203208 2010-01-30 18:17:43Z alc $
42 */
43
44 #ifndef _MACHINE_PMAP_H_
45 #define _MACHINE_PMAP_H_
46
47 /*
48 * Page-directory and page-table entries follow this format, with a few
49 * of the fields not present here and there, depending on a lot of things.
50 */
51 /* ---- Intel Nomenclature ---- */
52 #define PG_V 0x001 /* P Valid */
53 #define PG_RW 0x002 /* R/W Read/Write */
54 #define PG_U 0x004 /* U/S User/Supervisor */
55 #define PG_NC_PWT 0x008 /* PWT Write through */
56 #define PG_NC_PCD 0x010 /* PCD Cache disable */
57 #define PG_A 0x020 /* A Accessed */
58 #define PG_M 0x040 /* D Dirty */
59 #define PG_PS 0x080 /* PS Page size (0=4k,1=4M) */
60 #define PG_PTE_PAT 0x080 /* PAT PAT index */
61 #define PG_G 0x100 /* G Global */
62 #define PG_AVAIL1 0x200 /* / Available for system */
63 #define PG_AVAIL2 0x400 /* < programmers use */
64 #define PG_AVAIL3 0x800 /* \ */
65 #define PG_PDE_PAT 0x1000 /* PAT PAT index */
66 #ifdef PAE
67 #define PG_NX (1ull<<63) /* No-execute */
68 #endif
69
70
71 /* Our various interpretations of the above */
72 #define PG_W PG_AVAIL1 /* "Wired" pseudoflag */
73 #define PG_MANAGED PG_AVAIL2
74 #ifdef PAE
75 #define PG_FRAME (0x000ffffffffff000ull)
76 #define PG_PS_FRAME (0x000fffffffe00000ull)
77 #else
78 #define PG_FRAME (~PAGE_MASK)
79 #define PG_PS_FRAME (0xffc00000)
80 #endif
81 #define PG_PROT (PG_RW|PG_U) /* all protection bits . */
82 #define PG_N (PG_NC_PWT|PG_NC_PCD) /* Non-cacheable */
83
84 /* Page level cache control fields used to determine the PAT type */
85 #define PG_PDE_CACHE (PG_PDE_PAT | PG_NC_PWT | PG_NC_PCD)
86 #define PG_PTE_CACHE (PG_PTE_PAT | PG_NC_PWT | PG_NC_PCD)
87
88 /*
89 * Promotion to a 2 or 4MB (PDE) page mapping requires that the corresponding
90 * 4KB (PTE) page mappings have identical settings for the following fields:
91 */
92 #define PG_PTE_PROMOTE (PG_MANAGED | PG_W | PG_G | PG_PTE_PAT | \
93 PG_M | PG_A | PG_NC_PCD | PG_NC_PWT | PG_U | PG_RW | PG_V)
94
95 /*
96 * Page Protection Exception bits
97 */
98
99 #define PGEX_P 0x01 /* Protection violation vs. not present */
100 #define PGEX_W 0x02 /* during a Write cycle */
101 #define PGEX_U 0x04 /* access from User mode (UPL) */
102 #define PGEX_RSV 0x08 /* reserved PTE field is non-zero */
103 #define PGEX_I 0x10 /* during an instruction fetch */
104
105 /*
106 * Size of Kernel address space. This is the number of page table pages
107 * (4MB each) to use for the kernel. 256 pages == 1 Gigabyte.
108 * This **MUST** be a multiple of 4 (eg: 252, 256, 260, etc).
109 * For PAE, the page table page unit size is 2MB. This means that 512 pages
110 * is 1 Gigabyte. Double everything. It must be a multiple of 8 for PAE.
111 */
112 #ifndef KVA_PAGES
113 #ifdef PAE
114 #define KVA_PAGES 512
115 #else
116 #define KVA_PAGES 256
117 #endif
118 #endif
119
120 /*
121 * Pte related macros
122 */
123 #define VADDR(pdi, pti) ((vm_offset_t)(((pdi)<<PDRSHIFT)|((pti)<<PAGE_SHIFT)))
124
125 /* Initial number of kernel page tables. */
126 #ifndef NKPT
127 #ifdef PAE
128 /* 152 page tables needed to map 16G (76B "struct vm_page", 2M page tables). */
129 #define NKPT 240
130 #else
131 /* 18 page tables needed to map 4G (72B "struct vm_page", 4M page tables). */
132 #define NKPT 30
133 #endif
134 #endif
135
136 #ifndef NKPDE
137 #define NKPDE (KVA_PAGES) /* number of page tables/pde's */
138 #endif
139
140 /*
141 * The *PTDI values control the layout of virtual memory
142 *
143 * XXX This works for now, but I am not real happy with it, I'll fix it
144 * right after I fix locore.s and the magic 28K hole
145 */
146 #define KPTDI (NPDEPTD-NKPDE) /* start of kernel virtual pde's */
147 #define PTDPTDI (KPTDI-NPGPTD) /* ptd entry that points to ptd! */
148
149 /*
150 * XXX doesn't really belong here I guess...
151 */
152 #define ISA_HOLE_START 0xa0000
153 #define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START)
154
155 #ifndef LOCORE
156
157 #include <sys/queue.h>
158 #include <sys/_lock.h>
159 #include <sys/_mutex.h>
160
161 #ifdef PAE
162
163 typedef uint64_t pdpt_entry_t;
164 typedef uint64_t pd_entry_t;
165 typedef uint64_t pt_entry_t;
166
167 #define PTESHIFT (3)
168 #define PDESHIFT (3)
169
170 #else
171
172 typedef uint32_t pd_entry_t;
173 typedef uint32_t pt_entry_t;
174
175 #define PTESHIFT (2)
176 #define PDESHIFT (2)
177
178 #endif
179
180 /*
181 * Address of current address space page table maps and directories.
182 */
183 #ifdef _KERNEL
184 extern pt_entry_t PTmap[];
185 extern pd_entry_t PTD[];
186 extern pd_entry_t PTDpde[];
187
188 #ifdef PAE
189 extern pdpt_entry_t *IdlePDPT;
190 #endif
191 extern pd_entry_t *IdlePTD; /* physical address of "Idle" state directory */
192 #endif
193
194 #ifdef _KERNEL
195 /*
196 * virtual address to page table entry and
197 * to physical address.
198 * Note: these work recursively, thus vtopte of a pte will give
199 * the corresponding pde that in turn maps it.
200 */
201 #define vtopte(va) (PTmap + i386_btop(va))
202 #define vtophys(va) pmap_kextract((vm_offset_t)(va))
203
204
205 /*
206 * KPTmap is a linear mapping of the kernel page table. It differs from the
207 * recursive mapping in two ways: (1) it only provides access to kernel page
208 * table pages, and not user page table pages, and (2) it provides access to
209 * a kernel page table page after the corresponding virtual addresses have
210 * been promoted to a 2/4MB page mapping.
211 */
212 extern pt_entry_t *KPTmap;
213
214 /*
215 * Routine: pmap_kextract
216 * Function:
217 * Extract the physical page address associated
218 * kernel virtual address.
219 */
220 static __inline vm_paddr_t
221 pmap_kextract(vm_offset_t va)
222 {
223 vm_paddr_t pa;
224
225 if ((pa = PTD[va >> PDRSHIFT]) & PG_PS) {
226 pa = (pa & PG_PS_FRAME) | (va & PDRMASK);
227 } else {
228 /*
229 * Beware of a concurrent promotion that changes the PDE at
230 * this point! For example, vtopte() must not be used to
231 * access the PTE because it would use the new PDE. It is,
232 * however, safe to use the old PDE because the page table
233 * page is preserved by the promotion.
234 */
235 pa = KPTmap[i386_btop(va)];
236 pa = (pa & PG_FRAME) | (va & PAGE_MASK);
237 }
238 return (pa);
239 }
240
241 #ifdef PAE
242
243 #define pde_cmpset(pdep, old, new) \
244 atomic_cmpset_64((pdep), (old), (new))
245
246 static __inline pt_entry_t
247 pte_load(pt_entry_t *ptep)
248 {
249 pt_entry_t r;
250
251 __asm __volatile(
252 "lock; cmpxchg8b %1"
253 : "=A" (r)
254 : "m" (*ptep), "a" (0), "d" (0), "b" (0), "c" (0));
255 return (r);
256 }
257
258 static __inline pt_entry_t
259 pte_load_store(pt_entry_t *ptep, pt_entry_t v)
260 {
261 pt_entry_t r;
262
263 r = *ptep;
264 __asm __volatile(
265 "1:\n"
266 "\tlock; cmpxchg8b %1\n"
267 "\tjnz 1b"
268 : "+A" (r)
269 : "m" (*ptep), "b" ((uint32_t)v), "c" ((uint32_t)(v >> 32)));
270 return (r);
271 }
272
273 /* XXXRU move to atomic.h? */
274 static __inline int
275 atomic_cmpset_64(volatile uint64_t *dst, uint64_t exp, uint64_t src)
276 {
277 int64_t res = exp;
278
279 __asm __volatile (
280 " lock ; "
281 " cmpxchg8b %2 ; "
282 " setz %%al ; "
283 " movzbl %%al,%0 ; "
284 "# atomic_cmpset_64"
285 : "+A" (res), /* 0 (result) */
286 "=m" (*dst) /* 1 */
287 : "m" (*dst), /* 2 */
288 "b" ((uint32_t)src),
289 "c" ((uint32_t)(src >> 32)));
290
291 return (res);
292 }
293
294 #define pte_load_clear(ptep) pte_load_store((ptep), (pt_entry_t)0ULL)
295
296 #define pte_store(ptep, pte) pte_load_store((ptep), (pt_entry_t)pte)
297
298 extern pt_entry_t pg_nx;
299
300 #else /* PAE */
301
302 #define pde_cmpset(pdep, old, new) \
303 atomic_cmpset_int((pdep), (old), (new))
304
305 static __inline pt_entry_t
306 pte_load(pt_entry_t *ptep)
307 {
308 pt_entry_t r;
309
310 r = *ptep;
311 return (r);
312 }
313
314 static __inline pt_entry_t
315 pte_load_store(pt_entry_t *ptep, pt_entry_t pte)
316 {
317 pt_entry_t r;
318
319 __asm __volatile(
320 "xchgl %0,%1"
321 : "=m" (*ptep),
322 "=r" (r)
323 : "1" (pte),
324 "m" (*ptep));
325 return (r);
326 }
327
328 #define pte_load_clear(pte) atomic_readandclear_int(pte)
329
330 static __inline void
331 pte_store(pt_entry_t *ptep, pt_entry_t pte)
332 {
333
334 *ptep = pte;
335 }
336
337 #endif /* PAE */
338
339 #define pte_clear(ptep) pte_store((ptep), (pt_entry_t)0ULL)
340
341 #define pde_store(pdep, pde) pte_store((pdep), (pde))
342
343 #endif /* _KERNEL */
344
345 /*
346 * Pmap stuff
347 */
348 struct pv_entry;
349 struct pv_chunk;
350
351 struct md_page {
352 int pat_mode;
353 TAILQ_HEAD(,pv_entry) pv_list;
354 };
355
356 struct pmap {
357 struct mtx pm_mtx;
358 pd_entry_t *pm_pdir; /* KVA of page directory */
359 TAILQ_HEAD(,pv_chunk) pm_pvchunk; /* list of mappings in pmap */
360 u_int pm_active; /* active on cpus */
361 struct pmap_statistics pm_stats; /* pmap statistics */
362 LIST_ENTRY(pmap) pm_list; /* List of all pmaps */
363 #ifdef PAE
364 pdpt_entry_t *pm_pdpt; /* KVA of page director pointer
365 table */
366 #endif
367 vm_page_t pm_root; /* spare page table pages */
368 };
369
370 typedef struct pmap *pmap_t;
371
372 #ifdef _KERNEL
373 extern struct pmap kernel_pmap_store;
374 #define kernel_pmap (&kernel_pmap_store)
375
376 #define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx)
377 #define PMAP_LOCK_ASSERT(pmap, type) \
378 mtx_assert(&(pmap)->pm_mtx, (type))
379 #define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx)
380 #define PMAP_LOCK_INIT(pmap) mtx_init(&(pmap)->pm_mtx, "pmap", \
381 NULL, MTX_DEF | MTX_DUPOK)
382 #define PMAP_LOCKED(pmap) mtx_owned(&(pmap)->pm_mtx)
383 #define PMAP_MTX(pmap) (&(pmap)->pm_mtx)
384 #define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx)
385 #define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx)
386 #endif
387
388 /*
389 * For each vm_page_t, there is a list of all currently valid virtual
390 * mappings of that page. An entry is a pv_entry_t, the list is pv_list.
391 */
392 typedef struct pv_entry {
393 vm_offset_t pv_va; /* virtual address for mapping */
394 TAILQ_ENTRY(pv_entry) pv_list;
395 } *pv_entry_t;
396
397 /*
398 * pv_entries are allocated in chunks per-process. This avoids the
399 * need to track per-pmap assignments.
400 */
401 #define _NPCM 11
402 #define _NPCPV 336
403 struct pv_chunk {
404 pmap_t pc_pmap;
405 TAILQ_ENTRY(pv_chunk) pc_list;
406 uint32_t pc_map[_NPCM]; /* bitmap; 1 = free */
407 uint32_t pc_spare[2];
408 struct pv_entry pc_pventry[_NPCPV];
409 };
410
411 #ifdef _KERNEL
412
413 #define NPPROVMTRR 8
414 #define PPRO_VMTRRphysBase0 0x200
415 #define PPRO_VMTRRphysMask0 0x201
416 struct ppro_vmtrr {
417 u_int64_t base, mask;
418 };
419 extern struct ppro_vmtrr PPro_vmtrr[NPPROVMTRR];
420
421 extern caddr_t CADDR1;
422 extern pt_entry_t *CMAP1;
423 extern vm_paddr_t phys_avail[];
424 extern vm_paddr_t dump_avail[];
425 extern int pseflag;
426 extern int pgeflag;
427 extern char *ptvmmap; /* poor name! */
428 extern vm_offset_t virtual_avail;
429 extern vm_offset_t virtual_end;
430
431 #define pmap_page_get_memattr(m) ((vm_memattr_t)(m)->md.pat_mode)
432 #define pmap_unmapbios(va, sz) pmap_unmapdev((va), (sz))
433
434 void pmap_bootstrap(vm_paddr_t);
435 int pmap_cache_bits(int mode, boolean_t is_pde);
436 int pmap_change_attr(vm_offset_t, vm_size_t, int);
437 void pmap_init_pat(void);
438 void pmap_kenter(vm_offset_t va, vm_paddr_t pa);
439 void *pmap_kenter_temporary(vm_paddr_t pa, int i);
440 void pmap_kremove(vm_offset_t);
441 void *pmap_mapbios(vm_paddr_t, vm_size_t);
442 void *pmap_mapdev(vm_paddr_t, vm_size_t);
443 void *pmap_mapdev_attr(vm_paddr_t, vm_size_t, int);
444 boolean_t pmap_page_is_mapped(vm_page_t m);
445 void pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma);
446 void pmap_unmapdev(vm_offset_t, vm_size_t);
447 pt_entry_t *pmap_pte(pmap_t, vm_offset_t) __pure2;
448 void pmap_set_pg(void);
449 void pmap_invalidate_page(pmap_t, vm_offset_t);
450 void pmap_invalidate_range(pmap_t, vm_offset_t, vm_offset_t);
451 void pmap_invalidate_all(pmap_t);
452 void pmap_invalidate_cache(void);
453 void pmap_invalidate_cache_range(vm_offset_t, vm_offset_t);
454
455 #endif /* _KERNEL */
456
457 #endif /* !LOCORE */
458
459 #endif /* !_MACHINE_PMAP_H_ */
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