The Design and Implementation of the FreeBSD Operating System, Second Edition
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sys/i386/include/si.h

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    1 /*
    2  * Device driver for Specialix range (SI/XIO) of serial line multiplexors.
    3  * 'C' definitions for Specialix serial multiplex driver.
    4  *
    5  * Copyright (C) 1990, 1992, 1998 Specialix International,
    6  * Copyright (C) 1993, Andy Rutter <andy@acronym.co.uk>
    7  * Copyright (C) 1995, Peter Wemm <peter@netplex.com.au>
    8  *
    9  * Derived from:        SunOS 4.x version
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notices, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notices, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  * 3. All advertising materials mentioning features or use of this software
   20  *    must display the following acknowledgement:
   21  *      This product includes software developed by Andy Rutter of
   22  *      Advanced Methods and Tools Ltd. based on original information
   23  *      from Specialix International.
   24  * 4. Neither the name of Advanced Methods and Tools, nor Specialix
   25  *    International may be used to endorse or promote products derived from
   26  *    this software without specific prior written permission.
   27  *
   28  * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
   29  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
   30  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
   31  * NO EVENT SHALL THE AUTHORS BE LIABLE.
   32  *
   33  * $FreeBSD: src/sys/i386/include/si.h,v 1.6.4.4 1999/09/05 08:12:04 peter Exp $
   34  */
   35 
   36 /*
   37  * Macro to turn a device number into various parameters, and test for
   38  * CONTROL device.
   39  * max of 4 controllers with up to 32 ports per controller.
   40  * minor device allocation is:
   41  * adapter      port
   42  *   0          0-31
   43  *   1          32-63
   44  *   2          64-95
   45  *   3          96-127
   46  */
   47 #define SI_MAXPORTPERCARD       32
   48 #define SI_MAXCONTROLLER        4
   49 
   50 
   51 /*
   52  * breakup of minor device number:
   53  * lowest 5 bits:       port number on card             0x1f
   54  * next 2 bits:         card number                     0x60
   55  * top bit:             callout                         0x80
   56  * next 8 bits is the major number
   57  * next 2 bits select initial/lock states
   58  * next 1 bit selects the master control device
   59  */
   60 
   61 #define SI_PORT_MASK            0x1f
   62 #define SI_CARD_MASK            0x60
   63 #define SI_TTY_MASK             0x7f
   64 #define SI_CALLOUT_MASK         0x80
   65 #define SI_INIT_STATE_MASK      0x10000
   66 #define SI_LOCK_STATE_MASK      0x20000
   67 #define SI_STATE_MASK           0x30000
   68 #define SI_CONTROLDEV_MASK      0x40000
   69 #define SI_SPECIAL_MASK         0x70000
   70 
   71 #define SI_CARDSHIFT            5
   72 #define SI_PORT(m)              (m & SI_PORT_MASK)
   73 #define SI_CARD(m)              ((m & SI_CARD_MASK) >> SI_CARDSHIFT)
   74 #define SI_TTY(m)               (m & SI_TTY_MASK)
   75 
   76 #define IS_CALLOUT(m)           (m & SI_CALLOUT_MASK)
   77 #define IS_STATE(m)             (m & SI_STATE_MASK)
   78 #define IS_CONTROLDEV(m)        (m & SI_CONTROLDEV_MASK)
   79 #define IS_SPECIAL(m)           (m & SI_SPECIAL_MASK)
   80 
   81 #define MINOR2SC(m)     (&si_softc[SI_CARD(m)])
   82 #define MINOR2PP(m)     (MINOR2SC((m))->sc_ports + SI_PORT((m)))
   83 #define MINOR2TP(m)     (MINOR2PP((m))->sp_tty)
   84 #define TP2PP(tp)       (MINOR2PP(SI_TTY(minor((tp)->t_dev))))
   85 
   86 /* Adapter types */
   87 #define SIEMPTY         0
   88 #define SIHOST          1
   89 #define SIMCA           2
   90 #define SIHOST2         3
   91 #define SIEISA          4
   92 #define SIPCI           5
   93 #define SIJETPCI        6
   94 #define SIJETISA        7
   95 
   96 #define SI_ISJET(x)     (((x) == SIJETPCI) || ((x) == SIJETISA))
   97 
   98 /* Buffer parameters */
   99 #define SI_BUFFERSIZE   256
  100 
  101 typedef unsigned char   BYTE;           /* Type cast for unsigned 8 bit */
  102 typedef unsigned short  WORD;           /* Type cast for unsigned 16 bit */
  103 
  104 
  105 /*
  106  * Hardware `registers', stored in the shared memory.
  107  * These are related to the firmware running on the Z280.
  108  */
  109 
  110 struct si_reg   {
  111         BYTE    initstat;
  112         BYTE    memsize;
  113         WORD    int_count;
  114         WORD    revision;
  115         BYTE    rx_int_count;           /* isr_count on Jet */  
  116         BYTE    main_count;             /* spare on Z-280 */
  117         WORD    int_pending;
  118         WORD    int_counter;
  119         BYTE    int_scounter;
  120         BYTE    res[0x80 - 13];
  121 };
  122 
  123 /*
  124  *      Per module control structure, stored in shared memory.
  125  */
  126 struct si_module {
  127         WORD    sm_next;                /* Next module */
  128         BYTE    sm_type;                /* Number of channels */
  129         BYTE    sm_number;              /* Module number on cable */
  130         BYTE    sm_dsr;                 /* Private dsr copy */
  131         BYTE    sm_res[0x80 - 5];       /* Reserve space to 128 bytes */
  132 };
  133 
  134 /*
  135  *      The 'next' pointer & with 0x7fff + SI base addres give
  136  *      the address of the next module block if fitted. (else 0)
  137  *      Note that next points to the TX buffer so 0x60 must be
  138  *      subtracted to find the true base.
  139  */
  140 #define TA4             0x00
  141 #define TA8             0x08
  142 #define TA4_ASIC        0x0A
  143 #define TA8_ASIC        0x0B
  144 #define MTA             0x28
  145 #define SXDC            0x48
  146 
  147 /*
  148  *      Per channel(port) control structure, stored in shared memory.
  149  */
  150 struct  si_channel {
  151         /*
  152          * Generic stuff
  153          */
  154         WORD    next;                   /* Next Channel */
  155         WORD    addr_uart;              /* Uart address */
  156         WORD    module;                 /* address of module struct */
  157         BYTE    type;                   /* Uart type */
  158         BYTE    fill;
  159         /*
  160          * Uart type specific stuff
  161          */
  162         BYTE    x_status;               /* XON / XOFF status */
  163         BYTE    c_status;               /* cooking status */
  164         BYTE    hi_rxipos;              /* stuff into rx buff */
  165         BYTE    hi_rxopos;              /* stuff out of rx buffer */
  166         BYTE    hi_txopos;              /* Stuff into tx ptr */
  167         BYTE    hi_txipos;              /* ditto out */
  168         BYTE    hi_stat;                /* Command register */
  169         BYTE    dsr_bit;                /* Magic bit for DSR */
  170         BYTE    txon;                   /* TX XON char */
  171         BYTE    txoff;                  /* ditto XOFF */
  172         BYTE    rxon;                   /* RX XON char */
  173         BYTE    rxoff;                  /* ditto XOFF */
  174         BYTE    hi_mr1;                 /* mode 1 image */
  175         BYTE    hi_mr2;                 /* mode 2 image */
  176         BYTE    hi_csr;                 /* clock register */
  177         BYTE    hi_op;                  /* Op control */
  178         BYTE    hi_ip;                  /* Input pins */
  179         BYTE    hi_state;               /* status */
  180         BYTE    hi_prtcl;               /* Protocol */
  181         BYTE    hi_txon;                /* host copy tx xon stuff */
  182         BYTE    hi_txoff;
  183         BYTE    hi_rxon;
  184         BYTE    hi_rxoff;
  185         BYTE    close_prev;             /* Was channel previously closed */
  186         BYTE    hi_break;               /* host copy break process */
  187         BYTE    break_state;            /* local copy ditto */
  188         BYTE    hi_mask;                /* Mask for CS7 etc. */
  189         BYTE    mask_z280;              /* Z280's copy */
  190         BYTE    res[0x60 - 36];
  191         BYTE    hi_txbuf[SI_BUFFERSIZE];
  192         BYTE    hi_rxbuf[SI_BUFFERSIZE];
  193         BYTE    res1[0xA0];
  194 };
  195 
  196 /*
  197  *      Register definitions
  198  */
  199 
  200 /*
  201  *      Break input control register definitions
  202  */
  203 #define BR_IGN          0x01    /* Ignore any received breaks */
  204 #define BR_INT          0x02    /* Interrupt on received break */
  205 #define BR_PARMRK       0x04    /* Enable parmrk parity error processing */
  206 #define BR_PARIGN       0x08    /* Ignore chars with parity errors */
  207 
  208 /*
  209  *      Protocol register provided by host for XON/XOFF and cooking
  210  */
  211 #define SP_TANY         0x01    /* Tx XON any char */
  212 #define SP_TXEN         0x02    /* Tx XON/XOFF enabled */
  213 #define SP_CEN          0x04    /* Cooking enabled */
  214 #define SP_RXEN         0x08    /* Rx XON/XOFF enabled */
  215 #define SP_DCEN         0x20    /* DCD / DTR check */
  216 #define SP_PAEN         0x80    /* Parity checking enabled */
  217 
  218 /*
  219  *      HOST STATUS / COMMAND REGISTER
  220  */
  221 #define IDLE_OPEN       0x00    /* Default mode, TX and RX polled
  222                                    buffer updated etc */
  223 #define LOPEN           0x02    /* Local open command (no modem ctl */
  224 #define MOPEN           0x04    /* Open and monitor modem lines (blocks
  225                                    for DCD */
  226 #define MPEND           0x06    /* Wating for DCD */
  227 #define CONFIG          0x08    /* Channel config has changed */
  228 #define CLOSE           0x0A    /* Close channel */
  229 #define SBREAK          0x0C    /* Start break */
  230 #define EBREAK          0x0E    /* End break */
  231 #define IDLE_CLOSE      0x10    /* Closed channel */
  232 #define IDLE_BREAK      0x12    /* In a break */
  233 #define FCLOSE          0x14    /* Force a close */
  234 #define RESUME          0x16    /* Clear a pending xoff */
  235 #define WFLUSH          0x18    /* Flush output buffer */
  236 #define RFLUSH          0x1A    /* Flush input buffer */
  237 
  238 /*
  239  *      Host status register
  240  */
  241 #define ST_BREAK        0x01    /* Break received (clear with config) */
  242 
  243 /*
  244  *      OUTPUT PORT REGISTER
  245  */
  246 #define OP_CTS  0x01    /* Enable CTS */
  247 #define OP_DSR  0x02    /* Enable DSR */
  248 /*
  249  *      INPUT PORT REGISTER
  250  */
  251 #define IP_DCD  0x04    /* DCD High */
  252 #define IP_DTR  0x20    /* DTR High */
  253 #define IP_RTS  0x02    /* RTS High */
  254 #define IP_RI   0x40    /* RI  High */
  255 
  256 /*
  257  *      Mode register and uart specific stuff
  258  */
  259 /*
  260  *      MODE REGISTER 1
  261  */
  262 #define MR1_5_BITS      0x00
  263 #define MR1_6_BITS      0x01
  264 #define MR1_7_BITS      0x02
  265 #define MR1_8_BITS      0x03
  266 /*
  267  *      Parity
  268  */
  269 #define MR1_ODD         0x04
  270 #define MR1_EVEN        0x00
  271 /*
  272  *      Parity mode
  273  */
  274 #define MR1_WITH        0x00
  275 #define MR1_FORCE       0x08
  276 #define MR1_NONE        0x10
  277 #define MR1_SPECIAL     0x18
  278 /*
  279  *      Error mode
  280  */
  281 #define MR1_CHAR        0x00
  282 #define MR1_BLOCK       0x20
  283 /*
  284  *      Request to send line automatic control
  285  */
  286 #define MR1_CTSCONT     0x80
  287 
  288 /*
  289  *      MODE REGISTER 2
  290  */
  291 /*
  292  *      Number of stop bits
  293  */
  294 #define MR2_1_STOP      0x07
  295 #define MR2_2_STOP      0x0F
  296 /*
  297  *      Clear to send automatic testing before character sent
  298  */
  299 #define MR2_RTSCONT     0x10
  300 /*
  301  *      Reset RTS automatically after sending character?
  302  */
  303 #define MR2_CTSCONT     0x20
  304 /*
  305  *      Channel mode
  306  */
  307 #define MR2_NORMAL      0x00
  308 #define MR2_AUTO        0x40
  309 #define MR2_LOCAL       0x80
  310 #define MR2_REMOTE      0xC0
  311 
  312 /*
  313  *      CLOCK SELECT REGISTER - this and the code assumes ispeed == ospeed
  314  */
  315 /*
  316  * Clocking rates are in lower and upper nibbles.. R = upper, T = lower
  317  */
  318 #define CLK75           0x0
  319 #define CLK110          0x1     /* 110 on XIO!! */
  320 #define CLK38400        0x2     /* out of sequence */
  321 #define CLK150          0x3
  322 #define CLK300          0x4
  323 #define CLK600          0x5
  324 #define CLK1200         0x6
  325 #define CLK2000         0x7
  326 #define CLK2400         0x8
  327 #define CLK4800         0x9
  328 #define CLK7200         0xa     /* unchecked */
  329 #define CLK9600         0xb
  330 #define CLK19200        0xc
  331 #define CLK57600        0xd
  332 
  333 /*
  334  * Per-port (channel) soft information structure, stored in the driver.
  335  * This is visible via ioctl()'s.
  336  */
  337 struct si_port {
  338         volatile struct si_channel *sp_ccb;
  339         struct tty      *sp_tty;
  340         int             sp_pend;        /* pending command */
  341         int             sp_last_hi_ip;  /* cached DCD */
  342         int             sp_state;
  343         int             sp_active_out;  /* callout is open */
  344         int             sp_dtr_wait;    /* DTR holddown in hz */
  345         int             sp_delta_overflows;
  346         u_int           sp_wopeners;    /* # procs waiting DCD */
  347         u_char          sp_hotchar;     /* ldisc specific ASAP char */
  348         /* Initial state. */
  349         struct termios  sp_iin;
  350         struct termios  sp_iout;
  351         /* Lock state. */
  352         struct termios  sp_lin;
  353         struct termios  sp_lout;
  354 #ifdef  SI_DEBUG
  355         int             sp_debug;       /* debug mask */
  356 #endif
  357 };
  358 
  359 /* sp_state */
  360 #define SS_CLOSED       0x0000
  361 #define SS_OPEN         0x0001  /* Port is active                       */
  362 /*                      0x0002  --                                      */
  363 /*                      0x0004  --                                      */
  364 /*                      0x0008  --                                      */
  365 /*                      0x0010  --                                      */
  366 /*                      0x0020  --                                      */
  367 /*                      0x0040  --                                      */
  368 /*                      0x0080  --                                      */
  369 #define SS_LSTART       0x0100  /* lstart timeout pending               */
  370 #define SS_INLSTART     0x0200  /* running an lstart induced t_oproc    */
  371 #define SS_CLOSING      0x0400  /* in the middle of a siclose()         */
  372 /*                      0x0800  --                                      */
  373 #define SS_WAITWRITE    0x1000
  374 #define SS_BLOCKWRITE   0x2000
  375 #define SS_DTR_OFF      0x4000  /* DTR held off                         */
  376 
  377 /*
  378  *      Command post flags
  379  */
  380 #define SI_NOWAIT       0x00    /* Don't wait for command */
  381 #define SI_WAIT         0x01    /* Wait for complete */
  382 
  383 /*
  384  * Extensive debugging stuff - manipulated using siconfig(8)
  385  */
  386 #define DBG_ENTRY               0x00000001
  387 #define DBG_DRAIN               0x00000002
  388 #define DBG_OPEN                0x00000004
  389 #define DBG_CLOSE               0x00000008
  390 #define DBG_READ                0x00000010
  391 #define DBG_WRITE               0x00000020
  392 #define DBG_PARAM               0x00000040
  393 #define DBG_INTR                0x00000080
  394 #define DBG_IOCTL               0x00000100
  395 /*                              0x00000200 */
  396 #define DBG_SELECT              0x00000400
  397 #define DBG_OPTIM               0x00000800
  398 #define DBG_START               0x00001000
  399 #define DBG_EXIT                0x00002000
  400 #define DBG_FAIL                0x00004000
  401 #define DBG_STOP                0x00008000
  402 #define DBG_AUTOBOOT            0x00010000
  403 #define DBG_MODEM               0x00020000
  404 #define DBG_DOWNLOAD            0x00040000
  405 #define DBG_LSTART              0x00080000
  406 #define DBG_POLL                0x00100000
  407 #define DBG_ALL                 0xffffffff
  408 
  409 /*
  410  *      SI ioctls
  411  */
  412 /*
  413  * struct for use by Specialix ioctls - used by siconfig(8)
  414  */
  415 typedef struct {
  416         unsigned char
  417                 sid_port:5,                     /* 0 - 31 ports per card */
  418                 sid_card:2,                     /* 0 - 3 cards */
  419                 sid_control:1;                  /* controlling device (all cards) */
  420 } sidev_t;
  421 struct si_tcsi {
  422         sidev_t tc_dev;
  423         union {
  424                 int     x_int;
  425                 int     x_dbglvl;
  426         }       tc_action;
  427 #define tc_card         tc_dev.sid_card
  428 #define tc_port         tc_dev.sid_port
  429 #define tc_int          tc_action.x_int
  430 #define tc_dbglvl       tc_action.x_dbglvl
  431 };
  432 
  433 struct si_pstat {
  434         sidev_t tc_dev;
  435         union {
  436                 struct si_port    x_siport;
  437                 struct si_channel x_ccb;
  438                 struct tty        x_tty;
  439         } tc_action;
  440 #define tc_siport       tc_action.x_siport
  441 #define tc_ccb          tc_action.x_ccb
  442 #define tc_tty          tc_action.x_tty
  443 };
  444 
  445 #define IOCTL_MIN       96
  446 #define TCSIDEBUG       _IOW('S', 96, struct si_tcsi)   /* Toggle debug */
  447 #define TCSIRXIT        _IOW('S', 97, struct si_tcsi)   /* RX int throttle */
  448 #define TCSIIT          _IOW('S', 98, struct si_tcsi)   /* TX int throttle */
  449                         /* 99 defunct */
  450                         /* 100 defunct */
  451                         /* 101 defunct */
  452                         /* 102 defunct */
  453                         /* 103 defunct */
  454                         /* 104 defunct */
  455 #define TCSISTATE       _IOWR('S', 105, struct si_tcsi) /* get current state of RTS
  456                                                    DCD and DTR pins */
  457                         /* 106 defunct */
  458 #define TCSIPORTS       _IOR('S', 107, int)     /* Number of ports found */
  459 #define TCSISDBG_LEVEL  _IOW('S', 108, struct si_tcsi)  /* equivalent of TCSIDEBUG which sets a
  460                                          * particular debug level (DBG_??? bit
  461                                          * mask), default is 0xffff */
  462 #define TCSIGDBG_LEVEL  _IOWR('S', 109, struct si_tcsi)
  463 #define TCSIGRXIT       _IOWR('S', 110, struct si_tcsi)
  464 #define TCSIGIT         _IOWR('S', 111, struct si_tcsi)
  465                         /* 112 defunct */
  466                         /* 113 defunct */
  467                         /* 114 defunct */
  468                         /* 115 defunct */
  469                         /* 116 defunct */
  470                         /* 117 defunct */
  471 
  472 #define TCSISDBG_ALL    _IOW('S', 118, int)             /* set global debug level */
  473 #define TCSIGDBG_ALL    _IOR('S', 119, int)             /* get global debug level */
  474 
  475                         /* 120 defunct */
  476                         /* 121 defunct */
  477                         /* 122 defunct */
  478                         /* 123 defunct */
  479 #define TCSIMODULES     _IOR('S', 124, int)     /* Number of modules found */
  480 
  481 /* Various stats and monitoring hooks per tty device */
  482 #define TCSI_PORT       _IOWR('S', 125, struct si_pstat) /* get si_port */
  483 #define TCSI_CCB        _IOWR('S', 126, struct si_pstat) /* get si_ccb */
  484 #define TCSI_TTY        _IOWR('S', 127, struct si_pstat) /* get tty struct */
  485 
  486 #define IOCTL_MAX       127
  487 
  488 #define IS_SI_IOCTL(cmd)        ((u_int)((cmd)&0xff00) == ('S'<<8) && \
  489                 (u_int)((cmd)&0xff) >= IOCTL_MIN && \
  490                 (u_int)((cmd)&0xff) <= IOCTL_MAX)
  491 
  492 #define CONTROLDEV      "/dev/si_control"

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