1 /*
2 * Copyright (c) 1996, by Steve Passe
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. The name of the developer may NOT be used to endorse or promote products
11 * derived from this software without specific prior written permission.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 *
25 * $FreeBSD: releng/5.1/sys/i386/include/smptests.h 109718 2003-01-23 01:04:27Z peter $
26 */
27
28 #ifndef _MACHINE_SMPTESTS_H_
29 #define _MACHINE_SMPTESTS_H_
30
31
32 /*
33 * Various 'tests in progress' and configuration parameters.
34 */
35
36
37 /*
38 * Put FAST_INTR() ISRs at an APIC priority above the regular INTs.
39 * Allow the mp_lock() routines to handle FAST interrupts while spinning.
40 */
41 #define FAST_HI
42
43
44 /*
45 * These defines enable critical region locking of areas that were
46 * protected via cli/sti in the UP kernel.
47 *
48 * COMLOCK protects the sio/cy drivers.
49 * known to be incomplete:
50 * joystick lkm
51 * ?
52 */
53 #define USE_COMLOCK
54
55
56 /*
57 * Send CPUSTOP IPI for stop/restart of other CPUs on DDB break.
58 #define VERBOSE_CPUSTOP_ON_DDBBREAK
59 */
60 #define CPUSTOP_ON_DDBBREAK
61
62
63 #ifdef APIC_IO
64 /*
65 * Don't assume that slow interrupt handler X is called from vector
66 * X + ICU_OFFSET.
67 */
68 #define APIC_INTR_REORDER
69
70 #endif /* APIC_IO */
71
72 /*
73 * Misc. counters.
74 *
75 #define COUNT_XINVLTLB_HITS
76 */
77
78
79 /**
80 * Hack to "fake-out" kernel into thinking it is running on a 'default config'.
81 *
82 * value == default type
83 #define TEST_DEFAULT_CONFIG 6
84 */
85
86
87 /*
88 * Simple test code for IPI interaction, save for future...
89 *
90 #define TEST_TEST1
91 #define IPI_TARGET_TEST1 1
92 */
93
94
95 /*
96 * Address of POST hardware port.
97 * Defining this enables POSTCODE macros.
98 *
99 #define POST_ADDR 0x80
100 */
101
102
103 /*
104 * POST hardware macros.
105 */
106 #ifdef POST_ADDR
107 #define ASMPOSTCODE_INC \
108 pushl %eax ; \
109 movl _current_postcode, %eax ; \
110 incl %eax ; \
111 andl $0xff, %eax ; \
112 movl %eax, _current_postcode ; \
113 outb %al, $POST_ADDR ; \
114 popl %eax
115
116 /*
117 * Overwrite the current_postcode value.
118 */
119 #define ASMPOSTCODE(X) \
120 pushl %eax ; \
121 movl $X, %eax ; \
122 movl %eax, _current_postcode ; \
123 outb %al, $POST_ADDR ; \
124 popl %eax
125
126 /*
127 * Overwrite the current_postcode low nibble.
128 */
129 #define ASMPOSTCODE_LO(X) \
130 pushl %eax ; \
131 movl _current_postcode, %eax ; \
132 andl $0xf0, %eax ; \
133 orl $X, %eax ; \
134 movl %eax, _current_postcode ; \
135 outb %al, $POST_ADDR ; \
136 popl %eax
137
138 /*
139 * Overwrite the current_postcode high nibble.
140 */
141 #define ASMPOSTCODE_HI(X) \
142 pushl %eax ; \
143 movl _current_postcode, %eax ; \
144 andl $0x0f, %eax ; \
145 orl $(X<<4), %eax ; \
146 movl %eax, _current_postcode ; \
147 outb %al, $POST_ADDR ; \
148 popl %eax
149 #else
150 #define ASMPOSTCODE_INC
151 #define ASMPOSTCODE(X)
152 #define ASMPOSTCODE_LO(X)
153 #define ASMPOSTCODE_HI(X)
154 #endif /* POST_ADDR */
155
156
157 #endif /* _MACHINE_SMPTESTS_H_ */
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