The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/i386/include/spl.h

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    1 /*-
    2  * Copyright (c) 1993 The Regents of the University of California.
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  * 3. All advertising materials mentioning features or use of this software
   14  *    must display the following acknowledgement:
   15  *      This product includes software developed by the University of
   16  *      California, Berkeley and its contributors.
   17  * 4. Neither the name of the University nor the names of its contributors
   18  *    may be used to endorse or promote products derived from this software
   19  *    without specific prior written permission.
   20  *
   21  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   31  * SUCH DAMAGE.
   32  *
   33  * $FreeBSD: src/sys/i386/include/spl.h,v 1.15.2.3 1999/09/05 08:12:06 peter Exp $
   34  */
   35 
   36 #ifndef _MACHINE_IPL_H_
   37 #define _MACHINE_IPL_H_
   38 
   39 #include <machine/ipl.h>        /* XXX "machine" means cpu for i386 */
   40 
   41 /*
   42  * Software interrupt bit numbers in priority order.  The priority only
   43  * determines which swi will be dispatched next; a higher priority swi
   44  * may be dispatched when a nested h/w interrupt handler returns.
   45  */
   46 #define SWI_TTY         (NHWI + 0)
   47 #define SWI_NET         (NHWI + 1)
   48 #define SWI_CAMNET      (NHWI + 2)
   49 #define SWI_CAMBIO      (NHWI + 3)
   50 #define SWI_VM          (NHWI + 4)
   51 #define SWI_CLOCK       30
   52 #define SWI_AST         31
   53 
   54 /*
   55  * Corresponding interrupt-pending bits for ipending.
   56  */
   57 #define SWI_TTY_PENDING         (1 << SWI_TTY)
   58 #define SWI_NET_PENDING         (1 << SWI_NET)
   59 #define SWI_CAMNET_PENDING      (1 << SWI_CAMNET)
   60 #define SWI_CAMBIO_PENDING      (1 << SWI_CAMBIO)
   61 #define SWI_VM_PENDING          (1 << SWI_VM)
   62 #define SWI_CLOCK_PENDING       (1 << SWI_CLOCK)
   63 #define SWI_AST_PENDING         (1 << SWI_AST)
   64 
   65 /*
   66  * Corresponding interrupt-disable masks for cpl.  The ordering is now by
   67  * inclusion (where each mask is considered as a set of bits). Everything
   68  * except SWI_AST_MASK includes SWI_CLOCK_MASK so that softclock() doesn't
   69  * run while other swi handlers are running and timeout routines can call
   70  * swi handlers.  Everything includes SWI_AST_MASK so that AST's are masked
   71  * until just before return to user mode.  SWI_TTY_MASK includes SWI_NET_MASK
   72  * in case tty interrupts are processed at splsofttty() for a tty that is in
   73  * SLIP or PPP line discipline (this is weaker than merging net_imask with
   74  * tty_imask in isa.c - splimp() must mask hard and soft tty interrupts, but
   75  * spltty() apparently only needs to mask soft net interrupts).
   76  */
   77 #define SWI_TTY_MASK    (SWI_TTY_PENDING | SWI_CLOCK_MASK | SWI_NET_MASK)
   78 #define SWI_NET_MASK    (SWI_NET_PENDING | SWI_CLOCK_MASK)
   79 #define SWI_CAMNET_MASK (SWI_CAMNET_PENDING | SWI_CLOCK_MASK)
   80 #define SWI_CAMBIO_MASK (SWI_CAMBIO_PENDING | SWI_CLOCK_MASK)
   81 #define SWI_VM_MASK     (SWI_VM_PENDING | SWI_CLOCK_MASK)
   82 #define SWI_CLOCK_MASK  (SWI_CLOCK_PENDING | SWI_AST_MASK)
   83 #define SWI_AST_MASK    SWI_AST_PENDING
   84 #define SWI_MASK        (~HWI_MASK)
   85 
   86 #ifndef LOCORE
   87 
   88 /*
   89  * cpl is preserved by interrupt handlers so it is effectively nonvolatile.
   90  * ipending and idelayed are changed by interrupt handlers so they are
   91  * volatile.
   92  */
   93 extern  unsigned bio_imask;     /* group of interrupts masked with splbio() */
   94 extern  unsigned cam_imask;     /* group of interrupts masked with splcam() */
   95 extern  unsigned cpl;           /* current priority level mask */
   96 extern  volatile unsigned idelayed;     /* interrupts to become pending */
   97 extern  volatile unsigned ipending;     /* active interrupts masked by cpl */
   98 extern  unsigned net_imask;     /* group of interrupts masked with splimp() */
   99 extern  unsigned stat_imask;    /* interrupts masked with splstatclock() */
  100 extern  unsigned tty_imask;     /* group of interrupts masked with spltty() */
  101 
  102 /*
  103  * The volatile bitmap variables must be set atomically.  This normally
  104  * involves using a machine-dependent bit-set or `or' instruction.
  105  */
  106 #define setdelayed()    setbits(&ipending, loadandclear(&idelayed))
  107 #define setsoftast()    setbits(&ipending, SWI_AST_PENDING)
  108 #define setsoftclock()  setbits(&ipending, SWI_CLOCK_PENDING)
  109 #define setsoftnet()    setbits(&ipending, SWI_NET_PENDING)
  110 #define setsofttty()    setbits(&ipending, SWI_TTY_PENDING)
  111 #define setsoftcamnet() setbits(&ipending, SWI_CAMNET_PENDING)
  112 #define setsoftcambio() setbits(&ipending, SWI_CAMBIO_PENDING)
  113 #define setsoftvm()     setbits(&ipending, SWI_VM_PENDING)
  114 
  115 #define schedsofttty()          setbits(&idelayed, SWI_TTY_PENDING)
  116 #define schedsoftnet()          setbits(&idelayed, SWI_NET_PENDING)
  117 #define schedsoftcamnet()       setbits(&idelayed, SWI_CAMNET_PENDING)
  118 #define schedsoftcambio()       setbits(&idelayed, SWI_CAMBIO_PENDING)
  119 #define schedsoftvm()           setbits(&idelayed, SWI_VM_PENDING)
  120 
  121 #define softclockpending()      (ipending & SWI_CLOCK_PENDING)
  122 
  123 #ifdef __GNUC__
  124 
  125 void    splz    __P((void));
  126 
  127 #define GENSPL(name, set_cpl) \
  128 static __inline int name(void)                  \
  129 {                                               \
  130         unsigned x;                             \
  131                                                 \
  132         __asm __volatile("" : : : "memory");    \
  133         x = cpl;                                \
  134         set_cpl;                                \
  135         return (x);                             \
  136 }
  137 
  138 GENSPL(splbio, cpl |= bio_imask)
  139 GENSPL(splclock, cpl = HWI_MASK | SWI_MASK)
  140 GENSPL(splhigh, cpl = HWI_MASK | SWI_MASK)
  141 GENSPL(splimp, cpl |= net_imask)
  142 GENSPL(splnet, cpl |= SWI_NET_MASK)
  143 GENSPL(splcam, cpl |= cam_imask)
  144 GENSPL(splsoftcam, cpl |= SWI_CAMBIO_MASK | SWI_CAMNET_MASK)
  145 GENSPL(splsoftcambio, cpl |= SWI_CAMBIO_MASK) 
  146 GENSPL(splsoftcamnet, cpl |= SWI_CAMNET_MASK)
  147 GENSPL(splsoftclock, cpl = SWI_CLOCK_MASK)
  148 GENSPL(splsofttty, cpl |= SWI_TTY_MASK)
  149 GENSPL(splstatclock, cpl |= stat_imask)
  150 GENSPL(spltty, cpl |= tty_imask)
  151 GENSPL(splvm, cpl |= net_imask | bio_imask)
  152 GENSPL(splsoftvm, cpl |= SWI_VM_MASK)
  153 
  154 static __inline void
  155 spl0(void)
  156 {
  157         cpl = SWI_AST_MASK;
  158         if (ipending & ~SWI_AST_MASK)
  159                 splz();
  160 }
  161 
  162 static __inline void
  163 splx(int ipl)
  164 {
  165         cpl = ipl;
  166         if (ipending & ~ipl)
  167                 splz();
  168 }
  169 
  170 #endif /* __GNUC__ */
  171 
  172 #endif /* !LOCORE */
  173 
  174 #endif /* !_MACHINE_IPL_H_ */

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