FreeBSD/Linux Kernel Cross Reference
sys/i386/isa/aic6360.c
1 /*
2 * Copyright (c) 1994 Charles Hannum.
3 * Copyright (c) 1994 Jarle Greipsland
4 * Copyright (c) 1997 Oliver Breuninger (APM modification)
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Jarle Greipsland
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
29 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 /*
35 * $FreeBSD$
36 *
37 * Acknowledgements: Many of the algorithms used in this driver are
38 * inspired by the work of Julian Elischer (julian@tfs.com) and
39 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million!
40 *
41 * Converted from NetBSD to FreeBSD by Jim Babb
42 */
43
44 /* TODO list:
45 * 1) Get the DMA stuff working.
46 * 2) Get the iov/uio stuff working. Is this a good thing ???
47 * 3) Get the synch stuff working.
48 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
49 */
50
51 /*
52 * PC-9801-100/AHA-1030P support by URATA S.
53 */
54
55 /*
56 * A few customizable items:
57 */
58
59 /* The SCSI ID of the host adapter/computer */
60 #ifndef AIC_SCSI_HOSTID
61 #define AIC_SCSI_HOSTID 7
62 #endif
63
64 /* Use doubleword transfers to/from SCSI chip. Note: This requires
65 * motherboard support. Basicly, some motherboard chipsets are able to
66 * split a 32 bit I/O operation into two 16 bit I/O operations,
67 * transparently to the processor. This speeds up some things, notably long
68 * data transfers.
69 */
70 #define AIC_USE_DWORDS 0
71
72 /* Allow disconnects? Was mainly used in an early phase of the driver when
73 * the message system was very flaky. Should go away soon.
74 */
75 #define AIC_ALLOW_DISCONNECT 1
76
77 /* Synchronous data transfers? (does not work yet!) XXX */
78 #define AIC_USE_SYNCHRONOUS 0 /* Enable/disable (1/0) */
79 #define AIC_SYNC_PERIOD 200
80 #define AIC_SYNC_REQ_ACK_OFS 8
81
82 /* Max attempts made to transmit a message */
83 #define AIC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */
84
85 /* Use DMA (else we do programmed I/O using string instructions) (not yet!)*/
86 #define AIC_USE_EISA_DMA 0
87 #define AIC_USE_ISA_DMA 0
88
89 /* How to behave on the (E)ISA bus when/if DMAing (on<<4) + off in us */
90 #define EISA_BRST_TIM ((15<<4) + 1) /* 15us on, 1us off */
91
92 /* Some spin loop parameters (essentially how long to wait some places)
93 * The problem(?) is that sometimes we expect either to be able to transmit a
94 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid
95 * returning from the interrupt just to get yanked back for the next byte we
96 * may spin in the interrupt routine waiting for this byte to come. How long?
97 * This is really (SCSI) device and processor dependent. Tuneable, I guess.
98 */
99 #define AIC_MSGI_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */
100 #define AIC_MSGO_SPIN 1
101
102 /* Include debug functions? At the end of this file there are a bunch of
103 * functions that will print out various information regarding queued SCSI
104 * commands, driver state and chip contents. You can call them from the
105 * kernel debugger. If you set AIC_DEBUG to 0 they are not included (the
106 * kernel uses less memory) but you lose the debugging facilities.
107 */
108 #define AIC_DEBUG 0
109
110 /* End of customizable parameters */
111
112 #if AIC_USE_EISA_DMA || AIC_USE_ISA_DMA
113 #error "I said not yet! Start paying attention... grumble"
114 #endif
115
116 #include "opt_ddb.h"
117 #include "aic.h"
118 #include "apm.h"
119
120 #include <sys/param.h>
121 #include <sys/kernel.h>
122 #include <sys/systm.h>
123 #include <sys/malloc.h>
124 #include <sys/buf.h>
125 #include <scsi/scsiconf.h>
126 #include <scsi/scsi_debug.h>
127
128 #include <machine/clock.h>
129 #if NAPM > 0
130 #include <machine/apm_bios.h>
131 #endif /* NAPM > 0 */
132 #include <i386/isa/isa_device.h>
133
134 /* Definitions, most of them has turned out to be unneccesary, but here they
135 * are anyway.
136 */
137
138 /*
139 * Generic SCSI messages. For now we reject most of them.
140 */
141 /* Messages (1 byte) */ /* I/T M(andatory) or (O)ptional */
142 #define MSG_CMDCOMPLETE 0x00 /* M/M */
143 #define MSG_EXTENDED 0x01 /* O/O */
144 #define MSG_SAVEDATAPOINTER 0x02 /* O/O */
145 #define MSG_RESTOREPOINTERS 0x03 /* O/O */
146 #define MSG_DISCONNECT 0x04 /* O/O */
147 #define MSG_INITIATOR_DET_ERR 0x05 /* M/M */
148 #define MSG_ABORT 0x06 /* O/M */
149 #define MSG_MESSAGE_REJECT 0x07 /* M/M */
150 #define MSG_NOOP 0x08 /* M/M */
151 #define MSG_PARITY_ERR 0x09 /* M/M */
152 #define MSG_LINK_CMD_COMPLETE 0x0a /* O/O */
153 #define MSG_LINK_CMD_COMPLETEF 0x0b /* O/O */
154 #define MSG_BUS_DEV_RESET 0x0c /* O/M */
155 #define MSG_ABORT_TAG 0x0d /* O/O */
156 #define MSG_CLEAR_QUEUE 0x0e /* O/O */
157 #define MSG_INIT_RECOVERY 0x0f /* O/O */
158 #define MSG_REL_RECOVERY 0x10 /* O/O */
159 #define MSG_TERM_IO_PROC 0x11 /* O/O */
160
161 /* Messages (2 byte) */
162 #define MSG_SIMPLE_Q_TAG 0x20 /* O/O */
163 #define MSG_HEAD_OF_Q_TAG 0x21 /* O/O */
164 #define MSG_ORDERED_Q_TAG 0x22 /* O/O */
165 #define MSG_IGN_WIDE_RESIDUE 0x23 /* O/O */
166
167 /* Identify message */
168 #define MSG_IDENTIFY(lun) ((AIC_ALLOW_DISCONNECT ? 0xc0 : 0x80)|((lun) & 0x7))
169 #define MSG_ISIDENT(m) ((m) & 0x80)
170
171 /* Extended messages (opcode) */
172 #define MSG_EXT_SDTR 0x01
173
174 /* SCSI Status codes */
175 #define ST_GOOD 0x00
176 #define ST_CHKCOND 0x02
177 #define ST_CONDMET 0x04
178 #define ST_BUSY 0x08
179 #define ST_INTERMED 0x10
180 #define ST_INTERMED_CONDMET 0x14
181 #define ST_RESERVATION_CONFLICT 0x18
182 #define ST_CMD_TERM 0x22
183 #define ST_QUEUE_FULL 0x28
184
185 #define ST_MASK 0x3e /* bit 0,6,7 is reserved */
186
187 /* AIC6360 definitions */
188 #ifdef PC98
189 #include <i386/isa/aic_98.h>
190 #else
191 #define SCSISEQ (iobase + 0x00) /* SCSI sequence control */
192 #define SXFRCTL0 (iobase + 0x01) /* SCSI transfer control 0 */
193 #define SXFRCTL1 (iobase + 0x02) /* SCSI transfer control 1 */
194 #define SCSISIGI (iobase + 0x03) /* SCSI signal in */
195 #define SCSISIGO (iobase + 0x03) /* SCSI signal out */
196 #define SCSIRATE (iobase + 0x04) /* SCSI rate control */
197 #define SCSIID (iobase + 0x05) /* SCSI ID */
198 #define SELID (iobase + 0x05) /* Selection/Reselection ID */
199 #define SCSIDAT (iobase + 0x06) /* SCSI Latched Data */
200 #define SCSIBUS (iobase + 0x07) /* SCSI Data Bus*/
201 #define STCNT0 (iobase + 0x08) /* SCSI transfer count */
202 #define STCNT1 (iobase + 0x09)
203 #define STCNT2 (iobase + 0x0a)
204 #define CLRSINT0 (iobase + 0x0b) /* Clear SCSI interrupts 0 */
205 #define SSTAT0 (iobase + 0x0b) /* SCSI interrupt status 0 */
206 #define CLRSINT1 (iobase + 0x0c) /* Clear SCSI interrupts 1 */
207 #define SSTAT1 (iobase + 0x0c) /* SCSI status 1 */
208 #define SSTAT2 (iobase + 0x0d) /* SCSI status 2 */
209 #define SCSITEST (iobase + 0x0e) /* SCSI test control */
210 #define SSTAT3 (iobase + 0x0e) /* SCSI status 3 */
211 #define CLRSERR (iobase + 0x0f) /* Clear SCSI errors */
212 #define SSTAT4 (iobase + 0x0f) /* SCSI status 4 */
213 #define SIMODE0 (iobase + 0x10) /* SCSI interrupt mode 0 */
214 #define SIMODE1 (iobase + 0x11) /* SCSI interrupt mode 1 */
215 #define DMACNTRL0 (iobase + 0x12) /* DMA control 0 */
216 #define DMACNTRL1 (iobase + 0x13) /* DMA control 1 */
217 #define DMASTAT (iobase + 0x14) /* DMA status */
218 #define FIFOSTAT (iobase + 0x15) /* FIFO status */
219 #define DMADATA (iobase + 0x16) /* DMA data */
220 #define DMADATAL (iobase + 0x16) /* DMA data low byte */
221 #define DMADATAH (iobase + 0x17) /* DMA data high byte */
222 #define BRSTCNTRL (iobase + 0x18) /* Burst Control */
223 #define DMADATALONG (iobase + 0x18)
224 #define PORTA (iobase + 0x1a) /* Port A */
225 #define PORTB (iobase + 0x1b) /* Port B */
226 #define REV (iobase + 0x1c) /* Revision (001 for 6360) */
227 #define STACK (iobase + 0x1d) /* Stack */
228 #define TEST (iobase + 0x1e) /* Test register */
229 #define ID (iobase + 0x1f) /* ID register */
230 #endif
231
232 #define IDSTRING "(C)1991ADAPTECAIC6360 "
233
234 /* What all the bits do */
235
236 /* SCSISEQ */
237 #define TEMODEO 0x80
238 #define ENSELO 0x40
239 #define ENSELI 0x20
240 #define ENRESELI 0x10
241 #define ENAUTOATNO 0x08
242 #define ENAUTOATNI 0x04
243 #define ENAUTOATNP 0x02
244 #define SCSIRSTO 0x01
245
246 /* SXFRCTL0 */
247 #define SCSIEN 0x80
248 #define DMAEN 0x40
249 #define CHEN 0x20
250 #define CLRSTCNT 0x10
251 #define SPIOEN 0x08
252 #define CLRCH 0x02
253
254 /* SXFRCTL1 */
255 #define BITBUCKET 0x80
256 #define SWRAPEN 0x40
257 #define ENSPCHK 0x20
258 #define STIMESEL1 0x10
259 #define STIMESEL0 0x08
260 #define STIMO_256ms 0x00
261 #define STIMO_128ms 0x08
262 #define STIMO_64ms 0x10
263 #define STIMO_32ms 0x18
264 #define ENSTIMER 0x04
265 #define BYTEALIGN 0x02
266
267 /* SCSISIGI */
268 #define CDI 0x80
269 #define IOI 0x40
270 #define MSGI 0x20
271 #define ATNI 0x10
272 #define SELI 0x08
273 #define BSYI 0x04
274 #define REQI 0x02
275 #define ACKI 0x01
276
277 /* Important! The 3 most significant bits of this register, in initiator mode,
278 * represents the "expected" SCSI bus phase and can be used to trigger phase
279 * mismatch and phase change interrupts. But more important: If there is a
280 * phase mismatch the chip will not transfer any data! This is actually a nice
281 * feature as it gives us a bit more control over what is happening when we are
282 * bursting data (in) through the FIFOs and the phase suddenly changes from
283 * DATA IN to STATUS or MESSAGE IN. The transfer will stop and wait for the
284 * proper phase to be set in this register instead of dumping the bits into the
285 * FIFOs.
286 */
287 /* SCSISIGO */
288 #define CDO 0x80
289 #define CDEXP (CDO)
290 #define IOO 0x40
291 #define IOEXP (IOO)
292 #define MSGO 0x20
293 #define MSGEXP (MSGO)
294 #define ATNO 0x10
295 #define SELO 0x08
296 #define BSYO 0x04
297 #define REQO 0x02
298 #define ACKO 0x01
299
300 /* Information transfer phases */
301 #define PH_DOUT (0)
302 #define PH_DIN (IOI)
303 #define PH_CMD (CDI)
304 #define PH_STAT (CDI|IOI)
305 #define PH_MSGO (MSGI|CDI)
306 #define PH_MSGI (MSGI|CDI|IOI)
307
308 #define PH_MASK 0xe0
309
310 /* Some pseudo phases for getphase()*/
311 #define PH_BUSFREE 0x100 /* (Re)Selection no longer valid */
312 #define PH_INVALID 0x101 /* (Re)Selection valid, but no REQ yet */
313 #define PH_PSBIT 0x100 /* "pseudo" bit */
314
315 /* SCSIRATE */
316 #define SXFR2 0x40
317 #define SXFR1 0x20
318 #define SXFR0 0x10
319 #define SOFS3 0x08
320 #define SOFS2 0x04
321 #define SOFS1 0x02
322 #define SOFS0 0x01
323
324 /* SCSI ID */
325 #define OID2 0x40
326 #define OID1 0x20
327 #define OID0 0x10
328 #define OID_S 4 /* shift value */
329 #define TID2 0x04
330 #define TID1 0x02
331 #define TID0 0x01
332 #define SCSI_ID_MASK 0x7
333
334 /* SCSI selection/reselection ID (both target *and* initiator) */
335 #define SELID7 0x80
336 #define SELID6 0x40
337 #define SELID5 0x20
338 #define SELID4 0x10
339 #define SELID3 0x08
340 #define SELID2 0x04
341 #define SELID1 0x02
342 #define SELID0 0x01
343
344 /* CLRSINT0 Clears what? (interrupt and/or status bit) */
345 #define SETSDONE 0x80
346 #define CLRSELDO 0x40 /* I */
347 #define CLRSELDI 0x20 /* I+ */
348 #define CLRSELINGO 0x10 /* I */
349 #define CLRSWRAP 0x08 /* I+S */
350 #define CLRSDONE 0x04 /* I+S */
351 #define CLRSPIORDY 0x02 /* I */
352 #define CLRDMADONE 0x01 /* I */
353
354 /* SSTAT0 Howto clear */
355 #define TARGET 0x80
356 #define SELDO 0x40 /* Selfclearing */
357 #define SELDI 0x20 /* Selfclearing when CLRSELDI is set */
358 #define SELINGO 0x10 /* Selfclearing */
359 #define SWRAP 0x08 /* CLRSWAP */
360 #define SDONE 0x04 /* Not used in initiator mode */
361 #define SPIORDY 0x02 /* Selfclearing (op on SCSIDAT) */
362 #define DMADONE 0x01 /* Selfclearing (all FIFOs empty & T/C */
363
364 /* CLRSINT1 Clears what? */
365 #define CLRSELTIMO 0x80 /* I+S */
366 #define CLRATNO 0x40
367 #define CLRSCSIRSTI 0x20 /* I+S */
368 #define CLRBUSFREE 0x08 /* I+S */
369 #define CLRSCSIPERR 0x04 /* I+S */
370 #define CLRPHASECHG 0x02 /* I+S */
371 #define CLRREQINIT 0x01 /* I+S */
372
373 /* SSTAT1 How to clear? When set?*/
374 #define SELTO 0x80 /* C select out timeout */
375 #define ATNTARG 0x40 /* Not used in initiator mode */
376 #define SCSIRSTI 0x20 /* C RST asserted */
377 #define PHASEMIS 0x10 /* Selfclearing */
378 #define BUSFREE 0x08 /* C bus free condition */
379 #define SCSIPERR 0x04 /* C parity error on inbound data */
380 #define PHASECHG 0x02 /* C phase in SCSISIGI doesn't match */
381 #define REQINIT 0x01 /* C or ACK asserting edge of REQ */
382
383 /* SSTAT2 */
384 #define SOFFSET 0x20
385 #define SEMPTY 0x10
386 #define SFULL 0x08
387 #define SFCNT2 0x04
388 #define SFCNT1 0x02
389 #define SFCNT0 0x01
390
391 /* SCSITEST */
392 #define SCTESTU 0x08
393 #define SCTESTD 0x04
394 #define STCTEST 0x01
395
396 /* SSTAT3 */
397 #define SCSICNT3 0x80
398 #define SCSICNT2 0x40
399 #define SCSICNT1 0x20
400 #define SCSICNT0 0x10
401 #define OFFCNT3 0x08
402 #define OFFCNT2 0x04
403 #define OFFCNT1 0x02
404 #define OFFCNT0 0x01
405
406 /* CLRSERR */
407 #define CLRSYNCERR 0x04
408 #define CLRFWERR 0x02
409 #define CLRFRERR 0x01
410
411 /* SSTAT4 */
412 #define SYNCERR 0x04
413 #define FWERR 0x02
414 #define FRERR 0x01
415
416 /* SIMODE0 */
417 #define ENSELDO 0x40
418 #define ENSELDI 0x20
419 #define ENSELINGO 0x10
420 #define ENSWRAP 0x08
421 #define ENSDONE 0x04
422 #define ENSPIORDY 0x02
423 #define ENDMADONE 0x01
424
425 /* SIMODE1 */
426 #define ENSELTIMO 0x80
427 #define ENATNTARG 0x40
428 #define ENSCSIRST 0x20
429 #define ENPHASEMIS 0x10
430 #define ENBUSFREE 0x08
431 #define ENSCSIPERR 0x04
432 #define ENPHASECHG 0x02
433 #define ENREQINIT 0x01
434
435 /* DMACNTRL0 */
436 #define ENDMA 0x80
437 #define B8MODE 0x40
438 #define DMA 0x20
439 #define DWORDPIO 0x10
440 #define WRITE 0x08
441 #define INTEN 0x04
442 #define RSTFIFO 0x02
443 #define SWINT 0x01
444
445 /* DMACNTRL1 */
446 #define PWRDWN 0x80
447 #define ENSTK32 0x40
448 #define STK4 0x10
449 #define STK3 0x08
450 #define STK2 0x04
451 #define STK1 0x02
452 #define STK0 0x01
453
454 /* DMASTAT */
455 #define ATDONE 0x80
456 #define WORDRDY 0x40
457 #define INTSTAT 0x20
458 #define DFIFOFULL 0x10
459 #define DFIFOEMP 0x08
460 #define DFIFOHF 0x04
461 #define DWORDRDY 0x02
462
463 /* BRSTCNTRL */
464 #define BON3 0x80
465 #define BON2 0x40
466 #define BON1 0x20
467 #define BON0 0x10
468 #define BOFF3 0x08
469 #define BOFF2 0x04
470 #define BOFF1 0x02
471 #define BOFF0 0x01
472
473 /* TEST */
474 #define BOFFTMR 0x40
475 #define BONTMR 0x20
476 #define STCNTH 0x10
477 #define STCNTM 0x08
478 #define STCNTL 0x04
479 #define SCSIBLK 0x02
480 #define DMABLK 0x01
481
482
483 #define orreg(reg, val) outb((reg), inb(reg)| (val))
484 #define andreg(reg, val) outb((reg), inb(reg)& (val))
485 #define nandreg(reg, val) outb((reg), inb(reg)&~(val))
486
487
488
489 #ifdef DDB
490 #define fatal_if_no_DDB()
491 #else
492 #define fatal_if_no_DDB() panic("panic for historical reasons")
493 #endif
494
495 typedef u_long physaddr;
496
497 struct aic_dma_seg {
498 physaddr addr;
499 long len;
500 };
501
502 #define DELAYCOUNT 16
503
504 #define FUDGE(X) ((X)>>1) /* get 1 ms spincount */
505 #define MINIFUDGE(X) ((X)>>4) /* get (approx) 125us spincount */
506 #define AIC_NSEG 16
507 #define NUM_CONCURRENT 7 /* Only one per target for now */
508
509 /*
510 * ACB. Holds additional information for each SCSI command Comments: We
511 * need a separate scsi command block because we may need to overwrite it
512 * with a request sense command. Basicly, we refrain from fiddling with
513 * the scsi_xfer struct (except do the expected updating of return values).
514 * We'll generally update: xs->{flags,resid,error,sense,status} and
515 * occasionally xs->retries.
516 */
517
518 struct acb {
519 TAILQ_ENTRY(acb) chain;
520 struct scsi_xfer *xs; /* SCSI xfer ctrl block from above */
521 int flags; /* Status */
522 #define ACB_FREE 0x00
523 #define ACB_ACTIVE 0x01
524 #define ACB_DONE 0x04
525 #define ACB_CHKSENSE 0x08
526 /* struct aic_dma_seg dma[AIC_NSEG]; */ /* Physical addresses+len */
527 struct scsi_generic cmd; /* SCSI command block */
528 int clen;
529 char *daddr; /* Saved data pointer */
530 int dleft; /* Residue */
531 int stat; /* SCSI status byte */
532 };
533
534 /*
535 * Some info about each (possible) target on the SCSI bus. This should
536 * probably have been a "per target+lunit" structure, but we'll leave it at
537 * this for now. Is there a way to reliably hook it up to sc->fordriver??
538 */
539 struct aic_tinfo {
540 int cmds; /* #commands processed */
541 int dconns; /* #disconnects */
542 int touts; /* #timeouts */
543 int perrs; /* #parity errors */
544 int senses; /* #request sense commands sent */
545 ushort lubusy; /* What local units/subr. are busy? */
546 u_char flags;
547 #define NEED_TO_RESET 0x01 /* Should send a BUS_DEV_RESET */
548 #define DO_NEGOTIATE 0x02 /* (Re)Negotiate synchronous options */
549 #define TARGET_BUSY 0x04 /* Target is busy, i.e. cmd in progress */
550 u_char persgst; /* Period suggestion */
551 u_char offsgst; /* Offset suggestion */
552 u_char syncdata; /* True negotiated synch parameters */
553 };
554
555 /* Register a linenumber (for debugging) */
556 #if AIC_DEBUG
557 #define LOGLINE(p) \
558 do { \
559 p->history[p->hp] = __LINE__; \
560 p->hp = ++p->hp % AIC_HSIZE; \
561 } while (0)
562 #else
563 #define LOGLINE(p)
564 #endif
565
566 static struct aic_data { /* One of these per adapter */
567 u_short iobase; /* Base I/O port */
568 struct scsi_link sc_link; /* prototype for subdevs */
569 int aic_int; /* IRQ on the EISA bus */
570 int aic_dma; /* DRQ on the EISA bus */
571 /* Lists of command blocks */
572 TAILQ_HEAD(acb_list, acb) free_list, ready_list, nexus_list;
573 struct acb *nexus; /* current command */
574 /* Command blocks and target info */
575 struct acb acb[NUM_CONCURRENT];
576 struct aic_tinfo tinfo[8];
577 /* Data about the current nexus (updated for every cmd switch) */
578 u_char *dp; /* Current data pointer */
579 int dleft; /* Data left to transfer */
580 /* Adapter state */
581 short phase; /* Copy of what bus phase we are in */
582 short prevphase; /* Copy of what bus phase we were in */
583 short state; /* State applicable to the adapter */
584 #define AIC_IDLE 0x01
585 #define AIC_TMP_UNAVAIL 0x02 /* Don't accept SCSI commands */
586 #define AIC_SELECTING 0x03 /* SCSI command is arbiting */
587 #define AIC_RESELECTED 0x04 /* Has been reselected */
588 #define AIC_HASNEXUS 0x05 /* Actively using the SCSI bus */
589 #define AIC_CLEANING 0x06
590 #define AIC_SUSPEND 0x07 /* Suspend mode (APM) */
591 short flags;
592 #define AIC_DROP_MSGI 0x01 /* Discard all msgs (parity err detected) */
593 #define AIC_DOINGDMA 0x02 /* The FIFO data path is active! */
594 #define AIC_BUSFREE_OK 0x04 /* Bus free phase is OK. */
595 #define AIC_SYNCHNEGO 0x08 /* Synch negotiation in progress. */
596 #define AIC_BLOCKED 0x10 /* Don't schedule new scsi bus operations */
597 /* Debugging stuff */
598 #define AIC_HSIZE 8
599 short history[AIC_HSIZE]; /* Store line numbers here. */
600 short hp;
601 u_char progress; /* Set if interrupt has achieved progress */
602 /* Message stuff */
603 u_char msgpriq; /* One or more messages to send (encoded) */
604 u_char msgout; /* What message is on its way out? */
605 #define SEND_DEV_RESET 0x01
606 #define SEND_PARITY_ERROR 0x02
607 #define SEND_ABORT 0x04
608 #define SEND_REJECT 0x08
609 #define SEND_INIT_DET_ERR 0x10
610 #define SEND_IDENTIFY 0x20
611 #define SEND_SDTR 0x40
612 #define AIC_MAX_MSG_LEN 8
613 u_char omess[AIC_MAX_MSG_LEN]; /* Scratch area for messages */
614 u_char *omp; /* Message pointer (for multibyte messages) */
615 u_char omlen;
616 u_char imess[AIC_MAX_MSG_LEN + 1];
617 u_char *imp; /* Message pointer (for multibyte messages) */
618 u_char imlen;
619 #ifdef PC98
620 int *aicport; /* I/O port information */
621 #endif
622 #if NAPM > 0
623 struct apmhook s_hook; /* reconfiguration support */
624 struct apmhook r_hook; /* reconfiguration support */
625 #endif /* NAPM > 0 */
626
627 } *aicdata[NAIC];
628
629 #define AIC_SHOWACBS 0x01
630 #define AIC_SHOWINTS 0x02
631 #define AIC_SHOWCMDS 0x04
632 #define AIC_SHOWMISC 0x08
633 #define AIC_SHOWTRAC 0x10
634 #define AIC_SHOWSTART 0x20
635 static int aic_debug = 0; /* AIC_SHOWSTART|AIC_SHOWMISC|AIC_SHOWTRAC; */
636
637 #if AIC_DEBUG
638 #define AIC_ACBS(str) do {if (aic_debug & AIC_SHOWACBS) printf str;} while (0)
639 #define AIC_MISC(str) do {if (aic_debug & AIC_SHOWMISC) printf str;} while (0)
640 #define AIC_INTS(str) do {if (aic_debug & AIC_SHOWINTS) printf str;} while (0)
641 #define AIC_TRACE(str) do {if (aic_debug & AIC_SHOWTRAC) printf str;} while (0)
642 #define AIC_CMDS(str) do {if (aic_debug & AIC_SHOWCMDS) printf str;} while (0)
643 #define AIC_START(str) do {if (aic_debug & AIC_SHOWSTART) printf str;}while (0)
644 #else
645 #define AIC_ACBS(str)
646 #define AIC_MISC(str)
647 #define AIC_INTS(str)
648 #define AIC_TRACE(str)
649 #define AIC_CMDS(str)
650 #define AIC_START(str)
651 #endif
652
653 static int aicprobe __P((struct isa_device *));
654 static int aicattach __P((struct isa_device *));
655 #if NAPM > 0
656 static int aic_suspend __P((struct aic_data *));
657 static int aic_resume __P((struct aic_data *));
658 #endif /* NAPM > 0 */
659 static void aic_minphys __P((struct buf *));
660 static u_int32_t aic_adapter_info __P((int));
661 static void aic_init __P((struct aic_data *));
662 static int aic_find __P((struct aic_data *));
663 static void aic_done __P((struct acb *));
664 static void aic_dataout __P((struct aic_data *aic));
665 static void aic_datain __P((struct aic_data *aic));
666 static ointhand2_t aicintr;
667 static int32_t aic_scsi_cmd __P((struct scsi_xfer *));
668 static int aic_poll __P((struct aic_data *aic, struct acb *));
669 void aic_add_timeout __P((struct acb *, int));
670 void aic_remove_timeout __P((struct acb *));
671 static void aic6360_reset __P((struct aic_data *aic));
672 static __inline u_short aicphase __P((struct aic_data *aic));
673 static void aic_msgin __P((struct aic_data *aic));
674 static void aic_msgout __P((struct aic_data *aic));
675 static timeout_t aic_timeout;
676 static void aic_sched __P((struct aic_data *));
677 static void aic_scsi_reset __P((struct aic_data *));
678 #if AIC_DEBUG
679 void aic_print_active_acb __P((void));
680 void aic_dump6360 __P((void));
681 void aic_dump_driver __P((void));
682 #endif
683 #ifdef SCSI_DETACH
684 static void aicdetach __P((struct isa_device *dev));
685 #endif
686
687 /* Linkup to the rest of the kernel */
688 struct isa_driver aicdriver = {
689 aicprobe, aicattach, "aic"
690 };
691
692 static int aicunit = 0;
693
694 static struct scsi_adapter aic_switch = {
695 aic_scsi_cmd,
696 aic_minphys,
697 0,
698 0,
699 aic_adapter_info,
700 "aic"
701 ,0 , 0
702 };
703
704 static struct scsi_device aic_dev = {
705 NULL, /* Use default error handler */
706 NULL, /* have a queue, served by this */
707 NULL, /* have no async handler */
708 NULL, /* Use default 'done' routine */
709 "aic",
710 0
711 };
712
713
714 /* PCCARD suport */
715 #include "card.h"
716 #if NCARD > 0
717 #include <sys/select.h>
718 #include <sys/module.h>
719 #include <pccard/cardinfo.h>
720 #include <pccard/slot.h>
721
722 static int aic_card_intr __P((struct pccard_devinfo *));
723 static int aicinit __P((struct pccard_devinfo *));
724 static void aicunload __P((struct pccard_devinfo *));
725
726 PCCARD_MODULE(aic, aicinit, aicunload, aic_card_intr, 0, bio_imask);
727
728 /*
729 * Initialize the device - called from Slot manager.
730 */
731 int
732 aicinit(struct pccard_devinfo *devi)
733 {
734 static int already_aicinit[NAIC];
735
736 /* validate unit number */
737 if (devi->isahd.id_unit >= NAIC)
738 return(ENODEV);
739 /* Make sure it isn't already initialised */
740 if (already_aicinit[devi->isahd.id_unit] == 1) {
741 if (aicattach(&devi->isahd) == 0)
742 return(ENXIO);
743 return(0);
744 }
745 /*
746 * Probe the device. If a value is returned, the
747 * device was found at the location.
748 */
749 if (aicprobe(&devi->isahd) == 0)
750 return(ENXIO);
751
752 if (aicattach(&devi->isahd) == 0)
753 return(ENXIO);
754 already_aicinit[devi->isahd.id_unit] = 1;
755 return(0);
756 }
757
758 /*
759 * aicunload - unload the driver and clear the table.
760 * XXX TODO:
761 * This is called usually when the card is ejected, but
762 * can be caused by the modunload of a controller driver.
763 * The idea is reset the driver's view of the device
764 * and ensure that any driver entry points such as
765 * read and write do not hang.
766 */
767 static void
768 aicunload(struct pccard_devinfo *devi)
769 {
770 printf("aic%d: unload\n", devi->isahd.id_unit);
771 #if 0
772 aicstop(devi->isahd.id_unit);
773 #endif
774 #ifdef SCSI_DETACH
775 aicdetach(&devi->isahd);
776 #endif
777 }
778
779 /*
780 * card_intr - Shared interrupt called from front end of PC-Card handler.
781 */
782 static int
783 aic_card_intr(struct pccard_devinfo *devi)
784 {
785 aicintr(devi->isahd.id_unit);
786 return(1);
787 }
788 #endif /* NCARD > 0 */
789
790 /*
791 * INITIALIZATION ROUTINES (probe, attach ++)
792 */
793
794 /*
795 * aicprobe: probe for AIC6360 SCSI-controller
796 * returns non-zero value if a controller is found.
797 */
798 static int
799 aicprobe(dev)
800 struct isa_device *dev;
801 {
802 struct aic_data *aic;
803 #if NCARD > 0
804 int unit = dev->id_unit;
805 int aic_reg_drv[NAIC];
806 #else
807 int unit = aicunit;
808 #endif
809
810 if (unit >= NAIC) {
811 printf("aic%d: unit number too high\n", unit);
812 return 0;
813 }
814 dev->id_unit = unit;
815
816 #if NCARD > 0
817 if (!aic_reg_drv[unit])
818 aic_reg_drv[unit] = 1;
819 #endif
820
821 /*
822 * Allocate a storage area for us
823 */
824 if (aicdata[unit]) {
825 printf("aic%d: memory already allocated\n", unit);
826 return 0;
827 }
828 aic = malloc(sizeof(struct aic_data), M_TEMP, M_NOWAIT);
829 if (!aic) {
830 printf("aic%d: cannot malloc!\n", unit);
831 return 0;
832 }
833 bzero(aic, sizeof(struct aic_data));
834 aicdata[unit] = aic;
835 aic->iobase = dev->id_iobase;
836 #ifdef PC98
837 if (AIC_TYPE98(dev->id_flags) == AIC98_100) {
838 /* PC-9801-100 */
839 aic->aicport = aicport_100;
840 } else {
841 /* generic card */
842 aic->aicport = aicport_generic;
843 }
844 #endif
845
846 if (aic_find(aic) != 0) {
847 aicdata[unit] = NULL;
848 free(aic, M_TEMP);
849 return 0;
850 }
851 aicunit++;
852
853 #ifdef PC98
854 if (AIC_TYPE98(dev->id_flags) == AIC98_100)
855 return 0x40;
856 #endif
857 return 0x20;
858 }
859
860 #if NAPM > 0
861 static int
862 aic_suspend(aic)
863 struct aic_data *aic;
864 {
865 AIC_TRACE(("Suspend aic:\n"));
866 printf ("aic: suspend\n");
867 aic->state = AIC_SUSPEND;
868 return 0;
869 }
870
871 static int
872 aic_resume(aic)
873 struct aic_data *aic;
874 {
875 AIC_TRACE(("Resume aic:\n"));
876 printf ("aic: resume\n");
877 aic->state = 0;
878 aic_init(aic);
879 /*
880 aic6360_reset(aic);
881 aic_scsi_reset(aic);
882 */
883 return 0;
884 }
885 #endif /* NAPM > 0 */
886
887 /* Do the real search-for-device.
888 * Prerequisite: aic->iobase should be set to the proper value
889 */
890 static int
891 aic_find(aic)
892 struct aic_data *aic;
893 {
894 u_short iobase = aic->iobase;
895 char chip_id[sizeof(IDSTRING)]; /* For chips that support it */
896 int i;
897
898 /* Remove aic6360 from possible powerdown mode */
899 outb(DMACNTRL0, 0);
900
901 /* Thanks to mark@aggregate.com for the new method for detecting
902 * whether the chip is present or not. Bonus: may also work for
903 * the AIC-6260!
904 */
905 AIC_TRACE(("aic: probing for aic-chip at port 0x%x\n",(int)iobase));
906 /*
907 * Linux also init's the stack to 1-16 and then clears it,
908 * 6260's don't appear to have an ID reg - mpg
909 */
910 /* Push the sequence 0,1,..,15 on the stack */
911 #define STSIZE 16
912 outb(DMACNTRL1, 0); /* Reset stack pointer */
913 for (i = 0; i < STSIZE; i++)
914 outb(STACK, i);
915
916 /* See if we can pull out the same sequence */
917 outb(DMACNTRL1, 0);
918 for (i = 0; i < STSIZE && inb(STACK) == i; i++)
919 ;
920 if (i != STSIZE) {
921 AIC_START(("STACK futzed at %d.\n", i));
922 return ENXIO;
923 }
924
925 /* See if we can pull the id string out of the ID register,
926 * now only used for informational purposes.
927 */
928 bzero(chip_id, sizeof(chip_id));
929 insb(ID, chip_id, sizeof(IDSTRING)-1);
930 AIC_START(("AIC found at 0x%x ", (int)aic->iobase));
931 AIC_START(("ID: %s ",chip_id));
932 AIC_START(("chip revision %d\n",(int)inb(REV)));
933 return 0;
934 }
935
936 #ifdef SCSI_DETACH
937 static void
938 aicdetach(dev)
939 struct isa_device *dev;
940 {
941 int unit = dev->id_unit;
942 struct aic_data *aic = aicdata[unit];
943 struct scsibus_data *scbus;
944
945 scbus =
946 (struct scsibus_data *)scsi_extend_get(aicdata[unit]->sc_link.scsibus);
947 scsi_detachdev(scbus);
948 }
949 #endif /* SCSI_DETACH */
950
951 /*
952 * Attach the AIC6360, fill out some high and low level data structures
953 */
954 static int
955 aicattach(dev)
956 struct isa_device *dev;
957 {
958 int unit = dev->id_unit;
959 struct aic_data *aic = aicdata[unit];
960 struct scsibus_data *scbus;
961
962 AIC_TRACE(("aicattach\n"));
963 dev->id_ointr = aicintr;
964 aic->state = 0;
965 aic_scsi_reset(aic);
966 aic_init(aic); /* Init chip and driver */
967
968 /*
969 * Fill in the prototype scsi_link
970 */
971 aic->sc_link.adapter_unit = unit;
972 aic->sc_link.adapter_targ = AIC_SCSI_HOSTID;
973 aic->sc_link.adapter_softc = aic;
974 aic->sc_link.adapter = &aic_switch;
975 aic->sc_link.device = &aic_dev;
976
977 #if NAPM > 0
978 aic->s_hook.ah_fun = aic_suspend;
979 aic->s_hook.ah_arg = (void *) aic;
980 aic->s_hook.ah_name = "Adaptec AHA1520/AIC6369";
981 aic->s_hook.ah_order = APM_MID_ORDER;
982 apm_hook_establish(APM_HOOK_SUSPEND, &aic->s_hook);
983 aic->r_hook.ah_fun = aic_resume;
984 aic->r_hook.ah_arg = (void *) aic;
985 aic->r_hook.ah_name = "Adaptec AHA1520/AIC6369";
986 aic->r_hook.ah_order = APM_MID_ORDER;
987 apm_hook_establish(APM_HOOK_RESUME, &aic->r_hook);
988 #endif /* NAPM > 0 */
989
990 /*
991 * Prepare the scsibus_data area for the upperlevel
992 * scsi code.
993 */
994 scbus = scsi_alloc_bus();
995 if(!scbus)
996 return 0;
997 scbus->adapter_link = &aic->sc_link;
998
999 /*
1000 * ask the adapter what subunits are present
1001 */
1002 scsi_attachdevs(scbus);
1003
1004 return 1;
1005 }
1006
1007 /* Initialize AIC6360 chip itself
1008 * The following conditions should hold:
1009 * aicprobe should have succeeded, i.e. the iobase address in aic_data must
1010 * be valid.
1011 */
1012 static void
1013 aic6360_reset(aic)
1014 struct aic_data *aic;
1015 {
1016 u_short iobase = aic->iobase;
1017
1018 outb(SCSITEST, 0); /* Doc. recommends to clear these two */
1019 outb(TEST, 0); /* registers before operations commence */
1020
1021 /* Reset SCSI-FIFO and abort any transfers */
1022 outb(SXFRCTL0, CHEN|CLRCH|CLRSTCNT);
1023
1024 /* Reset DMA-FIFO */
1025 outb(DMACNTRL0, RSTFIFO);
1026 outb(DMACNTRL1, 0);
1027
1028 outb(SCSISEQ, 0); /* Disable all selection features */
1029 outb(SXFRCTL1, 0);
1030
1031 outb(SIMODE0, 0x00); /* Disable some interrupts */
1032 outb(CLRSINT0, 0x7f); /* Clear a slew of interrupts */
1033
1034 outb(SIMODE1, 0x00); /* Disable some more interrupts */
1035 outb(CLRSINT1, 0xef); /* Clear another slew of interrupts */
1036
1037 outb(SCSIRATE, 0); /* Disable synchronous transfers */
1038
1039 outb(CLRSERR, 0x07); /* Haven't seen ant errors (yet) */
1040
1041 outb(SCSIID, AIC_SCSI_HOSTID << OID_S); /* Set our SCSI-ID */
1042 outb(BRSTCNTRL, EISA_BRST_TIM);
1043 }
1044
1045 /* Pull the SCSI RST line for 500 us */
1046 static void
1047 aic_scsi_reset(aic)
1048 struct aic_data *aic;
1049 {
1050 u_short iobase = aic->iobase;
1051
1052 AIC_TRACE(("aic_scsi_reset:\n"));
1053 outb(SCSISEQ, SCSIRSTO);
1054 DELAY(500);
1055 outb(SCSISEQ, 0);
1056 DELAY(50);
1057 }
1058
1059 /*
1060 * Initialize aic SCSI driver, also (conditonally) reset the SCSI bus.
1061 * The reinitialization is still buggy (e.g. on SCSI resets).
1062 */
1063 static void
1064 aic_init(aic)
1065 struct aic_data *aic;
1066 {
1067 u_short iobase = aic->iobase;
1068 struct acb *acb;
1069 int r;
1070
1071 AIC_TRACE(("aic_init:\n"));
1072
1073 /* Reset the SCSI-bus itself */
1074 aic_scsi_reset(aic);
1075
1076 aic6360_reset(aic); /* Clean up our own hardware */
1077
1078 /*XXX*/ /* If not the first time (probably a reset condition),
1079 * we should clean queues with active commands
1080 */
1081 if (aic->state == 0) { /* First time through */
1082 TAILQ_INIT(&aic->ready_list);
1083 TAILQ_INIT(&aic->nexus_list);
1084 TAILQ_INIT(&aic->free_list);
1085 aic->nexus = 0;
1086 acb = aic->acb;
1087 bzero(acb, sizeof(aic->acb));
1088 for (r = 0; r < sizeof(aic->acb) / sizeof(*acb); r++) {
1089 TAILQ_INSERT_TAIL(&aic->free_list, acb, chain);
1090 acb++;
1091 }
1092 bzero(&aic->tinfo, sizeof(aic->tinfo));
1093 } else {
1094 aic->state = AIC_CLEANING;
1095 if (aic->nexus != NULL) {
1096 aic->nexus->xs->error = XS_DRIVER_STUFFUP;
1097 untimeout(aic_timeout, (caddr_t)aic->nexus,
1098 aic->nexus->xs->timeout_ch);
1099 aic_done(aic->nexus);
1100 }
1101 aic->nexus = NULL;
1102 while (acb = aic->nexus_list.tqh_first) {
1103 acb->xs->error = XS_DRIVER_STUFFUP;
1104 untimeout(aic_timeout, (caddr_t)aic->nexus,
1105 aic->nexus->xs->timeout_ch);
1106 aic_done(acb);
1107 }
1108 }
1109
1110 aic->phase = aic->prevphase = PH_INVALID;
1111 aic->hp = 0;
1112 for (r = 0; r < 7; r++) {
1113 struct aic_tinfo *tp = &aic->tinfo[r];
1114 tp->flags = AIC_USE_SYNCHRONOUS ? DO_NEGOTIATE : 0;
1115 tp->flags |= NEED_TO_RESET;
1116 tp->persgst = AIC_SYNC_PERIOD;
1117 tp->offsgst = AIC_SYNC_REQ_ACK_OFS;
1118 tp->syncdata = 0;
1119 }
1120 aic->state = AIC_IDLE;
1121 outb(DMACNTRL0, INTEN);
1122 return;
1123 }
1124
1125 /*
1126 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
1127 */
1128
1129 /*
1130 * Expected sequence:
1131 * 1) Command inserted into ready list
1132 * 2) Command selected for execution
1133 * 3) Command won arbitration and has selected target device
1134 * 4) Send message out (identify message, eventually also sync.negotiations)
1135 * 5) Send command
1136 * 5a) Receive disconnect message, disconnect.
1137 * 5b) Reselected by target
1138 * 5c) Receive identify message from target.
1139 * 6) Send or receive data
1140 * 7) Receive status
1141 * 8) Receive message (command complete etc.)
1142 * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd.
1143 * Repeat 2-8 (no disconnects please...)
1144 */
1145
1146 /*
1147 * Start a SCSI-command
1148 * This function is called by the higher level SCSI-driver to queue/run
1149 * SCSI-commands.
1150 */
1151 static int32_t
1152 aic_scsi_cmd(xs)
1153 struct scsi_xfer *xs;
1154 {
1155 struct scsi_link *sc = xs->sc_link;
1156 struct aic_data *aic;
1157 struct acb *acb;
1158 int s = 0;
1159 int flags;
1160
1161 aic = (struct aic_data *)sc->adapter_softc;
1162 SC_DEBUG(sc, SDEV_DB2, ("aic_scsi_cmd\n"));
1163 AIC_TRACE(("aic_scsi_cmd\n"));
1164 AIC_MISC(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
1165 sc->target));
1166
1167 flags = xs->flags;
1168
1169 /* Get a aic command block */
1170 if (!(flags & SCSI_NOMASK)) {
1171 /* Critical region */
1172 s = splbio();
1173 acb = aic->free_list.tqh_first;
1174 if (acb) {
1175 TAILQ_REMOVE(&aic->free_list, acb, chain);
1176 }
1177 splx(s);
1178 } else {
1179 acb = aic->free_list.tqh_first;
1180 if (acb) {
1181 TAILQ_REMOVE(&aic->free_list, acb, chain);
1182 }
1183 }
1184
1185 if (acb == NULL) {
1186 xs->error = XS_DRIVER_STUFFUP;
1187 AIC_MISC(("TRY_AGAIN_LATER"));
1188 return TRY_AGAIN_LATER;
1189 }
1190
1191 /* Initialize acb */
1192 acb->flags = ACB_ACTIVE;
1193 acb->xs = xs;
1194 bcopy(xs->cmd, &acb->cmd, xs->cmdlen);
1195 acb->clen = xs->cmdlen;
1196 acb->daddr = xs->data;
1197 acb->dleft = xs->datalen;
1198 acb->stat = 0;
1199
1200 if (!(flags & SCSI_NOMASK))
1201 s = splbio();
1202
1203 TAILQ_INSERT_TAIL(&aic->ready_list, acb, chain);
1204 xs->timeout_ch = timeout(aic_timeout, (caddr_t)acb,
1205 (xs->timeout*hz)/1000);
1206
1207 if (aic->state == AIC_IDLE)
1208 aic_sched(aic);
1209
1210 if (!(flags & SCSI_NOMASK)) { /* Almost done. Wait outside */
1211 splx(s);
1212 AIC_MISC(("SUCCESSFULLY_QUEUED"));
1213 return SUCCESSFULLY_QUEUED;
1214 }
1215
1216 /* Not allowed to use interrupts, use polling instead */
1217 return aic_poll(aic, acb);
1218 }
1219
1220 /*
1221 * Adjust transfer size in buffer structure
1222 */
1223 static void
1224 aic_minphys(bp)
1225 struct buf *bp;
1226 {
1227
1228 AIC_TRACE(("aic_minphys\n"));
1229 if (bp->b_bcount > (AIC_NSEG << PAGE_SHIFT))
1230 bp->b_bcount = (AIC_NSEG << PAGE_SHIFT);
1231 }
1232
1233
1234 static u_int32_t
1235 aic_adapter_info(unit)
1236 int unit;
1237 {
1238
1239 AIC_TRACE(("aic_adapter_info\n"));
1240 return (2); /* One outstanding command per target */
1241 }
1242
1243 /*
1244 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
1245 */
1246 static int
1247 aic_poll(aic, acb)
1248 struct aic_data *aic;
1249 struct acb *acb;
1250 {
1251 register u_short iobase = aic->iobase;
1252 struct scsi_xfer *xs = acb->xs;
1253 int count = xs->timeout * 10;
1254
1255 AIC_TRACE(("aic_poll\n"));
1256 while (count) {
1257 if (inb(DMASTAT) & INTSTAT)
1258 aicintr(xs->sc_link->adapter_unit);
1259 if (xs->flags & ITSDONE)
1260 break;
1261 DELAY(100);
1262 count--;
1263 }
1264 if (count == 0) {
1265 AIC_MISC(("aic_poll: timeout"));
1266 aic_timeout((caddr_t)acb);
1267 }
1268 if (xs->error)
1269 return HAD_ERROR;
1270 return COMPLETE;
1271 }
1272
1273 /* LOW LEVEL SCSI UTILITIES */
1274
1275 /* Determine the SCSI bus phase, return either a real SCSI bus phase or some
1276 * pseudo phase we use to detect certain exceptions. This one is a bit tricky.
1277 * The bits we peek at:
1278 * CDI, MSGI and DI is the 3 SCSI signals determining the bus phase.
1279 * These should be qualified by REQI high and ACKI low.
1280 * Also peek at SSTAT0[SELDO|SELDI] to detect a passing BUSFREE condition.
1281 * No longer detect SCSI RESET or PERR here. They are tested for separately
1282 * in the interrupt handler.
1283 * Note: If an exception occur at some critical time during the phase
1284 * determination we'll most likely return something wildly erronous....
1285 */
1286 static __inline u_short
1287 aicphase(aic)
1288 struct aic_data *aic;
1289 {
1290 register u_short iobase = aic->iobase;
1291 register u_char sstat0, sstat1, scsisig;
1292
1293 sstat1 = inb(SSTAT1); /* Look for REQINIT (REQ asserted) */
1294 scsisig = inb(SCSISIGI); /* Get the SCSI bus signals */
1295 sstat0 = inb(SSTAT0); /* Get the selection valid status bits */
1296
1297 if (!(inb(SSTAT0) & (SELDO|SELDI))) /* Selection became invalid? */
1298 return PH_BUSFREE;
1299
1300 /* Selection is still valid */
1301 if (!(sstat1 & REQINIT)) /* REQ not asserted ? */
1302 return PH_INVALID;
1303
1304 /* REQ is asserted, (and ACK is not) */
1305 return scsisig & PH_MASK;
1306 }
1307
1308
1309 /* Schedule a scsi operation. This has now been pulled out of the interrupt
1310 * handler so that we may call it from aic_scsi_cmd and aic_done. This may
1311 * save us an unecessary interrupt just to get things going. Should only be
1312 * called when state == AIC_IDLE and at bio pl.
1313 */
1314 static void
1315 aic_sched(aic)
1316 register struct aic_data *aic;
1317 {
1318 struct scsi_link *sc;
1319 struct acb *acb;
1320 u_short iobase = aic->iobase;
1321 int t;
1322 u_char simode0, simode1, scsiseq;
1323
1324 AIC_TRACE(("aic_sched\n"));
1325 simode0 = ENSELDI;
1326 simode1 = ENSCSIRST|ENSCSIPERR|ENREQINIT;
1327 scsiseq = ENRESELI;
1328 /*
1329 * Find first acb in rdy queue that is for a target/lunit
1330 * combinations that is not busy.
1331 */
1332 outb(CLRSINT1, CLRSELTIMO|CLRBUSFREE|CLRSCSIPERR);
1333 for (acb = aic->ready_list.tqh_first; acb; acb = acb->chain.tqe_next) {
1334 sc = acb->xs->sc_link;
1335 t = sc->target;
1336 if (!(aic->tinfo[t].lubusy & (1 << sc->lun))) {
1337 TAILQ_REMOVE(&aic->ready_list, acb, chain);
1338 aic->nexus = acb;
1339 aic->state = AIC_SELECTING;
1340 /*
1341 * Start selection process. Always enable
1342 * reselections. Note: we don't have a nexus yet, so
1343 * cannot set aic->state = AIC_HASNEXUS.
1344 */
1345 simode0 = ENSELDI|ENSELDO;
1346 simode1 = ENSCSIRST|ENSCSIPERR|
1347 ENREQINIT|ENSELTIMO;
1348 scsiseq = ENRESELI|ENSELO|ENAUTOATNO;
1349 outb(SCSIID, AIC_SCSI_HOSTID << OID_S | t);
1350 outb(SXFRCTL1, STIMO_256ms|ENSTIMER);
1351 outb(CLRSINT0, CLRSELDO);
1352 break;
1353 }
1354 #if AIC_DEBUG
1355 else
1356 AIC_MISC(("%d:%d busy\n", t, sc->lun));
1357 #endif
1358 }
1359 AIC_MISC(("%sselecting\n",scsiseq&ENSELO?"":"re"));
1360 outb(SIMODE0, simode0);
1361 outb(SIMODE1, simode1);
1362 outb(SCSISEQ, scsiseq);
1363 }
1364
1365
1366 /*
1367 * POST PROCESSING OF SCSI_CMD (usually current)
1368 */
1369 static void
1370 aic_done(acb)
1371 struct acb *acb;
1372 {
1373 struct scsi_xfer *xs = acb->xs;
1374 struct scsi_link *sc = xs->sc_link;
1375 struct aic_data *aic = (struct aic_data *)sc->adapter_softc;
1376
1377 AIC_TRACE(("aic_done "));
1378
1379 /*
1380 * Now, if we've come here with no error code, i.e. we've kept the
1381 * initial XS_NOERROR, and the status code signals that we should
1382 * check sense, we'll need to set up a request sense cmd block and
1383 * push the command back into the ready queue *before* any other
1384 * commands for this target/lunit, else we lose the sense info.
1385 * We don't support chk sense conditions for the request sense cmd.
1386 */
1387 if (xs->error == XS_NOERROR && !(acb->flags & ACB_CHKSENSE)) {
1388 if ((acb->stat & ST_MASK)==SCSI_CHECK) {
1389 struct scsi_sense *ss = (void *)&acb->cmd;
1390 AIC_MISC(("requesting sense "));
1391 /* First, save the return values */
1392 xs->resid = acb->dleft;
1393 xs->status = acb->stat;
1394 /* Next, setup a request sense command block */
1395 bzero(ss, sizeof(*ss));
1396 ss->op_code = REQUEST_SENSE;
1397 ss->byte2 = sc->lun << 5;
1398 ss->length = sizeof(struct scsi_sense_data);
1399 acb->clen = sizeof(*ss);
1400 acb->daddr = (char *)&xs->sense;
1401 acb->dleft = sizeof(struct scsi_sense_data);
1402 acb->flags = ACB_ACTIVE|ACB_CHKSENSE;
1403 TAILQ_INSERT_HEAD(&aic->ready_list, acb, chain);
1404 aic->tinfo[sc->target].lubusy &= ~(1<<sc->lun);
1405 aic->tinfo[sc->target].senses++;
1406 if (aic->nexus == acb) {
1407 aic->nexus = NULL;
1408 aic->state = AIC_IDLE;
1409 aic_sched(aic);
1410 }
1411 return;
1412 }
1413 }
1414
1415 if (xs->flags & SCSI_ERR_OK) {
1416 xs->resid = 0;
1417 xs->error = XS_NOERROR;
1418 } else if (xs->error == XS_NOERROR && (acb->flags & ACB_CHKSENSE)) {
1419 xs->error = XS_SENSE;
1420 } else {
1421 xs->resid = acb->dleft;
1422 }
1423 xs->flags |= ITSDONE;
1424
1425 #if AIC_DEBUG
1426 if (aic_debug & AIC_SHOWMISC) {
1427 printf("err=0x%02x ",xs->error);
1428 if (xs->error == XS_SENSE)
1429 printf("sense=%2x\n", xs->sense.error_code);
1430 }
1431 if ((xs->resid || xs->error > XS_SENSE) && aic_debug & AIC_SHOWMISC) {
1432 if (xs->resid)
1433 printf("aic_done: resid=%d\n", xs->resid);
1434 if (xs->error)
1435 printf("aic_done: error=%d\n", xs->error);
1436 }
1437 #endif
1438
1439 /*
1440 * Remove the ACB from whatever queue it's on. We have to do a bit of
1441 * a hack to figure out which queue it's on. Note that it is *not*
1442 * necessary to cdr down the ready queue, but we must cdr down the
1443 * nexus queue and see if it's there, so we can mark the unit as no
1444 * longer busy. This code is sickening, but it works.
1445 */
1446 if (acb == aic->nexus) {
1447 #if NAPM > 0 && NCARD > 0
1448 /* SlimSCSI dies without this when it resumes from suspend */
1449 aic->nexus = NULL;
1450 #endif
1451 aic->state = AIC_IDLE;
1452 aic->tinfo[sc->target].lubusy &= ~(1<<sc->lun);
1453 aic_sched(aic);
1454 } else if (aic->ready_list.tqh_last == &acb->chain.tqe_next) {
1455 TAILQ_REMOVE(&aic->ready_list, acb, chain);
1456 } else {
1457 register struct acb *acb2;
1458 for (acb2 = aic->nexus_list.tqh_first; acb2;
1459 acb2 = acb2->chain.tqe_next)
1460 if (acb2 == acb) {
1461 TAILQ_REMOVE(&aic->nexus_list, acb, chain);
1462 aic->tinfo[sc->target].lubusy &= ~(1<<sc->lun);
1463 /* XXXX Should we call aic_sched() here? */
1464 break;
1465 }
1466 if (acb2)
1467 ;
1468 else if (acb->chain.tqe_next) {
1469 TAILQ_REMOVE(&aic->ready_list, acb, chain);
1470 } else {
1471 printf("aic%d: can't find matching acb\n",
1472 xs->sc_link->adapter_unit);
1473 Debugger("aic6360");
1474 fatal_if_no_DDB();
1475 }
1476 }
1477 /* Put it on the free list. */
1478 acb->flags = ACB_FREE;
1479 TAILQ_INSERT_HEAD(&aic->free_list, acb, chain);
1480
1481 aic->tinfo[sc->target].cmds++;
1482 scsi_done(xs);
1483 return;
1484 }
1485
1486 /*
1487 * INTERRUPT/PROTOCOL ENGINE
1488 */
1489
1490 /* The message system:
1491 * This is a revamped message system that now should easier accomodate new
1492 * messages, if necessary.
1493 * Currently we accept these messages:
1494 * IDENTIFY (when reselecting)
1495 * COMMAND COMPLETE # (expect bus free after messages marked #)
1496 * NOOP
1497 * MESSAGE REJECT
1498 * SYNCHRONOUS DATA TRANSFER REQUEST
1499 * SAVE DATA POINTER
1500 * RESTORE POINTERS
1501 * DISCONNECT #
1502 *
1503 * We may send these messages in prioritized order:
1504 * BUS DEVICE RESET # if SCSI_RESET & xs->flags (or in weird sits.)
1505 * MESSAGE PARITY ERROR par. err. during MSGI
1506 * MESSAGE REJECT If we get a message we don't know how to handle
1507 * ABORT # send on errors
1508 * INITIATOR DETECTED ERROR also on errors (SCSI2) (during info xfer)
1509 * IDENTIFY At the start of each transfer
1510 * SYNCHRONOUS DATA TRANSFER REQUEST if appropriate
1511 * NOOP if nothing else fits the bill ...
1512 */
1513
1514 #define aic_sched_msgout(m) \
1515 do { \
1516 orreg(SCSISIGO, ATNO); \
1517 aic->msgpriq |= (m); \
1518 } while (0)
1519
1520 #define IS1BYTEMSG(m) (((m) != 1 && (m) < 0x20) || (m) >= 0x80)
1521 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
1522 #define ISEXTMSG(m) ((m) == 1)
1523 /* Precondition:
1524 * The SCSI bus is already in the MSGI phase and there is a message byte
1525 * on the bus, along with an asserted REQ signal.
1526 */
1527 static void
1528 aic_msgin(aic)
1529 register struct aic_data *aic;
1530 {
1531 register u_short iobase = aic->iobase;
1532 int spincount, extlen;
1533 u_char sstat1;
1534
1535 AIC_TRACE(("aic_msgin "));
1536 outb(SCSISIGO, PH_MSGI);
1537 /* Prepare for a new message. A message should (according to the SCSI
1538 * standard) be transmitted in one single message_in phase.
1539 * If we have been in some other phase, then this is a new message.
1540 */
1541 if (aic->prevphase != PH_MSGI) {
1542 aic->flags &= ~AIC_DROP_MSGI;
1543 aic->imlen = 0;
1544 }
1545 /*
1546 * Read a whole message but the last byte. If we shall reject the
1547 * message, we shall have to do it, by asserting ATNO, during the
1548 * message transfer phase itself.
1549 */
1550 for (;;) {
1551 sstat1 = inb(SSTAT1);
1552 /* If parity errors just dump everything on the floor, also
1553 * a parity error automatically sets ATNO
1554 */
1555 if (sstat1 & SCSIPERR) {
1556 aic_sched_msgout(SEND_PARITY_ERROR);
1557 aic->flags |= AIC_DROP_MSGI;
1558 }
1559 /*
1560 * If we're going to reject the message, don't bother storing
1561 * the incoming bytes. But still, we need to ACK them.
1562 */
1563 if (!(aic->flags & AIC_DROP_MSGI)) {
1564 /* Get next message byte */
1565 aic->imess[aic->imlen] = inb(SCSIDAT);
1566 /*
1567 * This testing is suboptimal, but most messages will
1568 * be of the one byte variety, so it should not effect
1569 * performance significantly.
1570 */
1571 if (IS1BYTEMSG(aic->imess[0]))
1572 break;
1573 if (IS2BYTEMSG(aic->imess[0]) && aic->imlen == 1)
1574 break;
1575 if (ISEXTMSG(aic->imess[0]) && aic->imlen > 0) {
1576 if (aic->imlen == AIC_MAX_MSG_LEN) {
1577 aic->flags |= AIC_DROP_MSGI;
1578 aic_sched_msgout(SEND_REJECT);
1579 }
1580 extlen = aic->imess[1] ? aic->imess[1] : 256;
1581 if (aic->imlen == extlen + 2)
1582 break; /* Got it all */
1583 }
1584 }
1585 /* If we reach this spot we're either:
1586 * a) in the middle of a multi-byte message or
1587 * b) we're dropping bytes
1588 */
1589 outb(SXFRCTL0, CHEN|SPIOEN);
1590 inb(SCSIDAT); /* Really read it (ACK it, that is) */
1591 outb(SXFRCTL0, CHEN);
1592 aic->imlen++;
1593
1594 /*
1595 * We expect the bytes in a multibyte message to arrive
1596 * relatively close in time, a few microseconds apart.
1597 * Therefore we will spinwait for some small amount of time
1598 * waiting for the next byte.
1599 */
1600 spincount = DELAYCOUNT * AIC_MSGI_SPIN;
1601 LOGLINE(aic);
1602 while (spincount-- && !((sstat1 = inb(SSTAT1)) & REQINIT))
1603 ;
1604 if (spincount == -1 || sstat1 & (PHASEMIS|BUSFREE))
1605 return;
1606 }
1607 /* Now we should have a complete message (1 byte, 2 byte and moderately
1608 * long extended messages). We only handle extended messages which
1609 * total length is shorter than AIC_MAX_MSG_LEN. Longer messages will
1610 * be amputated. (Return XS_BOBBITT ?)
1611 */
1612 if (aic->state == AIC_HASNEXUS) {
1613 struct acb *acb = aic->nexus;
1614 struct aic_tinfo *ti = &aic->tinfo[acb->xs->sc_link->target];
1615 int offs, per, rate;
1616
1617 outb(SIMODE1, ENSCSIRST|ENPHASEMIS|ENBUSFREE|ENSCSIPERR);
1618 switch (aic->imess[0]) {
1619 case MSG_CMDCOMPLETE:
1620 if (!acb) {
1621 aic_sched_msgout(SEND_ABORT);
1622 printf("aic: CMDCOMPLETE but no command?\n");
1623 break;
1624 }
1625 if (aic->dleft < 0) {
1626 struct scsi_link *sc = acb->xs->sc_link;
1627 printf("aic: %d extra bytes from %d:%d\n",
1628 -aic->dleft, sc->target, sc->lun);
1629 acb->dleft = 0;
1630 }
1631 acb->xs->resid = acb->dleft = aic->dleft;
1632 aic->flags |= AIC_BUSFREE_OK;
1633 untimeout(aic_timeout, (caddr_t)acb,
1634 acb->xs->timeout_ch);
1635 aic_done(acb);
1636 break;
1637 case MSG_MESSAGE_REJECT:
1638 if (aic_debug & AIC_SHOWMISC)
1639 printf("aic: our msg rejected by target\n");
1640 if (aic->flags & AIC_SYNCHNEGO) {
1641 ti->syncdata = 0;
1642 ti->persgst = ti->offsgst = 0;
1643 aic->flags &= ~AIC_SYNCHNEGO;
1644 ti->flags &= ~DO_NEGOTIATE;
1645 }
1646 /* Not all targets understand INITIATOR_DETECTED_ERR */
1647 if (aic->msgout == SEND_INIT_DET_ERR)
1648 aic_sched_msgout(SEND_ABORT);
1649 break;
1650 case MSG_NOOP: /* Will do! Immediately, sir!*/
1651 break; /* Hah, that was easy! */
1652 case MSG_DISCONNECT:
1653 if (!acb) {
1654 aic_sched_msgout(SEND_ABORT);
1655 printf("aic: nothing to DISCONNECT\n");
1656 break;
1657 }
1658 ti->dconns++;
1659 TAILQ_INSERT_HEAD(&aic->nexus_list, acb, chain);
1660 acb = aic->nexus = NULL;
1661 aic->state = AIC_IDLE;
1662 aic->flags |= AIC_BUSFREE_OK;
1663 break;
1664 case MSG_SAVEDATAPOINTER:
1665 if (!acb) {
1666 aic_sched_msgout(SEND_ABORT);
1667 printf("aic: no DATAPOINTERs to save\n");
1668 break;
1669 }
1670 acb->dleft = aic->dleft;
1671 acb->daddr = aic->dp;
1672 break;
1673 case MSG_RESTOREPOINTERS:
1674 if (!acb) {
1675 aic_sched_msgout(SEND_ABORT);
1676 printf("aic: no DATAPOINTERs to restore\n");
1677 break;
1678 }
1679 aic->dp = acb->daddr;
1680 aic->dleft = acb->dleft;
1681 break;
1682 case MSG_EXTENDED:
1683 switch (aic->imess[2]) {
1684 case MSG_EXT_SDTR:
1685 per = aic->imess[3] * 4;
1686 rate = (per + 49 - 100)/50;
1687 offs = aic->imess[4];
1688 if (offs == 0)
1689 ti->syncdata = 0;
1690 else if (rate > 7) {
1691 /* Too slow for aic6360. Do asynch
1692 * instead. Renegotiate the deal.
1693 */
1694 ti->persgst = 0;
1695 ti->offsgst = 0;
1696 aic_sched_msgout(SEND_SDTR);
1697 } else {
1698 rate = rate<<4 | offs;
1699 ti->syncdata = rate;
1700 }
1701 break;
1702 default: /* Extended messages we don't handle */
1703 aic_sched_msgout(SEND_REJECT);
1704 break;
1705 }
1706 break;
1707 default:
1708 aic_sched_msgout(SEND_REJECT);
1709 break;
1710 }
1711 } else if (aic->state == AIC_RESELECTED) {
1712 struct scsi_link *sc;
1713 struct acb *acb;
1714 u_char selid, lunit;
1715 /*
1716 * Which target is reselecting us? (The ID bit really)
1717 */
1718 selid = inb(SELID) & ~(1<<AIC_SCSI_HOSTID);
1719 if (MSG_ISIDENT(aic->imess[0])) { /* Identify? */
1720 AIC_MISC(("searching "));
1721 /* Search wait queue for disconnected cmd
1722 * The list should be short, so I haven't bothered with
1723 * any more sophisticated structures than a simple
1724 * singly linked list.
1725 */
1726 lunit = aic->imess[0] & 0x07;
1727 for (acb = aic->nexus_list.tqh_first; acb;
1728 acb = acb->chain.tqe_next) {
1729 sc = acb->xs->sc_link;
1730 if (sc->lun == lunit &&
1731 selid == (1<<sc->target)) {
1732 TAILQ_REMOVE(&aic->nexus_list, acb,
1733 chain);
1734 break;
1735 }
1736 }
1737 if (!acb) { /* Invalid reselection! */
1738 aic_sched_msgout(SEND_ABORT);
1739 printf("aic: invalid reselect (idbit=0x%2x)\n",
1740 selid);
1741 } else { /* Reestablish nexus */
1742 /* Setup driver data structures and
1743 * do an implicit RESTORE POINTERS
1744 */
1745 aic->nexus = acb;
1746 aic->dp = acb->daddr;
1747 aic->dleft = acb->dleft;
1748 aic->tinfo[sc->target].lubusy |= (1<<sc->lun);
1749 outb(SCSIRATE,aic->tinfo[sc->target].syncdata);
1750 AIC_MISC(("... found acb"));
1751 aic->state = AIC_HASNEXUS;
1752 }
1753 } else {
1754 printf("aic: bogus reselect (no IDENTIFY) %0x2x\n",
1755 selid);
1756 aic_sched_msgout(SEND_DEV_RESET);
1757 }
1758 } else { /* Neither AIC_HASNEXUS nor AIC_RESELECTED! */
1759 printf("aic: unexpected message in; will send DEV_RESET\n");
1760 aic_sched_msgout(SEND_DEV_RESET);
1761 }
1762 /* Must not forget to ACK the last message byte ... */
1763 outb(SXFRCTL0, CHEN|SPIOEN);
1764 inb(SCSIDAT);
1765 outb(SXFRCTL0, CHEN);
1766 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT);
1767 }
1768
1769
1770 /* The message out (and in) stuff is a bit complicated:
1771 * If the target requests another message (sequence) without
1772 * having changed phase in between it really asks for a
1773 * retransmit, probably due to parity error(s).
1774 * The following messages can be sent:
1775 * IDENTIFY @ These 3 stems from scsi command activity
1776 * BUS_DEV_RESET @
1777 * IDENTIFY + SDTR @
1778 * MESSAGE_REJECT if MSGI doesn't make sense
1779 * MESSAGE_PARITY_ERROR if MSGI spots a parity error
1780 * NOOP if asked for a message and there's nothing to send
1781 */
1782 static void
1783 aic_msgout(aic)
1784 register struct aic_data *aic;
1785 {
1786 register u_short iobase = aic->iobase;
1787 struct aic_tinfo *ti;
1788 struct acb *acb;
1789
1790 /* First determine what to send. If we haven't seen a
1791 * phasechange this is a retransmission request.
1792 */
1793 outb(SCSISIGO, PH_MSGO);
1794 if (aic->prevphase != PH_MSGO) { /* NOT a retransmit */
1795 /* Pick up highest priority message */
1796 aic->msgout = aic->msgpriq & -aic->msgpriq; /* What message? */
1797 aic->omlen = 1; /* "Default" message len */
1798 switch (aic->msgout) {
1799 case SEND_SDTR: /* Also implies an IDENTIFY message */
1800 acb = aic->nexus;
1801 ti = &aic->tinfo[acb->xs->sc_link->target];
1802 aic->omess[1] = MSG_EXTENDED;
1803 aic->omess[2] = 3;
1804 aic->omess[3] = MSG_EXT_SDTR;
1805 aic->omess[4] = ti->persgst >> 2;
1806 aic->omess[5] = ti->offsgst;
1807 aic->omlen = 6;
1808 /* Fallthrough! */
1809 case SEND_IDENTIFY:
1810 if (aic->state != AIC_HASNEXUS) {
1811 printf("aic at line %d: no nexus", __LINE__);
1812 Debugger("aic6360");
1813 fatal_if_no_DDB();
1814 }
1815 acb = aic->nexus;
1816 aic->omess[0] = MSG_IDENTIFY(acb->xs->sc_link->lun);
1817 break;
1818 case SEND_DEV_RESET:
1819 aic->omess[0] = MSG_BUS_DEV_RESET;
1820 aic->flags |= AIC_BUSFREE_OK;
1821 break;
1822 case SEND_PARITY_ERROR:
1823 aic->omess[0] = MSG_PARITY_ERR;
1824 break;
1825 case SEND_ABORT:
1826 aic->omess[0] = MSG_ABORT;
1827 aic->flags |= AIC_BUSFREE_OK;
1828 break;
1829 case SEND_INIT_DET_ERR:
1830 aic->omess[0] = MSG_INITIATOR_DET_ERR;
1831 break;
1832 case SEND_REJECT:
1833 aic->omess[0] = MSG_MESSAGE_REJECT;
1834 break;
1835 default:
1836 aic->omess[0] = MSG_NOOP;
1837 break;
1838 }
1839 aic->omp = aic->omess;
1840 } else if (aic->omp == &aic->omess[aic->omlen]) {
1841 /* Have sent the message at least once, this is a retransmit.
1842 */
1843 AIC_MISC(("retransmitting "));
1844 if (aic->omlen > 1)
1845 outb(SCSISIGO, PH_MSGO|ATNO);
1846 }
1847 /* else, we're in the middle of a multi-byte message */
1848 outb(SXFRCTL0, CHEN|SPIOEN);
1849 outb(DMACNTRL0, INTEN|RSTFIFO);
1850 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT);
1851 do {
1852 LOGLINE(aic);
1853 do {
1854 aic->phase = aicphase(aic);
1855 } while (aic->phase == PH_INVALID);
1856 if (aic->phase != PH_MSGO)
1857 /* Target left MSGO, possibly to reject our
1858 * message
1859 */
1860 break;
1861 /* Clear ATN before last byte */
1862 if (aic->omp == &aic->omess[aic->omlen-1])
1863 outb(CLRSINT1, CLRATNO);
1864 outb(SCSIDAT, *aic->omp++); /* Send MSG */
1865 LOGLINE(aic);
1866 while (inb(SCSISIGI) & ACKO)
1867 ;
1868 } while (aic->omp != &aic->omess[aic->omlen]);
1869 aic->progress = aic->omp != aic->omess;
1870 /* We get here in two ways:
1871 * a) phase != MSGO. Target is probably going to reject our message
1872 * b) aic->omp == &aic->omess[aic->omlen], i.e. the message has been
1873 * transmitted correctly and accepted by the target.
1874 */
1875 if (aic->phase == PH_MSGO) { /* Message accepted by target! */
1876 aic->msgpriq &= ~aic->msgout;
1877 aic->msgout = 0;
1878 }
1879 outb(SXFRCTL0, CHEN); /* Disable SPIO */
1880 outb(SIMODE0, 0); /* Setup interrupts before leaving */
1881 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT);
1882 /* Enabled ints: SCSIPERR, SCSIRSTI (unexpected)
1883 * REQINIT (expected) BUSFREE (possibly expected)
1884 */
1885 }
1886
1887 /* aic_dataout: perform a data transfer using the FIFO datapath in the aic6360
1888 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
1889 * and ACK deasserted (i.e. waiting for a data byte)
1890 * This new revision has been optimized (I tried) to make the common case fast,
1891 * and the rarer cases (as a result) somewhat more comlex
1892 */
1893 static void
1894 aic_dataout(aic)
1895 register struct aic_data *aic;
1896 {
1897 register u_short iobase = aic->iobase;
1898 register u_char dmastat;
1899 int amount, olddleft = aic->dleft;
1900 #define DOUTAMOUNT 128 /* Full FIFO */
1901
1902 /* Enable DATA OUT transfers */
1903 outb(SCSISIGO, PH_DOUT);
1904 outb(CLRSINT1, CLRPHASECHG);
1905 /* Clear FIFOs and counters */
1906 outb(SXFRCTL0, CHEN|CLRSTCNT|CLRCH);
1907 outb(DMACNTRL0, WRITE|INTEN|RSTFIFO);
1908 /* Enable FIFOs */
1909 outb(SXFRCTL0, SCSIEN|DMAEN|CHEN);
1910 outb(DMACNTRL0, ENDMA|DWORDPIO|WRITE|INTEN);
1911
1912 /* Setup to detect:
1913 * PHASEMIS & PHASECHG: target has left the DOUT phase
1914 * SCSIRST: something just pulled the RST line.
1915 * BUSFREE: target has unexpectedly left the DOUT phase
1916 */
1917 outb(SIMODE1, ENPHASEMIS|ENSCSIRST|ENBUSFREE|ENPHASECHG);
1918
1919 /* I have tried to make the main loop as tight as possible. This
1920 * means that some of the code following the loop is a bit more
1921 * complex than otherwise.
1922 */
1923 while (aic->dleft) {
1924 int xfer;
1925
1926 LOGLINE(aic);
1927
1928 for (;;) {
1929 dmastat = inb(DMASTAT);
1930 if (dmastat & DFIFOEMP)
1931 break;
1932 if (dmastat & INTSTAT)
1933 goto phasechange;
1934 }
1935
1936 xfer = min(DOUTAMOUNT, aic->dleft);
1937
1938 #if AIC_USE_DWORDS
1939 if (xfer >= 12) {
1940 outsl(DMADATALONG, aic->dp, xfer/4);
1941 aic->dleft -= xfer & ~3;
1942 aic->dp += xfer & ~3;
1943 xfer &= 3;
1944 }
1945 #else
1946 if (xfer >= 8) {
1947 outsw(DMADATA, aic->dp, xfer/2);
1948 aic->dleft -= xfer & ~1;
1949 aic->dp += xfer & ~1;
1950 xfer &= 1;
1951 }
1952 #endif
1953
1954 if (xfer) {
1955 outb(DMACNTRL0, ENDMA|B8MODE|INTEN);
1956 outsb(DMADATA, aic->dp, xfer);
1957 aic->dleft -= xfer;
1958 aic->dp += xfer;
1959 outb(DMACNTRL0, ENDMA|DWORDPIO|INTEN);
1960 }
1961 }
1962
1963 /* See the bytes off chip */
1964 for (;;) {
1965 dmastat = inb(DMASTAT);
1966 if ((dmastat & DFIFOEMP) && (inb(SSTAT2) & SEMPTY))
1967 break;
1968 if (dmastat & INTSTAT)
1969 goto phasechange;
1970 }
1971
1972 phasechange:
1973 /* We now have the data off chip. */
1974 outb(SXFRCTL0, CHEN);
1975
1976 if (dmastat & INTSTAT) { /* Some sort of phasechange */
1977 register u_char sstat2;
1978 /* Stop transfers, do some accounting */
1979 amount = inb(FIFOSTAT);
1980 sstat2 = inb(SSTAT2);
1981 if ((sstat2 & 7) == 0)
1982 amount += sstat2 & SFULL ? 8 : 0;
1983 else
1984 amount += sstat2 & 7;
1985 aic->dleft += amount;
1986 aic->dp -= amount;
1987 AIC_MISC(("+%d ", amount));
1988 }
1989
1990 outb(DMACNTRL0, RSTFIFO|INTEN);
1991 LOGLINE(aic);
1992 while (inb(SXFRCTL0) & SCSIEN)
1993 ;
1994 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT);
1995 /* Enabled ints: BUSFREE, SCSIPERR, SCSIRSTI (unexpected)
1996 * REQINIT (expected)
1997 */
1998 aic->progress = olddleft != aic->dleft;
1999 return;
2000 }
2001
2002 /* aic_datain: perform data transfers using the FIFO datapath in the aic6360
2003 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
2004 * and ACK deasserted (i.e. at least one byte is ready).
2005 * For now, uses a pretty dumb algorithm, hangs around until all data has been
2006 * transferred. This, is OK for fast targets, but not so smart for slow
2007 * targets which don't disconnect or for huge transfers.
2008 */
2009 static void
2010 aic_datain(aic)
2011 register struct aic_data *aic;
2012 {
2013 register u_short iobase = aic->iobase;
2014 register u_char dmastat;
2015 int olddleft = aic->dleft;
2016 #define DINAMOUNT 128 /* Default amount of data to transfer */
2017
2018 /* Enable DATA IN transfers */
2019 outb(SCSISIGO, PH_DIN);
2020 outb(CLRSINT1, CLRPHASECHG);
2021 /* Clear FIFOs and counters */
2022 outb(SXFRCTL0, CHEN|CLRSTCNT|CLRCH);
2023 outb(DMACNTRL0, INTEN|RSTFIFO);
2024 /* Enable FIFOs */
2025 outb(SXFRCTL0, SCSIEN|DMAEN|CHEN);
2026 outb(DMACNTRL0, ENDMA|DWORDPIO|INTEN);
2027
2028 outb(SIMODE1, ENSCSIRST|ENPHASEMIS|ENBUSFREE|ENPHASECHG);
2029
2030 /* We leave this loop if one or more of the following is true:
2031 * a) phase != PH_DIN && FIFOs are empty
2032 * b) SCSIRSTI is set (a reset has occurred) or busfree is detected.
2033 */
2034 while (aic->dleft) {
2035 int done = 0;
2036 int xfer;
2037
2038 LOGLINE(aic);
2039
2040 /* Wait for fifo half full or phase mismatch */
2041 for (;;) {
2042 dmastat = inb(DMASTAT);
2043 if (dmastat & (DFIFOFULL|INTSTAT))
2044 break;
2045 }
2046
2047 if (dmastat & DFIFOFULL)
2048 xfer = DINAMOUNT;
2049 else {
2050 while ((inb(SSTAT2) & SEMPTY) == 0)
2051 ;
2052 xfer = inb(FIFOSTAT);
2053 done = 1;
2054 }
2055
2056 xfer = min(xfer, aic->dleft);
2057
2058 #if AIC_USE_DWORDS
2059 if (xfer >= 12) {
2060 insl(DMADATALONG, aic->dp, xfer/4);
2061 aic->dleft -= xfer & ~3;
2062 aic->dp += xfer & ~3;
2063 xfer &= 3;
2064 }
2065 #else
2066 if (xfer >= 8) {
2067 insw(DMADATA, aic->dp, xfer/2);
2068 aic->dleft -= xfer & ~1;
2069 aic->dp += xfer & ~1;
2070 xfer &= 1;
2071 }
2072 #endif
2073
2074 if (xfer) {
2075 outb(DMACNTRL0, ENDMA|B8MODE|INTEN);
2076 insb(DMADATA, aic->dp, xfer);
2077 aic->dleft -= xfer;
2078 aic->dp += xfer;
2079 outb(DMACNTRL0, ENDMA|DWORDPIO|INTEN);
2080 }
2081
2082 if (done)
2083 break;
2084 }
2085
2086 #if 0
2087 if (aic->dleft)
2088 printf("residual of %d\n", aic->dleft);
2089 #endif
2090
2091 aic->progress = olddleft != aic->dleft;
2092 /* Some SCSI-devices are rude enough to transfer more data than what
2093 * was requested, e.g. 2048 bytes from a CD-ROM instead of the
2094 * requested 512. Test for progress, i.e. real transfers. If no real
2095 * transfers have been performed (acb->dleft is probably already zero)
2096 * and the FIFO is not empty, waste some bytes....
2097 */
2098 if (!aic->progress) {
2099 int extra = 0;
2100 LOGLINE(aic);
2101
2102 for (;;) {
2103 dmastat = inb(DMASTAT);
2104 if (dmastat & DFIFOEMP)
2105 break;
2106 (void) inb(DMADATA); /* Throw it away */
2107 extra++;
2108 }
2109
2110 AIC_MISC(("aic: %d extra bytes from %d:%d\n", extra,
2111 acb->xs->sc_link->target, acb->xs->sc_link->lun));
2112 aic->progress = extra;
2113 }
2114
2115 /* Stop the FIFO data path */
2116 outb(SXFRCTL0, CHEN);
2117
2118 outb(DMACNTRL0, RSTFIFO|INTEN);
2119 /* Come back when REQ is set again */
2120 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT);
2121 LOGLINE(aic);
2122 }
2123
2124
2125 /*
2126 * This is the workhorse routine of the driver.
2127 * Deficiencies (for now):
2128 * 1) always uses programmed I/O
2129 * 2) doesn't support synchronous transfers properly (yet)
2130 */
2131
2132 static void
2133 aicintr(int unit)
2134 {
2135 struct aic_data *aic = aicdata[unit];
2136 register struct acb *acb;
2137 register struct scsi_link *sc;
2138 register u_short iobase = aic->iobase;
2139 struct aic_tinfo *ti;
2140 u_char sstat0, sstat1, sstat2, sxfrctl0;
2141
2142
2143 LOGLINE(aic);
2144 /* Clear INTEN. This is important if we're running with edge
2145 * triggered interrupts as we don't guarantee that all interrupts will
2146 * be served during one single invocation of this routine, i.e. we may
2147 * need another edge.
2148 */
2149 outb(DMACNTRL0, 0);
2150 AIC_TRACE(("aicintr\n"));
2151
2152 /*
2153 * 1st check for abnormal conditions, such as reset or parity errors
2154 */
2155 sstat1 = inb(SSTAT1);
2156 AIC_MISC(("s1:0x%02x ", sstat1));
2157 if (sstat1 & (SCSIRSTI|SCSIPERR)) {
2158 if (sstat1 & SCSIRSTI) {
2159 printf("aic: reset in -- reinitializing....\n");
2160 aic_init(aic); /* Restart everything */
2161 LOGLINE(aic);
2162 outb(DMACNTRL0, INTEN);
2163 return;
2164 } else {
2165 printf("aic: SCSI bus parity error\n");
2166 outb(CLRSINT1, CLRSCSIPERR);
2167 if (aic->prevphase == PH_MSGI)
2168 aic_sched_msgout(SEND_PARITY_ERROR);
2169 else
2170 aic_sched_msgout(SEND_INIT_DET_ERR);
2171 }
2172 }
2173
2174 /*
2175 * If we're not already busy doing something test for the following
2176 * conditions:
2177 * 1) We have been reselected by something
2178 * 2) We have selected something successfully
2179 * 3) Our selection process has timed out
2180 * 4) This is really a bus free interrupt just to get a new command
2181 * going?
2182 * 5) Spurious interrupt?
2183 */
2184 sstat0 = inb(SSTAT0);
2185 AIC_MISC(("s0:0x%02x ", sstat0));
2186 if (aic->state != AIC_HASNEXUS) { /* No nexus yet */
2187 if (sstat0 & SELDI) {
2188 LOGLINE(aic);
2189 /* We have been reselected. Things to do:
2190 * a) If we're trying to select something ourselves
2191 * back off the current command.
2192 * b) "Wait" for a message in phase (IDENTIFY)
2193 * c) Call aic_msgin() to get the identify message and
2194 * retrieve the disconnected command from the wait
2195 * queue.
2196 */
2197 AIC_MISC(("reselect "));
2198 /* If we're trying to select a target ourselves,
2199 * push our command back into the rdy list.
2200 */
2201 if (aic->state == AIC_SELECTING) {
2202 AIC_MISC(("backoff selector "));
2203 TAILQ_INSERT_HEAD(&aic->ready_list, aic->nexus,
2204 chain);
2205 aic->nexus = NULL;
2206 }
2207 aic->state = AIC_RESELECTED;
2208 /* Clear interrupts, disable future selection stuff
2209 * including select interrupts and timeouts
2210 */
2211 outb(CLRSINT0, CLRSELDI);
2212 outb(SCSISEQ, 0);
2213 outb(SIMODE0, 0);
2214 /* Setup chip so we may detect spurious busfree
2215 * conditions later.
2216 */
2217 outb(CLRSINT1, CLRBUSFREE);
2218 outb(SIMODE1, ENSCSIRST|ENBUSFREE|
2219 ENSCSIPERR|ENREQINIT);
2220 /* Now, we're expecting an IDENTIFY message. */
2221 aic->phase = aicphase(aic);
2222 if (aic->phase & PH_PSBIT) {
2223 LOGLINE(aic);
2224 outb(DMACNTRL0, INTEN);
2225 return; /* Come back when REQ is set */
2226 }
2227 if (aic->phase == PH_MSGI)
2228 aic_msgin(aic); /* Handle identify message */
2229 else {
2230 /* Things are seriously fucked up.
2231 * Pull the brakes, i.e. RST
2232 */
2233 printf("aic at line %d: target didn't identify\n", __LINE__);
2234 Debugger("aic6360");
2235 fatal_if_no_DDB();
2236 aic_init(aic);
2237 return;
2238 }
2239 if (aic->state != AIC_HASNEXUS) {/* IDENTIFY fail?! */
2240 printf("aic at line %d: identify failed\n",
2241 __LINE__);
2242 aic_init(aic);
2243 return;
2244 } else {
2245 outb(SIMODE1,
2246 ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT);
2247 /* Fallthrough to HASNEXUS part of aicintr */
2248 }
2249 } else if (sstat0 & SELDO) {
2250 LOGLINE(aic);
2251 /* We have selected a target. Things to do:
2252 * a) Determine what message(s) to send.
2253 * b) Verify that we're still selecting the target.
2254 * c) Mark device as busy.
2255 */
2256 acb = aic->nexus;
2257 if (!acb) {
2258 printf("aic at line %d: missing acb", __LINE__);
2259 Debugger("aic6360");
2260 fatal_if_no_DDB();
2261 }
2262 sc = acb->xs->sc_link;
2263 ti = &aic->tinfo[sc->target];
2264 if (acb->xs->flags & SCSI_RESET)
2265 aic->msgpriq = SEND_DEV_RESET;
2266 else if (ti->flags & DO_NEGOTIATE)
2267 aic->msgpriq = SEND_IDENTIFY|SEND_SDTR;
2268 else
2269 aic->msgpriq = SEND_IDENTIFY;
2270 /* Setup chip to enable later testing for busfree
2271 * conditions
2272 */
2273 outb(CLRSINT1, CLRBUSFREE);
2274 outb(SCSISEQ, 0); /* Stop selection stuff */
2275 nandreg(SIMODE0, ENSELDO); /* No more selectout ints */
2276 sstat0 = inb(SSTAT0);
2277 if (sstat0 & SELDO) { /* Still selected!? */
2278 outb(SIMODE0, 0);
2279 outb(SIMODE1, ENSCSIRST|ENSCSIPERR|
2280 ENBUSFREE|ENREQINIT);
2281 aic->state = AIC_HASNEXUS;
2282 aic->flags = 0;
2283 aic->prevphase = PH_INVALID;
2284 aic->dp = acb->daddr;
2285 aic->dleft = acb->dleft;
2286 ti->lubusy |= (1<<sc->lun);
2287 AIC_MISC(("select ok "));
2288 } else {
2289 /* Has seen busfree since selection, i.e.
2290 * a "spurious" selection. Shouldn't happen.
2291 */
2292 printf("aic: unexpected busfree\n");
2293 acb->xs->error = XS_DRIVER_STUFFUP;
2294 untimeout(aic_timeout, (caddr_t)acb,
2295 acb->xs->timeout_ch);
2296 aic_done(acb);
2297 }
2298 LOGLINE(aic);
2299 outb(DMACNTRL0, INTEN);
2300 return;
2301 } else if (sstat1 & SELTO) {
2302 /* Selection timed out. What to do:
2303 * Disable selections out and fail the command with
2304 * code XS_TIMEOUT.
2305 */
2306 acb = aic->nexus;
2307 if (!acb) {
2308 printf("aic at line %d: missing acb", __LINE__);
2309 Debugger("aic6360");
2310 fatal_if_no_DDB();
2311 }
2312 outb(SCSISEQ, ENRESELI|ENAUTOATNP);
2313 outb(SXFRCTL1, 0);
2314 outb(CLRSINT1, CLRSELTIMO);
2315 aic->state = AIC_IDLE;
2316 acb->xs->error = XS_TIMEOUT;
2317 untimeout(aic_timeout, (caddr_t)acb,
2318 acb->xs->timeout_ch);
2319 aic_done(acb);
2320 LOGLINE(aic);
2321 outb(DMACNTRL0, INTEN);
2322 return;
2323 } else {
2324 /* Assume a bus free interrupt. What to do:
2325 * Start selecting.
2326 */
2327 if (aic->state == AIC_IDLE)
2328 aic_sched(aic);
2329 #if AIC_DEBUG
2330 else
2331 AIC_MISC(("Extra aic6360 interrupt."));
2332 #endif
2333 LOGLINE(aic);
2334 outb(DMACNTRL0, INTEN);
2335 return;
2336 }
2337 }
2338 /* Driver is now in state AIC_HASNEXUS, i.e. we have a current command
2339 * working the SCSI bus.
2340 */
2341 acb = aic->nexus;
2342 if (aic->state != AIC_HASNEXUS || acb == NULL) {
2343 printf("aic: no nexus!!\n");
2344 Debugger("aic6360");
2345 fatal_if_no_DDB();
2346 }
2347
2348 /* What sort of transfer does the bus signal? */
2349 aic->phase = aicphase(aic);
2350 if (!(aic->phase & PH_PSBIT)) /* not a pseudo phase */
2351 outb(SCSISIGO, aic->phase);
2352 outb(CLRSINT1, CLRPHASECHG);
2353 /* These interrupts are enabled by default:
2354 * SCSIRSTI, SCSIPERR, BUSFREE, REQINIT
2355 */
2356 switch (aic->phase) {
2357 case PH_MSGO:
2358 LOGLINE(aic);
2359 if (aic_debug & AIC_SHOWMISC)
2360 printf("PH_MSGO ");
2361 aic_msgout(aic);
2362 aic->prevphase = PH_MSGO;
2363 /* Setup interrupts before leaving */
2364 outb(SIMODE0, 0);
2365 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT);
2366 /* Enabled ints: SCSIPERR, SCSIRSTI (unexpected)
2367 * REQINIT (expected) BUSFREE (possibly expected)
2368 */
2369 break;
2370 case PH_CMD: /* CMD phase & REQ asserted */
2371 LOGLINE(aic);
2372 if (aic_debug & AIC_SHOWMISC)
2373 printf("PH_CMD 0x%02x (%d) ",
2374 acb->cmd.opcode, acb->clen);
2375 outb(SCSISIGO, PH_CMD);
2376 /* Use FIFO for CMDs. Assumes that no cmd > 128 bytes. OK? */
2377 /* Clear hostFIFO and enable EISA-hostFIFO transfers */
2378 outb(DMACNTRL0, WRITE|RSTFIFO|INTEN); /* 3(4) */
2379 /* Clear scsiFIFO and enable SCSI-interface
2380 & hostFIFO-scsiFIFO transfers */
2381 outb(SXFRCTL0, CHEN|CLRCH|CLRSTCNT); /* 4 */
2382 outb(SXFRCTL0, SCSIEN|DMAEN|CHEN); /* 5 */
2383 outb(DMACNTRL0, ENDMA|WRITE|INTEN); /* 3+6 */
2384 /* What (polled) interrupts to enable */
2385 outb(SIMODE1, ENPHASEMIS|ENSCSIRST|ENBUSFREE|ENSCSIPERR);
2386 /* DFIFOEMP is set, FIFO (128 byte) is always big enough */
2387 outsw(DMADATA, (short *)&acb->cmd, acb->clen>>1);
2388
2389 /* Wait for SCSI FIFO to drain */
2390 LOGLINE(aic);
2391 do {
2392 sstat2 = inb(SSTAT2);
2393 } while (!(sstat2 & SEMPTY) && !(inb(DMASTAT) & INTSTAT));
2394 if (!(inb(SSTAT2) & SEMPTY)) {
2395 printf("aic at line %d: SCSI-FIFO didn't drain\n",
2396 __LINE__);
2397 Debugger("aic6360");
2398 fatal_if_no_DDB();
2399 acb->xs->error = XS_DRIVER_STUFFUP;
2400 untimeout(aic_timeout, (caddr_t)acb,
2401 acb->xs->timeout_ch);
2402 aic_done(acb);
2403 aic_init(aic);
2404 return;
2405 }
2406 outb(SXFRCTL0, CHEN); /* Clear SCSIEN & DMAEN */
2407 outb(SIMODE0, 0);
2408 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR);
2409 LOGLINE(aic);
2410 do {
2411 sxfrctl0 = inb(SXFRCTL0);
2412 } while (sxfrctl0 & SCSIEN && !(inb(DMASTAT) & INTSTAT));
2413 if (sxfrctl0 & SCSIEN) {
2414 printf("aic at line %d: scsi xfer never finished\n",
2415 __LINE__);
2416 Debugger("aic6360");
2417 fatal_if_no_DDB();
2418 acb->xs->error = XS_DRIVER_STUFFUP;
2419 untimeout(aic_timeout, (caddr_t)acb,
2420 acb->xs->timeout_ch);
2421 aic_done(acb);
2422 aic_init(aic);
2423 return;
2424 }
2425 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT);
2426 /* Enabled ints: BUSFREE, SCSIPERR, SCSIRSTI (unexpected)
2427 * REQINIT (expected)
2428 */
2429 aic->prevphase = PH_CMD;
2430 break;
2431 case PH_DOUT:
2432 LOGLINE(aic);
2433 AIC_MISC(("PH_DOUT [%d] ",aic->dleft));
2434 aic_dataout(aic);
2435 aic->prevphase = PH_DOUT;
2436 break;
2437 case PH_MSGI:
2438 LOGLINE(aic);
2439 if (aic_debug & AIC_SHOWMISC)
2440 printf("PH_MSGI ");
2441 aic_msgin(aic);
2442 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT);
2443 aic->prevphase = PH_MSGI;
2444 break;
2445 case PH_DIN:
2446 LOGLINE(aic);
2447 if (aic_debug & AIC_SHOWMISC)
2448 printf("PH_DIN ");
2449 aic_datain(aic);
2450 aic->prevphase = PH_DIN;
2451 break;
2452 case PH_STAT:
2453 LOGLINE(aic);
2454 if (aic_debug & AIC_SHOWMISC)
2455 printf("PH_STAT ");
2456 outb(SCSISIGO, PH_STAT);
2457 outb(SXFRCTL0, CHEN|SPIOEN);
2458 outb(DMACNTRL0, RSTFIFO|INTEN);
2459 outb(SIMODE1, ENSCSIRST|ENPHASEMIS|ENBUSFREE|ENSCSIPERR);
2460 acb->stat = inb(SCSIDAT);
2461 outb(SXFRCTL0, CHEN);
2462 if (aic_debug & AIC_SHOWMISC)
2463 printf("0x%02x ", acb->stat);
2464 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT);
2465 aic->prevphase = PH_STAT;
2466 break;
2467 case PH_INVALID:
2468 LOGLINE(aic);
2469 break;
2470 case PH_BUSFREE:
2471 LOGLINE(aic);
2472 if (aic->flags & AIC_BUSFREE_OK) { /*It's fun the 1st time.. */
2473 aic->flags &= ~AIC_BUSFREE_OK;
2474 } else {
2475 printf("aic at line %d: unexpected busfree phase\n",
2476 __LINE__);
2477 Debugger("aic6360");
2478 fatal_if_no_DDB();
2479 }
2480 break;
2481 default:
2482 printf("aic at line %d: bogus bus phase\n", __LINE__);
2483 Debugger("aic6360");
2484 fatal_if_no_DDB();
2485 break;
2486 }
2487 LOGLINE(aic);
2488 outb(DMACNTRL0, INTEN);
2489 return;
2490 }
2491
2492 static void
2493 aic_timeout(void *arg1) {
2494 int s = splbio();
2495 struct acb *acb = (struct acb *)arg1;
2496 int unit;
2497 struct aic_data *aic;
2498
2499 unit = acb->xs->sc_link->adapter_unit;
2500 aic = aicdata[unit];
2501 sc_print_addr(acb->xs->sc_link);
2502 acb->xs->error = XS_TIMEOUT;
2503 printf("timed out\n");
2504
2505 aic_done(acb);
2506 splx(s);
2507 }
2508
2509 #if AIC_DEBUG
2510 /*
2511 * The following functions are mostly used for debugging purposes, either
2512 * directly called from the driver or from the kernel debugger.
2513 */
2514
2515 void
2516 aic_show_scsi_cmd(acb)
2517 struct acb *acb;
2518 {
2519 u_char *b = (u_char *)&acb->cmd;
2520 struct scsi_link *sc = acb->xs->sc_link;
2521 int i;
2522
2523 sc_print_addr(sc);
2524 if (!(acb->xs->flags & SCSI_RESET)) {
2525 for (i = 0; i < acb->clen; i++) {
2526 if (i)
2527 printf(",");
2528 printf("%x", b[i]);
2529 }
2530 printf("\n");
2531 } else
2532 printf("RESET\n");
2533 }
2534
2535 void
2536 aic_print_acb(acb)
2537 struct acb *acb;
2538 {
2539
2540 printf("acb@%x xs=%x flags=%x", acb, acb->xs, acb->flags);
2541 printf(" daddr=%x dleft=%d stat=%x\n",
2542 (long)acb->daddr, acb->dleft, acb->stat);
2543 aic_show_scsi_cmd(acb);
2544 }
2545
2546 void
2547 aic_print_active_acb()
2548 {
2549 struct acb *acb;
2550 struct aic_data *aic = aicdata[0];
2551
2552 printf("ready list:\n");
2553 for (acb = aic->ready_list.tqh_first; acb; acb = acb->chain.tqe_next)
2554 aic_print_acb(acb);
2555 printf("nexus:\n");
2556 if (aic->nexus)
2557 aic_print_acb(aic->nexus);
2558 printf("nexus list:\n");
2559 for (acb = aic->nexus_list.tqh_first; acb; acb = acb->chain.tqe_next)
2560 aic_print_acb(acb);
2561 }
2562
2563 void
2564 aic_dump6360()
2565 {
2566 u_short iobase = 0x340;
2567
2568 printf("aic6360: SCSISEQ=%x SXFRCTL0=%x SXFRCTL1=%x SCSISIGI=%x\n",
2569 inb(SCSISEQ), inb(SXFRCTL0), inb(SXFRCTL1), inb(SCSISIGI));
2570 printf(" SSTAT0=%x SSTAT1=%x SSTAT2=%x SSTAT3=%x SSTAT4=%x\n",
2571 inb(SSTAT0), inb(SSTAT1), inb(SSTAT2), inb(SSTAT3), inb(SSTAT4));
2572 printf(" SIMODE0=%x SIMODE1=%x DMACNTRL0=%x DMACNTRL1=%x DMASTAT=%x\n",
2573 inb(SIMODE0), inb(SIMODE1), inb(DMACNTRL0), inb(DMACNTRL1),
2574 inb(DMASTAT));
2575 printf(" FIFOSTAT=%d SCSIBUS=0x%x\n",
2576 inb(FIFOSTAT), inb(SCSIBUS));
2577 }
2578
2579 void
2580 aic_dump_driver()
2581 {
2582 struct aic_data *aic = aicdata[0];
2583 struct aic_tinfo *ti;
2584 int i;
2585
2586 printf("nexus=%x phase=%x prevphase=%x\n", aic->nexus, aic->phase,
2587 aic->prevphase);
2588 printf("state=%x msgin=%x msgpriq=%x msgout=%x imlen=%d omlen=%d\n",
2589 aic->state, aic->imess[0], aic->msgpriq, aic->msgout, aic->imlen,
2590 aic->omlen);
2591 printf("history:");
2592 i = aic->hp;
2593 do {
2594 printf(" %d", aic->history[i]);
2595 i = (i + 1) % AIC_HSIZE;
2596 } while (i != aic->hp);
2597 printf("*\n");
2598 for (i = 0; i < 7; i++) {
2599 ti = &aic->tinfo[i];
2600 printf("tinfo%d: %d cmds %d disconnects %d timeouts",
2601 i, ti->cmds, ti->dconns, ti->touts);
2602 printf(" %d senses flags=%x\n", ti->senses, ti->flags);
2603 }
2604 }
2605 #endif
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